1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2016 - 2018 Cavium Inc.
10 #include <rte_string_fns.h>
12 #include "qede_ethdev.h"
15 #define QEDE_ALARM_TIMEOUT_US 100000
17 /* Global variable to hold absolute path of fw file */
18 char qede_fw_file[PATH_MAX];
20 static const char * const QEDE_DEFAULT_FIRMWARE =
21 "/lib/firmware/qed/qed_init_values-8.40.33.0.bin";
24 qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params)
28 for (i = 0; i < edev->num_hwfns; i++) {
29 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
30 p_hwfn->pf_params = *params;
34 static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev)
36 edev->regview = pci_dev->mem_resource[0].addr;
37 edev->doorbells = pci_dev->mem_resource[2].addr;
38 edev->db_size = pci_dev->mem_resource[2].len;
42 qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev,
43 uint32_t dp_module, uint8_t dp_level, bool is_vf)
45 struct ecore_hw_prepare_params hw_prepare_params;
48 ecore_init_struct(edev);
49 edev->drv_type = DRV_ID_DRV_TYPE_LINUX;
50 /* Protocol type is always fixed to PROTOCOL_ETH */
55 ecore_init_dp(edev, dp_module, dp_level, NULL);
56 qed_init_pci(edev, pci_dev);
58 memset(&hw_prepare_params, 0, sizeof(hw_prepare_params));
61 hw_prepare_params.acquire_retry_cnt = ECORE_VF_ACQUIRE_THRESH;
63 hw_prepare_params.personality = ECORE_PCI_ETH;
64 hw_prepare_params.drv_resc_alloc = false;
65 hw_prepare_params.chk_reg_fifo = false;
66 hw_prepare_params.initiate_pf_flr = true;
67 hw_prepare_params.allow_mdump = false;
68 hw_prepare_params.b_en_pacing = false;
69 hw_prepare_params.epoch = (u32)time(NULL);
70 rc = ecore_hw_prepare(edev, &hw_prepare_params);
72 DP_ERR(edev, "hw prepare failed\n");
79 static int qed_nic_setup(struct ecore_dev *edev)
83 rc = ecore_resc_alloc(edev);
87 DP_INFO(edev, "Allocated qed resources\n");
88 ecore_resc_setup(edev);
93 #ifdef CONFIG_ECORE_ZIPPED_FW
94 static int qed_alloc_stream_mem(struct ecore_dev *edev)
98 for_each_hwfn(edev, i) {
99 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
101 p_hwfn->stream = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
102 sizeof(*p_hwfn->stream));
110 static void qed_free_stream_mem(struct ecore_dev *edev)
114 for_each_hwfn(edev, i) {
115 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
120 OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream);
125 #ifdef CONFIG_ECORE_BINARY_FW
126 static int qed_load_firmware_data(struct ecore_dev *edev)
130 const char *fw = RTE_LIBRTE_QEDE_FW;
132 if (strcmp(fw, "") == 0)
133 strcpy(qede_fw_file, QEDE_DEFAULT_FIRMWARE);
135 strcpy(qede_fw_file, fw);
137 fd = open(qede_fw_file, O_RDONLY);
139 DP_ERR(edev, "Can't open firmware file\n");
143 if (fstat(fd, &st) < 0) {
144 DP_ERR(edev, "Can't stat firmware file\n");
149 edev->firmware = rte_zmalloc("qede_fw", st.st_size,
150 RTE_CACHE_LINE_SIZE);
151 if (!edev->firmware) {
152 DP_ERR(edev, "Can't allocate memory for firmware\n");
157 if (read(fd, edev->firmware, st.st_size) != st.st_size) {
158 DP_ERR(edev, "Can't read firmware data\n");
163 edev->fw_len = st.st_size;
164 if (edev->fw_len < 104) {
165 DP_ERR(edev, "Invalid fw size: %" PRIu64 "\n",
176 static void qed_handle_bulletin_change(struct ecore_hwfn *hwfn)
178 uint8_t mac[ETH_ALEN], is_mac_exist, is_mac_forced;
180 is_mac_exist = ecore_vf_bulletin_get_forced_mac(hwfn, mac,
182 if (is_mac_exist && is_mac_forced)
183 rte_memcpy(hwfn->hw_info.hw_mac_addr, mac, ETH_ALEN);
185 /* Always update link configuration according to bulletin */
186 qed_link_update(hwfn);
189 static void qede_vf_task(void *arg)
191 struct ecore_hwfn *p_hwfn = arg;
194 /* Read the bulletin board, and re-schedule the task */
195 ecore_vf_read_bulletin(p_hwfn, &change);
197 qed_handle_bulletin_change(p_hwfn);
199 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, p_hwfn);
202 static void qed_start_iov_task(struct ecore_dev *edev)
204 struct ecore_hwfn *p_hwfn;
207 for_each_hwfn(edev, i) {
208 p_hwfn = &edev->hwfns[i];
210 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task,
215 static void qed_stop_iov_task(struct ecore_dev *edev)
217 struct ecore_hwfn *p_hwfn;
220 for_each_hwfn(edev, i) {
221 p_hwfn = &edev->hwfns[i];
223 rte_eal_alarm_cancel(qede_vf_task, p_hwfn);
226 static int qed_slowpath_start(struct ecore_dev *edev,
227 struct qed_slowpath_params *params)
229 struct ecore_drv_load_params drv_load_params;
230 struct ecore_hw_init_params hw_init_params;
231 struct ecore_mcp_drv_version drv_version;
232 const uint8_t *data = NULL;
233 struct ecore_hwfn *hwfn;
234 struct ecore_ptt *p_ptt;
238 #ifdef CONFIG_ECORE_BINARY_FW
239 rc = qed_load_firmware_data(edev);
241 DP_ERR(edev, "Failed to find fw file %s\n",
246 hwfn = ECORE_LEADING_HWFN(edev);
247 if (edev->num_hwfns == 1) { /* skip aRFS for 100G device */
248 p_ptt = ecore_ptt_acquire(hwfn);
250 ECORE_LEADING_HWFN(edev)->p_arfs_ptt = p_ptt;
252 DP_ERR(edev, "Failed to acquire PTT for flowdir\n");
259 rc = qed_nic_setup(edev);
263 /* set int_coalescing_mode */
264 edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE;
266 #ifdef CONFIG_ECORE_ZIPPED_FW
268 /* Allocate stream for unzipping */
269 rc = qed_alloc_stream_mem(edev);
271 DP_ERR(edev, "Failed to allocate stream memory\n");
277 qed_start_iov_task(edev);
279 #ifdef CONFIG_ECORE_BINARY_FW
281 data = (const uint8_t *)edev->firmware + sizeof(u32);
284 /* Start the slowpath */
285 memset(&hw_init_params, 0, sizeof(hw_init_params));
286 hw_init_params.b_hw_start = true;
287 hw_init_params.int_mode = params->int_mode;
288 hw_init_params.allow_npar_tx_switch = true;
289 hw_init_params.bin_fw_data = data;
291 memset(&drv_load_params, 0, sizeof(drv_load_params));
292 drv_load_params.mfw_timeout_val = ECORE_LOAD_REQ_LOCK_TO_DEFAULT;
293 drv_load_params.avoid_eng_reset = false;
294 drv_load_params.override_force_load = ECORE_OVERRIDE_FORCE_LOAD_ALWAYS;
295 hw_init_params.avoid_eng_affin = false;
296 hw_init_params.p_drv_load_params = &drv_load_params;
298 rc = ecore_hw_init(edev, &hw_init_params);
300 DP_ERR(edev, "ecore_hw_init failed\n");
304 DP_INFO(edev, "HW inited and function started\n");
307 hwfn = ECORE_LEADING_HWFN(edev);
308 drv_version.version = (params->drv_major << 24) |
309 (params->drv_minor << 16) |
310 (params->drv_rev << 8) | (params->drv_eng);
311 strlcpy((char *)drv_version.name, (const char *)params->name,
312 sizeof(drv_version.name));
313 rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
316 DP_ERR(edev, "Failed sending drv version command\n");
321 ecore_reset_vport_stats(edev);
328 qed_stop_iov_task(edev);
329 #ifdef CONFIG_ECORE_ZIPPED_FW
330 qed_free_stream_mem(edev);
333 ecore_resc_free(edev);
335 #ifdef CONFIG_ECORE_BINARY_FW
338 rte_free(edev->firmware);
339 edev->firmware = NULL;
342 qed_stop_iov_task(edev);
348 qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info)
350 struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(edev);
351 struct ecore_ptt *ptt = NULL;
352 struct ecore_tunnel_info *tun = &edev->tunnel;
354 memset(dev_info, 0, sizeof(struct qed_dev_info));
356 if (tun->vxlan.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
357 tun->vxlan.b_mode_enabled)
358 dev_info->vxlan_enable = true;
360 if (tun->l2_gre.b_mode_enabled && tun->ip_gre.b_mode_enabled &&
361 tun->l2_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
362 tun->ip_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
363 dev_info->gre_enable = true;
365 if (tun->l2_geneve.b_mode_enabled && tun->ip_geneve.b_mode_enabled &&
366 tun->l2_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
367 tun->ip_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
368 dev_info->geneve_enable = true;
370 dev_info->num_hwfns = edev->num_hwfns;
371 dev_info->is_mf_default = IS_MF_DEFAULT(&edev->hwfns[0]);
372 dev_info->mtu = ECORE_LEADING_HWFN(edev)->hw_info.mtu;
373 dev_info->dev_type = edev->type;
375 rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
378 dev_info->fw_major = FW_MAJOR_VERSION;
379 dev_info->fw_minor = FW_MINOR_VERSION;
380 dev_info->fw_rev = FW_REVISION_VERSION;
381 dev_info->fw_eng = FW_ENGINEERING_VERSION;
384 dev_info->b_inter_pf_switch =
385 OSAL_TEST_BIT(ECORE_MF_INTER_PF_SWITCH, &edev->mf_bits);
386 if (!OSAL_TEST_BIT(ECORE_MF_DISABLE_ARFS, &edev->mf_bits))
387 dev_info->b_arfs_capable = true;
388 dev_info->tx_switching = false;
390 dev_info->smart_an = ecore_mcp_is_smart_an_supported(p_hwfn);
392 ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev));
394 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
395 &dev_info->mfw_rev, NULL);
397 ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt,
398 &dev_info->flash_size);
400 /* Workaround to allow PHY-read commands for
403 if (ECORE_IS_BB_B0(edev))
404 dev_info->flash_size = 0xffffffff;
406 ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt);
409 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
410 &dev_info->mfw_rev, NULL);
417 qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info)
422 memset(info, 0, sizeof(*info));
424 info->num_tc = 1 /* @@@TBD aelior MULTI_COS */;
427 int max_vf_vlan_filters = 0;
429 info->num_queues = 0;
430 for_each_hwfn(edev, i)
432 FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE);
434 if (IS_ECORE_SRIOV(edev))
435 max_vf_vlan_filters = edev->p_iov_info->total_vfs *
436 ECORE_ETH_VF_NUM_VLAN_FILTERS;
437 info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN) -
440 rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
443 ecore_vf_get_num_rxqs(ECORE_LEADING_HWFN(edev),
445 if (ECORE_IS_CMT(edev)) {
446 ecore_vf_get_num_rxqs(&edev->hwfns[1], &queues);
447 info->num_queues += queues;
450 ecore_vf_get_num_vlan_filters(&edev->hwfns[0],
451 (u8 *)&info->num_vlan_filters);
453 ecore_vf_get_port_mac(&edev->hwfns[0],
454 (uint8_t *)&info->port_mac);
456 info->is_legacy = ecore_vf_get_pre_fp_hsi(&edev->hwfns[0]);
459 qed_fill_dev_info(edev, &info->common);
462 memset(&info->common.hw_mac, 0, RTE_ETHER_ADDR_LEN);
467 static void qed_set_name(struct ecore_dev *edev, char name[NAME_SIZE])
471 rte_memcpy(edev->name, name, NAME_SIZE);
472 for_each_hwfn(edev, i) {
473 snprintf(edev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i);
478 qed_sb_init(struct ecore_dev *edev, struct ecore_sb_info *sb_info,
479 void *sb_virt_addr, dma_addr_t sb_phy_addr, uint16_t sb_id)
481 struct ecore_hwfn *p_hwfn;
484 uint8_t n_hwfns = edev->num_hwfns;
487 hwfn_index = sb_id % n_hwfns;
488 p_hwfn = &edev->hwfns[hwfn_index];
489 rel_sb_id = sb_id / n_hwfns;
491 DP_INFO(edev, "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
492 hwfn_index, rel_sb_id, sb_id);
494 rc = ecore_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info,
495 sb_virt_addr, sb_phy_addr, rel_sb_id);
500 static void qed_fill_link(struct ecore_hwfn *hwfn,
501 __rte_unused struct ecore_ptt *ptt,
502 struct qed_link_output *if_link)
504 struct ecore_mcp_link_params params;
505 struct ecore_mcp_link_state link;
506 struct ecore_mcp_link_capabilities link_caps;
509 memset(if_link, 0, sizeof(*if_link));
511 /* Prepare source inputs */
512 if (IS_PF(hwfn->p_dev)) {
513 rte_memcpy(¶ms, ecore_mcp_get_link_params(hwfn),
515 rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link));
516 rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn),
519 ecore_vf_read_bulletin(hwfn, &change);
520 ecore_vf_get_link_params(hwfn, ¶ms);
521 ecore_vf_get_link_state(hwfn, &link);
522 ecore_vf_get_link_caps(hwfn, &link_caps);
525 /* Set the link parameters to pass to protocol driver */
527 if_link->link_up = true;
530 if_link->speed = link.speed;
532 if_link->duplex = QEDE_DUPLEX_FULL;
534 /* Fill up the native advertised speed cap mask */
535 if_link->adv_speed = params.speed.advertised_speeds;
537 if (params.speed.autoneg)
538 if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG;
540 if (params.pause.autoneg || params.pause.forced_rx ||
541 params.pause.forced_tx)
542 if_link->supported_caps |= QEDE_SUPPORTED_PAUSE;
544 if (params.pause.autoneg)
545 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
547 if (params.pause.forced_rx)
548 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE;
550 if (params.pause.forced_tx)
551 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE;
553 if (link_caps.default_eee == ECORE_MCP_EEE_UNSUPPORTED) {
554 if_link->eee_supported = false;
556 if_link->eee_supported = true;
557 if_link->eee_active = link.eee_active;
558 if_link->sup_caps = link_caps.eee_speed_caps;
559 /* MFW clears adv_caps on eee disable; use configured value */
560 if_link->eee.adv_caps = link.eee_adv_caps ? link.eee_adv_caps :
562 if_link->eee.lp_adv_caps = link.eee_lp_adv_caps;
563 if_link->eee.enable = params.eee.enable;
564 if_link->eee.tx_lpi_enable = params.eee.tx_lpi_enable;
565 if_link->eee.tx_lpi_timer = params.eee.tx_lpi_timer;
570 qed_get_current_link(struct ecore_dev *edev, struct qed_link_output *if_link)
572 struct ecore_hwfn *hwfn;
573 struct ecore_ptt *ptt;
575 hwfn = &edev->hwfns[0];
577 ptt = ecore_ptt_acquire(hwfn);
579 DP_NOTICE(hwfn, true, "Failed to fill link; No PTT\n");
581 qed_fill_link(hwfn, ptt, if_link);
584 ecore_ptt_release(hwfn, ptt);
586 qed_fill_link(hwfn, NULL, if_link);
590 static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params)
592 struct ecore_hwfn *hwfn;
593 struct ecore_ptt *ptt;
594 struct ecore_mcp_link_params *link_params;
600 /* The link should be set only once per PF */
601 hwfn = &edev->hwfns[0];
603 ptt = ecore_ptt_acquire(hwfn);
607 link_params = ecore_mcp_get_link_params(hwfn);
608 if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG)
609 link_params->speed.autoneg = params->autoneg;
611 if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) {
612 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
613 link_params->pause.autoneg = true;
615 link_params->pause.autoneg = false;
616 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE)
617 link_params->pause.forced_rx = true;
619 link_params->pause.forced_rx = false;
620 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE)
621 link_params->pause.forced_tx = true;
623 link_params->pause.forced_tx = false;
626 if (params->override_flags & QED_LINK_OVERRIDE_EEE_CONFIG)
627 memcpy(&link_params->eee, ¶ms->eee,
628 sizeof(link_params->eee));
630 rc = ecore_mcp_set_link(hwfn, ptt, params->link_up);
632 ecore_ptt_release(hwfn, ptt);
637 void qed_link_update(struct ecore_hwfn *hwfn)
639 struct ecore_dev *edev = hwfn->p_dev;
640 struct qede_dev *qdev = (struct qede_dev *)edev;
641 struct rte_eth_dev *dev = (struct rte_eth_dev *)qdev->ethdev;
643 if (!qede_link_update(dev, 0))
644 _rte_eth_dev_callback_process(dev,
645 RTE_ETH_EVENT_INTR_LSC, NULL);
648 static int qed_drain(struct ecore_dev *edev)
650 struct ecore_hwfn *hwfn;
651 struct ecore_ptt *ptt;
657 for_each_hwfn(edev, i) {
658 hwfn = &edev->hwfns[i];
659 ptt = ecore_ptt_acquire(hwfn);
661 DP_ERR(hwfn, "Failed to drain NIG; No PTT\n");
664 rc = ecore_mcp_drain(hwfn, ptt);
667 ecore_ptt_release(hwfn, ptt);
673 static int qed_nic_stop(struct ecore_dev *edev)
677 rc = ecore_hw_stop(edev);
678 for (i = 0; i < edev->num_hwfns; i++) {
679 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
681 if (p_hwfn->b_sp_dpc_enabled)
682 p_hwfn->b_sp_dpc_enabled = false;
687 static int qed_slowpath_stop(struct ecore_dev *edev)
689 #ifdef CONFIG_QED_SRIOV
697 #ifdef CONFIG_ECORE_ZIPPED_FW
698 qed_free_stream_mem(edev);
701 #ifdef CONFIG_QED_SRIOV
702 if (IS_QED_ETH_IF(edev))
703 qed_sriov_disable(edev, true);
709 ecore_resc_free(edev);
710 qed_stop_iov_task(edev);
715 static void qed_remove(struct ecore_dev *edev)
720 ecore_hw_remove(edev);
723 static int qed_send_drv_state(struct ecore_dev *edev, bool active)
725 struct ecore_hwfn *hwfn = ECORE_LEADING_HWFN(edev);
726 struct ecore_ptt *ptt;
729 ptt = ecore_ptt_acquire(hwfn);
733 status = ecore_mcp_ov_update_driver_state(hwfn, ptt, active ?
734 ECORE_OV_DRIVER_STATE_ACTIVE :
735 ECORE_OV_DRIVER_STATE_DISABLED);
737 ecore_ptt_release(hwfn, ptt);
742 static int qed_get_sb_info(struct ecore_dev *edev, struct ecore_sb_info *sb,
743 u16 qid, struct ecore_sb_info_dbg *sb_dbg)
745 struct ecore_hwfn *hwfn = &edev->hwfns[qid % edev->num_hwfns];
746 struct ecore_ptt *ptt;
752 ptt = ecore_ptt_acquire(hwfn);
754 DP_ERR(hwfn, "Can't acquire PTT\n");
758 memset(sb_dbg, 0, sizeof(*sb_dbg));
759 rc = ecore_int_get_sb_dbg(hwfn, ptt, sb, sb_dbg);
761 ecore_ptt_release(hwfn, ptt);
765 const struct qed_common_ops qed_common_ops_pass = {
766 INIT_STRUCT_FIELD(probe, &qed_probe),
767 INIT_STRUCT_FIELD(update_pf_params, &qed_update_pf_params),
768 INIT_STRUCT_FIELD(slowpath_start, &qed_slowpath_start),
769 INIT_STRUCT_FIELD(set_name, &qed_set_name),
770 INIT_STRUCT_FIELD(chain_alloc, &ecore_chain_alloc),
771 INIT_STRUCT_FIELD(chain_free, &ecore_chain_free),
772 INIT_STRUCT_FIELD(sb_init, &qed_sb_init),
773 INIT_STRUCT_FIELD(get_sb_info, &qed_get_sb_info),
774 INIT_STRUCT_FIELD(get_link, &qed_get_current_link),
775 INIT_STRUCT_FIELD(set_link, &qed_set_link),
776 INIT_STRUCT_FIELD(drain, &qed_drain),
777 INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop),
778 INIT_STRUCT_FIELD(remove, &qed_remove),
779 INIT_STRUCT_FIELD(send_drv_state, &qed_send_drv_state),
782 const struct qed_eth_ops qed_eth_ops_pass = {
783 INIT_STRUCT_FIELD(common, &qed_common_ops_pass),
784 INIT_STRUCT_FIELD(fill_dev_info, &qed_fill_eth_dev_info),
787 const struct qed_eth_ops *qed_get_eth_ops(void)
789 return &qed_eth_ops_pass;