2 * Copyright (c) 2016 QLogic Corporation.
6 * See LICENSE.qede_pmd for copyright and licensing details.
11 #include <rte_alarm.h>
13 #include "qede_ethdev.h"
15 static uint8_t npar_tx_switching = 1;
18 #define QEDE_ALARM_TIMEOUT_US 100000
20 /* Global variable to hold absolute path of fw file */
21 char fw_file[PATH_MAX];
23 const char *QEDE_DEFAULT_FIRMWARE =
24 "/lib/firmware/qed/qed_init_values-8.14.6.0.bin";
27 qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params)
31 for (i = 0; i < edev->num_hwfns; i++) {
32 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
33 p_hwfn->pf_params = *params;
37 static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev)
39 edev->regview = pci_dev->mem_resource[0].addr;
40 edev->doorbells = pci_dev->mem_resource[2].addr;
44 qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev,
45 enum qed_protocol protocol, uint32_t dp_module,
46 uint8_t dp_level, bool is_vf)
48 struct ecore_hw_prepare_params hw_prepare_params;
49 struct qede_dev *qdev = (struct qede_dev *)edev;
52 ecore_init_struct(edev);
53 qdev->protocol = protocol;
57 ecore_init_dp(edev, dp_module, dp_level, NULL);
58 qed_init_pci(edev, pci_dev);
60 memset(&hw_prepare_params, 0, sizeof(hw_prepare_params));
61 hw_prepare_params.personality = ECORE_PCI_ETH;
62 hw_prepare_params.drv_resc_alloc = false;
63 hw_prepare_params.chk_reg_fifo = false;
64 hw_prepare_params.initiate_pf_flr = true;
65 hw_prepare_params.epoch = (u32)time(NULL);
66 rc = ecore_hw_prepare(edev, &hw_prepare_params);
68 DP_ERR(edev, "hw prepare failed\n");
75 static int qed_nic_setup(struct ecore_dev *edev)
79 rc = ecore_resc_alloc(edev);
83 DP_INFO(edev, "Allocated qed resources\n");
84 ecore_resc_setup(edev);
89 #ifdef CONFIG_ECORE_ZIPPED_FW
90 static int qed_alloc_stream_mem(struct ecore_dev *edev)
94 for_each_hwfn(edev, i) {
95 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
97 p_hwfn->stream = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
98 sizeof(*p_hwfn->stream));
106 static void qed_free_stream_mem(struct ecore_dev *edev)
110 for_each_hwfn(edev, i) {
111 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
116 OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream);
121 #ifdef CONFIG_ECORE_BINARY_FW
122 static int qed_load_firmware_data(struct ecore_dev *edev)
126 const char *fw = RTE_LIBRTE_QEDE_FW;
128 if (strcmp(fw, "") == 0)
129 strcpy(fw_file, QEDE_DEFAULT_FIRMWARE);
133 fd = open(fw_file, O_RDONLY);
135 DP_NOTICE(edev, false, "Can't open firmware file\n");
139 if (fstat(fd, &st) < 0) {
140 DP_NOTICE(edev, false, "Can't stat firmware file\n");
145 edev->firmware = rte_zmalloc("qede_fw", st.st_size,
146 RTE_CACHE_LINE_SIZE);
147 if (!edev->firmware) {
148 DP_NOTICE(edev, false, "Can't allocate memory for firmware\n");
153 if (read(fd, edev->firmware, st.st_size) != st.st_size) {
154 DP_NOTICE(edev, false, "Can't read firmware data\n");
159 edev->fw_len = st.st_size;
160 if (edev->fw_len < 104) {
161 DP_NOTICE(edev, false, "Invalid fw size: %" PRIu64 "\n",
172 static void qed_handle_bulletin_change(struct ecore_hwfn *hwfn)
174 uint8_t mac[ETH_ALEN], is_mac_exist, is_mac_forced;
176 is_mac_exist = ecore_vf_bulletin_get_forced_mac(hwfn, mac,
178 if (is_mac_exist && is_mac_forced)
179 rte_memcpy(hwfn->hw_info.hw_mac_addr, mac, ETH_ALEN);
181 /* Always update link configuration according to bulletin */
182 qed_link_update(hwfn);
185 static void qede_vf_task(void *arg)
187 struct ecore_hwfn *p_hwfn = arg;
190 /* Read the bulletin board, and re-schedule the task */
191 ecore_vf_read_bulletin(p_hwfn, &change);
193 qed_handle_bulletin_change(p_hwfn);
195 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, p_hwfn);
198 static void qed_start_iov_task(struct ecore_dev *edev)
200 struct ecore_hwfn *p_hwfn;
203 for_each_hwfn(edev, i) {
204 p_hwfn = &edev->hwfns[i];
206 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task,
211 static void qed_stop_iov_task(struct ecore_dev *edev)
213 struct ecore_hwfn *p_hwfn;
216 for_each_hwfn(edev, i) {
217 p_hwfn = &edev->hwfns[i];
219 rte_eal_alarm_cancel(qede_vf_task, p_hwfn);
222 static int qed_slowpath_start(struct ecore_dev *edev,
223 struct qed_slowpath_params *params)
225 bool allow_npar_tx_switching;
226 const uint8_t *data = NULL;
227 struct ecore_hwfn *hwfn;
228 struct ecore_mcp_drv_version drv_version;
229 struct ecore_hw_init_params hw_init_params;
230 struct qede_dev *qdev = (struct qede_dev *)edev;
233 #ifdef CONFIG_ECORE_BINARY_FW
235 rc = qed_load_firmware_data(edev);
237 DP_ERR(edev, "Failed to find fw file %s\n", fw_file);
243 rc = qed_nic_setup(edev);
247 /* set int_coalescing_mode */
248 edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE;
250 #ifdef CONFIG_ECORE_ZIPPED_FW
252 /* Allocate stream for unzipping */
253 rc = qed_alloc_stream_mem(edev);
255 DP_NOTICE(edev, true,
256 "Failed to allocate stream memory\n");
261 qed_start_iov_task(edev);
264 #ifdef CONFIG_ECORE_BINARY_FW
266 data = (const uint8_t *)edev->firmware + sizeof(u32);
269 allow_npar_tx_switching = npar_tx_switching ? true : false;
271 /* Start the slowpath */
272 memset(&hw_init_params, 0, sizeof(hw_init_params));
273 hw_init_params.b_hw_start = true;
274 hw_init_params.int_mode = ECORE_INT_MODE_MSIX;
275 hw_init_params.allow_npar_tx_switch = allow_npar_tx_switching;
276 hw_init_params.bin_fw_data = data;
277 rc = ecore_hw_init(edev, &hw_init_params);
279 DP_ERR(edev, "ecore_hw_init failed\n");
283 DP_INFO(edev, "HW inited and function started\n");
286 hwfn = ECORE_LEADING_HWFN(edev);
287 drv_version.version = (params->drv_major << 24) |
288 (params->drv_minor << 16) |
289 (params->drv_rev << 8) | (params->drv_eng);
291 strncpy((char *)drv_version.name, (const char *)params->name,
292 MCP_DRV_VER_STR_SIZE - 4);
293 rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
296 DP_NOTICE(edev, true,
297 "Failed sending drv version command\n");
302 ecore_reset_vport_stats(edev);
308 ecore_resc_free(edev);
310 #ifdef CONFIG_ECORE_BINARY_FW
313 rte_free(edev->firmware);
314 edev->firmware = NULL;
317 qed_stop_iov_task(edev);
323 qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info)
325 struct ecore_ptt *ptt = NULL;
327 memset(dev_info, 0, sizeof(struct qed_dev_info));
328 dev_info->num_hwfns = edev->num_hwfns;
329 dev_info->is_mf_default = IS_MF_DEFAULT(&edev->hwfns[0]);
330 rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
334 dev_info->fw_major = FW_MAJOR_VERSION;
335 dev_info->fw_minor = FW_MINOR_VERSION;
336 dev_info->fw_rev = FW_REVISION_VERSION;
337 dev_info->fw_eng = FW_ENGINEERING_VERSION;
338 dev_info->mf_mode = edev->mf_mode;
339 dev_info->tx_switching = false;
341 ecore_vf_get_fw_version(&edev->hwfns[0], &dev_info->fw_major,
342 &dev_info->fw_minor, &dev_info->fw_rev,
347 ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev));
349 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
350 &dev_info->mfw_rev, NULL);
352 ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt,
353 &dev_info->flash_size);
355 /* Workaround to allow PHY-read commands for
358 if (ECORE_IS_BB_B0(edev))
359 dev_info->flash_size = 0xffffffff;
361 ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt);
364 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
365 &dev_info->mfw_rev, NULL);
372 qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info)
374 struct qede_dev *qdev = (struct qede_dev *)edev;
378 memset(info, 0, sizeof(*info));
380 info->num_tc = 1 /* @@@TBD aelior MULTI_COS */;
383 int max_vf_vlan_filters = 0;
385 info->num_queues = 0;
386 for_each_hwfn(edev, i)
388 FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE);
390 if (edev->p_iov_info)
391 max_vf_vlan_filters = edev->p_iov_info->total_vfs *
392 ECORE_ETH_VF_NUM_VLAN_FILTERS;
393 info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN) -
396 rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
399 ecore_vf_get_num_rxqs(ECORE_LEADING_HWFN(edev),
401 if (edev->num_hwfns > 1) {
402 ecore_vf_get_num_rxqs(&edev->hwfns[1], &queues);
403 info->num_queues += queues;
406 ecore_vf_get_num_vlan_filters(&edev->hwfns[0],
407 (u8 *)&info->num_vlan_filters);
409 ecore_vf_get_port_mac(&edev->hwfns[0],
410 (uint8_t *)&info->port_mac);
412 info->is_legacy = ecore_vf_get_pre_fp_hsi(&edev->hwfns[0]);
415 qed_fill_dev_info(edev, &info->common);
418 memset(&info->common.hw_mac, 0, ETHER_ADDR_LEN);
424 qed_set_id(struct ecore_dev *edev, char name[NAME_SIZE],
425 const char ver_str[NAME_SIZE])
429 rte_memcpy(edev->name, name, NAME_SIZE);
430 for_each_hwfn(edev, i) {
431 snprintf(edev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i);
433 memcpy(edev->ver_str, ver_str, NAME_SIZE);
434 edev->drv_type = DRV_ID_DRV_TYPE_LINUX;
438 qed_sb_init(struct ecore_dev *edev, struct ecore_sb_info *sb_info,
439 void *sb_virt_addr, dma_addr_t sb_phy_addr,
440 uint16_t sb_id, enum qed_sb_type type)
442 struct ecore_hwfn *p_hwfn;
448 /* RoCE uses single engine and CMT uses two engines. When using both
449 * we force only a single engine. Storage uses only engine 0 too.
451 if (type == QED_SB_TYPE_L2_QUEUE)
452 n_hwfns = edev->num_hwfns;
456 hwfn_index = sb_id % n_hwfns;
457 p_hwfn = &edev->hwfns[hwfn_index];
458 rel_sb_id = sb_id / n_hwfns;
460 DP_INFO(edev, "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
461 hwfn_index, rel_sb_id, sb_id);
463 rc = ecore_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info,
464 sb_virt_addr, sb_phy_addr, rel_sb_id);
469 static void qed_fill_link(struct ecore_hwfn *hwfn,
470 struct qed_link_output *if_link)
472 struct ecore_mcp_link_params params;
473 struct ecore_mcp_link_state link;
474 struct ecore_mcp_link_capabilities link_caps;
478 memset(if_link, 0, sizeof(*if_link));
480 /* Prepare source inputs */
481 if (IS_PF(hwfn->p_dev)) {
482 rte_memcpy(¶ms, ecore_mcp_get_link_params(hwfn),
484 rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link));
485 rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn),
488 ecore_vf_read_bulletin(hwfn, &change);
489 ecore_vf_get_link_params(hwfn, ¶ms);
490 ecore_vf_get_link_state(hwfn, &link);
491 ecore_vf_get_link_caps(hwfn, &link_caps);
494 /* Set the link parameters to pass to protocol driver */
496 if_link->link_up = true;
499 if_link->speed = link.speed;
501 if_link->duplex = QEDE_DUPLEX_FULL;
503 /* Fill up the native advertised speed cap mask */
504 if_link->adv_speed = params.speed.advertised_speeds;
506 if (params.speed.autoneg)
507 if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG;
509 if (params.pause.autoneg || params.pause.forced_rx ||
510 params.pause.forced_tx)
511 if_link->supported_caps |= QEDE_SUPPORTED_PAUSE;
513 if (params.pause.autoneg)
514 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
516 if (params.pause.forced_rx)
517 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE;
519 if (params.pause.forced_tx)
520 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE;
524 qed_get_current_link(struct ecore_dev *edev, struct qed_link_output *if_link)
526 qed_fill_link(&edev->hwfns[0], if_link);
528 #ifdef CONFIG_QED_SRIOV
529 for_each_hwfn(cdev, i)
530 qed_inform_vf_link_state(&cdev->hwfns[i]);
534 static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params)
536 struct ecore_hwfn *hwfn;
537 struct ecore_ptt *ptt;
538 struct ecore_mcp_link_params *link_params;
544 /* The link should be set only once per PF */
545 hwfn = &edev->hwfns[0];
547 ptt = ecore_ptt_acquire(hwfn);
551 link_params = ecore_mcp_get_link_params(hwfn);
552 if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG)
553 link_params->speed.autoneg = params->autoneg;
555 if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) {
556 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
557 link_params->pause.autoneg = true;
559 link_params->pause.autoneg = false;
560 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE)
561 link_params->pause.forced_rx = true;
563 link_params->pause.forced_rx = false;
564 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE)
565 link_params->pause.forced_tx = true;
567 link_params->pause.forced_tx = false;
570 rc = ecore_mcp_set_link(hwfn, ptt, params->link_up);
572 ecore_ptt_release(hwfn, ptt);
577 void qed_link_update(struct ecore_hwfn *hwfn)
579 struct qed_link_output if_link;
581 qed_fill_link(hwfn, &if_link);
584 static int qed_drain(struct ecore_dev *edev)
586 struct ecore_hwfn *hwfn;
587 struct ecore_ptt *ptt;
593 for_each_hwfn(edev, i) {
594 hwfn = &edev->hwfns[i];
595 ptt = ecore_ptt_acquire(hwfn);
597 DP_NOTICE(hwfn, true, "Failed to drain NIG; No PTT\n");
600 rc = ecore_mcp_drain(hwfn, ptt);
603 ecore_ptt_release(hwfn, ptt);
609 static int qed_nic_stop(struct ecore_dev *edev)
613 rc = ecore_hw_stop(edev);
614 for (i = 0; i < edev->num_hwfns; i++) {
615 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
617 if (p_hwfn->b_sp_dpc_enabled)
618 p_hwfn->b_sp_dpc_enabled = false;
623 static int qed_nic_reset(struct ecore_dev *edev)
627 rc = ecore_hw_reset(edev);
631 ecore_resc_free(edev);
636 static int qed_slowpath_stop(struct ecore_dev *edev)
638 #ifdef CONFIG_QED_SRIOV
646 #ifdef CONFIG_ECORE_ZIPPED_FW
647 qed_free_stream_mem(edev);
650 #ifdef CONFIG_QED_SRIOV
651 if (IS_QED_ETH_IF(edev))
652 qed_sriov_disable(edev, true);
658 qed_stop_iov_task(edev);
663 static void qed_remove(struct ecore_dev *edev)
668 ecore_hw_remove(edev);
671 const struct qed_common_ops qed_common_ops_pass = {
672 INIT_STRUCT_FIELD(probe, &qed_probe),
673 INIT_STRUCT_FIELD(update_pf_params, &qed_update_pf_params),
674 INIT_STRUCT_FIELD(slowpath_start, &qed_slowpath_start),
675 INIT_STRUCT_FIELD(set_id, &qed_set_id),
676 INIT_STRUCT_FIELD(chain_alloc, &ecore_chain_alloc),
677 INIT_STRUCT_FIELD(chain_free, &ecore_chain_free),
678 INIT_STRUCT_FIELD(sb_init, &qed_sb_init),
679 INIT_STRUCT_FIELD(get_link, &qed_get_current_link),
680 INIT_STRUCT_FIELD(set_link, &qed_set_link),
681 INIT_STRUCT_FIELD(drain, &qed_drain),
682 INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop),
683 INIT_STRUCT_FIELD(remove, &qed_remove),