2 * Copyright (c) 2016 QLogic Corporation.
6 * See LICENSE.qede_pmd for copyright and licensing details.
11 #include <rte_alarm.h>
13 #include "qede_ethdev.h"
16 #define QEDE_ALARM_TIMEOUT_US 100000
18 /* Global variable to hold absolute path of fw file */
19 char fw_file[PATH_MAX];
21 const char *QEDE_DEFAULT_FIRMWARE =
22 "/lib/firmware/qed/qed_init_values-8.30.12.0.bin";
25 qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params)
29 for (i = 0; i < edev->num_hwfns; i++) {
30 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
31 p_hwfn->pf_params = *params;
35 static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev)
37 edev->regview = pci_dev->mem_resource[0].addr;
38 edev->doorbells = pci_dev->mem_resource[2].addr;
39 edev->db_size = pci_dev->mem_resource[2].len;
43 qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev,
44 uint32_t dp_module, uint8_t dp_level, bool is_vf)
46 struct ecore_hw_prepare_params hw_prepare_params;
49 ecore_init_struct(edev);
50 edev->drv_type = DRV_ID_DRV_TYPE_LINUX;
51 /* Protocol type is always fixed to PROTOCOL_ETH */
56 ecore_init_dp(edev, dp_module, dp_level, NULL);
57 qed_init_pci(edev, pci_dev);
59 memset(&hw_prepare_params, 0, sizeof(hw_prepare_params));
60 hw_prepare_params.personality = ECORE_PCI_ETH;
61 hw_prepare_params.drv_resc_alloc = false;
62 hw_prepare_params.chk_reg_fifo = false;
63 hw_prepare_params.initiate_pf_flr = true;
64 hw_prepare_params.allow_mdump = false;
65 hw_prepare_params.epoch = (u32)time(NULL);
66 rc = ecore_hw_prepare(edev, &hw_prepare_params);
68 DP_ERR(edev, "hw prepare failed\n");
75 static int qed_nic_setup(struct ecore_dev *edev)
79 rc = ecore_resc_alloc(edev);
83 DP_INFO(edev, "Allocated qed resources\n");
84 ecore_resc_setup(edev);
89 #ifdef CONFIG_ECORE_ZIPPED_FW
90 static int qed_alloc_stream_mem(struct ecore_dev *edev)
94 for_each_hwfn(edev, i) {
95 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
97 p_hwfn->stream = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
98 sizeof(*p_hwfn->stream));
106 static void qed_free_stream_mem(struct ecore_dev *edev)
110 for_each_hwfn(edev, i) {
111 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
116 OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream);
121 #ifdef CONFIG_ECORE_BINARY_FW
122 static int qed_load_firmware_data(struct ecore_dev *edev)
126 const char *fw = RTE_LIBRTE_QEDE_FW;
128 if (strcmp(fw, "") == 0)
129 strcpy(fw_file, QEDE_DEFAULT_FIRMWARE);
133 fd = open(fw_file, O_RDONLY);
135 DP_ERR(edev, "Can't open firmware file\n");
139 if (fstat(fd, &st) < 0) {
140 DP_ERR(edev, "Can't stat firmware file\n");
145 edev->firmware = rte_zmalloc("qede_fw", st.st_size,
146 RTE_CACHE_LINE_SIZE);
147 if (!edev->firmware) {
148 DP_ERR(edev, "Can't allocate memory for firmware\n");
153 if (read(fd, edev->firmware, st.st_size) != st.st_size) {
154 DP_ERR(edev, "Can't read firmware data\n");
159 edev->fw_len = st.st_size;
160 if (edev->fw_len < 104) {
161 DP_ERR(edev, "Invalid fw size: %" PRIu64 "\n",
172 static void qed_handle_bulletin_change(struct ecore_hwfn *hwfn)
174 uint8_t mac[ETH_ALEN], is_mac_exist, is_mac_forced;
176 is_mac_exist = ecore_vf_bulletin_get_forced_mac(hwfn, mac,
178 if (is_mac_exist && is_mac_forced)
179 rte_memcpy(hwfn->hw_info.hw_mac_addr, mac, ETH_ALEN);
181 /* Always update link configuration according to bulletin */
182 qed_link_update(hwfn);
185 static void qede_vf_task(void *arg)
187 struct ecore_hwfn *p_hwfn = arg;
190 /* Read the bulletin board, and re-schedule the task */
191 ecore_vf_read_bulletin(p_hwfn, &change);
193 qed_handle_bulletin_change(p_hwfn);
195 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, p_hwfn);
198 static void qed_start_iov_task(struct ecore_dev *edev)
200 struct ecore_hwfn *p_hwfn;
203 for_each_hwfn(edev, i) {
204 p_hwfn = &edev->hwfns[i];
206 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task,
211 static void qed_stop_iov_task(struct ecore_dev *edev)
213 struct ecore_hwfn *p_hwfn;
216 for_each_hwfn(edev, i) {
217 p_hwfn = &edev->hwfns[i];
219 rte_eal_alarm_cancel(qede_vf_task, p_hwfn);
222 static int qed_slowpath_start(struct ecore_dev *edev,
223 struct qed_slowpath_params *params)
225 struct ecore_drv_load_params drv_load_params;
226 struct ecore_hw_init_params hw_init_params;
227 struct ecore_mcp_drv_version drv_version;
228 const uint8_t *data = NULL;
229 struct ecore_hwfn *hwfn;
230 struct ecore_ptt *p_ptt;
234 #ifdef CONFIG_ECORE_BINARY_FW
235 rc = qed_load_firmware_data(edev);
237 DP_ERR(edev, "Failed to find fw file %s\n", fw_file);
241 hwfn = ECORE_LEADING_HWFN(edev);
242 if (edev->num_hwfns == 1) { /* skip aRFS for 100G device */
243 p_ptt = ecore_ptt_acquire(hwfn);
245 ECORE_LEADING_HWFN(edev)->p_arfs_ptt = p_ptt;
247 DP_ERR(edev, "Failed to acquire PTT for flowdir\n");
254 rc = qed_nic_setup(edev);
258 /* set int_coalescing_mode */
259 edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE;
261 #ifdef CONFIG_ECORE_ZIPPED_FW
263 /* Allocate stream for unzipping */
264 rc = qed_alloc_stream_mem(edev);
266 DP_ERR(edev, "Failed to allocate stream memory\n");
272 qed_start_iov_task(edev);
274 #ifdef CONFIG_ECORE_BINARY_FW
276 data = (const uint8_t *)edev->firmware + sizeof(u32);
279 /* Start the slowpath */
280 memset(&hw_init_params, 0, sizeof(hw_init_params));
281 hw_init_params.b_hw_start = true;
282 hw_init_params.int_mode = ECORE_INT_MODE_MSIX;
283 hw_init_params.allow_npar_tx_switch = true;
284 hw_init_params.bin_fw_data = data;
286 memset(&drv_load_params, 0, sizeof(drv_load_params));
287 drv_load_params.mfw_timeout_val = ECORE_LOAD_REQ_LOCK_TO_DEFAULT;
288 drv_load_params.avoid_eng_reset = false;
289 drv_load_params.override_force_load = ECORE_OVERRIDE_FORCE_LOAD_ALWAYS;
290 hw_init_params.p_drv_load_params = &drv_load_params;
292 rc = ecore_hw_init(edev, &hw_init_params);
294 DP_ERR(edev, "ecore_hw_init failed\n");
298 DP_INFO(edev, "HW inited and function started\n");
301 hwfn = ECORE_LEADING_HWFN(edev);
302 drv_version.version = (params->drv_major << 24) |
303 (params->drv_minor << 16) |
304 (params->drv_rev << 8) | (params->drv_eng);
306 strncpy((char *)drv_version.name, (const char *)params->name,
307 MCP_DRV_VER_STR_SIZE - 4);
308 rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
311 DP_ERR(edev, "Failed sending drv version command\n");
316 ecore_reset_vport_stats(edev);
323 qed_stop_iov_task(edev);
324 #ifdef CONFIG_ECORE_ZIPPED_FW
325 qed_free_stream_mem(edev);
328 ecore_resc_free(edev);
330 #ifdef CONFIG_ECORE_BINARY_FW
333 rte_free(edev->firmware);
334 edev->firmware = NULL;
337 qed_stop_iov_task(edev);
343 qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info)
345 struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(edev);
346 struct ecore_ptt *ptt = NULL;
347 struct ecore_tunnel_info *tun = &edev->tunnel;
349 memset(dev_info, 0, sizeof(struct qed_dev_info));
351 if (tun->vxlan.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
352 tun->vxlan.b_mode_enabled)
353 dev_info->vxlan_enable = true;
355 if (tun->l2_gre.b_mode_enabled && tun->ip_gre.b_mode_enabled &&
356 tun->l2_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
357 tun->ip_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
358 dev_info->gre_enable = true;
360 if (tun->l2_geneve.b_mode_enabled && tun->ip_geneve.b_mode_enabled &&
361 tun->l2_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
362 tun->ip_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
363 dev_info->geneve_enable = true;
365 dev_info->num_hwfns = edev->num_hwfns;
366 dev_info->is_mf_default = IS_MF_DEFAULT(&edev->hwfns[0]);
367 dev_info->mtu = ECORE_LEADING_HWFN(edev)->hw_info.mtu;
368 dev_info->dev_type = edev->type;
370 rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
373 dev_info->fw_major = FW_MAJOR_VERSION;
374 dev_info->fw_minor = FW_MINOR_VERSION;
375 dev_info->fw_rev = FW_REVISION_VERSION;
376 dev_info->fw_eng = FW_ENGINEERING_VERSION;
379 dev_info->b_inter_pf_switch =
380 OSAL_TEST_BIT(ECORE_MF_INTER_PF_SWITCH, &edev->mf_bits);
381 if (!OSAL_TEST_BIT(ECORE_MF_DISABLE_ARFS, &edev->mf_bits))
382 dev_info->b_arfs_capable = true;
383 dev_info->tx_switching = false;
385 dev_info->smart_an = ecore_mcp_is_smart_an_supported(p_hwfn);
387 ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev));
389 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
390 &dev_info->mfw_rev, NULL);
392 ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt,
393 &dev_info->flash_size);
395 /* Workaround to allow PHY-read commands for
398 if (ECORE_IS_BB_B0(edev))
399 dev_info->flash_size = 0xffffffff;
401 ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt);
404 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
405 &dev_info->mfw_rev, NULL);
412 qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info)
417 memset(info, 0, sizeof(*info));
419 info->num_tc = 1 /* @@@TBD aelior MULTI_COS */;
422 int max_vf_vlan_filters = 0;
424 info->num_queues = 0;
425 for_each_hwfn(edev, i)
427 FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE);
429 if (IS_ECORE_SRIOV(edev))
430 max_vf_vlan_filters = edev->p_iov_info->total_vfs *
431 ECORE_ETH_VF_NUM_VLAN_FILTERS;
432 info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN) -
435 rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
438 ecore_vf_get_num_rxqs(ECORE_LEADING_HWFN(edev),
440 if (ECORE_IS_CMT(edev)) {
441 ecore_vf_get_num_rxqs(&edev->hwfns[1], &queues);
442 info->num_queues += queues;
445 ecore_vf_get_num_vlan_filters(&edev->hwfns[0],
446 (u8 *)&info->num_vlan_filters);
448 ecore_vf_get_port_mac(&edev->hwfns[0],
449 (uint8_t *)&info->port_mac);
451 info->is_legacy = ecore_vf_get_pre_fp_hsi(&edev->hwfns[0]);
454 qed_fill_dev_info(edev, &info->common);
457 memset(&info->common.hw_mac, 0, ETHER_ADDR_LEN);
462 static void qed_set_name(struct ecore_dev *edev, char name[NAME_SIZE])
466 rte_memcpy(edev->name, name, NAME_SIZE);
467 for_each_hwfn(edev, i) {
468 snprintf(edev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i);
473 qed_sb_init(struct ecore_dev *edev, struct ecore_sb_info *sb_info,
474 void *sb_virt_addr, dma_addr_t sb_phy_addr, uint16_t sb_id)
476 struct ecore_hwfn *p_hwfn;
479 uint8_t n_hwfns = edev->num_hwfns;
482 hwfn_index = sb_id % n_hwfns;
483 p_hwfn = &edev->hwfns[hwfn_index];
484 rel_sb_id = sb_id / n_hwfns;
486 DP_INFO(edev, "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
487 hwfn_index, rel_sb_id, sb_id);
489 rc = ecore_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info,
490 sb_virt_addr, sb_phy_addr, rel_sb_id);
495 static void qed_fill_link(struct ecore_hwfn *hwfn,
496 __rte_unused struct ecore_ptt *ptt,
497 struct qed_link_output *if_link)
499 struct ecore_mcp_link_params params;
500 struct ecore_mcp_link_state link;
501 struct ecore_mcp_link_capabilities link_caps;
504 memset(if_link, 0, sizeof(*if_link));
506 /* Prepare source inputs */
507 if (IS_PF(hwfn->p_dev)) {
508 rte_memcpy(¶ms, ecore_mcp_get_link_params(hwfn),
510 rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link));
511 rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn),
514 ecore_vf_read_bulletin(hwfn, &change);
515 ecore_vf_get_link_params(hwfn, ¶ms);
516 ecore_vf_get_link_state(hwfn, &link);
517 ecore_vf_get_link_caps(hwfn, &link_caps);
520 /* Set the link parameters to pass to protocol driver */
522 if_link->link_up = true;
525 if_link->speed = link.speed;
527 if_link->duplex = QEDE_DUPLEX_FULL;
529 /* Fill up the native advertised speed cap mask */
530 if_link->adv_speed = params.speed.advertised_speeds;
532 if (params.speed.autoneg)
533 if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG;
535 if (params.pause.autoneg || params.pause.forced_rx ||
536 params.pause.forced_tx)
537 if_link->supported_caps |= QEDE_SUPPORTED_PAUSE;
539 if (params.pause.autoneg)
540 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
542 if (params.pause.forced_rx)
543 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE;
545 if (params.pause.forced_tx)
546 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE;
548 if (link_caps.default_eee == ECORE_MCP_EEE_UNSUPPORTED) {
549 if_link->eee_supported = false;
551 if_link->eee_supported = true;
552 if_link->eee_active = link.eee_active;
553 if_link->sup_caps = link_caps.eee_speed_caps;
554 /* MFW clears adv_caps on eee disable; use configured value */
555 if_link->eee.adv_caps = link.eee_adv_caps ? link.eee_adv_caps :
557 if_link->eee.lp_adv_caps = link.eee_lp_adv_caps;
558 if_link->eee.enable = params.eee.enable;
559 if_link->eee.tx_lpi_enable = params.eee.tx_lpi_enable;
560 if_link->eee.tx_lpi_timer = params.eee.tx_lpi_timer;
565 qed_get_current_link(struct ecore_dev *edev, struct qed_link_output *if_link)
567 struct ecore_hwfn *hwfn;
568 struct ecore_ptt *ptt;
570 hwfn = &edev->hwfns[0];
572 ptt = ecore_ptt_acquire(hwfn);
574 DP_NOTICE(hwfn, true, "Failed to fill link; No PTT\n");
576 qed_fill_link(hwfn, ptt, if_link);
579 ecore_ptt_release(hwfn, ptt);
581 qed_fill_link(hwfn, NULL, if_link);
585 static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params)
587 struct ecore_hwfn *hwfn;
588 struct ecore_ptt *ptt;
589 struct ecore_mcp_link_params *link_params;
595 /* The link should be set only once per PF */
596 hwfn = &edev->hwfns[0];
598 ptt = ecore_ptt_acquire(hwfn);
602 link_params = ecore_mcp_get_link_params(hwfn);
603 if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG)
604 link_params->speed.autoneg = params->autoneg;
606 if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) {
607 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
608 link_params->pause.autoneg = true;
610 link_params->pause.autoneg = false;
611 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE)
612 link_params->pause.forced_rx = true;
614 link_params->pause.forced_rx = false;
615 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE)
616 link_params->pause.forced_tx = true;
618 link_params->pause.forced_tx = false;
621 if (params->override_flags & QED_LINK_OVERRIDE_EEE_CONFIG)
622 memcpy(&link_params->eee, ¶ms->eee,
623 sizeof(link_params->eee));
625 rc = ecore_mcp_set_link(hwfn, ptt, params->link_up);
627 ecore_ptt_release(hwfn, ptt);
632 void qed_link_update(struct ecore_hwfn *hwfn)
634 struct ecore_dev *edev = hwfn->p_dev;
635 struct qede_dev *qdev = (struct qede_dev *)edev;
637 qede_link_update((struct rte_eth_dev *)qdev->ethdev, 0);
640 static int qed_drain(struct ecore_dev *edev)
642 struct ecore_hwfn *hwfn;
643 struct ecore_ptt *ptt;
649 for_each_hwfn(edev, i) {
650 hwfn = &edev->hwfns[i];
651 ptt = ecore_ptt_acquire(hwfn);
653 DP_ERR(hwfn, "Failed to drain NIG; No PTT\n");
656 rc = ecore_mcp_drain(hwfn, ptt);
659 ecore_ptt_release(hwfn, ptt);
665 static int qed_nic_stop(struct ecore_dev *edev)
669 rc = ecore_hw_stop(edev);
670 for (i = 0; i < edev->num_hwfns; i++) {
671 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
673 if (p_hwfn->b_sp_dpc_enabled)
674 p_hwfn->b_sp_dpc_enabled = false;
679 static int qed_slowpath_stop(struct ecore_dev *edev)
681 #ifdef CONFIG_QED_SRIOV
689 #ifdef CONFIG_ECORE_ZIPPED_FW
690 qed_free_stream_mem(edev);
693 #ifdef CONFIG_QED_SRIOV
694 if (IS_QED_ETH_IF(edev))
695 qed_sriov_disable(edev, true);
701 ecore_resc_free(edev);
702 qed_stop_iov_task(edev);
707 static void qed_remove(struct ecore_dev *edev)
712 ecore_hw_remove(edev);
715 static int qed_send_drv_state(struct ecore_dev *edev, bool active)
717 struct ecore_hwfn *hwfn = ECORE_LEADING_HWFN(edev);
718 struct ecore_ptt *ptt;
721 ptt = ecore_ptt_acquire(hwfn);
725 status = ecore_mcp_ov_update_driver_state(hwfn, ptt, active ?
726 ECORE_OV_DRIVER_STATE_ACTIVE :
727 ECORE_OV_DRIVER_STATE_DISABLED);
729 ecore_ptt_release(hwfn, ptt);
734 static int qed_get_sb_info(struct ecore_dev *edev, struct ecore_sb_info *sb,
735 u16 qid, struct ecore_sb_info_dbg *sb_dbg)
737 struct ecore_hwfn *hwfn = &edev->hwfns[qid % edev->num_hwfns];
738 struct ecore_ptt *ptt;
744 ptt = ecore_ptt_acquire(hwfn);
746 DP_ERR(hwfn, "Can't acquire PTT\n");
750 memset(sb_dbg, 0, sizeof(*sb_dbg));
751 rc = ecore_int_get_sb_dbg(hwfn, ptt, sb, sb_dbg);
753 ecore_ptt_release(hwfn, ptt);
757 const struct qed_common_ops qed_common_ops_pass = {
758 INIT_STRUCT_FIELD(probe, &qed_probe),
759 INIT_STRUCT_FIELD(update_pf_params, &qed_update_pf_params),
760 INIT_STRUCT_FIELD(slowpath_start, &qed_slowpath_start),
761 INIT_STRUCT_FIELD(set_name, &qed_set_name),
762 INIT_STRUCT_FIELD(chain_alloc, &ecore_chain_alloc),
763 INIT_STRUCT_FIELD(chain_free, &ecore_chain_free),
764 INIT_STRUCT_FIELD(sb_init, &qed_sb_init),
765 INIT_STRUCT_FIELD(get_sb_info, &qed_get_sb_info),
766 INIT_STRUCT_FIELD(get_link, &qed_get_current_link),
767 INIT_STRUCT_FIELD(set_link, &qed_set_link),
768 INIT_STRUCT_FIELD(drain, &qed_drain),
769 INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop),
770 INIT_STRUCT_FIELD(remove, &qed_remove),
771 INIT_STRUCT_FIELD(send_drv_state, &qed_send_drv_state),
774 const struct qed_eth_ops qed_eth_ops_pass = {
775 INIT_STRUCT_FIELD(common, &qed_common_ops_pass),
776 INIT_STRUCT_FIELD(fill_dev_info, &qed_fill_eth_dev_info),
779 const struct qed_eth_ops *qed_get_eth_ops(void)
781 return &qed_eth_ops_pass;