2 * Copyright (c) 2016 QLogic Corporation.
6 * See LICENSE.qede_pmd for copyright and licensing details.
15 #include "qede_ethdev.h"
17 static uint8_t npar_tx_switching = 1;
19 #define CONFIG_QED_BINARY_FW
20 /* Global variable to hold absolute path of fw file */
21 char fw_file[PATH_MAX];
23 const char *QEDE_DEFAULT_FIRMWARE =
24 "/lib/firmware/qed/qed_init_values_zipped-8.7.7.0.bin";
27 qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params)
31 for (i = 0; i < edev->num_hwfns; i++) {
32 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
33 p_hwfn->pf_params = *params;
37 static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev)
39 edev->regview = pci_dev->mem_resource[0].addr;
40 edev->doorbells = pci_dev->mem_resource[2].addr;
44 qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev,
45 enum qed_protocol protocol, uint32_t dp_module,
46 uint8_t dp_level, bool is_vf)
48 struct qede_dev *qdev = (struct qede_dev *)edev;
51 ecore_init_struct(edev);
52 qdev->protocol = protocol;
55 edev->sriov_info.b_hw_channel = true;
57 ecore_init_dp(edev, dp_module, dp_level, NULL);
58 qed_init_pci(edev, pci_dev);
59 rc = ecore_hw_prepare(edev, ECORE_PCI_DEFAULT);
61 DP_ERR(edev, "hw prepare failed\n");
68 static int qed_nic_setup(struct ecore_dev *edev)
72 rc = ecore_resc_alloc(edev);
76 DP_INFO(edev, "Allocated qed resources\n");
77 ecore_resc_setup(edev);
82 static int qed_alloc_stream_mem(struct ecore_dev *edev)
86 for_each_hwfn(edev, i) {
87 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
89 p_hwfn->stream = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
90 sizeof(*p_hwfn->stream));
98 static void qed_free_stream_mem(struct ecore_dev *edev)
102 for_each_hwfn(edev, i) {
103 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
108 OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream);
112 static int qed_load_firmware_data(struct ecore_dev *edev)
116 const char *fw = RTE_LIBRTE_QEDE_FW;
118 if (strcmp(fw, "") == 0)
119 strcpy(fw_file, QEDE_DEFAULT_FIRMWARE);
123 fd = open(fw_file, O_RDONLY);
125 DP_NOTICE(edev, false, "Can't open firmware file\n");
129 if (fstat(fd, &st) < 0) {
130 DP_NOTICE(edev, false, "Can't stat firmware file\n");
134 edev->firmware = rte_zmalloc("qede_fw", st.st_size,
135 RTE_CACHE_LINE_SIZE);
136 if (!edev->firmware) {
137 DP_NOTICE(edev, false, "Can't allocate memory for firmware\n");
142 if (read(fd, edev->firmware, st.st_size) != st.st_size) {
143 DP_NOTICE(edev, false, "Can't read firmware data\n");
148 edev->fw_len = st.st_size;
149 if (edev->fw_len < 104) {
150 DP_NOTICE(edev, false, "Invalid fw size: %" PRIu64 "\n",
158 static int qed_slowpath_start(struct ecore_dev *edev,
159 struct qed_slowpath_params *params)
161 bool allow_npar_tx_switching;
162 const uint8_t *data = NULL;
163 struct ecore_hwfn *hwfn;
164 struct ecore_mcp_drv_version drv_version;
165 struct qede_dev *qdev = (struct qede_dev *)edev;
167 #ifdef QED_ENC_SUPPORTED
168 struct ecore_tunn_start_params tunn_info;
171 #ifdef CONFIG_QED_BINARY_FW
172 rc = qed_load_firmware_data(edev);
174 DP_NOTICE(edev, true,
175 "Failed to find fw file %s\n", fw_file);
180 rc = qed_nic_setup(edev);
184 /* set int_coalescing_mode */
185 edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE;
187 /* Should go with CONFIG_QED_BINARY_FW */
188 /* Allocate stream for unzipping */
189 rc = qed_alloc_stream_mem(edev);
191 DP_NOTICE(edev, true,
192 "Failed to allocate stream memory\n");
196 /* Start the slowpath */
197 #ifdef CONFIG_QED_BINARY_FW
198 data = edev->firmware;
200 allow_npar_tx_switching = npar_tx_switching ? true : false;
202 #ifdef QED_ENC_SUPPORTED
203 memset(&tunn_info, 0, sizeof(tunn_info));
204 tunn_info.tunn_mode |= 1 << QED_MODE_VXLAN_TUNN |
205 1 << QED_MODE_L2GRE_TUNN |
206 1 << QED_MODE_IPGRE_TUNN |
207 1 << QED_MODE_L2GENEVE_TUNN | 1 << QED_MODE_IPGENEVE_TUNN;
208 tunn_info.tunn_clss_vxlan = QED_TUNN_CLSS_MAC_VLAN;
209 tunn_info.tunn_clss_l2gre = QED_TUNN_CLSS_MAC_VLAN;
210 tunn_info.tunn_clss_ipgre = QED_TUNN_CLSS_MAC_VLAN;
211 rc = ecore_hw_init(edev, &tunn_info, true, ECORE_INT_MODE_MSIX,
212 allow_npar_tx_switching, data);
214 rc = ecore_hw_init(edev, NULL, true, ECORE_INT_MODE_MSIX,
215 allow_npar_tx_switching, data);
218 DP_ERR(edev, "ecore_hw_init failed\n");
222 DP_INFO(edev, "HW inited and function started\n");
224 hwfn = ECORE_LEADING_HWFN(edev);
225 drv_version.version = (params->drv_major << 24) |
226 (params->drv_minor << 16) |
227 (params->drv_rev << 8) | (params->drv_eng);
229 strncpy((char *)drv_version.name, (const char *)params->name,
230 MCP_DRV_VER_STR_SIZE - 4);
231 rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
234 DP_NOTICE(edev, true,
235 "Failed sending drv version command\n");
239 ecore_reset_vport_stats(edev);
245 ecore_resc_free(edev);
247 #ifdef CONFIG_QED_BINARY_FW
249 rte_free(edev->firmware);
250 edev->firmware = NULL;
256 qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info)
258 struct ecore_ptt *ptt = NULL;
260 memset(dev_info, 0, sizeof(struct qed_dev_info));
261 dev_info->num_hwfns = edev->num_hwfns;
262 dev_info->is_mf_default = IS_MF_DEFAULT(&edev->hwfns[0]);
263 rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
266 dev_info->fw_major = FW_MAJOR_VERSION;
267 dev_info->fw_minor = FW_MINOR_VERSION;
268 dev_info->fw_rev = FW_REVISION_VERSION;
269 dev_info->fw_eng = FW_ENGINEERING_VERSION;
270 dev_info->mf_mode = edev->mf_mode;
271 dev_info->tx_switching = false;
273 ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev));
275 ecore_mcp_get_mfw_ver(edev, ptt,
276 &dev_info->mfw_rev, NULL);
278 ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt,
279 &dev_info->flash_size);
281 /* Workaround to allow PHY-read commands for
284 if (ECORE_IS_BB_B0(edev))
285 dev_info->flash_size = 0xffffffff;
287 ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt);
294 qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info)
296 struct qede_dev *qdev = (struct qede_dev *)edev;
299 memset(info, 0, sizeof(*info));
301 info->num_tc = 1 /* @@@TBD aelior MULTI_COS */;
303 info->num_queues = 0;
304 for_each_hwfn(edev, i)
306 FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE);
308 info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN);
310 rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
313 qed_fill_dev_info(edev, &info->common);
319 qed_set_id(struct ecore_dev *edev, char name[NAME_SIZE],
320 const char ver_str[VER_SIZE])
324 rte_memcpy(edev->name, name, NAME_SIZE);
325 for_each_hwfn(edev, i) {
326 snprintf(edev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i);
328 rte_memcpy(edev->ver_str, ver_str, VER_SIZE);
329 edev->drv_type = DRV_ID_DRV_TYPE_LINUX;
333 qed_sb_init(struct ecore_dev *edev, struct ecore_sb_info *sb_info,
334 void *sb_virt_addr, dma_addr_t sb_phy_addr,
335 uint16_t sb_id, enum qed_sb_type type)
337 struct ecore_hwfn *p_hwfn;
343 /* RoCE uses single engine and CMT uses two engines. When using both
344 * we force only a single engine. Storage uses only engine 0 too.
346 if (type == QED_SB_TYPE_L2_QUEUE)
347 n_hwfns = edev->num_hwfns;
351 hwfn_index = sb_id % n_hwfns;
352 p_hwfn = &edev->hwfns[hwfn_index];
353 rel_sb_id = sb_id / n_hwfns;
355 DP_INFO(edev, "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
356 hwfn_index, rel_sb_id, sb_id);
358 rc = ecore_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info,
359 sb_virt_addr, sb_phy_addr, rel_sb_id);
364 static void qed_fill_link(struct ecore_hwfn *hwfn,
365 struct qed_link_output *if_link)
367 struct ecore_mcp_link_params params;
368 struct ecore_mcp_link_state link;
369 struct ecore_mcp_link_capabilities link_caps;
373 memset(if_link, 0, sizeof(*if_link));
375 /* Prepare source inputs */
376 rte_memcpy(¶ms, ecore_mcp_get_link_params(hwfn),
378 rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link));
379 rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn),
382 /* Set the link parameters to pass to protocol driver */
384 if_link->link_up = true;
387 if_link->speed = link.speed;
389 if_link->duplex = QEDE_DUPLEX_FULL;
391 if (params.speed.autoneg)
392 if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG;
394 if (params.pause.autoneg || params.pause.forced_rx ||
395 params.pause.forced_tx)
396 if_link->supported_caps |= QEDE_SUPPORTED_PAUSE;
398 if (params.pause.autoneg)
399 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
401 if (params.pause.forced_rx)
402 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE;
404 if (params.pause.forced_tx)
405 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE;
409 qed_get_current_link(struct ecore_dev *edev, struct qed_link_output *if_link)
411 qed_fill_link(&edev->hwfns[0], if_link);
413 #ifdef CONFIG_QED_SRIOV
414 for_each_hwfn(cdev, i)
415 qed_inform_vf_link_state(&cdev->hwfns[i]);
419 static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params)
421 struct ecore_hwfn *hwfn;
422 struct ecore_ptt *ptt;
423 struct ecore_mcp_link_params *link_params;
426 /* The link should be set only once per PF */
427 hwfn = &edev->hwfns[0];
429 ptt = ecore_ptt_acquire(hwfn);
433 link_params = ecore_mcp_get_link_params(hwfn);
434 if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG)
435 link_params->speed.autoneg = params->autoneg;
437 if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) {
438 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
439 link_params->pause.autoneg = true;
441 link_params->pause.autoneg = false;
442 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE)
443 link_params->pause.forced_rx = true;
445 link_params->pause.forced_rx = false;
446 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE)
447 link_params->pause.forced_tx = true;
449 link_params->pause.forced_tx = false;
452 rc = ecore_mcp_set_link(hwfn, ptt, params->link_up);
454 ecore_ptt_release(hwfn, ptt);
459 static int qed_drain(struct ecore_dev *edev)
461 struct ecore_hwfn *hwfn;
462 struct ecore_ptt *ptt;
465 for_each_hwfn(edev, i) {
466 hwfn = &edev->hwfns[i];
467 ptt = ecore_ptt_acquire(hwfn);
469 DP_NOTICE(hwfn, true, "Failed to drain NIG; No PTT\n");
472 rc = ecore_mcp_drain(hwfn, ptt);
475 ecore_ptt_release(hwfn, ptt);
481 static int qed_nic_stop(struct ecore_dev *edev)
485 rc = ecore_hw_stop(edev);
486 for (i = 0; i < edev->num_hwfns; i++) {
487 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
489 if (p_hwfn->b_sp_dpc_enabled)
490 p_hwfn->b_sp_dpc_enabled = false;
495 static int qed_nic_reset(struct ecore_dev *edev)
499 rc = ecore_hw_reset(edev);
503 ecore_resc_free(edev);
508 static int qed_slowpath_stop(struct ecore_dev *edev)
510 #ifdef CONFIG_QED_SRIOV
517 qed_free_stream_mem(edev);
526 static void qed_remove(struct ecore_dev *edev)
531 ecore_hw_remove(edev);
534 const struct qed_common_ops qed_common_ops_pass = {
535 INIT_STRUCT_FIELD(probe, &qed_probe),
536 INIT_STRUCT_FIELD(update_pf_params, &qed_update_pf_params),
537 INIT_STRUCT_FIELD(slowpath_start, &qed_slowpath_start),
538 INIT_STRUCT_FIELD(set_id, &qed_set_id),
539 INIT_STRUCT_FIELD(chain_alloc, &ecore_chain_alloc),
540 INIT_STRUCT_FIELD(chain_free, &ecore_chain_free),
541 INIT_STRUCT_FIELD(sb_init, &qed_sb_init),
542 INIT_STRUCT_FIELD(get_link, &qed_get_current_link),
543 INIT_STRUCT_FIELD(set_link, &qed_set_link),
544 INIT_STRUCT_FIELD(drain, &qed_drain),
545 INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop),
546 INIT_STRUCT_FIELD(remove, &qed_remove),