2 * Copyright (c) 2016 QLogic Corporation.
6 * See LICENSE.qede_pmd for copyright and licensing details.
11 #include <rte_alarm.h>
13 #include "qede_ethdev.h"
15 static uint8_t npar_tx_switching = 1;
18 #define QEDE_ALARM_TIMEOUT_US 100000
20 /* Global variable to hold absolute path of fw file */
21 char fw_file[PATH_MAX];
23 const char *QEDE_DEFAULT_FIRMWARE =
24 "/lib/firmware/qed/qed_init_values-8.18.9.0.bin";
27 qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params)
31 for (i = 0; i < edev->num_hwfns; i++) {
32 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
33 p_hwfn->pf_params = *params;
37 static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev)
39 edev->regview = pci_dev->mem_resource[0].addr;
40 edev->doorbells = pci_dev->mem_resource[2].addr;
44 qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev,
45 enum qed_protocol protocol, uint32_t dp_module,
46 uint8_t dp_level, bool is_vf)
48 struct ecore_hw_prepare_params hw_prepare_params;
49 struct qede_dev *qdev = (struct qede_dev *)edev;
52 ecore_init_struct(edev);
53 edev->drv_type = DRV_ID_DRV_TYPE_LINUX;
54 qdev->protocol = protocol;
59 ecore_init_dp(edev, dp_module, dp_level, NULL);
60 qed_init_pci(edev, pci_dev);
62 memset(&hw_prepare_params, 0, sizeof(hw_prepare_params));
63 hw_prepare_params.personality = ECORE_PCI_ETH;
64 hw_prepare_params.drv_resc_alloc = false;
65 hw_prepare_params.chk_reg_fifo = false;
66 hw_prepare_params.initiate_pf_flr = true;
67 hw_prepare_params.epoch = (u32)time(NULL);
68 rc = ecore_hw_prepare(edev, &hw_prepare_params);
70 DP_ERR(edev, "hw prepare failed\n");
77 static int qed_nic_setup(struct ecore_dev *edev)
81 rc = ecore_resc_alloc(edev);
85 DP_INFO(edev, "Allocated qed resources\n");
86 ecore_resc_setup(edev);
91 #ifdef CONFIG_ECORE_ZIPPED_FW
92 static int qed_alloc_stream_mem(struct ecore_dev *edev)
96 for_each_hwfn(edev, i) {
97 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
99 p_hwfn->stream = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
100 sizeof(*p_hwfn->stream));
108 static void qed_free_stream_mem(struct ecore_dev *edev)
112 for_each_hwfn(edev, i) {
113 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
118 OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream);
123 #ifdef CONFIG_ECORE_BINARY_FW
124 static int qed_load_firmware_data(struct ecore_dev *edev)
128 const char *fw = RTE_LIBRTE_QEDE_FW;
130 if (strcmp(fw, "") == 0)
131 strcpy(fw_file, QEDE_DEFAULT_FIRMWARE);
135 fd = open(fw_file, O_RDONLY);
137 DP_NOTICE(edev, false, "Can't open firmware file\n");
141 if (fstat(fd, &st) < 0) {
142 DP_NOTICE(edev, false, "Can't stat firmware file\n");
147 edev->firmware = rte_zmalloc("qede_fw", st.st_size,
148 RTE_CACHE_LINE_SIZE);
149 if (!edev->firmware) {
150 DP_NOTICE(edev, false, "Can't allocate memory for firmware\n");
155 if (read(fd, edev->firmware, st.st_size) != st.st_size) {
156 DP_NOTICE(edev, false, "Can't read firmware data\n");
161 edev->fw_len = st.st_size;
162 if (edev->fw_len < 104) {
163 DP_NOTICE(edev, false, "Invalid fw size: %" PRIu64 "\n",
174 static void qed_handle_bulletin_change(struct ecore_hwfn *hwfn)
176 uint8_t mac[ETH_ALEN], is_mac_exist, is_mac_forced;
178 is_mac_exist = ecore_vf_bulletin_get_forced_mac(hwfn, mac,
180 if (is_mac_exist && is_mac_forced)
181 rte_memcpy(hwfn->hw_info.hw_mac_addr, mac, ETH_ALEN);
183 /* Always update link configuration according to bulletin */
184 qed_link_update(hwfn);
187 static void qede_vf_task(void *arg)
189 struct ecore_hwfn *p_hwfn = arg;
192 /* Read the bulletin board, and re-schedule the task */
193 ecore_vf_read_bulletin(p_hwfn, &change);
195 qed_handle_bulletin_change(p_hwfn);
197 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, p_hwfn);
200 static void qed_start_iov_task(struct ecore_dev *edev)
202 struct ecore_hwfn *p_hwfn;
205 for_each_hwfn(edev, i) {
206 p_hwfn = &edev->hwfns[i];
208 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task,
213 static void qed_stop_iov_task(struct ecore_dev *edev)
215 struct ecore_hwfn *p_hwfn;
218 for_each_hwfn(edev, i) {
219 p_hwfn = &edev->hwfns[i];
221 rte_eal_alarm_cancel(qede_vf_task, p_hwfn);
224 static int qed_slowpath_start(struct ecore_dev *edev,
225 struct qed_slowpath_params *params)
227 bool allow_npar_tx_switching;
228 const uint8_t *data = NULL;
229 struct ecore_hwfn *hwfn;
230 struct ecore_mcp_drv_version drv_version;
231 struct ecore_hw_init_params hw_init_params;
232 struct qede_dev *qdev = (struct qede_dev *)edev;
235 #ifdef CONFIG_ECORE_BINARY_FW
237 rc = qed_load_firmware_data(edev);
239 DP_ERR(edev, "Failed to find fw file %s\n", fw_file);
245 rc = qed_nic_setup(edev);
249 /* set int_coalescing_mode */
250 edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE;
252 #ifdef CONFIG_ECORE_ZIPPED_FW
254 /* Allocate stream for unzipping */
255 rc = qed_alloc_stream_mem(edev);
257 DP_NOTICE(edev, true,
258 "Failed to allocate stream memory\n");
263 qed_start_iov_task(edev);
266 #ifdef CONFIG_ECORE_BINARY_FW
268 data = (const uint8_t *)edev->firmware + sizeof(u32);
271 allow_npar_tx_switching = npar_tx_switching ? true : false;
273 /* Start the slowpath */
274 memset(&hw_init_params, 0, sizeof(hw_init_params));
275 hw_init_params.b_hw_start = true;
276 hw_init_params.int_mode = ECORE_INT_MODE_MSIX;
277 hw_init_params.allow_npar_tx_switch = allow_npar_tx_switching;
278 hw_init_params.bin_fw_data = data;
279 hw_init_params.mfw_timeout_val = ECORE_LOAD_REQ_LOCK_TO_DEFAULT;
280 hw_init_params.avoid_eng_reset = false;
281 rc = ecore_hw_init(edev, &hw_init_params);
283 DP_ERR(edev, "ecore_hw_init failed\n");
287 DP_INFO(edev, "HW inited and function started\n");
290 hwfn = ECORE_LEADING_HWFN(edev);
291 drv_version.version = (params->drv_major << 24) |
292 (params->drv_minor << 16) |
293 (params->drv_rev << 8) | (params->drv_eng);
295 strncpy((char *)drv_version.name, (const char *)params->name,
296 MCP_DRV_VER_STR_SIZE - 4);
297 rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
300 DP_NOTICE(edev, true,
301 "Failed sending drv version command\n");
306 ecore_reset_vport_stats(edev);
312 ecore_resc_free(edev);
314 #ifdef CONFIG_ECORE_BINARY_FW
317 rte_free(edev->firmware);
318 edev->firmware = NULL;
321 qed_stop_iov_task(edev);
327 qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info)
329 struct ecore_ptt *ptt = NULL;
330 struct ecore_tunnel_info *tun = &edev->tunnel;
332 memset(dev_info, 0, sizeof(struct qed_dev_info));
334 if (tun->vxlan.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
335 tun->vxlan.b_mode_enabled)
336 dev_info->vxlan_enable = true;
338 if (tun->l2_gre.b_mode_enabled && tun->ip_gre.b_mode_enabled &&
339 tun->l2_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
340 tun->ip_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
341 dev_info->gre_enable = true;
343 if (tun->l2_geneve.b_mode_enabled && tun->ip_geneve.b_mode_enabled &&
344 tun->l2_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
345 tun->ip_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
346 dev_info->geneve_enable = true;
348 dev_info->num_hwfns = edev->num_hwfns;
349 dev_info->is_mf_default = IS_MF_DEFAULT(&edev->hwfns[0]);
350 dev_info->mtu = ECORE_LEADING_HWFN(edev)->hw_info.mtu;
352 rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
356 dev_info->fw_major = FW_MAJOR_VERSION;
357 dev_info->fw_minor = FW_MINOR_VERSION;
358 dev_info->fw_rev = FW_REVISION_VERSION;
359 dev_info->fw_eng = FW_ENGINEERING_VERSION;
360 dev_info->mf_mode = edev->mf_mode;
361 dev_info->tx_switching = false;
363 ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev));
365 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
366 &dev_info->mfw_rev, NULL);
368 ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt,
369 &dev_info->flash_size);
371 /* Workaround to allow PHY-read commands for
374 if (ECORE_IS_BB_B0(edev))
375 dev_info->flash_size = 0xffffffff;
377 ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt);
380 ecore_vf_get_fw_version(&edev->hwfns[0], &dev_info->fw_major,
381 &dev_info->fw_minor, &dev_info->fw_rev,
384 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
385 &dev_info->mfw_rev, NULL);
392 qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info)
394 struct qede_dev *qdev = (struct qede_dev *)edev;
398 memset(info, 0, sizeof(*info));
400 info->num_tc = 1 /* @@@TBD aelior MULTI_COS */;
403 int max_vf_vlan_filters = 0;
405 info->num_queues = 0;
406 for_each_hwfn(edev, i)
408 FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE);
410 if (edev->p_iov_info)
411 max_vf_vlan_filters = edev->p_iov_info->total_vfs *
412 ECORE_ETH_VF_NUM_VLAN_FILTERS;
413 info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN) -
416 rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
419 ecore_vf_get_num_rxqs(ECORE_LEADING_HWFN(edev),
421 if (edev->num_hwfns > 1) {
422 ecore_vf_get_num_rxqs(&edev->hwfns[1], &queues);
423 info->num_queues += queues;
426 ecore_vf_get_num_vlan_filters(&edev->hwfns[0],
427 (u8 *)&info->num_vlan_filters);
429 ecore_vf_get_port_mac(&edev->hwfns[0],
430 (uint8_t *)&info->port_mac);
432 info->is_legacy = ecore_vf_get_pre_fp_hsi(&edev->hwfns[0]);
435 qed_fill_dev_info(edev, &info->common);
438 memset(&info->common.hw_mac, 0, ETHER_ADDR_LEN);
443 static void qed_set_name(struct ecore_dev *edev, char name[NAME_SIZE])
447 rte_memcpy(edev->name, name, NAME_SIZE);
448 for_each_hwfn(edev, i) {
449 snprintf(edev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i);
454 qed_sb_init(struct ecore_dev *edev, struct ecore_sb_info *sb_info,
455 void *sb_virt_addr, dma_addr_t sb_phy_addr,
456 uint16_t sb_id, enum qed_sb_type type)
458 struct ecore_hwfn *p_hwfn;
464 /* RoCE uses single engine and CMT uses two engines. When using both
465 * we force only a single engine. Storage uses only engine 0 too.
467 if (type == QED_SB_TYPE_L2_QUEUE)
468 n_hwfns = edev->num_hwfns;
472 hwfn_index = sb_id % n_hwfns;
473 p_hwfn = &edev->hwfns[hwfn_index];
474 rel_sb_id = sb_id / n_hwfns;
476 DP_INFO(edev, "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
477 hwfn_index, rel_sb_id, sb_id);
479 rc = ecore_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info,
480 sb_virt_addr, sb_phy_addr, rel_sb_id);
485 static void qed_fill_link(struct ecore_hwfn *hwfn,
486 struct qed_link_output *if_link)
488 struct ecore_mcp_link_params params;
489 struct ecore_mcp_link_state link;
490 struct ecore_mcp_link_capabilities link_caps;
494 memset(if_link, 0, sizeof(*if_link));
496 /* Prepare source inputs */
497 if (IS_PF(hwfn->p_dev)) {
498 rte_memcpy(¶ms, ecore_mcp_get_link_params(hwfn),
500 rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link));
501 rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn),
504 ecore_vf_read_bulletin(hwfn, &change);
505 ecore_vf_get_link_params(hwfn, ¶ms);
506 ecore_vf_get_link_state(hwfn, &link);
507 ecore_vf_get_link_caps(hwfn, &link_caps);
510 /* Set the link parameters to pass to protocol driver */
512 if_link->link_up = true;
515 if_link->speed = link.speed;
517 if_link->duplex = QEDE_DUPLEX_FULL;
519 /* Fill up the native advertised speed cap mask */
520 if_link->adv_speed = params.speed.advertised_speeds;
522 if (params.speed.autoneg)
523 if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG;
525 if (params.pause.autoneg || params.pause.forced_rx ||
526 params.pause.forced_tx)
527 if_link->supported_caps |= QEDE_SUPPORTED_PAUSE;
529 if (params.pause.autoneg)
530 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
532 if (params.pause.forced_rx)
533 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE;
535 if (params.pause.forced_tx)
536 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE;
540 qed_get_current_link(struct ecore_dev *edev, struct qed_link_output *if_link)
542 qed_fill_link(&edev->hwfns[0], if_link);
544 #ifdef CONFIG_QED_SRIOV
545 for_each_hwfn(cdev, i)
546 qed_inform_vf_link_state(&cdev->hwfns[i]);
550 static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params)
552 struct ecore_hwfn *hwfn;
553 struct ecore_ptt *ptt;
554 struct ecore_mcp_link_params *link_params;
560 /* The link should be set only once per PF */
561 hwfn = &edev->hwfns[0];
563 ptt = ecore_ptt_acquire(hwfn);
567 link_params = ecore_mcp_get_link_params(hwfn);
568 if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG)
569 link_params->speed.autoneg = params->autoneg;
571 if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) {
572 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
573 link_params->pause.autoneg = true;
575 link_params->pause.autoneg = false;
576 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE)
577 link_params->pause.forced_rx = true;
579 link_params->pause.forced_rx = false;
580 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE)
581 link_params->pause.forced_tx = true;
583 link_params->pause.forced_tx = false;
586 rc = ecore_mcp_set_link(hwfn, ptt, params->link_up);
588 ecore_ptt_release(hwfn, ptt);
593 void qed_link_update(struct ecore_hwfn *hwfn)
595 struct qed_link_output if_link;
597 qed_fill_link(hwfn, &if_link);
600 static int qed_drain(struct ecore_dev *edev)
602 struct ecore_hwfn *hwfn;
603 struct ecore_ptt *ptt;
609 for_each_hwfn(edev, i) {
610 hwfn = &edev->hwfns[i];
611 ptt = ecore_ptt_acquire(hwfn);
613 DP_NOTICE(hwfn, true, "Failed to drain NIG; No PTT\n");
616 rc = ecore_mcp_drain(hwfn, ptt);
619 ecore_ptt_release(hwfn, ptt);
625 static int qed_nic_stop(struct ecore_dev *edev)
629 rc = ecore_hw_stop(edev);
630 for (i = 0; i < edev->num_hwfns; i++) {
631 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
633 if (p_hwfn->b_sp_dpc_enabled)
634 p_hwfn->b_sp_dpc_enabled = false;
639 static int qed_nic_reset(struct ecore_dev *edev)
643 rc = ecore_hw_reset(edev);
647 ecore_resc_free(edev);
652 static int qed_slowpath_stop(struct ecore_dev *edev)
654 #ifdef CONFIG_QED_SRIOV
662 #ifdef CONFIG_ECORE_ZIPPED_FW
663 qed_free_stream_mem(edev);
666 #ifdef CONFIG_QED_SRIOV
667 if (IS_QED_ETH_IF(edev))
668 qed_sriov_disable(edev, true);
674 qed_stop_iov_task(edev);
679 static void qed_remove(struct ecore_dev *edev)
684 ecore_hw_remove(edev);
687 static int qed_send_drv_state(struct ecore_dev *edev, bool active)
689 struct ecore_hwfn *hwfn = ECORE_LEADING_HWFN(edev);
690 struct ecore_ptt *ptt;
693 ptt = ecore_ptt_acquire(hwfn);
697 status = ecore_mcp_ov_update_driver_state(hwfn, ptt, active ?
698 ECORE_OV_DRIVER_STATE_ACTIVE :
699 ECORE_OV_DRIVER_STATE_DISABLED);
701 ecore_ptt_release(hwfn, ptt);
706 static int qed_get_sb_info(struct ecore_dev *edev, struct ecore_sb_info *sb,
707 u16 qid, struct ecore_sb_info_dbg *sb_dbg)
709 struct ecore_hwfn *hwfn = &edev->hwfns[qid % edev->num_hwfns];
710 struct ecore_ptt *ptt;
716 ptt = ecore_ptt_acquire(hwfn);
718 DP_NOTICE(hwfn, true, "Can't acquire PTT\n");
722 memset(sb_dbg, 0, sizeof(*sb_dbg));
723 rc = ecore_int_get_sb_dbg(hwfn, ptt, sb, sb_dbg);
725 ecore_ptt_release(hwfn, ptt);
729 const struct qed_common_ops qed_common_ops_pass = {
730 INIT_STRUCT_FIELD(probe, &qed_probe),
731 INIT_STRUCT_FIELD(update_pf_params, &qed_update_pf_params),
732 INIT_STRUCT_FIELD(slowpath_start, &qed_slowpath_start),
733 INIT_STRUCT_FIELD(set_name, &qed_set_name),
734 INIT_STRUCT_FIELD(chain_alloc, &ecore_chain_alloc),
735 INIT_STRUCT_FIELD(chain_free, &ecore_chain_free),
736 INIT_STRUCT_FIELD(sb_init, &qed_sb_init),
737 INIT_STRUCT_FIELD(get_link, &qed_get_current_link),
738 INIT_STRUCT_FIELD(set_link, &qed_set_link),
739 INIT_STRUCT_FIELD(drain, &qed_drain),
740 INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop),
741 INIT_STRUCT_FIELD(remove, &qed_remove),
742 INIT_STRUCT_FIELD(send_drv_state, &qed_send_drv_state),