2 * Copyright (c) 2016 QLogic Corporation.
6 * See LICENSE.qede_pmd for copyright and licensing details.
10 #include <rte_alarm.h>
12 #include "qede_ethdev.h"
14 static uint8_t npar_tx_switching = 1;
17 #define QEDE_ALARM_TIMEOUT_US 100000
19 /* Global variable to hold absolute path of fw file */
20 char fw_file[PATH_MAX];
22 const char *QEDE_DEFAULT_FIRMWARE =
23 "/lib/firmware/qed/qed_init_values_zipped-8.10.9.0.bin";
26 qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params)
30 for (i = 0; i < edev->num_hwfns; i++) {
31 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
32 p_hwfn->pf_params = *params;
36 static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev)
38 edev->regview = pci_dev->mem_resource[0].addr;
39 edev->doorbells = pci_dev->mem_resource[2].addr;
43 qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev,
44 enum qed_protocol protocol, uint32_t dp_module,
45 uint8_t dp_level, bool is_vf)
47 struct ecore_hw_prepare_params hw_prepare_params;
48 struct qede_dev *qdev = (struct qede_dev *)edev;
51 ecore_init_struct(edev);
52 qdev->protocol = protocol;
55 edev->b_hw_channel = true; /* @DPDK */
57 ecore_init_dp(edev, dp_module, dp_level, NULL);
58 qed_init_pci(edev, pci_dev);
60 memset(&hw_prepare_params, 0, sizeof(hw_prepare_params));
61 hw_prepare_params.personality = ECORE_PCI_ETH;
62 hw_prepare_params.drv_resc_alloc = false;
63 hw_prepare_params.chk_reg_fifo = false;
64 rc = ecore_hw_prepare(edev, &hw_prepare_params);
66 DP_ERR(edev, "hw prepare failed\n");
73 static int qed_nic_setup(struct ecore_dev *edev)
77 rc = ecore_resc_alloc(edev);
81 DP_INFO(edev, "Allocated qed resources\n");
82 ecore_resc_setup(edev);
87 #ifdef CONFIG_ECORE_ZIPPED_FW
88 static int qed_alloc_stream_mem(struct ecore_dev *edev)
92 for_each_hwfn(edev, i) {
93 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
95 p_hwfn->stream = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
96 sizeof(*p_hwfn->stream));
104 static void qed_free_stream_mem(struct ecore_dev *edev)
108 for_each_hwfn(edev, i) {
109 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
114 OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream);
119 #ifdef CONFIG_ECORE_BINARY_FW
120 static int qed_load_firmware_data(struct ecore_dev *edev)
124 const char *fw = RTE_LIBRTE_QEDE_FW;
126 if (strcmp(fw, "") == 0)
127 strcpy(fw_file, QEDE_DEFAULT_FIRMWARE);
131 fd = open(fw_file, O_RDONLY);
133 DP_NOTICE(edev, false, "Can't open firmware file\n");
137 if (fstat(fd, &st) < 0) {
138 DP_NOTICE(edev, false, "Can't stat firmware file\n");
142 edev->firmware = rte_zmalloc("qede_fw", st.st_size,
143 RTE_CACHE_LINE_SIZE);
144 if (!edev->firmware) {
145 DP_NOTICE(edev, false, "Can't allocate memory for firmware\n");
150 if (read(fd, edev->firmware, st.st_size) != st.st_size) {
151 DP_NOTICE(edev, false, "Can't read firmware data\n");
156 edev->fw_len = st.st_size;
157 if (edev->fw_len < 104) {
158 DP_NOTICE(edev, false, "Invalid fw size: %" PRIu64 "\n",
167 static void qed_handle_bulletin_change(struct ecore_hwfn *hwfn)
169 uint8_t mac[ETH_ALEN], is_mac_exist, is_mac_forced;
171 is_mac_exist = ecore_vf_bulletin_get_forced_mac(hwfn, mac,
173 if (is_mac_exist && is_mac_forced)
174 rte_memcpy(hwfn->hw_info.hw_mac_addr, mac, ETH_ALEN);
176 /* Always update link configuration according to bulletin */
177 qed_link_update(hwfn);
180 static void qede_vf_task(void *arg)
182 struct ecore_hwfn *p_hwfn = arg;
185 /* Read the bulletin board, and re-schedule the task */
186 ecore_vf_read_bulletin(p_hwfn, &change);
188 qed_handle_bulletin_change(p_hwfn);
190 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, p_hwfn);
193 static void qed_start_iov_task(struct ecore_dev *edev)
195 struct ecore_hwfn *p_hwfn;
198 for_each_hwfn(edev, i) {
199 p_hwfn = &edev->hwfns[i];
201 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task,
206 static void qed_stop_iov_task(struct ecore_dev *edev)
208 struct ecore_hwfn *p_hwfn;
211 for_each_hwfn(edev, i) {
212 p_hwfn = &edev->hwfns[i];
214 rte_eal_alarm_cancel(qede_vf_task, p_hwfn);
217 static int qed_slowpath_start(struct ecore_dev *edev,
218 struct qed_slowpath_params *params)
220 bool allow_npar_tx_switching;
221 const uint8_t *data = NULL;
222 struct ecore_hwfn *hwfn;
223 struct ecore_mcp_drv_version drv_version;
224 struct qede_dev *qdev = (struct qede_dev *)edev;
226 #ifdef QED_ENC_SUPPORTED
227 struct ecore_tunn_start_params tunn_info;
230 #ifdef CONFIG_ECORE_BINARY_FW
232 rc = qed_load_firmware_data(edev);
234 DP_NOTICE(edev, true,
235 "Failed to find fw file %s\n", fw_file);
241 rc = qed_nic_setup(edev);
245 /* set int_coalescing_mode */
246 edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE;
248 #ifdef CONFIG_ECORE_ZIPPED_FW
250 /* Allocate stream for unzipping */
251 rc = qed_alloc_stream_mem(edev);
253 DP_NOTICE(edev, true,
254 "Failed to allocate stream memory\n");
259 qed_start_iov_task(edev);
262 /* Start the slowpath */
263 #ifdef CONFIG_ECORE_BINARY_FW
265 data = (const uint8_t *)edev->firmware + sizeof(u32);
268 allow_npar_tx_switching = npar_tx_switching ? true : false;
270 #ifdef QED_ENC_SUPPORTED
271 memset(&tunn_info, 0, sizeof(tunn_info));
272 tunn_info.tunn_mode |= 1 << QED_MODE_VXLAN_TUNN |
273 1 << QED_MODE_L2GRE_TUNN |
274 1 << QED_MODE_IPGRE_TUNN |
275 1 << QED_MODE_L2GENEVE_TUNN | 1 << QED_MODE_IPGENEVE_TUNN;
276 tunn_info.tunn_clss_vxlan = QED_TUNN_CLSS_MAC_VLAN;
277 tunn_info.tunn_clss_l2gre = QED_TUNN_CLSS_MAC_VLAN;
278 tunn_info.tunn_clss_ipgre = QED_TUNN_CLSS_MAC_VLAN;
279 rc = ecore_hw_init(edev, &tunn_info, true, ECORE_INT_MODE_MSIX,
280 allow_npar_tx_switching, data);
282 rc = ecore_hw_init(edev, NULL, true, ECORE_INT_MODE_MSIX,
283 allow_npar_tx_switching, data);
286 DP_ERR(edev, "ecore_hw_init failed\n");
290 DP_INFO(edev, "HW inited and function started\n");
293 hwfn = ECORE_LEADING_HWFN(edev);
294 drv_version.version = (params->drv_major << 24) |
295 (params->drv_minor << 16) |
296 (params->drv_rev << 8) | (params->drv_eng);
298 strncpy((char *)drv_version.name, (const char *)params->name,
299 MCP_DRV_VER_STR_SIZE - 4);
300 rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
303 DP_NOTICE(edev, true,
304 "Failed sending drv version command\n");
309 ecore_reset_vport_stats(edev);
315 ecore_resc_free(edev);
317 #ifdef CONFIG_ECORE_BINARY_FW
320 rte_free(edev->firmware);
321 edev->firmware = NULL;
324 qed_stop_iov_task(edev);
330 qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info)
332 struct ecore_ptt *ptt = NULL;
334 memset(dev_info, 0, sizeof(struct qed_dev_info));
335 dev_info->num_hwfns = edev->num_hwfns;
336 dev_info->is_mf_default = IS_MF_DEFAULT(&edev->hwfns[0]);
337 rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
341 dev_info->fw_major = FW_MAJOR_VERSION;
342 dev_info->fw_minor = FW_MINOR_VERSION;
343 dev_info->fw_rev = FW_REVISION_VERSION;
344 dev_info->fw_eng = FW_ENGINEERING_VERSION;
345 dev_info->mf_mode = edev->mf_mode;
346 dev_info->tx_switching = false;
348 ecore_vf_get_fw_version(&edev->hwfns[0], &dev_info->fw_major,
349 &dev_info->fw_minor, &dev_info->fw_rev,
354 ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev));
356 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
357 &dev_info->mfw_rev, NULL);
359 ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt,
360 &dev_info->flash_size);
362 /* Workaround to allow PHY-read commands for
365 if (ECORE_IS_BB_B0(edev))
366 dev_info->flash_size = 0xffffffff;
368 ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt);
371 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
372 &dev_info->mfw_rev, NULL);
379 qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info)
381 struct qede_dev *qdev = (struct qede_dev *)edev;
384 memset(info, 0, sizeof(*info));
386 info->num_tc = 1 /* @@@TBD aelior MULTI_COS */;
389 info->num_queues = 0;
390 for_each_hwfn(edev, i)
392 FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE);
394 info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN);
396 rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
399 ecore_vf_get_num_rxqs(&edev->hwfns[0], &info->num_queues);
401 ecore_vf_get_num_vlan_filters(&edev->hwfns[0],
402 &info->num_vlan_filters);
404 ecore_vf_get_port_mac(&edev->hwfns[0],
405 (uint8_t *)&info->port_mac);
408 qed_fill_dev_info(edev, &info->common);
411 memset(&info->common.hw_mac, 0, ETHER_ADDR_LEN);
417 qed_set_id(struct ecore_dev *edev, char name[NAME_SIZE],
418 const char ver_str[VER_SIZE])
422 rte_memcpy(edev->name, name, NAME_SIZE);
423 for_each_hwfn(edev, i) {
424 snprintf(edev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i);
426 rte_memcpy(edev->ver_str, ver_str, VER_SIZE);
427 edev->drv_type = DRV_ID_DRV_TYPE_LINUX;
431 qed_sb_init(struct ecore_dev *edev, struct ecore_sb_info *sb_info,
432 void *sb_virt_addr, dma_addr_t sb_phy_addr,
433 uint16_t sb_id, enum qed_sb_type type)
435 struct ecore_hwfn *p_hwfn;
441 /* RoCE uses single engine and CMT uses two engines. When using both
442 * we force only a single engine. Storage uses only engine 0 too.
444 if (type == QED_SB_TYPE_L2_QUEUE)
445 n_hwfns = edev->num_hwfns;
449 hwfn_index = sb_id % n_hwfns;
450 p_hwfn = &edev->hwfns[hwfn_index];
451 rel_sb_id = sb_id / n_hwfns;
453 DP_INFO(edev, "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
454 hwfn_index, rel_sb_id, sb_id);
456 rc = ecore_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info,
457 sb_virt_addr, sb_phy_addr, rel_sb_id);
462 static void qed_fill_link(struct ecore_hwfn *hwfn,
463 struct qed_link_output *if_link)
465 struct ecore_mcp_link_params params;
466 struct ecore_mcp_link_state link;
467 struct ecore_mcp_link_capabilities link_caps;
471 memset(if_link, 0, sizeof(*if_link));
473 /* Prepare source inputs */
474 if (IS_PF(hwfn->p_dev)) {
475 rte_memcpy(¶ms, ecore_mcp_get_link_params(hwfn),
477 rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link));
478 rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn),
481 ecore_vf_read_bulletin(hwfn, &change);
482 ecore_vf_get_link_params(hwfn, ¶ms);
483 ecore_vf_get_link_state(hwfn, &link);
484 ecore_vf_get_link_caps(hwfn, &link_caps);
487 /* Set the link parameters to pass to protocol driver */
489 if_link->link_up = true;
492 if_link->speed = link.speed;
494 if_link->duplex = QEDE_DUPLEX_FULL;
496 if (params.speed.autoneg)
497 if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG;
499 if (params.pause.autoneg || params.pause.forced_rx ||
500 params.pause.forced_tx)
501 if_link->supported_caps |= QEDE_SUPPORTED_PAUSE;
503 if (params.pause.autoneg)
504 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
506 if (params.pause.forced_rx)
507 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE;
509 if (params.pause.forced_tx)
510 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE;
514 qed_get_current_link(struct ecore_dev *edev, struct qed_link_output *if_link)
516 qed_fill_link(&edev->hwfns[0], if_link);
518 #ifdef CONFIG_QED_SRIOV
519 for_each_hwfn(cdev, i)
520 qed_inform_vf_link_state(&cdev->hwfns[i]);
524 static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params)
526 struct ecore_hwfn *hwfn;
527 struct ecore_ptt *ptt;
528 struct ecore_mcp_link_params *link_params;
534 /* The link should be set only once per PF */
535 hwfn = &edev->hwfns[0];
537 ptt = ecore_ptt_acquire(hwfn);
541 link_params = ecore_mcp_get_link_params(hwfn);
542 if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG)
543 link_params->speed.autoneg = params->autoneg;
545 if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) {
546 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
547 link_params->pause.autoneg = true;
549 link_params->pause.autoneg = false;
550 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE)
551 link_params->pause.forced_rx = true;
553 link_params->pause.forced_rx = false;
554 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE)
555 link_params->pause.forced_tx = true;
557 link_params->pause.forced_tx = false;
560 rc = ecore_mcp_set_link(hwfn, ptt, params->link_up);
562 ecore_ptt_release(hwfn, ptt);
567 void qed_link_update(struct ecore_hwfn *hwfn)
569 struct qed_link_output if_link;
571 qed_fill_link(hwfn, &if_link);
574 static int qed_drain(struct ecore_dev *edev)
576 struct ecore_hwfn *hwfn;
577 struct ecore_ptt *ptt;
583 for_each_hwfn(edev, i) {
584 hwfn = &edev->hwfns[i];
585 ptt = ecore_ptt_acquire(hwfn);
587 DP_NOTICE(hwfn, true, "Failed to drain NIG; No PTT\n");
590 rc = ecore_mcp_drain(hwfn, ptt);
593 ecore_ptt_release(hwfn, ptt);
599 static int qed_nic_stop(struct ecore_dev *edev)
603 rc = ecore_hw_stop(edev);
604 for (i = 0; i < edev->num_hwfns; i++) {
605 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
607 if (p_hwfn->b_sp_dpc_enabled)
608 p_hwfn->b_sp_dpc_enabled = false;
613 static int qed_nic_reset(struct ecore_dev *edev)
617 rc = ecore_hw_reset(edev);
621 ecore_resc_free(edev);
626 static int qed_slowpath_stop(struct ecore_dev *edev)
628 #ifdef CONFIG_QED_SRIOV
636 #ifdef CONFIG_ECORE_ZIPPED_FW
637 qed_free_stream_mem(edev);
640 #ifdef CONFIG_QED_SRIOV
641 if (IS_QED_ETH_IF(edev))
642 qed_sriov_disable(edev, true);
648 qed_stop_iov_task(edev);
653 static void qed_remove(struct ecore_dev *edev)
658 ecore_hw_remove(edev);
661 const struct qed_common_ops qed_common_ops_pass = {
662 INIT_STRUCT_FIELD(probe, &qed_probe),
663 INIT_STRUCT_FIELD(update_pf_params, &qed_update_pf_params),
664 INIT_STRUCT_FIELD(slowpath_start, &qed_slowpath_start),
665 INIT_STRUCT_FIELD(set_id, &qed_set_id),
666 INIT_STRUCT_FIELD(chain_alloc, &ecore_chain_alloc),
667 INIT_STRUCT_FIELD(chain_free, &ecore_chain_free),
668 INIT_STRUCT_FIELD(sb_init, &qed_sb_init),
669 INIT_STRUCT_FIELD(get_link, &qed_get_current_link),
670 INIT_STRUCT_FIELD(set_link, &qed_set_link),
671 INIT_STRUCT_FIELD(drain, &qed_drain),
672 INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop),
673 INIT_STRUCT_FIELD(remove, &qed_remove),