2 * Copyright (c) 2016 QLogic Corporation.
6 * See LICENSE.qede_pmd for copyright and licensing details.
11 #include <rte_alarm.h>
13 #include "qede_ethdev.h"
15 static uint8_t npar_tx_switching = 1;
18 #define QEDE_ALARM_TIMEOUT_US 100000
20 /* Global variable to hold absolute path of fw file */
21 char fw_file[PATH_MAX];
23 const char *QEDE_DEFAULT_FIRMWARE =
24 "/lib/firmware/qed/qed_init_values-8.18.9.0.bin";
27 qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params)
31 for (i = 0; i < edev->num_hwfns; i++) {
32 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
33 p_hwfn->pf_params = *params;
37 static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev)
39 edev->regview = pci_dev->mem_resource[0].addr;
40 edev->doorbells = pci_dev->mem_resource[2].addr;
44 qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev,
45 enum qed_protocol protocol, uint32_t dp_module,
46 uint8_t dp_level, bool is_vf)
48 struct ecore_hw_prepare_params hw_prepare_params;
49 struct qede_dev *qdev = (struct qede_dev *)edev;
52 ecore_init_struct(edev);
53 edev->drv_type = DRV_ID_DRV_TYPE_LINUX;
54 qdev->protocol = protocol;
59 ecore_init_dp(edev, dp_module, dp_level, NULL);
60 qed_init_pci(edev, pci_dev);
62 memset(&hw_prepare_params, 0, sizeof(hw_prepare_params));
63 hw_prepare_params.personality = ECORE_PCI_ETH;
64 hw_prepare_params.drv_resc_alloc = false;
65 hw_prepare_params.chk_reg_fifo = false;
66 hw_prepare_params.initiate_pf_flr = true;
67 hw_prepare_params.epoch = (u32)time(NULL);
68 rc = ecore_hw_prepare(edev, &hw_prepare_params);
70 DP_ERR(edev, "hw prepare failed\n");
77 static int qed_nic_setup(struct ecore_dev *edev)
81 rc = ecore_resc_alloc(edev);
85 DP_INFO(edev, "Allocated qed resources\n");
86 ecore_resc_setup(edev);
91 #ifdef CONFIG_ECORE_ZIPPED_FW
92 static int qed_alloc_stream_mem(struct ecore_dev *edev)
96 for_each_hwfn(edev, i) {
97 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
99 p_hwfn->stream = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
100 sizeof(*p_hwfn->stream));
108 static void qed_free_stream_mem(struct ecore_dev *edev)
112 for_each_hwfn(edev, i) {
113 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
118 OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream);
123 #ifdef CONFIG_ECORE_BINARY_FW
124 static int qed_load_firmware_data(struct ecore_dev *edev)
128 const char *fw = RTE_LIBRTE_QEDE_FW;
130 if (strcmp(fw, "") == 0)
131 strcpy(fw_file, QEDE_DEFAULT_FIRMWARE);
135 fd = open(fw_file, O_RDONLY);
137 DP_NOTICE(edev, false, "Can't open firmware file\n");
141 if (fstat(fd, &st) < 0) {
142 DP_NOTICE(edev, false, "Can't stat firmware file\n");
147 edev->firmware = rte_zmalloc("qede_fw", st.st_size,
148 RTE_CACHE_LINE_SIZE);
149 if (!edev->firmware) {
150 DP_NOTICE(edev, false, "Can't allocate memory for firmware\n");
155 if (read(fd, edev->firmware, st.st_size) != st.st_size) {
156 DP_NOTICE(edev, false, "Can't read firmware data\n");
161 edev->fw_len = st.st_size;
162 if (edev->fw_len < 104) {
163 DP_NOTICE(edev, false, "Invalid fw size: %" PRIu64 "\n",
174 static void qed_handle_bulletin_change(struct ecore_hwfn *hwfn)
176 uint8_t mac[ETH_ALEN], is_mac_exist, is_mac_forced;
178 is_mac_exist = ecore_vf_bulletin_get_forced_mac(hwfn, mac,
180 if (is_mac_exist && is_mac_forced)
181 rte_memcpy(hwfn->hw_info.hw_mac_addr, mac, ETH_ALEN);
183 /* Always update link configuration according to bulletin */
184 qed_link_update(hwfn);
187 static void qede_vf_task(void *arg)
189 struct ecore_hwfn *p_hwfn = arg;
192 /* Read the bulletin board, and re-schedule the task */
193 ecore_vf_read_bulletin(p_hwfn, &change);
195 qed_handle_bulletin_change(p_hwfn);
197 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, p_hwfn);
200 static void qed_start_iov_task(struct ecore_dev *edev)
202 struct ecore_hwfn *p_hwfn;
205 for_each_hwfn(edev, i) {
206 p_hwfn = &edev->hwfns[i];
208 rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task,
213 static void qed_stop_iov_task(struct ecore_dev *edev)
215 struct ecore_hwfn *p_hwfn;
218 for_each_hwfn(edev, i) {
219 p_hwfn = &edev->hwfns[i];
221 rte_eal_alarm_cancel(qede_vf_task, p_hwfn);
224 static int qed_slowpath_start(struct ecore_dev *edev,
225 struct qed_slowpath_params *params)
227 bool allow_npar_tx_switching;
228 const uint8_t *data = NULL;
229 struct ecore_hwfn *hwfn;
230 struct ecore_mcp_drv_version drv_version;
231 struct ecore_hw_init_params hw_init_params;
232 struct qede_dev *qdev = (struct qede_dev *)edev;
235 #ifdef CONFIG_ECORE_BINARY_FW
237 rc = qed_load_firmware_data(edev);
239 DP_ERR(edev, "Failed to find fw file %s\n", fw_file);
245 rc = qed_nic_setup(edev);
249 /* set int_coalescing_mode */
250 edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE;
252 #ifdef CONFIG_ECORE_ZIPPED_FW
254 /* Allocate stream for unzipping */
255 rc = qed_alloc_stream_mem(edev);
257 DP_NOTICE(edev, true,
258 "Failed to allocate stream memory\n");
263 qed_start_iov_task(edev);
266 #ifdef CONFIG_ECORE_BINARY_FW
268 data = (const uint8_t *)edev->firmware + sizeof(u32);
271 allow_npar_tx_switching = npar_tx_switching ? true : false;
273 /* Start the slowpath */
274 memset(&hw_init_params, 0, sizeof(hw_init_params));
275 hw_init_params.b_hw_start = true;
276 hw_init_params.int_mode = ECORE_INT_MODE_MSIX;
277 hw_init_params.allow_npar_tx_switch = allow_npar_tx_switching;
278 hw_init_params.bin_fw_data = data;
279 rc = ecore_hw_init(edev, &hw_init_params);
281 DP_ERR(edev, "ecore_hw_init failed\n");
285 DP_INFO(edev, "HW inited and function started\n");
288 hwfn = ECORE_LEADING_HWFN(edev);
289 drv_version.version = (params->drv_major << 24) |
290 (params->drv_minor << 16) |
291 (params->drv_rev << 8) | (params->drv_eng);
293 strncpy((char *)drv_version.name, (const char *)params->name,
294 MCP_DRV_VER_STR_SIZE - 4);
295 rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
298 DP_NOTICE(edev, true,
299 "Failed sending drv version command\n");
304 ecore_reset_vport_stats(edev);
310 ecore_resc_free(edev);
312 #ifdef CONFIG_ECORE_BINARY_FW
315 rte_free(edev->firmware);
316 edev->firmware = NULL;
319 qed_stop_iov_task(edev);
325 qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info)
327 struct ecore_ptt *ptt = NULL;
328 struct ecore_tunnel_info *tun = &edev->tunnel;
330 memset(dev_info, 0, sizeof(struct qed_dev_info));
332 if (tun->vxlan.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
333 tun->vxlan.b_mode_enabled)
334 dev_info->vxlan_enable = true;
336 if (tun->l2_gre.b_mode_enabled && tun->ip_gre.b_mode_enabled &&
337 tun->l2_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
338 tun->ip_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
339 dev_info->gre_enable = true;
341 if (tun->l2_geneve.b_mode_enabled && tun->ip_geneve.b_mode_enabled &&
342 tun->l2_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
343 tun->ip_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
344 dev_info->geneve_enable = true;
346 dev_info->num_hwfns = edev->num_hwfns;
347 dev_info->is_mf_default = IS_MF_DEFAULT(&edev->hwfns[0]);
348 dev_info->mtu = ECORE_LEADING_HWFN(edev)->hw_info.mtu;
350 rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
354 dev_info->fw_major = FW_MAJOR_VERSION;
355 dev_info->fw_minor = FW_MINOR_VERSION;
356 dev_info->fw_rev = FW_REVISION_VERSION;
357 dev_info->fw_eng = FW_ENGINEERING_VERSION;
358 dev_info->mf_mode = edev->mf_mode;
359 dev_info->tx_switching = false;
361 ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev));
363 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
364 &dev_info->mfw_rev, NULL);
366 ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt,
367 &dev_info->flash_size);
369 /* Workaround to allow PHY-read commands for
372 if (ECORE_IS_BB_B0(edev))
373 dev_info->flash_size = 0xffffffff;
375 ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt);
378 ecore_vf_get_fw_version(&edev->hwfns[0], &dev_info->fw_major,
379 &dev_info->fw_minor, &dev_info->fw_rev,
382 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
383 &dev_info->mfw_rev, NULL);
390 qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info)
392 struct qede_dev *qdev = (struct qede_dev *)edev;
396 memset(info, 0, sizeof(*info));
398 info->num_tc = 1 /* @@@TBD aelior MULTI_COS */;
401 int max_vf_vlan_filters = 0;
403 info->num_queues = 0;
404 for_each_hwfn(edev, i)
406 FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE);
408 if (edev->p_iov_info)
409 max_vf_vlan_filters = edev->p_iov_info->total_vfs *
410 ECORE_ETH_VF_NUM_VLAN_FILTERS;
411 info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN) -
414 rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
417 ecore_vf_get_num_rxqs(ECORE_LEADING_HWFN(edev),
419 if (edev->num_hwfns > 1) {
420 ecore_vf_get_num_rxqs(&edev->hwfns[1], &queues);
421 info->num_queues += queues;
424 ecore_vf_get_num_vlan_filters(&edev->hwfns[0],
425 (u8 *)&info->num_vlan_filters);
427 ecore_vf_get_port_mac(&edev->hwfns[0],
428 (uint8_t *)&info->port_mac);
430 info->is_legacy = ecore_vf_get_pre_fp_hsi(&edev->hwfns[0]);
433 qed_fill_dev_info(edev, &info->common);
436 memset(&info->common.hw_mac, 0, ETHER_ADDR_LEN);
441 static void qed_set_name(struct ecore_dev *edev, char name[NAME_SIZE])
445 rte_memcpy(edev->name, name, NAME_SIZE);
446 for_each_hwfn(edev, i) {
447 snprintf(edev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i);
452 qed_sb_init(struct ecore_dev *edev, struct ecore_sb_info *sb_info,
453 void *sb_virt_addr, dma_addr_t sb_phy_addr,
454 uint16_t sb_id, enum qed_sb_type type)
456 struct ecore_hwfn *p_hwfn;
462 /* RoCE uses single engine and CMT uses two engines. When using both
463 * we force only a single engine. Storage uses only engine 0 too.
465 if (type == QED_SB_TYPE_L2_QUEUE)
466 n_hwfns = edev->num_hwfns;
470 hwfn_index = sb_id % n_hwfns;
471 p_hwfn = &edev->hwfns[hwfn_index];
472 rel_sb_id = sb_id / n_hwfns;
474 DP_INFO(edev, "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
475 hwfn_index, rel_sb_id, sb_id);
477 rc = ecore_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info,
478 sb_virt_addr, sb_phy_addr, rel_sb_id);
483 static void qed_fill_link(struct ecore_hwfn *hwfn,
484 struct qed_link_output *if_link)
486 struct ecore_mcp_link_params params;
487 struct ecore_mcp_link_state link;
488 struct ecore_mcp_link_capabilities link_caps;
492 memset(if_link, 0, sizeof(*if_link));
494 /* Prepare source inputs */
495 if (IS_PF(hwfn->p_dev)) {
496 rte_memcpy(¶ms, ecore_mcp_get_link_params(hwfn),
498 rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link));
499 rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn),
502 ecore_vf_read_bulletin(hwfn, &change);
503 ecore_vf_get_link_params(hwfn, ¶ms);
504 ecore_vf_get_link_state(hwfn, &link);
505 ecore_vf_get_link_caps(hwfn, &link_caps);
508 /* Set the link parameters to pass to protocol driver */
510 if_link->link_up = true;
513 if_link->speed = link.speed;
515 if_link->duplex = QEDE_DUPLEX_FULL;
517 /* Fill up the native advertised speed cap mask */
518 if_link->adv_speed = params.speed.advertised_speeds;
520 if (params.speed.autoneg)
521 if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG;
523 if (params.pause.autoneg || params.pause.forced_rx ||
524 params.pause.forced_tx)
525 if_link->supported_caps |= QEDE_SUPPORTED_PAUSE;
527 if (params.pause.autoneg)
528 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
530 if (params.pause.forced_rx)
531 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE;
533 if (params.pause.forced_tx)
534 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE;
538 qed_get_current_link(struct ecore_dev *edev, struct qed_link_output *if_link)
540 qed_fill_link(&edev->hwfns[0], if_link);
542 #ifdef CONFIG_QED_SRIOV
543 for_each_hwfn(cdev, i)
544 qed_inform_vf_link_state(&cdev->hwfns[i]);
548 static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params)
550 struct ecore_hwfn *hwfn;
551 struct ecore_ptt *ptt;
552 struct ecore_mcp_link_params *link_params;
558 /* The link should be set only once per PF */
559 hwfn = &edev->hwfns[0];
561 ptt = ecore_ptt_acquire(hwfn);
565 link_params = ecore_mcp_get_link_params(hwfn);
566 if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG)
567 link_params->speed.autoneg = params->autoneg;
569 if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) {
570 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
571 link_params->pause.autoneg = true;
573 link_params->pause.autoneg = false;
574 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE)
575 link_params->pause.forced_rx = true;
577 link_params->pause.forced_rx = false;
578 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE)
579 link_params->pause.forced_tx = true;
581 link_params->pause.forced_tx = false;
584 rc = ecore_mcp_set_link(hwfn, ptt, params->link_up);
586 ecore_ptt_release(hwfn, ptt);
591 void qed_link_update(struct ecore_hwfn *hwfn)
593 struct qed_link_output if_link;
595 qed_fill_link(hwfn, &if_link);
598 static int qed_drain(struct ecore_dev *edev)
600 struct ecore_hwfn *hwfn;
601 struct ecore_ptt *ptt;
607 for_each_hwfn(edev, i) {
608 hwfn = &edev->hwfns[i];
609 ptt = ecore_ptt_acquire(hwfn);
611 DP_NOTICE(hwfn, true, "Failed to drain NIG; No PTT\n");
614 rc = ecore_mcp_drain(hwfn, ptt);
617 ecore_ptt_release(hwfn, ptt);
623 static int qed_nic_stop(struct ecore_dev *edev)
627 rc = ecore_hw_stop(edev);
628 for (i = 0; i < edev->num_hwfns; i++) {
629 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
631 if (p_hwfn->b_sp_dpc_enabled)
632 p_hwfn->b_sp_dpc_enabled = false;
637 static int qed_nic_reset(struct ecore_dev *edev)
641 rc = ecore_hw_reset(edev);
645 ecore_resc_free(edev);
650 static int qed_slowpath_stop(struct ecore_dev *edev)
652 #ifdef CONFIG_QED_SRIOV
660 #ifdef CONFIG_ECORE_ZIPPED_FW
661 qed_free_stream_mem(edev);
664 #ifdef CONFIG_QED_SRIOV
665 if (IS_QED_ETH_IF(edev))
666 qed_sriov_disable(edev, true);
672 qed_stop_iov_task(edev);
677 static void qed_remove(struct ecore_dev *edev)
682 ecore_hw_remove(edev);
685 static int qed_send_drv_state(struct ecore_dev *edev, bool active)
687 struct ecore_hwfn *hwfn = ECORE_LEADING_HWFN(edev);
688 struct ecore_ptt *ptt;
691 ptt = ecore_ptt_acquire(hwfn);
695 status = ecore_mcp_ov_update_driver_state(hwfn, ptt, active ?
696 ECORE_OV_DRIVER_STATE_ACTIVE :
697 ECORE_OV_DRIVER_STATE_DISABLED);
699 ecore_ptt_release(hwfn, ptt);
704 static int qed_get_sb_info(struct ecore_dev *edev, struct ecore_sb_info *sb,
705 u16 qid, struct ecore_sb_info_dbg *sb_dbg)
707 struct ecore_hwfn *hwfn = &edev->hwfns[qid % edev->num_hwfns];
708 struct ecore_ptt *ptt;
714 ptt = ecore_ptt_acquire(hwfn);
716 DP_NOTICE(hwfn, true, "Can't acquire PTT\n");
720 memset(sb_dbg, 0, sizeof(*sb_dbg));
721 rc = ecore_int_get_sb_dbg(hwfn, ptt, sb, sb_dbg);
723 ecore_ptt_release(hwfn, ptt);
727 const struct qed_common_ops qed_common_ops_pass = {
728 INIT_STRUCT_FIELD(probe, &qed_probe),
729 INIT_STRUCT_FIELD(update_pf_params, &qed_update_pf_params),
730 INIT_STRUCT_FIELD(slowpath_start, &qed_slowpath_start),
731 INIT_STRUCT_FIELD(set_name, &qed_set_name),
732 INIT_STRUCT_FIELD(chain_alloc, &ecore_chain_alloc),
733 INIT_STRUCT_FIELD(chain_free, &ecore_chain_free),
734 INIT_STRUCT_FIELD(sb_init, &qed_sb_init),
735 INIT_STRUCT_FIELD(get_link, &qed_get_current_link),
736 INIT_STRUCT_FIELD(set_link, &qed_set_link),
737 INIT_STRUCT_FIELD(drain, &qed_drain),
738 INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop),
739 INIT_STRUCT_FIELD(remove, &qed_remove),
740 INIT_STRUCT_FIELD(send_drv_state, &qed_send_drv_state),