net/qede: add infrastructure for debug data collection
[dpdk.git] / drivers / net / qede / qede_main.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright (c) 2016 - 2018 Cavium Inc.
3  * All rights reserved.
4  * www.cavium.com
5  */
6
7 #include <limits.h>
8 #include <rte_alarm.h>
9 #include <rte_string_fns.h>
10
11 #include "qede_ethdev.h"
12 /* ######### DEBUG ###########*/
13 #include "qede_debug.h"
14
15 /* Alarm timeout. */
16 #define QEDE_ALARM_TIMEOUT_US 100000
17
18 /* Global variable to hold absolute path of fw file */
19 char qede_fw_file[PATH_MAX];
20
21 static const char * const QEDE_DEFAULT_FIRMWARE =
22         "/lib/firmware/qed/qed_init_values-8.40.33.0.bin";
23
24 static void
25 qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params)
26 {
27         int i;
28
29         for (i = 0; i < edev->num_hwfns; i++) {
30                 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
31                 p_hwfn->pf_params = *params;
32         }
33 }
34
35 static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev)
36 {
37         edev->regview = pci_dev->mem_resource[0].addr;
38         edev->doorbells = pci_dev->mem_resource[2].addr;
39         edev->db_size = pci_dev->mem_resource[2].len;
40 }
41
42 static int
43 qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev,
44           uint32_t dp_module, uint8_t dp_level, bool is_vf)
45 {
46         struct ecore_hw_prepare_params hw_prepare_params;
47         int rc;
48
49         ecore_init_struct(edev);
50         edev->drv_type = DRV_ID_DRV_TYPE_LINUX;
51         /* Protocol type is always fixed to PROTOCOL_ETH */
52
53         if (is_vf)
54                 edev->b_is_vf = true;
55
56         ecore_init_dp(edev, dp_module, dp_level, NULL);
57         qed_init_pci(edev, pci_dev);
58
59         memset(&hw_prepare_params, 0, sizeof(hw_prepare_params));
60
61         if (is_vf)
62                 hw_prepare_params.acquire_retry_cnt = ECORE_VF_ACQUIRE_THRESH;
63
64         hw_prepare_params.personality = ECORE_PCI_ETH;
65         hw_prepare_params.drv_resc_alloc = false;
66         hw_prepare_params.chk_reg_fifo = false;
67         hw_prepare_params.initiate_pf_flr = true;
68         hw_prepare_params.allow_mdump = false;
69         hw_prepare_params.b_en_pacing = false;
70         hw_prepare_params.epoch = OSAL_GET_EPOCH(ECORE_LEADING_HWFN(edev));
71         rc = ecore_hw_prepare(edev, &hw_prepare_params);
72         if (rc) {
73                 DP_ERR(edev, "hw prepare failed\n");
74                 return rc;
75         }
76
77         return rc;
78 }
79
80 static int qed_nic_setup(struct ecore_dev *edev)
81 {
82         int rc;
83
84         rc = ecore_resc_alloc(edev);
85         if (rc)
86                 return rc;
87
88         DP_INFO(edev, "Allocated qed resources\n");
89         ecore_resc_setup(edev);
90
91         return rc;
92 }
93
94 #ifdef CONFIG_ECORE_ZIPPED_FW
95 static int qed_alloc_stream_mem(struct ecore_dev *edev)
96 {
97         int i;
98
99         for_each_hwfn(edev, i) {
100                 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
101
102                 p_hwfn->stream = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
103                                              sizeof(*p_hwfn->stream));
104                 if (!p_hwfn->stream)
105                         return -ENOMEM;
106         }
107
108         return 0;
109 }
110
111 static void qed_free_stream_mem(struct ecore_dev *edev)
112 {
113         int i;
114
115         for_each_hwfn(edev, i) {
116                 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
117
118                 if (!p_hwfn->stream)
119                         return;
120
121                 OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream);
122         }
123 }
124 #endif
125
126 #ifdef CONFIG_ECORE_BINARY_FW
127 static int qed_load_firmware_data(struct ecore_dev *edev)
128 {
129         int fd;
130         struct stat st;
131         const char *fw = RTE_LIBRTE_QEDE_FW;
132
133         if (strcmp(fw, "") == 0)
134                 strcpy(qede_fw_file, QEDE_DEFAULT_FIRMWARE);
135         else
136                 strcpy(qede_fw_file, fw);
137
138         fd = open(qede_fw_file, O_RDONLY);
139         if (fd < 0) {
140                 DP_ERR(edev, "Can't open firmware file\n");
141                 return -ENOENT;
142         }
143
144         if (fstat(fd, &st) < 0) {
145                 DP_ERR(edev, "Can't stat firmware file\n");
146                 close(fd);
147                 return -1;
148         }
149
150         edev->firmware = rte_zmalloc("qede_fw", st.st_size,
151                                     RTE_CACHE_LINE_SIZE);
152         if (!edev->firmware) {
153                 DP_ERR(edev, "Can't allocate memory for firmware\n");
154                 close(fd);
155                 return -ENOMEM;
156         }
157
158         if (read(fd, edev->firmware, st.st_size) != st.st_size) {
159                 DP_ERR(edev, "Can't read firmware data\n");
160                 close(fd);
161                 return -1;
162         }
163
164         edev->fw_len = st.st_size;
165         if (edev->fw_len < 104) {
166                 DP_ERR(edev, "Invalid fw size: %" PRIu64 "\n",
167                           edev->fw_len);
168                 close(fd);
169                 return -EINVAL;
170         }
171
172         close(fd);
173         return 0;
174 }
175 #endif
176
177 static void qed_handle_bulletin_change(struct ecore_hwfn *hwfn)
178 {
179         uint8_t mac[ETH_ALEN], is_mac_exist, is_mac_forced;
180
181         is_mac_exist = ecore_vf_bulletin_get_forced_mac(hwfn, mac,
182                                                       &is_mac_forced);
183         if (is_mac_exist && is_mac_forced)
184                 rte_memcpy(hwfn->hw_info.hw_mac_addr, mac, ETH_ALEN);
185
186         /* Always update link configuration according to bulletin */
187         qed_link_update(hwfn);
188 }
189
190 static void qede_vf_task(void *arg)
191 {
192         struct ecore_hwfn *p_hwfn = arg;
193         uint8_t change = 0;
194
195         /* Read the bulletin board, and re-schedule the task */
196         ecore_vf_read_bulletin(p_hwfn, &change);
197         if (change)
198                 qed_handle_bulletin_change(p_hwfn);
199
200         rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, p_hwfn);
201 }
202
203 static void qed_start_iov_task(struct ecore_dev *edev)
204 {
205         struct ecore_hwfn *p_hwfn;
206         int i;
207
208         for_each_hwfn(edev, i) {
209                 p_hwfn = &edev->hwfns[i];
210                 if (!IS_PF(edev))
211                         rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task,
212                                           p_hwfn);
213         }
214 }
215
216 static void qed_stop_iov_task(struct ecore_dev *edev)
217 {
218         struct ecore_hwfn *p_hwfn;
219         int i;
220
221         for_each_hwfn(edev, i) {
222                 p_hwfn = &edev->hwfns[i];
223                 if (!IS_PF(edev))
224                         rte_eal_alarm_cancel(qede_vf_task, p_hwfn);
225         }
226 }
227 static int qed_slowpath_start(struct ecore_dev *edev,
228                               struct qed_slowpath_params *params)
229 {
230         struct ecore_drv_load_params drv_load_params;
231         struct ecore_hw_init_params hw_init_params;
232         struct ecore_mcp_drv_version drv_version;
233         const uint8_t *data = NULL;
234         struct ecore_hwfn *hwfn;
235         struct ecore_ptt *p_ptt;
236         int rc;
237
238         if (IS_PF(edev)) {
239 #ifdef CONFIG_ECORE_BINARY_FW
240                 rc = qed_load_firmware_data(edev);
241                 if (rc) {
242                         DP_ERR(edev, "Failed to find fw file %s\n",
243                                 qede_fw_file);
244                         goto err;
245                 }
246 #endif
247                 hwfn = ECORE_LEADING_HWFN(edev);
248                 if (edev->num_hwfns == 1) { /* skip aRFS for 100G device */
249                         p_ptt = ecore_ptt_acquire(hwfn);
250                         if (p_ptt) {
251                                 ECORE_LEADING_HWFN(edev)->p_arfs_ptt = p_ptt;
252                         } else {
253                                 DP_ERR(edev, "Failed to acquire PTT for flowdir\n");
254                                 rc = -ENOMEM;
255                                 goto err;
256                         }
257                 }
258         }
259
260         rc = qed_nic_setup(edev);
261         if (rc)
262                 goto err;
263
264         /* set int_coalescing_mode */
265         edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE;
266
267 #ifdef CONFIG_ECORE_ZIPPED_FW
268         if (IS_PF(edev)) {
269                 /* Allocate stream for unzipping */
270                 rc = qed_alloc_stream_mem(edev);
271                 if (rc) {
272                         DP_ERR(edev, "Failed to allocate stream memory\n");
273                         goto err1;
274                 }
275         }
276 #endif
277
278         qed_start_iov_task(edev);
279
280 #ifdef CONFIG_ECORE_BINARY_FW
281         if (IS_PF(edev)) {
282                 data = (const uint8_t *)edev->firmware + sizeof(u32);
283
284                 /* ############### DEBUG ################## */
285                 qed_dbg_pf_init(edev);
286         }
287 #endif
288
289
290         /* Start the slowpath */
291         memset(&hw_init_params, 0, sizeof(hw_init_params));
292         hw_init_params.b_hw_start = true;
293         hw_init_params.int_mode = params->int_mode;
294         hw_init_params.allow_npar_tx_switch = true;
295         hw_init_params.bin_fw_data = data;
296
297         memset(&drv_load_params, 0, sizeof(drv_load_params));
298         drv_load_params.mfw_timeout_val = ECORE_LOAD_REQ_LOCK_TO_DEFAULT;
299         drv_load_params.avoid_eng_reset = false;
300         drv_load_params.override_force_load = ECORE_OVERRIDE_FORCE_LOAD_ALWAYS;
301         hw_init_params.avoid_eng_affin = false;
302         hw_init_params.p_drv_load_params = &drv_load_params;
303
304         rc = ecore_hw_init(edev, &hw_init_params);
305         if (rc) {
306                 DP_ERR(edev, "ecore_hw_init failed\n");
307                 goto err2;
308         }
309
310         DP_INFO(edev, "HW inited and function started\n");
311
312         if (IS_PF(edev)) {
313                 hwfn = ECORE_LEADING_HWFN(edev);
314                 drv_version.version = (params->drv_major << 24) |
315                     (params->drv_minor << 16) |
316                     (params->drv_rev << 8) | (params->drv_eng);
317                 strlcpy((char *)drv_version.name, (const char *)params->name,
318                         sizeof(drv_version.name));
319                 rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
320                                                 &drv_version);
321                 if (rc) {
322                         DP_ERR(edev, "Failed sending drv version command\n");
323                         goto err3;
324                 }
325         }
326
327         ecore_reset_vport_stats(edev);
328
329         return 0;
330
331 err3:
332         ecore_hw_stop(edev);
333 err2:
334         qed_stop_iov_task(edev);
335 #ifdef CONFIG_ECORE_ZIPPED_FW
336         qed_free_stream_mem(edev);
337 err1:
338 #endif
339         ecore_resc_free(edev);
340 err:
341 #ifdef CONFIG_ECORE_BINARY_FW
342         if (IS_PF(edev)) {
343                 if (edev->firmware)
344                         rte_free(edev->firmware);
345                 edev->firmware = NULL;
346         }
347 #endif
348         qed_stop_iov_task(edev);
349
350         return rc;
351 }
352
353 static int
354 qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info)
355 {
356         struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(edev);
357         struct ecore_ptt *ptt = NULL;
358         struct ecore_tunnel_info *tun = &edev->tunnel;
359
360         memset(dev_info, 0, sizeof(struct qed_dev_info));
361
362         if (tun->vxlan.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
363             tun->vxlan.b_mode_enabled)
364                 dev_info->vxlan_enable = true;
365
366         if (tun->l2_gre.b_mode_enabled && tun->ip_gre.b_mode_enabled &&
367             tun->l2_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
368             tun->ip_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
369                 dev_info->gre_enable = true;
370
371         if (tun->l2_geneve.b_mode_enabled && tun->ip_geneve.b_mode_enabled &&
372             tun->l2_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
373             tun->ip_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
374                 dev_info->geneve_enable = true;
375
376         dev_info->num_hwfns = edev->num_hwfns;
377         dev_info->is_mf_default = IS_MF_DEFAULT(&edev->hwfns[0]);
378         dev_info->mtu = ECORE_LEADING_HWFN(edev)->hw_info.mtu;
379         dev_info->dev_type = edev->type;
380
381         rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
382                RTE_ETHER_ADDR_LEN);
383
384         dev_info->fw_major = FW_MAJOR_VERSION;
385         dev_info->fw_minor = FW_MINOR_VERSION;
386         dev_info->fw_rev = FW_REVISION_VERSION;
387         dev_info->fw_eng = FW_ENGINEERING_VERSION;
388
389         if (IS_PF(edev)) {
390                 dev_info->b_inter_pf_switch =
391                         OSAL_GET_BIT(ECORE_MF_INTER_PF_SWITCH, &edev->mf_bits);
392                 if (!OSAL_GET_BIT(ECORE_MF_DISABLE_ARFS, &edev->mf_bits))
393                         dev_info->b_arfs_capable = true;
394                 dev_info->tx_switching = false;
395
396                 dev_info->smart_an = ecore_mcp_is_smart_an_supported(p_hwfn);
397
398                 ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev));
399                 if (ptt) {
400                         ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
401                                               &dev_info->mfw_rev, NULL);
402
403                         ecore_mcp_get_mbi_ver(ECORE_LEADING_HWFN(edev), ptt,
404                                               &dev_info->mbi_version);
405
406                         ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt,
407                                                  &dev_info->flash_size);
408
409                         /* Workaround to allow PHY-read commands for
410                          * B0 bringup.
411                          */
412                         if (ECORE_IS_BB_B0(edev))
413                                 dev_info->flash_size = 0xffffffff;
414
415                         ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt);
416                 }
417         } else {
418                 ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
419                                       &dev_info->mfw_rev, NULL);
420         }
421
422         return 0;
423 }
424
425 int
426 qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info)
427 {
428         uint8_t queues = 0;
429         int i;
430
431         memset(info, 0, sizeof(*info));
432
433         info->num_tc = 1 /* @@@TBD aelior MULTI_COS */;
434
435         if (IS_PF(edev)) {
436                 int max_vf_vlan_filters = 0;
437
438                 info->num_queues = 0;
439                 for_each_hwfn(edev, i)
440                         info->num_queues +=
441                         FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE);
442
443                 if (IS_ECORE_SRIOV(edev))
444                         max_vf_vlan_filters = edev->p_iov_info->total_vfs *
445                                               ECORE_ETH_VF_NUM_VLAN_FILTERS;
446                 info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN) -
447                                          max_vf_vlan_filters;
448
449                 rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
450                            RTE_ETHER_ADDR_LEN);
451         } else {
452                 ecore_vf_get_num_rxqs(ECORE_LEADING_HWFN(edev),
453                                       &info->num_queues);
454                 if (ECORE_IS_CMT(edev)) {
455                         ecore_vf_get_num_rxqs(&edev->hwfns[1], &queues);
456                         info->num_queues += queues;
457                 }
458
459                 ecore_vf_get_num_vlan_filters(&edev->hwfns[0],
460                                               (u8 *)&info->num_vlan_filters);
461
462                 ecore_vf_get_port_mac(&edev->hwfns[0],
463                                       (uint8_t *)&info->port_mac);
464
465                 info->is_legacy = ecore_vf_get_pre_fp_hsi(&edev->hwfns[0]);
466         }
467
468         qed_fill_dev_info(edev, &info->common);
469
470         if (IS_VF(edev))
471                 memset(&info->common.hw_mac, 0, RTE_ETHER_ADDR_LEN);
472
473         return 0;
474 }
475
476 static void qed_set_name(struct ecore_dev *edev, char name[NAME_SIZE])
477 {
478         int i;
479
480         rte_memcpy(edev->name, name, NAME_SIZE);
481         for_each_hwfn(edev, i) {
482                 snprintf(edev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i);
483         }
484 }
485
486 static uint32_t
487 qed_sb_init(struct ecore_dev *edev, struct ecore_sb_info *sb_info,
488             void *sb_virt_addr, dma_addr_t sb_phy_addr, uint16_t sb_id)
489 {
490         struct ecore_hwfn *p_hwfn;
491         int hwfn_index;
492         uint16_t rel_sb_id;
493         uint8_t n_hwfns = edev->num_hwfns;
494         uint32_t rc;
495
496         hwfn_index = sb_id % n_hwfns;
497         p_hwfn = &edev->hwfns[hwfn_index];
498         rel_sb_id = sb_id / n_hwfns;
499
500         DP_INFO(edev, "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
501                 hwfn_index, rel_sb_id, sb_id);
502
503         rc = ecore_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info,
504                                sb_virt_addr, sb_phy_addr, rel_sb_id);
505
506         return rc;
507 }
508
509 static void qed_fill_link(struct ecore_hwfn *hwfn,
510                           __rte_unused struct ecore_ptt *ptt,
511                           struct qed_link_output *if_link)
512 {
513         struct ecore_mcp_link_params params;
514         struct ecore_mcp_link_state link;
515         struct ecore_mcp_link_capabilities link_caps;
516         uint8_t change = 0;
517
518         memset(if_link, 0, sizeof(*if_link));
519
520         /* Prepare source inputs */
521         if (IS_PF(hwfn->p_dev)) {
522                 rte_memcpy(&params, ecore_mcp_get_link_params(hwfn),
523                        sizeof(params));
524                 rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link));
525                 rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn),
526                        sizeof(link_caps));
527         } else {
528                 ecore_vf_read_bulletin(hwfn, &change);
529                 ecore_vf_get_link_params(hwfn, &params);
530                 ecore_vf_get_link_state(hwfn, &link);
531                 ecore_vf_get_link_caps(hwfn, &link_caps);
532         }
533
534         /* Set the link parameters to pass to protocol driver */
535         if (link.link_up)
536                 if_link->link_up = true;
537
538         if (link.link_up)
539                 if_link->speed = link.speed;
540
541         if_link->duplex = QEDE_DUPLEX_FULL;
542
543         /* Fill up the native advertised speed cap mask */
544         if_link->adv_speed = params.speed.advertised_speeds;
545
546         if (params.speed.autoneg)
547                 if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG;
548
549         if (params.pause.autoneg || params.pause.forced_rx ||
550             params.pause.forced_tx)
551                 if_link->supported_caps |= QEDE_SUPPORTED_PAUSE;
552
553         if (params.pause.autoneg)
554                 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
555
556         if (params.pause.forced_rx)
557                 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE;
558
559         if (params.pause.forced_tx)
560                 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE;
561
562         if (link_caps.default_eee == ECORE_MCP_EEE_UNSUPPORTED) {
563                 if_link->eee_supported = false;
564         } else {
565                 if_link->eee_supported = true;
566                 if_link->eee_active = link.eee_active;
567                 if_link->sup_caps = link_caps.eee_speed_caps;
568                 /* MFW clears adv_caps on eee disable; use configured value */
569                 if_link->eee.adv_caps = link.eee_adv_caps ? link.eee_adv_caps :
570                                         params.eee.adv_caps;
571                 if_link->eee.lp_adv_caps = link.eee_lp_adv_caps;
572                 if_link->eee.enable = params.eee.enable;
573                 if_link->eee.tx_lpi_enable = params.eee.tx_lpi_enable;
574                 if_link->eee.tx_lpi_timer = params.eee.tx_lpi_timer;
575         }
576 }
577
578 static void
579 qed_get_current_link(struct ecore_dev *edev, struct qed_link_output *if_link)
580 {
581         struct ecore_hwfn *hwfn;
582         struct ecore_ptt *ptt;
583
584         hwfn = &edev->hwfns[0];
585         if (IS_PF(edev)) {
586                 ptt = ecore_ptt_acquire(hwfn);
587                 if (!ptt)
588                         DP_NOTICE(hwfn, true, "Failed to fill link; No PTT\n");
589
590                         qed_fill_link(hwfn, ptt, if_link);
591
592                 if (ptt)
593                         ecore_ptt_release(hwfn, ptt);
594         } else {
595                 qed_fill_link(hwfn, NULL, if_link);
596         }
597 }
598
599 static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params)
600 {
601         struct ecore_hwfn *hwfn;
602         struct ecore_ptt *ptt;
603         struct ecore_mcp_link_params *link_params;
604         int rc;
605
606         if (IS_VF(edev))
607                 return 0;
608
609         /* The link should be set only once per PF */
610         hwfn = &edev->hwfns[0];
611
612         ptt = ecore_ptt_acquire(hwfn);
613         if (!ptt)
614                 return -EBUSY;
615
616         link_params = ecore_mcp_get_link_params(hwfn);
617         if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG)
618                 link_params->speed.autoneg = params->autoneg;
619
620         if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) {
621                 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
622                         link_params->pause.autoneg = true;
623                 else
624                         link_params->pause.autoneg = false;
625                 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE)
626                         link_params->pause.forced_rx = true;
627                 else
628                         link_params->pause.forced_rx = false;
629                 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE)
630                         link_params->pause.forced_tx = true;
631                 else
632                         link_params->pause.forced_tx = false;
633         }
634
635         if (params->override_flags & QED_LINK_OVERRIDE_EEE_CONFIG)
636                 memcpy(&link_params->eee, &params->eee,
637                        sizeof(link_params->eee));
638
639         rc = ecore_mcp_set_link(hwfn, ptt, params->link_up);
640
641         ecore_ptt_release(hwfn, ptt);
642
643         return rc;
644 }
645
646 void qed_link_update(struct ecore_hwfn *hwfn)
647 {
648         struct ecore_dev *edev = hwfn->p_dev;
649         struct qede_dev *qdev = (struct qede_dev *)edev;
650         struct rte_eth_dev *dev = (struct rte_eth_dev *)qdev->ethdev;
651
652         if (!qede_link_update(dev, 0))
653                 _rte_eth_dev_callback_process(dev,
654                                               RTE_ETH_EVENT_INTR_LSC, NULL);
655 }
656
657 static int qed_drain(struct ecore_dev *edev)
658 {
659         struct ecore_hwfn *hwfn;
660         struct ecore_ptt *ptt;
661         int i, rc;
662
663         if (IS_VF(edev))
664                 return 0;
665
666         for_each_hwfn(edev, i) {
667                 hwfn = &edev->hwfns[i];
668                 ptt = ecore_ptt_acquire(hwfn);
669                 if (!ptt) {
670                         DP_ERR(hwfn, "Failed to drain NIG; No PTT\n");
671                         return -EBUSY;
672                 }
673                 rc = ecore_mcp_drain(hwfn, ptt);
674                 if (rc)
675                         return rc;
676                 ecore_ptt_release(hwfn, ptt);
677         }
678
679         return 0;
680 }
681
682 static int qed_nic_stop(struct ecore_dev *edev)
683 {
684         int i, rc;
685
686         rc = ecore_hw_stop(edev);
687         for (i = 0; i < edev->num_hwfns; i++) {
688                 struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
689
690                 if (p_hwfn->b_sp_dpc_enabled)
691                         p_hwfn->b_sp_dpc_enabled = false;
692         }
693         return rc;
694 }
695
696 static int qed_slowpath_stop(struct ecore_dev *edev)
697 {
698 #ifdef CONFIG_QED_SRIOV
699         int i;
700 #endif
701
702         if (!edev)
703                 return -ENODEV;
704
705         if (IS_PF(edev)) {
706 #ifdef CONFIG_ECORE_ZIPPED_FW
707                 qed_free_stream_mem(edev);
708 #endif
709
710 #ifdef CONFIG_QED_SRIOV
711                 if (IS_QED_ETH_IF(edev))
712                         qed_sriov_disable(edev, true);
713 #endif
714         }
715
716         qed_nic_stop(edev);
717
718         ecore_resc_free(edev);
719         qed_stop_iov_task(edev);
720
721         return 0;
722 }
723
724 static void qed_remove(struct ecore_dev *edev)
725 {
726         if (!edev)
727                 return;
728
729         ecore_hw_remove(edev);
730 }
731
732 static int qed_send_drv_state(struct ecore_dev *edev, bool active)
733 {
734         struct ecore_hwfn *hwfn = ECORE_LEADING_HWFN(edev);
735         struct ecore_ptt *ptt;
736         int status = 0;
737
738         ptt = ecore_ptt_acquire(hwfn);
739         if (!ptt)
740                 return -EAGAIN;
741
742         status = ecore_mcp_ov_update_driver_state(hwfn, ptt, active ?
743                                                   ECORE_OV_DRIVER_STATE_ACTIVE :
744                                                 ECORE_OV_DRIVER_STATE_DISABLED);
745
746         ecore_ptt_release(hwfn, ptt);
747
748         return status;
749 }
750
751 static int qed_get_sb_info(struct ecore_dev *edev, struct ecore_sb_info *sb,
752                            u16 qid, struct ecore_sb_info_dbg *sb_dbg)
753 {
754         struct ecore_hwfn *hwfn = &edev->hwfns[qid % edev->num_hwfns];
755         struct ecore_ptt *ptt;
756         int rc;
757
758         if (IS_VF(edev))
759                 return -EINVAL;
760
761         ptt = ecore_ptt_acquire(hwfn);
762         if (!ptt) {
763                 DP_ERR(hwfn, "Can't acquire PTT\n");
764                 return -EAGAIN;
765         }
766
767         memset(sb_dbg, 0, sizeof(*sb_dbg));
768         rc = ecore_int_get_sb_dbg(hwfn, ptt, sb, sb_dbg);
769
770         ecore_ptt_release(hwfn, ptt);
771         return rc;
772 }
773
774 const struct qed_common_ops qed_common_ops_pass = {
775         INIT_STRUCT_FIELD(probe, &qed_probe),
776         INIT_STRUCT_FIELD(update_pf_params, &qed_update_pf_params),
777         INIT_STRUCT_FIELD(slowpath_start, &qed_slowpath_start),
778         INIT_STRUCT_FIELD(set_name, &qed_set_name),
779         INIT_STRUCT_FIELD(chain_alloc, &ecore_chain_alloc),
780         INIT_STRUCT_FIELD(chain_free, &ecore_chain_free),
781         INIT_STRUCT_FIELD(sb_init, &qed_sb_init),
782         INIT_STRUCT_FIELD(get_sb_info, &qed_get_sb_info),
783         INIT_STRUCT_FIELD(get_link, &qed_get_current_link),
784         INIT_STRUCT_FIELD(set_link, &qed_set_link),
785         INIT_STRUCT_FIELD(drain, &qed_drain),
786         INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop),
787         INIT_STRUCT_FIELD(remove, &qed_remove),
788         INIT_STRUCT_FIELD(send_drv_state, &qed_send_drv_state),
789         /* ############### DEBUG ####################*/
790
791         INIT_STRUCT_FIELD(dbg_get_debug_engine, &qed_get_debug_engine),
792         INIT_STRUCT_FIELD(dbg_set_debug_engine, &qed_set_debug_engine),
793
794         INIT_STRUCT_FIELD(dbg_protection_override,
795                           &qed_dbg_protection_override),
796         INIT_STRUCT_FIELD(dbg_protection_override_size,
797                           &qed_dbg_protection_override_size),
798
799         INIT_STRUCT_FIELD(dbg_grc, &qed_dbg_grc),
800         INIT_STRUCT_FIELD(dbg_grc_size, &qed_dbg_grc_size),
801
802         INIT_STRUCT_FIELD(dbg_idle_chk, &qed_dbg_idle_chk),
803         INIT_STRUCT_FIELD(dbg_idle_chk_size, &qed_dbg_idle_chk_size),
804
805         INIT_STRUCT_FIELD(dbg_mcp_trace, &qed_dbg_mcp_trace),
806         INIT_STRUCT_FIELD(dbg_mcp_trace_size, &qed_dbg_mcp_trace_size),
807
808         INIT_STRUCT_FIELD(dbg_fw_asserts, &qed_dbg_fw_asserts),
809         INIT_STRUCT_FIELD(dbg_fw_asserts_size, &qed_dbg_fw_asserts_size),
810
811         INIT_STRUCT_FIELD(dbg_ilt, &qed_dbg_ilt),
812         INIT_STRUCT_FIELD(dbg_ilt_size, &qed_dbg_ilt_size),
813
814         INIT_STRUCT_FIELD(dbg_reg_fifo_size, &qed_dbg_reg_fifo_size),
815         INIT_STRUCT_FIELD(dbg_reg_fifo, &qed_dbg_reg_fifo),
816
817         INIT_STRUCT_FIELD(dbg_igu_fifo_size, &qed_dbg_igu_fifo_size),
818         INIT_STRUCT_FIELD(dbg_igu_fifo, &qed_dbg_igu_fifo),
819 };
820
821 const struct qed_eth_ops qed_eth_ops_pass = {
822         INIT_STRUCT_FIELD(common, &qed_common_ops_pass),
823         INIT_STRUCT_FIELD(fill_dev_info, &qed_fill_eth_dev_info),
824 };
825
826 const struct qed_eth_ops *qed_get_eth_ops(void)
827 {
828         return &qed_eth_ops_pass;
829 }