net/enic: refactor Tx mbuf recycling
[dpdk.git] / drivers / net / qede / qede_rxtx.c
1 /*
2  * Copyright (c) 2016 QLogic Corporation.
3  * All rights reserved.
4  * www.qlogic.com
5  *
6  * See LICENSE.qede_pmd for copyright and licensing details.
7  */
8
9 #include "qede_rxtx.h"
10
11 static bool gro_disable = 1;    /* mod_param */
12
13 static inline int qede_alloc_rx_buffer(struct qede_rx_queue *rxq)
14 {
15         struct rte_mbuf *new_mb = NULL;
16         struct eth_rx_bd *rx_bd;
17         dma_addr_t mapping;
18         uint16_t idx = rxq->sw_rx_prod & NUM_RX_BDS(rxq);
19
20         new_mb = rte_mbuf_raw_alloc(rxq->mb_pool);
21         if (unlikely(!new_mb)) {
22                 PMD_RX_LOG(ERR, rxq,
23                            "Failed to allocate rx buffer "
24                            "sw_rx_prod %u sw_rx_cons %u mp entries %u free %u",
25                            idx, rxq->sw_rx_cons & NUM_RX_BDS(rxq),
26                            rte_mempool_count(rxq->mb_pool),
27                            rte_mempool_free_count(rxq->mb_pool));
28                 return -ENOMEM;
29         }
30         rxq->sw_rx_ring[idx].mbuf = new_mb;
31         rxq->sw_rx_ring[idx].page_offset = 0;
32         mapping = rte_mbuf_data_dma_addr_default(new_mb);
33         /* Advance PROD and get BD pointer */
34         rx_bd = (struct eth_rx_bd *)ecore_chain_produce(&rxq->rx_bd_ring);
35         rx_bd->addr.hi = rte_cpu_to_le_32(U64_HI(mapping));
36         rx_bd->addr.lo = rte_cpu_to_le_32(U64_LO(mapping));
37         rxq->sw_rx_prod++;
38         return 0;
39 }
40
41 static void qede_rx_queue_release_mbufs(struct qede_rx_queue *rxq)
42 {
43         uint16_t i;
44
45         if (rxq->sw_rx_ring != NULL) {
46                 for (i = 0; i < rxq->nb_rx_desc; i++) {
47                         if (rxq->sw_rx_ring[i].mbuf != NULL) {
48                                 rte_pktmbuf_free(rxq->sw_rx_ring[i].mbuf);
49                                 rxq->sw_rx_ring[i].mbuf = NULL;
50                         }
51                 }
52         }
53 }
54
55 void qede_rx_queue_release(void *rx_queue)
56 {
57         struct qede_rx_queue *rxq = rx_queue;
58
59         if (rxq != NULL) {
60                 qede_rx_queue_release_mbufs(rxq);
61                 rte_free(rxq->sw_rx_ring);
62                 rxq->sw_rx_ring = NULL;
63                 rte_free(rxq);
64                 rx_queue = NULL;
65         }
66 }
67
68 int
69 qede_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
70                     uint16_t nb_desc, unsigned int socket_id,
71                     const struct rte_eth_rxconf *rx_conf,
72                     struct rte_mempool *mp)
73 {
74         struct qede_dev *qdev = dev->data->dev_private;
75         struct ecore_dev *edev = &qdev->edev;
76         struct rte_eth_dev_data *eth_data = dev->data;
77         struct qede_rx_queue *rxq;
78         uint16_t pkt_len = (uint16_t)dev->data->dev_conf.rxmode.max_rx_pkt_len;
79         size_t size;
80         uint16_t data_size;
81         int rc;
82         int i;
83
84         PMD_INIT_FUNC_TRACE(edev);
85
86         /* Note: Ring size/align is controlled by struct rte_eth_desc_lim */
87         if (!rte_is_power_of_2(nb_desc)) {
88                 DP_ERR(edev, "Ring size %u is not power of 2\n",
89                           nb_desc);
90                 return -EINVAL;
91         }
92
93         /* Free memory prior to re-allocation if needed... */
94         if (dev->data->rx_queues[queue_idx] != NULL) {
95                 qede_rx_queue_release(dev->data->rx_queues[queue_idx]);
96                 dev->data->rx_queues[queue_idx] = NULL;
97         }
98
99         /* First allocate the rx queue data structure */
100         rxq = rte_zmalloc_socket("qede_rx_queue", sizeof(struct qede_rx_queue),
101                                  RTE_CACHE_LINE_SIZE, socket_id);
102
103         if (!rxq) {
104                 DP_ERR(edev, "Unable to allocate memory for rxq on socket %u",
105                           socket_id);
106                 return -ENOMEM;
107         }
108
109         rxq->qdev = qdev;
110         rxq->mb_pool = mp;
111         rxq->nb_rx_desc = nb_desc;
112         rxq->queue_id = queue_idx;
113         rxq->port_id = dev->data->port_id;
114
115         /* Sanity check */
116         data_size = (uint16_t)rte_pktmbuf_data_room_size(mp) -
117                                 RTE_PKTMBUF_HEADROOM;
118
119         if (pkt_len > data_size) {
120                 DP_ERR(edev, "MTU %u should not exceed dataroom %u\n",
121                        pkt_len, data_size);
122                 rte_free(rxq);
123                 return -EINVAL;
124         }
125
126         qdev->mtu = pkt_len;
127         rxq->rx_buf_size = pkt_len + QEDE_ETH_OVERHEAD;
128
129         DP_INFO(edev, "MTU = %u ; RX buffer = %u\n",
130                 qdev->mtu, rxq->rx_buf_size);
131
132         if (pkt_len > ETHER_MAX_LEN) {
133                 dev->data->dev_conf.rxmode.jumbo_frame = 1;
134                 DP_NOTICE(edev, false, "jumbo frame enabled\n");
135         } else {
136                 dev->data->dev_conf.rxmode.jumbo_frame = 0;
137         }
138
139         /* Allocate the parallel driver ring for Rx buffers */
140         size = sizeof(*rxq->sw_rx_ring) * rxq->nb_rx_desc;
141         rxq->sw_rx_ring = rte_zmalloc_socket("sw_rx_ring", size,
142                                              RTE_CACHE_LINE_SIZE, socket_id);
143         if (!rxq->sw_rx_ring) {
144                 DP_NOTICE(edev, false,
145                           "Unable to alloc memory for sw_rx_ring on socket %u\n",
146                           socket_id);
147                 rte_free(rxq);
148                 rxq = NULL;
149                 return -ENOMEM;
150         }
151
152         /* Allocate FW Rx ring  */
153         rc = qdev->ops->common->chain_alloc(edev,
154                                             ECORE_CHAIN_USE_TO_CONSUME_PRODUCE,
155                                             ECORE_CHAIN_MODE_NEXT_PTR,
156                                             ECORE_CHAIN_CNT_TYPE_U16,
157                                             rxq->nb_rx_desc,
158                                             sizeof(struct eth_rx_bd),
159                                             &rxq->rx_bd_ring);
160
161         if (rc != ECORE_SUCCESS) {
162                 DP_NOTICE(edev, false,
163                           "Unable to alloc memory for rxbd ring on socket %u\n",
164                           socket_id);
165                 rte_free(rxq->sw_rx_ring);
166                 rxq->sw_rx_ring = NULL;
167                 rte_free(rxq);
168                 rxq = NULL;
169         }
170
171         /* Allocate FW completion ring */
172         rc = qdev->ops->common->chain_alloc(edev,
173                                             ECORE_CHAIN_USE_TO_CONSUME,
174                                             ECORE_CHAIN_MODE_PBL,
175                                             ECORE_CHAIN_CNT_TYPE_U16,
176                                             rxq->nb_rx_desc,
177                                             sizeof(union eth_rx_cqe),
178                                             &rxq->rx_comp_ring);
179
180         if (rc != ECORE_SUCCESS) {
181                 DP_NOTICE(edev, false,
182                           "Unable to alloc memory for cqe ring on socket %u\n",
183                           socket_id);
184                 /* TBD: Freeing RX BD ring */
185                 rte_free(rxq->sw_rx_ring);
186                 rxq->sw_rx_ring = NULL;
187                 rte_free(rxq);
188         }
189
190         /* Allocate buffers for the Rx ring */
191         for (i = 0; i < rxq->nb_rx_desc; i++) {
192                 rc = qede_alloc_rx_buffer(rxq);
193                 if (rc) {
194                         DP_NOTICE(edev, false,
195                                   "RX buffer allocation failed at idx=%d\n", i);
196                         goto err4;
197                 }
198         }
199
200         dev->data->rx_queues[queue_idx] = rxq;
201         if (!qdev->rx_queues)
202                 qdev->rx_queues = (struct qede_rx_queue **)dev->data->rx_queues;
203
204         DP_INFO(edev, "rxq %d num_desc %u rx_buf_size=%u socket %u\n",
205                   queue_idx, nb_desc, qdev->mtu, socket_id);
206
207         return 0;
208 err4:
209         qede_rx_queue_release(rxq);
210         return -ENOMEM;
211 }
212
213 static void qede_tx_queue_release_mbufs(struct qede_tx_queue *txq)
214 {
215         unsigned int i;
216
217         PMD_TX_LOG(DEBUG, txq, "releasing %u mbufs\n", txq->nb_tx_desc);
218
219         if (txq->sw_tx_ring != NULL) {
220                 for (i = 0; i < txq->nb_tx_desc; i++) {
221                         if (txq->sw_tx_ring[i].mbuf != NULL) {
222                                 rte_pktmbuf_free(txq->sw_tx_ring[i].mbuf);
223                                 txq->sw_tx_ring[i].mbuf = NULL;
224                         }
225                 }
226         }
227 }
228
229 void qede_tx_queue_release(void *tx_queue)
230 {
231         struct qede_tx_queue *txq = tx_queue;
232
233         if (txq != NULL) {
234                 qede_tx_queue_release_mbufs(txq);
235                 if (txq->sw_tx_ring) {
236                         rte_free(txq->sw_tx_ring);
237                         txq->sw_tx_ring = NULL;
238                 }
239                 rte_free(txq);
240         }
241         tx_queue = NULL;
242 }
243
244 int
245 qede_tx_queue_setup(struct rte_eth_dev *dev,
246                     uint16_t queue_idx,
247                     uint16_t nb_desc,
248                     unsigned int socket_id,
249                     const struct rte_eth_txconf *tx_conf)
250 {
251         struct qede_dev *qdev = dev->data->dev_private;
252         struct ecore_dev *edev = &qdev->edev;
253         struct qede_tx_queue *txq;
254         int rc;
255
256         PMD_INIT_FUNC_TRACE(edev);
257
258         if (!rte_is_power_of_2(nb_desc)) {
259                 DP_ERR(edev, "Ring size %u is not power of 2\n",
260                        nb_desc);
261                 return -EINVAL;
262         }
263
264         /* Free memory prior to re-allocation if needed... */
265         if (dev->data->tx_queues[queue_idx] != NULL) {
266                 qede_tx_queue_release(dev->data->tx_queues[queue_idx]);
267                 dev->data->tx_queues[queue_idx] = NULL;
268         }
269
270         txq = rte_zmalloc_socket("qede_tx_queue", sizeof(struct qede_tx_queue),
271                                  RTE_CACHE_LINE_SIZE, socket_id);
272
273         if (txq == NULL) {
274                 DP_ERR(edev,
275                        "Unable to allocate memory for txq on socket %u",
276                        socket_id);
277                 return -ENOMEM;
278         }
279
280         txq->nb_tx_desc = nb_desc;
281         txq->qdev = qdev;
282         txq->port_id = dev->data->port_id;
283
284         rc = qdev->ops->common->chain_alloc(edev,
285                                             ECORE_CHAIN_USE_TO_CONSUME_PRODUCE,
286                                             ECORE_CHAIN_MODE_PBL,
287                                             ECORE_CHAIN_CNT_TYPE_U16,
288                                             txq->nb_tx_desc,
289                                             sizeof(union eth_tx_bd_types),
290                                             &txq->tx_pbl);
291         if (rc != ECORE_SUCCESS) {
292                 DP_ERR(edev,
293                        "Unable to allocate memory for txbd ring on socket %u",
294                        socket_id);
295                 qede_tx_queue_release(txq);
296                 return -ENOMEM;
297         }
298
299         /* Allocate software ring */
300         txq->sw_tx_ring = rte_zmalloc_socket("txq->sw_tx_ring",
301                                              (sizeof(struct qede_tx_entry) *
302                                               txq->nb_tx_desc),
303                                              RTE_CACHE_LINE_SIZE, socket_id);
304
305         if (!txq->sw_tx_ring) {
306                 DP_ERR(edev,
307                        "Unable to allocate memory for txbd ring on socket %u",
308                        socket_id);
309                 qede_tx_queue_release(txq);
310                 return -ENOMEM;
311         }
312
313         txq->queue_id = queue_idx;
314
315         txq->nb_tx_avail = txq->nb_tx_desc;
316
317         txq->tx_free_thresh =
318             tx_conf->tx_free_thresh ? tx_conf->tx_free_thresh :
319             (txq->nb_tx_desc - QEDE_DEFAULT_TX_FREE_THRESH);
320
321         dev->data->tx_queues[queue_idx] = txq;
322         if (!qdev->tx_queues)
323                 qdev->tx_queues = (struct qede_tx_queue **)dev->data->tx_queues;
324
325         txq->txq_counter = 0;
326
327         DP_INFO(edev,
328                   "txq %u num_desc %u tx_free_thresh %u socket %u\n",
329                   queue_idx, nb_desc, txq->tx_free_thresh, socket_id);
330
331         return 0;
332 }
333
334 /* This function inits fp content and resets the SB, RXQ and TXQ arrays */
335 static void qede_init_fp(struct qede_dev *qdev)
336 {
337         struct qede_fastpath *fp;
338         int rss_id, txq_index, tc;
339
340         memset((void *)qdev->fp_array, 0, (QEDE_RSS_CNT(qdev) *
341                                            sizeof(*qdev->fp_array)));
342         memset((void *)qdev->sb_array, 0, (QEDE_RSS_CNT(qdev) *
343                                            sizeof(*qdev->sb_array)));
344         for_each_rss(rss_id) {
345                 fp = &qdev->fp_array[rss_id];
346
347                 fp->qdev = qdev;
348                 fp->rss_id = rss_id;
349
350                 /* Point rxq to generic rte queues that was created
351                  * as part of queue creation.
352                  */
353                 fp->rxq = qdev->rx_queues[rss_id];
354                 fp->sb_info = &qdev->sb_array[rss_id];
355
356                 for (tc = 0; tc < qdev->num_tc; tc++) {
357                         txq_index = tc * QEDE_RSS_CNT(qdev) + rss_id;
358                         fp->txqs[tc] = qdev->tx_queues[txq_index];
359                         fp->txqs[tc]->queue_id = txq_index;
360                         /* Updating it to main structure */
361                         snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
362                                  "qdev", rss_id);
363                 }
364         }
365
366         qdev->gro_disable = gro_disable;
367 }
368
369 void qede_free_fp_arrays(struct qede_dev *qdev)
370 {
371         /* It asseumes qede_free_mem_load() is called before */
372         if (qdev->fp_array != NULL) {
373                 rte_free(qdev->fp_array);
374                 qdev->fp_array = NULL;
375         }
376
377         if (qdev->sb_array != NULL) {
378                 rte_free(qdev->sb_array);
379                 qdev->sb_array = NULL;
380         }
381 }
382
383 int qede_alloc_fp_array(struct qede_dev *qdev)
384 {
385         struct qede_fastpath *fp;
386         struct ecore_dev *edev = &qdev->edev;
387         int i;
388
389         qdev->fp_array = rte_calloc("fp", QEDE_RSS_CNT(qdev),
390                                     sizeof(*qdev->fp_array),
391                                     RTE_CACHE_LINE_SIZE);
392
393         if (!qdev->fp_array) {
394                 DP_ERR(edev, "fp array allocation failed\n");
395                 return -ENOMEM;
396         }
397
398         qdev->sb_array = rte_calloc("sb", QEDE_RSS_CNT(qdev),
399                                     sizeof(*qdev->sb_array),
400                                     RTE_CACHE_LINE_SIZE);
401
402         if (!qdev->sb_array) {
403                 DP_ERR(edev, "sb array allocation failed\n");
404                 rte_free(qdev->fp_array);
405                 return -ENOMEM;
406         }
407
408         return 0;
409 }
410
411 /* This function allocates fast-path status block memory */
412 static int
413 qede_alloc_mem_sb(struct qede_dev *qdev, struct ecore_sb_info *sb_info,
414                   uint16_t sb_id)
415 {
416         struct ecore_dev *edev = &qdev->edev;
417         struct status_block *sb_virt;
418         dma_addr_t sb_phys;
419         int rc;
420
421         sb_virt = OSAL_DMA_ALLOC_COHERENT(edev, &sb_phys, sizeof(*sb_virt));
422
423         if (!sb_virt) {
424                 DP_ERR(edev, "Status block allocation failed\n");
425                 return -ENOMEM;
426         }
427
428         rc = qdev->ops->common->sb_init(edev, sb_info,
429                                         sb_virt, sb_phys, sb_id,
430                                         QED_SB_TYPE_L2_QUEUE);
431         if (rc) {
432                 DP_ERR(edev, "Status block initialization failed\n");
433                 /* TBD: No dma_free_coherent possible */
434                 return rc;
435         }
436
437         return 0;
438 }
439
440 static int qede_alloc_mem_fp(struct qede_dev *qdev, struct qede_fastpath *fp)
441 {
442         return qede_alloc_mem_sb(qdev, fp->sb_info, fp->rss_id);
443 }
444
445 static void qede_shrink_txq(struct qede_dev *qdev, uint16_t num_rss)
446 {
447         /* @@@TBD - this should also re-set the qed interrupts */
448 }
449
450 /* This function allocates all qede memory at NIC load. */
451 static int qede_alloc_mem_load(struct qede_dev *qdev)
452 {
453         int rc = 0, rss_id;
454         struct ecore_dev *edev = &qdev->edev;
455
456         for (rss_id = 0; rss_id < QEDE_RSS_CNT(qdev); rss_id++) {
457                 struct qede_fastpath *fp = &qdev->fp_array[rss_id];
458
459                 rc = qede_alloc_mem_fp(qdev, fp);
460                 if (rc)
461                         break;
462         }
463
464         if (rss_id != QEDE_RSS_CNT(qdev)) {
465                 /* Failed allocating memory for all the queues */
466                 if (!rss_id) {
467                         DP_ERR(edev,
468                                "Failed to alloc memory for leading queue\n");
469                         rc = -ENOMEM;
470                 } else {
471                         DP_NOTICE(edev, false,
472                                   "Failed to allocate memory for all of "
473                                   "RSS queues\n"
474                                   "Desired: %d queues, allocated: %d queues\n",
475                                   QEDE_RSS_CNT(qdev), rss_id);
476                         qede_shrink_txq(qdev, rss_id);
477                 }
478                 qdev->num_rss = rss_id;
479         }
480
481         return 0;
482 }
483
484 static inline void
485 qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq)
486 {
487         uint16_t bd_prod = ecore_chain_get_prod_idx(&rxq->rx_bd_ring);
488         uint16_t cqe_prod = ecore_chain_get_prod_idx(&rxq->rx_comp_ring);
489         struct eth_rx_prod_data rx_prods = { 0 };
490
491         /* Update producers */
492         rx_prods.bd_prod = rte_cpu_to_le_16(bd_prod);
493         rx_prods.cqe_prod = rte_cpu_to_le_16(cqe_prod);
494
495         /* Make sure that the BD and SGE data is updated before updating the
496          * producers since FW might read the BD/SGE right after the producer
497          * is updated.
498          */
499         rte_wmb();
500
501         internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
502                         (uint32_t *)&rx_prods);
503
504         /* mmiowb is needed to synchronize doorbell writes from more than one
505          * processor. It guarantees that the write arrives to the device before
506          * the napi lock is released and another qede_poll is called (possibly
507          * on another CPU). Without this barrier, the next doorbell can bypass
508          * this doorbell. This is applicable to IA64/Altix systems.
509          */
510         rte_wmb();
511
512         PMD_RX_LOG(DEBUG, rxq, "bd_prod %u  cqe_prod %u\n", bd_prod, cqe_prod);
513 }
514
515 static inline uint32_t
516 qede_rxfh_indir_default(uint32_t index, uint32_t n_rx_rings)
517 {
518         return index % n_rx_rings;
519 }
520
521 static void qede_prandom_bytes(uint32_t *buff, size_t bytes)
522 {
523         unsigned int i;
524
525         srand((unsigned int)time(NULL));
526
527         for (i = 0; i < ECORE_RSS_KEY_SIZE; i++)
528                 buff[i] = rand();
529 }
530
531 static int
532 qede_config_rss(struct rte_eth_dev *eth_dev,
533                 struct qed_update_vport_rss_params *rss_params)
534 {
535         enum rte_eth_rx_mq_mode mode = eth_dev->data->dev_conf.rxmode.mq_mode;
536         struct rte_eth_rss_conf rss_conf =
537             eth_dev->data->dev_conf.rx_adv_conf.rss_conf;
538         struct qede_dev *qdev = eth_dev->data->dev_private;
539         struct ecore_dev *edev = &qdev->edev;
540         unsigned int i;
541
542         PMD_INIT_FUNC_TRACE(edev);
543
544         /* Check if RSS conditions are met.
545          * Note: Even though its meaningless to enable RSS with one queue, it
546          * could be used to produce RSS Hash, so skipping that check.
547          */
548
549         if (!(mode & ETH_MQ_RX_RSS)) {
550                 DP_INFO(edev, "RSS flag is not set\n");
551                 return -EINVAL;
552         }
553
554         DP_INFO(edev, "RSS flag is set\n");
555
556         if (rss_conf.rss_hf == 0) {
557                 DP_NOTICE(edev, false, "No RSS hash function to apply\n");
558                 return -EINVAL;
559         }
560
561         if (rss_conf.rss_key != NULL) {
562                 DP_NOTICE(edev, false,
563                           "User provided RSS key is not supported\n");
564                 return -EINVAL;
565         }
566
567         memset(rss_params, 0, sizeof(*rss_params));
568
569         for (i = 0; i < ECORE_RSS_IND_TABLE_SIZE; i++)
570                 rss_params->rss_ind_table[i] = qede_rxfh_indir_default(i,
571                                                         QEDE_RSS_CNT(qdev));
572
573         qede_prandom_bytes(rss_params->rss_key,
574                            sizeof(rss_params->rss_key));
575
576         DP_INFO(edev, "RSS check passes\n");
577
578         return 0;
579 }
580
581 static int qede_start_queues(struct rte_eth_dev *eth_dev, bool clear_stats)
582 {
583         struct qede_dev *qdev = eth_dev->data->dev_private;
584         struct ecore_dev *edev = &qdev->edev;
585         struct qed_update_vport_rss_params *rss_params = &qdev->rss_params;
586         struct qed_dev_info *qed_info = &qdev->dev_info.common;
587         struct qed_update_vport_params vport_update_params;
588         struct qed_start_vport_params start = { 0 };
589         int vlan_removal_en = 1;
590         int rc, tc, i;
591
592         if (!qdev->num_rss) {
593                 DP_ERR(edev,
594                        "Cannot update V-VPORT as active as "
595                        "there are no Rx queues\n");
596                 return -EINVAL;
597         }
598
599         start.remove_inner_vlan = vlan_removal_en;
600         start.gro_enable = !qdev->gro_disable;
601         start.mtu = qdev->mtu;
602         start.vport_id = 0;
603         start.drop_ttl0 = true;
604         start.clear_stats = clear_stats;
605
606         rc = qdev->ops->vport_start(edev, &start);
607         if (rc) {
608                 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
609                 return rc;
610         }
611
612         DP_INFO(edev,
613                 "Start vport ramrod passed, vport_id = %d,"
614                 " MTU = %d, vlan_removal_en = %d\n",
615                 start.vport_id, qdev->mtu, vlan_removal_en);
616
617         for_each_rss(i) {
618                 struct qede_fastpath *fp = &qdev->fp_array[i];
619                 dma_addr_t p_phys_table;
620                 uint16_t page_cnt;
621
622                 p_phys_table = ecore_chain_get_pbl_phys(&fp->rxq->rx_comp_ring);
623                 page_cnt = ecore_chain_get_page_cnt(&fp->rxq->rx_comp_ring);
624
625                 ecore_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0);  /* @DPDK */
626
627                 rc = qdev->ops->q_rx_start(edev, i, i, 0,
628                                            fp->sb_info->igu_sb_id,
629                                            RX_PI,
630                                            fp->rxq->rx_buf_size,
631                                            fp->rxq->rx_bd_ring.p_phys_addr,
632                                            p_phys_table,
633                                            page_cnt,
634                                            &fp->rxq->hw_rxq_prod_addr);
635                 if (rc) {
636                         DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
637                         return rc;
638                 }
639
640                 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
641
642                 qede_update_rx_prod(qdev, fp->rxq);
643
644                 for (tc = 0; tc < qdev->num_tc; tc++) {
645                         struct qede_tx_queue *txq = fp->txqs[tc];
646                         int txq_index = tc * QEDE_RSS_CNT(qdev) + i;
647
648                         p_phys_table = ecore_chain_get_pbl_phys(&txq->tx_pbl);
649                         page_cnt = ecore_chain_get_page_cnt(&txq->tx_pbl);
650                         rc = qdev->ops->q_tx_start(edev, i, txq_index,
651                                                    0,
652                                                    fp->sb_info->igu_sb_id,
653                                                    TX_PI(tc),
654                                                    p_phys_table, page_cnt,
655                                                    &txq->doorbell_addr);
656                         if (rc) {
657                                 DP_ERR(edev, "Start txq %u failed %d\n",
658                                        txq_index, rc);
659                                 return rc;
660                         }
661
662                         txq->hw_cons_ptr =
663                             &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
664                         SET_FIELD(txq->tx_db.data.params,
665                                   ETH_DB_DATA_DEST, DB_DEST_XCM);
666                         SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
667                                   DB_AGG_CMD_SET);
668                         SET_FIELD(txq->tx_db.data.params,
669                                   ETH_DB_DATA_AGG_VAL_SEL,
670                                   DQ_XCM_ETH_TX_BD_PROD_CMD);
671
672                         txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
673                 }
674         }
675
676         /* Prepare and send the vport enable */
677         memset(&vport_update_params, 0, sizeof(vport_update_params));
678         vport_update_params.vport_id = start.vport_id;
679         vport_update_params.update_vport_active_flg = 1;
680         vport_update_params.vport_active_flg = 1;
681
682         /* @DPDK */
683         if (qed_info->mf_mode == MF_NPAR && qed_info->tx_switching) {
684                 /* TBD: Check SRIOV enabled for VF */
685                 vport_update_params.update_tx_switching_flg = 1;
686                 vport_update_params.tx_switching_flg = 1;
687         }
688
689         if (!qede_config_rss(eth_dev, rss_params)) {
690                 vport_update_params.update_rss_flg = 1;
691
692                 qdev->rss_enabled = 1;
693                 DP_INFO(edev, "Updating RSS flag\n");
694         } else {
695                 qdev->rss_enabled = 0;
696                 DP_INFO(edev, "Not Updating RSS flag\n");
697         }
698
699         rte_memcpy(&vport_update_params.rss_params, rss_params,
700                sizeof(*rss_params));
701
702         rc = qdev->ops->vport_update(edev, &vport_update_params);
703         if (rc) {
704                 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
705                 return rc;
706         }
707
708         return 0;
709 }
710
711 #ifdef ENC_SUPPORTED
712 static bool qede_tunn_exist(uint16_t flag)
713 {
714         return !!((PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
715                     PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT) & flag);
716 }
717
718 static inline uint8_t qede_check_tunn_csum(uint16_t flag)
719 {
720         uint8_t tcsum = 0;
721         uint16_t csum_flag = 0;
722
723         if ((PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
724              PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT) & flag)
725                 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
726                     PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
727
728         if ((PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
729              PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT) & flag) {
730                 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
731                     PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
732                 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
733         }
734
735         csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
736             PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
737             PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
738             PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
739
740         if (csum_flag & flag)
741                 return QEDE_CSUM_ERROR;
742
743         return QEDE_CSUM_UNNECESSARY | tcsum;
744 }
745 #else
746 static inline uint8_t qede_tunn_exist(uint16_t flag)
747 {
748         return 0;
749 }
750
751 static inline uint8_t qede_check_tunn_csum(uint16_t flag)
752 {
753         return 0;
754 }
755 #endif
756
757 static inline uint8_t qede_check_notunn_csum(uint16_t flag)
758 {
759         uint8_t csum = 0;
760         uint16_t csum_flag = 0;
761
762         if ((PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
763              PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT) & flag) {
764                 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
765                     PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
766                 csum = QEDE_CSUM_UNNECESSARY;
767         }
768
769         csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
770             PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
771
772         if (csum_flag & flag)
773                 return QEDE_CSUM_ERROR;
774
775         return csum;
776 }
777
778 static inline uint8_t qede_check_csum(uint16_t flag)
779 {
780         if (likely(!qede_tunn_exist(flag)))
781                 return qede_check_notunn_csum(flag);
782         else
783                 return qede_check_tunn_csum(flag);
784 }
785
786 static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
787 {
788         ecore_chain_consume(&rxq->rx_bd_ring);
789         rxq->sw_rx_cons++;
790 }
791
792 static inline void
793 qede_reuse_page(struct qede_dev *qdev,
794                 struct qede_rx_queue *rxq, struct qede_rx_entry *curr_cons)
795 {
796         struct eth_rx_bd *rx_bd_prod = ecore_chain_produce(&rxq->rx_bd_ring);
797         uint16_t idx = rxq->sw_rx_cons & NUM_RX_BDS(rxq);
798         struct qede_rx_entry *curr_prod;
799         dma_addr_t new_mapping;
800
801         curr_prod = &rxq->sw_rx_ring[idx];
802         *curr_prod = *curr_cons;
803
804         new_mapping = rte_mbuf_data_dma_addr_default(curr_prod->mbuf) +
805                       curr_prod->page_offset;
806
807         rx_bd_prod->addr.hi = rte_cpu_to_le_32(U64_HI(new_mapping));
808         rx_bd_prod->addr.lo = rte_cpu_to_le_32(U64_LO(new_mapping));
809
810         rxq->sw_rx_prod++;
811 }
812
813 static inline void
814 qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq,
815                         struct qede_dev *qdev, uint8_t count)
816 {
817         struct qede_rx_entry *curr_cons;
818
819         for (; count > 0; count--) {
820                 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS(rxq)];
821                 qede_reuse_page(qdev, rxq, curr_cons);
822                 qede_rx_bd_ring_consume(rxq);
823         }
824 }
825
826 static inline uint32_t qede_rx_cqe_to_pkt_type(uint16_t flags)
827 {
828         uint32_t p_type;
829         /* TBD - L4 indications needed ? */
830         uint16_t protocol = ((PARSING_AND_ERR_FLAGS_L3TYPE_MASK <<
831                               PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) & flags);
832
833         /* protocol = 3 means LLC/SNAP over Ethernet */
834         if (unlikely(protocol == 0 || protocol == 3))
835                 p_type = RTE_PTYPE_UNKNOWN;
836         else if (protocol == 1)
837                 p_type = RTE_PTYPE_L3_IPV4;
838         else if (protocol == 2)
839                 p_type = RTE_PTYPE_L3_IPV6;
840
841         return RTE_PTYPE_L2_ETHER | p_type;
842 }
843
844 uint16_t
845 qede_recv_pkts(void *p_rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
846 {
847         struct qede_rx_queue *rxq = p_rxq;
848         struct qede_dev *qdev = rxq->qdev;
849         struct ecore_dev *edev = &qdev->edev;
850         struct qede_fastpath *fp = &qdev->fp_array[rxq->queue_id];
851         uint16_t hw_comp_cons, sw_comp_cons, sw_rx_index;
852         uint16_t rx_pkt = 0;
853         union eth_rx_cqe *cqe;
854         struct eth_fast_path_rx_reg_cqe *fp_cqe;
855         register struct rte_mbuf *rx_mb = NULL;
856         enum eth_rx_cqe_type cqe_type;
857         uint16_t len, pad;
858         uint16_t preload_idx;
859         uint8_t csum_flag;
860         uint16_t parse_flag;
861         enum rss_hash_type htype;
862
863         hw_comp_cons = rte_le_to_cpu_16(*rxq->hw_cons_ptr);
864         sw_comp_cons = ecore_chain_get_cons_idx(&rxq->rx_comp_ring);
865
866         rte_rmb();
867
868         if (hw_comp_cons == sw_comp_cons)
869                 return 0;
870
871         while (sw_comp_cons != hw_comp_cons) {
872                 /* Get the CQE from the completion ring */
873                 cqe =
874                     (union eth_rx_cqe *)ecore_chain_consume(&rxq->rx_comp_ring);
875                 cqe_type = cqe->fast_path_regular.type;
876
877                 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
878                         PMD_RX_LOG(DEBUG, rxq, "Got a slowath CQE\n");
879
880                         qdev->ops->eth_cqe_completion(edev, fp->rss_id,
881                                 (struct eth_slow_path_rx_cqe *)cqe);
882                         goto next_cqe;
883                 }
884
885                 /* Get the data from the SW ring */
886                 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS(rxq);
887                 rx_mb = rxq->sw_rx_ring[sw_rx_index].mbuf;
888                 assert(rx_mb != NULL);
889
890                 /* non GRO */
891                 fp_cqe = &cqe->fast_path_regular;
892
893                 len = rte_le_to_cpu_16(fp_cqe->len_on_first_bd);
894                 pad = fp_cqe->placement_offset;
895                 assert((len + pad) <= rx_mb->buf_len);
896
897                 PMD_RX_LOG(DEBUG, rxq,
898                            "CQE type = 0x%x, flags = 0x%x, vlan = 0x%x"
899                            " len = %u, parsing_flags = %d\n",
900                            cqe_type, fp_cqe->bitfields,
901                            rte_le_to_cpu_16(fp_cqe->vlan_tag),
902                            len, rte_le_to_cpu_16(fp_cqe->pars_flags.flags));
903
904                 /* If this is an error packet then drop it */
905                 parse_flag =
906                     rte_le_to_cpu_16(cqe->fast_path_regular.pars_flags.flags);
907                 csum_flag = qede_check_csum(parse_flag);
908                 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
909                         PMD_RX_LOG(ERR, rxq,
910                                    "CQE in CONS = %u has error, flags = 0x%x "
911                                    "dropping incoming packet\n",
912                                    sw_comp_cons, parse_flag);
913                         rxq->rx_hw_errors++;
914                         qede_recycle_rx_bd_ring(rxq, qdev, fp_cqe->bd_num);
915                         goto next_cqe;
916                 }
917
918                 if (unlikely(qede_alloc_rx_buffer(rxq) != 0)) {
919                         PMD_RX_LOG(ERR, rxq,
920                                    "New buffer allocation failed,"
921                                    "dropping incoming packet\n");
922                         qede_recycle_rx_bd_ring(rxq, qdev, fp_cqe->bd_num);
923                         rte_eth_devices[rxq->port_id].
924                             data->rx_mbuf_alloc_failed++;
925                         rxq->rx_alloc_errors++;
926                         break;
927                 }
928
929                 qede_rx_bd_ring_consume(rxq);
930
931                 /* Prefetch next mbuf while processing current one. */
932                 preload_idx = rxq->sw_rx_cons & NUM_RX_BDS(rxq);
933                 rte_prefetch0(rxq->sw_rx_ring[preload_idx].mbuf);
934
935                 if (fp_cqe->bd_num != 1)
936                         PMD_RX_LOG(DEBUG, rxq,
937                                    "Jumbo-over-BD packet not supported\n");
938
939                 /* Update MBUF fields */
940                 rx_mb->ol_flags = 0;
941                 rx_mb->data_off = pad + RTE_PKTMBUF_HEADROOM;
942                 rx_mb->nb_segs = 1;
943                 rx_mb->data_len = len;
944                 rx_mb->pkt_len = len;
945                 rx_mb->port = rxq->port_id;
946                 rx_mb->packet_type = qede_rx_cqe_to_pkt_type(parse_flag);
947
948                 htype = (uint8_t)GET_FIELD(fp_cqe->bitfields,
949                                 ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
950                 if (qdev->rss_enabled && htype) {
951                         rx_mb->ol_flags |= PKT_RX_RSS_HASH;
952                         rx_mb->hash.rss = rte_le_to_cpu_32(fp_cqe->rss_hash);
953                         PMD_RX_LOG(DEBUG, rxq, "Hash result 0x%x\n",
954                                    rx_mb->hash.rss);
955                 }
956
957                 rte_prefetch1(rte_pktmbuf_mtod(rx_mb, void *));
958
959                 if (CQE_HAS_VLAN(parse_flag)) {
960                         rx_mb->vlan_tci = rte_le_to_cpu_16(fp_cqe->vlan_tag);
961                         rx_mb->ol_flags |= PKT_RX_VLAN_PKT;
962                 }
963
964                 if (CQE_HAS_OUTER_VLAN(parse_flag)) {
965                         /* FW does not provide indication of Outer VLAN tag,
966                          * which is always stripped, so vlan_tci_outer is set
967                          * to 0. Here vlan_tag represents inner VLAN tag.
968                          */
969                         rx_mb->vlan_tci = rte_le_to_cpu_16(fp_cqe->vlan_tag);
970                         rx_mb->ol_flags |= PKT_RX_QINQ_PKT;
971                 }
972
973                 rx_pkts[rx_pkt] = rx_mb;
974                 rx_pkt++;
975 next_cqe:
976                 ecore_chain_recycle_consumed(&rxq->rx_comp_ring);
977                 sw_comp_cons = ecore_chain_get_cons_idx(&rxq->rx_comp_ring);
978                 if (rx_pkt == nb_pkts) {
979                         PMD_RX_LOG(DEBUG, rxq,
980                                    "Budget reached nb_pkts=%u received=%u\n",
981                                    rx_pkt, nb_pkts);
982                         break;
983                 }
984         }
985
986         qede_update_rx_prod(qdev, rxq);
987
988         PMD_RX_LOG(DEBUG, rxq, "rx_pkts=%u core=%d\n", rx_pkt, rte_lcore_id());
989
990         return rx_pkt;
991 }
992
993 static inline int
994 qede_free_tx_pkt(struct ecore_dev *edev, struct qede_tx_queue *txq)
995 {
996         uint16_t idx = TX_CONS(txq);
997         struct eth_tx_bd *tx_data_bd;
998         struct rte_mbuf *mbuf = txq->sw_tx_ring[idx].mbuf;
999
1000         if (unlikely(!mbuf)) {
1001                 PMD_TX_LOG(ERR, txq,
1002                            "null mbuf nb_tx_desc %u nb_tx_avail %u "
1003                            "sw_tx_cons %u sw_tx_prod %u\n",
1004                            txq->nb_tx_desc, txq->nb_tx_avail, idx,
1005                            TX_PROD(txq));
1006                 return -1;
1007         }
1008
1009         /* Free now */
1010         rte_pktmbuf_free_seg(mbuf);
1011         txq->sw_tx_ring[idx].mbuf = NULL;
1012         ecore_chain_consume(&txq->tx_pbl);
1013         txq->nb_tx_avail++;
1014
1015         return 0;
1016 }
1017
1018 static inline uint16_t
1019 qede_process_tx_compl(struct ecore_dev *edev, struct qede_tx_queue *txq)
1020 {
1021         uint16_t tx_compl = 0;
1022         uint16_t hw_bd_cons;
1023         int rc;
1024
1025         hw_bd_cons = rte_le_to_cpu_16(*txq->hw_cons_ptr);
1026         rte_compiler_barrier();
1027
1028         while (hw_bd_cons != ecore_chain_get_cons_idx(&txq->tx_pbl)) {
1029                 rc = qede_free_tx_pkt(edev, txq);
1030                 if (rc) {
1031                         DP_NOTICE(edev, false,
1032                                   "hw_bd_cons = %d, chain_cons=%d\n",
1033                                   hw_bd_cons,
1034                                   ecore_chain_get_cons_idx(&txq->tx_pbl));
1035                         break;
1036                 }
1037                 txq->sw_tx_cons++;      /* Making TXD available */
1038                 tx_compl++;
1039         }
1040
1041         PMD_TX_LOG(DEBUG, txq, "Tx compl %u sw_tx_cons %u avail %u\n",
1042                    tx_compl, txq->sw_tx_cons, txq->nb_tx_avail);
1043         return tx_compl;
1044 }
1045
1046 uint16_t
1047 qede_xmit_pkts(void *p_txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
1048 {
1049         struct qede_tx_queue *txq = p_txq;
1050         struct qede_dev *qdev = txq->qdev;
1051         struct ecore_dev *edev = &qdev->edev;
1052         struct qede_fastpath *fp = &qdev->fp_array[txq->queue_id];
1053         struct eth_tx_1st_bd *first_bd;
1054         uint16_t nb_tx_pkts;
1055         uint16_t nb_pkt_sent = 0;
1056         uint16_t bd_prod;
1057         uint16_t idx;
1058         uint16_t tx_count;
1059
1060         if (unlikely(txq->nb_tx_avail < txq->tx_free_thresh)) {
1061                 PMD_TX_LOG(DEBUG, txq, "send=%u avail=%u free_thresh=%u\n",
1062                            nb_pkts, txq->nb_tx_avail, txq->tx_free_thresh);
1063                 (void)qede_process_tx_compl(edev, txq);
1064         }
1065
1066         nb_tx_pkts = RTE_MIN(nb_pkts, (txq->nb_tx_avail / MAX_NUM_TX_BDS));
1067         if (unlikely(nb_tx_pkts == 0)) {
1068                 PMD_TX_LOG(DEBUG, txq, "Out of BDs nb_pkts=%u avail=%u\n",
1069                            nb_pkts, txq->nb_tx_avail);
1070                 return 0;
1071         }
1072
1073         tx_count = nb_tx_pkts;
1074         while (nb_tx_pkts--) {
1075                 /* Fill the entry in the SW ring and the BDs in the FW ring */
1076                 idx = TX_PROD(txq);
1077                 struct rte_mbuf *mbuf = *tx_pkts++;
1078                 txq->sw_tx_ring[idx].mbuf = mbuf;
1079                 first_bd = (struct eth_tx_1st_bd *)
1080                     ecore_chain_produce(&txq->tx_pbl);
1081                 first_bd->data.bd_flags.bitfields =
1082                     1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
1083                 /* Map MBUF linear data for DMA and set in the first BD */
1084                 QEDE_BD_SET_ADDR_LEN(first_bd, rte_mbuf_data_dma_addr(mbuf),
1085                                      mbuf->data_len);
1086
1087                 /* Descriptor based VLAN insertion */
1088                 if (mbuf->ol_flags & (PKT_TX_VLAN_PKT | PKT_TX_QINQ_PKT)) {
1089                         first_bd->data.vlan = rte_cpu_to_le_16(mbuf->vlan_tci);
1090                         first_bd->data.bd_flags.bitfields |=
1091                             1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
1092                 }
1093
1094                 /* Offload the IP checksum in the hardware */
1095                 if (mbuf->ol_flags & PKT_TX_IP_CKSUM) {
1096                         first_bd->data.bd_flags.bitfields |=
1097                             1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
1098                 }
1099
1100                 /* L4 checksum offload (tcp or udp) */
1101                 if (mbuf->ol_flags & (PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM)) {
1102                         first_bd->data.bd_flags.bitfields |=
1103                             1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
1104                         /* IPv6 + extn. -> later */
1105                 }
1106                 first_bd->data.nbds = MAX_NUM_TX_BDS;
1107                 txq->sw_tx_prod++;
1108                 rte_prefetch0(txq->sw_tx_ring[TX_PROD(txq)].mbuf);
1109                 txq->nb_tx_avail--;
1110                 bd_prod =
1111                     rte_cpu_to_le_16(ecore_chain_get_prod_idx(&txq->tx_pbl));
1112                 nb_pkt_sent++;
1113         }
1114
1115         /* Write value of prod idx into bd_prod */
1116         txq->tx_db.data.bd_prod = bd_prod;
1117         rte_wmb();
1118         rte_compiler_barrier();
1119         DIRECT_REG_WR(edev, txq->doorbell_addr, txq->tx_db.raw);
1120         rte_wmb();
1121
1122         /* Check again for Tx completions */
1123         (void)qede_process_tx_compl(edev, txq);
1124
1125         PMD_TX_LOG(DEBUG, txq, "to_send=%u can_send=%u sent=%u core=%d\n",
1126                    nb_pkts, tx_count, nb_pkt_sent, rte_lcore_id());
1127
1128         return nb_pkt_sent;
1129 }
1130
1131 int qede_dev_start(struct rte_eth_dev *eth_dev)
1132 {
1133         struct qede_dev *qdev = eth_dev->data->dev_private;
1134         struct ecore_dev *edev = &qdev->edev;
1135         struct qed_link_output link_output;
1136         int rc;
1137
1138         DP_INFO(edev, "port %u\n", eth_dev->data->port_id);
1139
1140         if (qdev->state == QEDE_START) {
1141                 DP_INFO(edev, "device already started\n");
1142                 return 0;
1143         }
1144
1145         if (qdev->state == QEDE_CLOSE) {
1146                 rc = qede_alloc_fp_array(qdev);
1147                 qede_init_fp(qdev);
1148                 rc = qede_alloc_mem_load(qdev);
1149                 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
1150                         QEDE_RSS_CNT(qdev), qdev->num_tc);
1151         } else if (qdev->state == QEDE_STOP) {
1152                 DP_INFO(edev, "restarting port %u\n", eth_dev->data->port_id);
1153         } else {
1154                 DP_INFO(edev, "unknown state port %u\n",
1155                         eth_dev->data->port_id);
1156                 return -EINVAL;
1157         }
1158
1159         rc = qede_start_queues(eth_dev, true);
1160
1161         if (rc) {
1162                 DP_ERR(edev, "Failed to start queues\n");
1163                 /* TBD: free */
1164                 return rc;
1165         }
1166
1167         DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
1168
1169         qede_dev_set_link_state(eth_dev, true);
1170
1171         /* Query whether link is already-up */
1172         memset(&link_output, 0, sizeof(link_output));
1173         qdev->ops->common->get_link(edev, &link_output);
1174         DP_NOTICE(edev, false, "link status: %s\n",
1175                   link_output.link_up ? "up" : "down");
1176
1177         qdev->state = QEDE_START;
1178
1179         qede_config_rx_mode(eth_dev);
1180
1181         DP_INFO(edev, "dev_state is QEDE_START\n");
1182
1183         return 0;
1184 }
1185
1186 static int qede_drain_txq(struct qede_dev *qdev,
1187                           struct qede_tx_queue *txq, bool allow_drain)
1188 {
1189         struct ecore_dev *edev = &qdev->edev;
1190         int rc, cnt = 1000;
1191
1192         while (txq->sw_tx_cons != txq->sw_tx_prod) {
1193                 qede_process_tx_compl(edev, txq);
1194                 if (!cnt) {
1195                         if (allow_drain) {
1196                                 DP_NOTICE(edev, false,
1197                                           "Tx queue[%u] is stuck,"
1198                                           "requesting MCP to drain\n",
1199                                           txq->queue_id);
1200                                 rc = qdev->ops->common->drain(edev);
1201                                 if (rc)
1202                                         return rc;
1203                                 return qede_drain_txq(qdev, txq, false);
1204                         }
1205
1206                         DP_NOTICE(edev, false,
1207                                   "Timeout waiting for tx queue[%d]:"
1208                                   "PROD=%d, CONS=%d\n",
1209                                   txq->queue_id, txq->sw_tx_prod,
1210                                   txq->sw_tx_cons);
1211                         return -ENODEV;
1212                 }
1213                 cnt--;
1214                 DELAY(1000);
1215                 rte_compiler_barrier();
1216         }
1217
1218         /* FW finished processing, wait for HW to transmit all tx packets */
1219         DELAY(2000);
1220
1221         return 0;
1222 }
1223
1224 static int qede_stop_queues(struct qede_dev *qdev)
1225 {
1226         struct qed_update_vport_params vport_update_params;
1227         struct ecore_dev *edev = &qdev->edev;
1228         int rc, tc, i;
1229
1230         /* Disable the vport */
1231         memset(&vport_update_params, 0, sizeof(vport_update_params));
1232         vport_update_params.vport_id = 0;
1233         vport_update_params.update_vport_active_flg = 1;
1234         vport_update_params.vport_active_flg = 0;
1235         vport_update_params.update_rss_flg = 0;
1236
1237         DP_INFO(edev, "vport_update\n");
1238
1239         rc = qdev->ops->vport_update(edev, &vport_update_params);
1240         if (rc) {
1241                 DP_ERR(edev, "Failed to update vport\n");
1242                 return rc;
1243         }
1244
1245         DP_INFO(edev, "Flushing tx queues\n");
1246
1247         /* Flush Tx queues. If needed, request drain from MCP */
1248         for_each_rss(i) {
1249                 struct qede_fastpath *fp = &qdev->fp_array[i];
1250                 for (tc = 0; tc < qdev->num_tc; tc++) {
1251                         struct qede_tx_queue *txq = fp->txqs[tc];
1252                         rc = qede_drain_txq(qdev, txq, true);
1253                         if (rc)
1254                                 return rc;
1255                 }
1256         }
1257
1258         /* Stop all Queues in reverse order */
1259         for (i = QEDE_RSS_CNT(qdev) - 1; i >= 0; i--) {
1260                 struct qed_stop_rxq_params rx_params;
1261
1262                 /* Stop the Tx Queue(s) */
1263                 for (tc = 0; tc < qdev->num_tc; tc++) {
1264                         struct qed_stop_txq_params tx_params;
1265
1266                         tx_params.rss_id = i;
1267                         tx_params.tx_queue_id = tc * QEDE_RSS_CNT(qdev) + i;
1268
1269                         DP_INFO(edev, "Stopping tx queues\n");
1270                         rc = qdev->ops->q_tx_stop(edev, &tx_params);
1271                         if (rc) {
1272                                 DP_ERR(edev, "Failed to stop TXQ #%d\n",
1273                                        tx_params.tx_queue_id);
1274                                 return rc;
1275                         }
1276                 }
1277
1278                 /* Stop the Rx Queue */
1279                 memset(&rx_params, 0, sizeof(rx_params));
1280                 rx_params.rss_id = i;
1281                 rx_params.rx_queue_id = i;
1282                 rx_params.eq_completion_only = 1;
1283
1284                 DP_INFO(edev, "Stopping rx queues\n");
1285
1286                 rc = qdev->ops->q_rx_stop(edev, &rx_params);
1287                 if (rc) {
1288                         DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
1289                         return rc;
1290                 }
1291         }
1292
1293         DP_INFO(edev, "Stopping vports\n");
1294
1295         /* Stop the vport */
1296         rc = qdev->ops->vport_stop(edev, 0);
1297         if (rc)
1298                 DP_ERR(edev, "Failed to stop VPORT\n");
1299
1300         return rc;
1301 }
1302
1303 void qede_reset_fp_rings(struct qede_dev *qdev)
1304 {
1305         uint16_t rss_id;
1306         uint8_t tc;
1307
1308         for_each_rss(rss_id) {
1309                 DP_INFO(&qdev->edev, "reset fp chain for rss %u\n", rss_id);
1310                 struct qede_fastpath *fp = &qdev->fp_array[rss_id];
1311                 ecore_chain_reset(&fp->rxq->rx_bd_ring);
1312                 ecore_chain_reset(&fp->rxq->rx_comp_ring);
1313                 for (tc = 0; tc < qdev->num_tc; tc++) {
1314                         struct qede_tx_queue *txq = fp->txqs[tc];
1315                         ecore_chain_reset(&txq->tx_pbl);
1316                 }
1317         }
1318 }
1319
1320 /* This function frees all memory of a single fp */
1321 static void qede_free_mem_fp(struct qede_dev *qdev, struct qede_fastpath *fp)
1322 {
1323         uint8_t tc;
1324
1325         qede_rx_queue_release(fp->rxq);
1326         for (tc = 0; tc < qdev->num_tc; tc++)
1327                 qede_tx_queue_release(fp->txqs[tc]);
1328 }
1329
1330 void qede_free_mem_load(struct qede_dev *qdev)
1331 {
1332         uint8_t rss_id;
1333
1334         for_each_rss(rss_id) {
1335                 struct qede_fastpath *fp = &qdev->fp_array[rss_id];
1336                 qede_free_mem_fp(qdev, fp);
1337         }
1338         /* qdev->num_rss = 0; */
1339 }
1340
1341 /*
1342  * Stop an Ethernet device. The device can be restarted with a call to
1343  * rte_eth_dev_start().
1344  * Do not change link state and do not release sw structures.
1345  */
1346 void qede_dev_stop(struct rte_eth_dev *eth_dev)
1347 {
1348         struct qede_dev *qdev = eth_dev->data->dev_private;
1349         struct ecore_dev *edev = &qdev->edev;
1350         int rc;
1351
1352         DP_INFO(edev, "port %u\n", eth_dev->data->port_id);
1353
1354         if (qdev->state != QEDE_START) {
1355                 DP_INFO(edev, "device not yet started\n");
1356                 return;
1357         }
1358
1359         rc = qede_stop_queues(qdev);
1360
1361         if (rc)
1362                 DP_ERR(edev, "Didn't succeed to close queues\n");
1363
1364         DP_INFO(edev, "Stopped queues\n");
1365
1366         qdev->ops->fastpath_stop(edev);
1367
1368         qede_reset_fp_rings(qdev);
1369
1370         qdev->state = QEDE_STOP;
1371
1372         DP_INFO(edev, "dev_state is QEDE_STOP\n");
1373 }