net/enic: fix freeing memory for descriptor ring
[dpdk.git] / drivers / net / qede / qede_rxtx.c
1 /*
2  * Copyright (c) 2016 QLogic Corporation.
3  * All rights reserved.
4  * www.qlogic.com
5  *
6  * See LICENSE.qede_pmd for copyright and licensing details.
7  */
8
9 #include "qede_rxtx.h"
10
11 static bool gro_disable = 1;    /* mod_param */
12
13 static inline int qede_alloc_rx_buffer(struct qede_rx_queue *rxq)
14 {
15         struct rte_mbuf *new_mb = NULL;
16         struct eth_rx_bd *rx_bd;
17         dma_addr_t mapping;
18         uint16_t idx = rxq->sw_rx_prod & NUM_RX_BDS(rxq);
19
20         new_mb = rte_mbuf_raw_alloc(rxq->mb_pool);
21         if (unlikely(!new_mb)) {
22                 PMD_RX_LOG(ERR, rxq,
23                            "Failed to allocate rx buffer "
24                            "sw_rx_prod %u sw_rx_cons %u mp entries %u free %u",
25                            idx, rxq->sw_rx_cons & NUM_RX_BDS(rxq),
26                            rte_mempool_avail_count(rxq->mb_pool),
27                            rte_mempool_in_use_count(rxq->mb_pool));
28                 return -ENOMEM;
29         }
30         rxq->sw_rx_ring[idx].mbuf = new_mb;
31         rxq->sw_rx_ring[idx].page_offset = 0;
32         mapping = rte_mbuf_data_dma_addr_default(new_mb);
33         /* Advance PROD and get BD pointer */
34         rx_bd = (struct eth_rx_bd *)ecore_chain_produce(&rxq->rx_bd_ring);
35         rx_bd->addr.hi = rte_cpu_to_le_32(U64_HI(mapping));
36         rx_bd->addr.lo = rte_cpu_to_le_32(U64_LO(mapping));
37         rxq->sw_rx_prod++;
38         return 0;
39 }
40
41 static void qede_rx_queue_release_mbufs(struct qede_rx_queue *rxq)
42 {
43         uint16_t i;
44
45         if (rxq->sw_rx_ring != NULL) {
46                 for (i = 0; i < rxq->nb_rx_desc; i++) {
47                         if (rxq->sw_rx_ring[i].mbuf != NULL) {
48                                 rte_pktmbuf_free(rxq->sw_rx_ring[i].mbuf);
49                                 rxq->sw_rx_ring[i].mbuf = NULL;
50                         }
51                 }
52         }
53 }
54
55 void qede_rx_queue_release(void *rx_queue)
56 {
57         struct qede_rx_queue *rxq = rx_queue;
58
59         if (rxq != NULL) {
60                 qede_rx_queue_release_mbufs(rxq);
61                 rte_free(rxq->sw_rx_ring);
62                 rxq->sw_rx_ring = NULL;
63                 rte_free(rxq);
64                 rx_queue = NULL;
65         }
66 }
67
68 int
69 qede_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
70                     uint16_t nb_desc, unsigned int socket_id,
71                     const struct rte_eth_rxconf *rx_conf,
72                     struct rte_mempool *mp)
73 {
74         struct qede_dev *qdev = dev->data->dev_private;
75         struct ecore_dev *edev = &qdev->edev;
76         struct rte_eth_dev_data *eth_data = dev->data;
77         struct qede_rx_queue *rxq;
78         uint16_t pkt_len = (uint16_t)dev->data->dev_conf.rxmode.max_rx_pkt_len;
79         size_t size;
80         uint16_t data_size;
81         int rc;
82         int i;
83
84         PMD_INIT_FUNC_TRACE(edev);
85
86         /* Note: Ring size/align is controlled by struct rte_eth_desc_lim */
87         if (!rte_is_power_of_2(nb_desc)) {
88                 DP_ERR(edev, "Ring size %u is not power of 2\n",
89                           nb_desc);
90                 return -EINVAL;
91         }
92
93         /* Free memory prior to re-allocation if needed... */
94         if (dev->data->rx_queues[queue_idx] != NULL) {
95                 qede_rx_queue_release(dev->data->rx_queues[queue_idx]);
96                 dev->data->rx_queues[queue_idx] = NULL;
97         }
98
99         /* First allocate the rx queue data structure */
100         rxq = rte_zmalloc_socket("qede_rx_queue", sizeof(struct qede_rx_queue),
101                                  RTE_CACHE_LINE_SIZE, socket_id);
102
103         if (!rxq) {
104                 DP_ERR(edev, "Unable to allocate memory for rxq on socket %u",
105                           socket_id);
106                 return -ENOMEM;
107         }
108
109         rxq->qdev = qdev;
110         rxq->mb_pool = mp;
111         rxq->nb_rx_desc = nb_desc;
112         rxq->queue_id = queue_idx;
113         rxq->port_id = dev->data->port_id;
114
115         /* Sanity check */
116         data_size = (uint16_t)rte_pktmbuf_data_room_size(mp) -
117                                 RTE_PKTMBUF_HEADROOM;
118
119         if (pkt_len > data_size) {
120                 DP_ERR(edev, "MTU %u should not exceed dataroom %u\n",
121                        pkt_len, data_size);
122                 rte_free(rxq);
123                 return -EINVAL;
124         }
125
126         qdev->mtu = pkt_len;
127         rxq->rx_buf_size = pkt_len + QEDE_ETH_OVERHEAD;
128
129         DP_INFO(edev, "MTU = %u ; RX buffer = %u\n",
130                 qdev->mtu, rxq->rx_buf_size);
131
132         if (pkt_len > ETHER_MAX_LEN) {
133                 dev->data->dev_conf.rxmode.jumbo_frame = 1;
134                 DP_NOTICE(edev, false, "jumbo frame enabled\n");
135         } else {
136                 dev->data->dev_conf.rxmode.jumbo_frame = 0;
137         }
138
139         /* Allocate the parallel driver ring for Rx buffers */
140         size = sizeof(*rxq->sw_rx_ring) * rxq->nb_rx_desc;
141         rxq->sw_rx_ring = rte_zmalloc_socket("sw_rx_ring", size,
142                                              RTE_CACHE_LINE_SIZE, socket_id);
143         if (!rxq->sw_rx_ring) {
144                 DP_NOTICE(edev, false,
145                           "Unable to alloc memory for sw_rx_ring on socket %u\n",
146                           socket_id);
147                 rte_free(rxq);
148                 rxq = NULL;
149                 return -ENOMEM;
150         }
151
152         /* Allocate FW Rx ring  */
153         rc = qdev->ops->common->chain_alloc(edev,
154                                             ECORE_CHAIN_USE_TO_CONSUME_PRODUCE,
155                                             ECORE_CHAIN_MODE_NEXT_PTR,
156                                             ECORE_CHAIN_CNT_TYPE_U16,
157                                             rxq->nb_rx_desc,
158                                             sizeof(struct eth_rx_bd),
159                                             &rxq->rx_bd_ring);
160
161         if (rc != ECORE_SUCCESS) {
162                 DP_NOTICE(edev, false,
163                           "Unable to alloc memory for rxbd ring on socket %u\n",
164                           socket_id);
165                 rte_free(rxq->sw_rx_ring);
166                 rxq->sw_rx_ring = NULL;
167                 rte_free(rxq);
168                 rxq = NULL;
169         }
170
171         /* Allocate FW completion ring */
172         rc = qdev->ops->common->chain_alloc(edev,
173                                             ECORE_CHAIN_USE_TO_CONSUME,
174                                             ECORE_CHAIN_MODE_PBL,
175                                             ECORE_CHAIN_CNT_TYPE_U16,
176                                             rxq->nb_rx_desc,
177                                             sizeof(union eth_rx_cqe),
178                                             &rxq->rx_comp_ring);
179
180         if (rc != ECORE_SUCCESS) {
181                 DP_NOTICE(edev, false,
182                           "Unable to alloc memory for cqe ring on socket %u\n",
183                           socket_id);
184                 /* TBD: Freeing RX BD ring */
185                 rte_free(rxq->sw_rx_ring);
186                 rxq->sw_rx_ring = NULL;
187                 rte_free(rxq);
188         }
189
190         /* Allocate buffers for the Rx ring */
191         for (i = 0; i < rxq->nb_rx_desc; i++) {
192                 rc = qede_alloc_rx_buffer(rxq);
193                 if (rc) {
194                         DP_NOTICE(edev, false,
195                                   "RX buffer allocation failed at idx=%d\n", i);
196                         goto err4;
197                 }
198         }
199
200         dev->data->rx_queues[queue_idx] = rxq;
201         if (!qdev->rx_queues)
202                 qdev->rx_queues = (struct qede_rx_queue **)dev->data->rx_queues;
203
204         DP_INFO(edev, "rxq %d num_desc %u rx_buf_size=%u socket %u\n",
205                   queue_idx, nb_desc, qdev->mtu, socket_id);
206
207         return 0;
208 err4:
209         qede_rx_queue_release(rxq);
210         return -ENOMEM;
211 }
212
213 static void qede_tx_queue_release_mbufs(struct qede_tx_queue *txq)
214 {
215         unsigned int i;
216
217         PMD_TX_LOG(DEBUG, txq, "releasing %u mbufs\n", txq->nb_tx_desc);
218
219         if (txq->sw_tx_ring != NULL) {
220                 for (i = 0; i < txq->nb_tx_desc; i++) {
221                         if (txq->sw_tx_ring[i].mbuf != NULL) {
222                                 rte_pktmbuf_free(txq->sw_tx_ring[i].mbuf);
223                                 txq->sw_tx_ring[i].mbuf = NULL;
224                         }
225                 }
226         }
227 }
228
229 void qede_tx_queue_release(void *tx_queue)
230 {
231         struct qede_tx_queue *txq = tx_queue;
232
233         if (txq != NULL) {
234                 qede_tx_queue_release_mbufs(txq);
235                 if (txq->sw_tx_ring) {
236                         rte_free(txq->sw_tx_ring);
237                         txq->sw_tx_ring = NULL;
238                 }
239                 rte_free(txq);
240         }
241         tx_queue = NULL;
242 }
243
244 int
245 qede_tx_queue_setup(struct rte_eth_dev *dev,
246                     uint16_t queue_idx,
247                     uint16_t nb_desc,
248                     unsigned int socket_id,
249                     const struct rte_eth_txconf *tx_conf)
250 {
251         struct qede_dev *qdev = dev->data->dev_private;
252         struct ecore_dev *edev = &qdev->edev;
253         struct qede_tx_queue *txq;
254         int rc;
255
256         PMD_INIT_FUNC_TRACE(edev);
257
258         if (!rte_is_power_of_2(nb_desc)) {
259                 DP_ERR(edev, "Ring size %u is not power of 2\n",
260                        nb_desc);
261                 return -EINVAL;
262         }
263
264         /* Free memory prior to re-allocation if needed... */
265         if (dev->data->tx_queues[queue_idx] != NULL) {
266                 qede_tx_queue_release(dev->data->tx_queues[queue_idx]);
267                 dev->data->tx_queues[queue_idx] = NULL;
268         }
269
270         txq = rte_zmalloc_socket("qede_tx_queue", sizeof(struct qede_tx_queue),
271                                  RTE_CACHE_LINE_SIZE, socket_id);
272
273         if (txq == NULL) {
274                 DP_ERR(edev,
275                        "Unable to allocate memory for txq on socket %u",
276                        socket_id);
277                 return -ENOMEM;
278         }
279
280         txq->nb_tx_desc = nb_desc;
281         txq->qdev = qdev;
282         txq->port_id = dev->data->port_id;
283
284         rc = qdev->ops->common->chain_alloc(edev,
285                                             ECORE_CHAIN_USE_TO_CONSUME_PRODUCE,
286                                             ECORE_CHAIN_MODE_PBL,
287                                             ECORE_CHAIN_CNT_TYPE_U16,
288                                             txq->nb_tx_desc,
289                                             sizeof(union eth_tx_bd_types),
290                                             &txq->tx_pbl);
291         if (rc != ECORE_SUCCESS) {
292                 DP_ERR(edev,
293                        "Unable to allocate memory for txbd ring on socket %u",
294                        socket_id);
295                 qede_tx_queue_release(txq);
296                 return -ENOMEM;
297         }
298
299         /* Allocate software ring */
300         txq->sw_tx_ring = rte_zmalloc_socket("txq->sw_tx_ring",
301                                              (sizeof(struct qede_tx_entry) *
302                                               txq->nb_tx_desc),
303                                              RTE_CACHE_LINE_SIZE, socket_id);
304
305         if (!txq->sw_tx_ring) {
306                 DP_ERR(edev,
307                        "Unable to allocate memory for txbd ring on socket %u",
308                        socket_id);
309                 qede_tx_queue_release(txq);
310                 return -ENOMEM;
311         }
312
313         txq->queue_id = queue_idx;
314
315         txq->nb_tx_avail = txq->nb_tx_desc;
316
317         txq->tx_free_thresh =
318             tx_conf->tx_free_thresh ? tx_conf->tx_free_thresh :
319             (txq->nb_tx_desc - QEDE_DEFAULT_TX_FREE_THRESH);
320
321         dev->data->tx_queues[queue_idx] = txq;
322         if (!qdev->tx_queues)
323                 qdev->tx_queues = (struct qede_tx_queue **)dev->data->tx_queues;
324
325         txq->txq_counter = 0;
326
327         DP_INFO(edev,
328                   "txq %u num_desc %u tx_free_thresh %u socket %u\n",
329                   queue_idx, nb_desc, txq->tx_free_thresh, socket_id);
330
331         return 0;
332 }
333
334 /* This function inits fp content and resets the SB, RXQ and TXQ arrays */
335 static void qede_init_fp(struct qede_dev *qdev)
336 {
337         struct qede_fastpath *fp;
338         int rss_id, txq_index, tc;
339
340         memset((void *)qdev->fp_array, 0, (QEDE_RSS_CNT(qdev) *
341                                            sizeof(*qdev->fp_array)));
342         memset((void *)qdev->sb_array, 0, (QEDE_RSS_CNT(qdev) *
343                                            sizeof(*qdev->sb_array)));
344         for_each_rss(rss_id) {
345                 fp = &qdev->fp_array[rss_id];
346
347                 fp->qdev = qdev;
348                 fp->rss_id = rss_id;
349
350                 /* Point rxq to generic rte queues that was created
351                  * as part of queue creation.
352                  */
353                 fp->rxq = qdev->rx_queues[rss_id];
354                 fp->sb_info = &qdev->sb_array[rss_id];
355
356                 for (tc = 0; tc < qdev->num_tc; tc++) {
357                         txq_index = tc * QEDE_RSS_CNT(qdev) + rss_id;
358                         fp->txqs[tc] = qdev->tx_queues[txq_index];
359                         fp->txqs[tc]->queue_id = txq_index;
360                         /* Updating it to main structure */
361                         snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
362                                  "qdev", rss_id);
363                 }
364         }
365
366         qdev->gro_disable = gro_disable;
367 }
368
369 void qede_free_fp_arrays(struct qede_dev *qdev)
370 {
371         /* It asseumes qede_free_mem_load() is called before */
372         if (qdev->fp_array != NULL) {
373                 rte_free(qdev->fp_array);
374                 qdev->fp_array = NULL;
375         }
376
377         if (qdev->sb_array != NULL) {
378                 rte_free(qdev->sb_array);
379                 qdev->sb_array = NULL;
380         }
381 }
382
383 int qede_alloc_fp_array(struct qede_dev *qdev)
384 {
385         struct qede_fastpath *fp;
386         struct ecore_dev *edev = &qdev->edev;
387         int i;
388
389         qdev->fp_array = rte_calloc("fp", QEDE_RSS_CNT(qdev),
390                                     sizeof(*qdev->fp_array),
391                                     RTE_CACHE_LINE_SIZE);
392
393         if (!qdev->fp_array) {
394                 DP_ERR(edev, "fp array allocation failed\n");
395                 return -ENOMEM;
396         }
397
398         qdev->sb_array = rte_calloc("sb", QEDE_RSS_CNT(qdev),
399                                     sizeof(*qdev->sb_array),
400                                     RTE_CACHE_LINE_SIZE);
401
402         if (!qdev->sb_array) {
403                 DP_ERR(edev, "sb array allocation failed\n");
404                 rte_free(qdev->fp_array);
405                 return -ENOMEM;
406         }
407
408         return 0;
409 }
410
411 /* This function allocates fast-path status block memory */
412 static int
413 qede_alloc_mem_sb(struct qede_dev *qdev, struct ecore_sb_info *sb_info,
414                   uint16_t sb_id)
415 {
416         struct ecore_dev *edev = &qdev->edev;
417         struct status_block *sb_virt;
418         dma_addr_t sb_phys;
419         int rc;
420
421         sb_virt = OSAL_DMA_ALLOC_COHERENT(edev, &sb_phys, sizeof(*sb_virt));
422
423         if (!sb_virt) {
424                 DP_ERR(edev, "Status block allocation failed\n");
425                 return -ENOMEM;
426         }
427
428         rc = qdev->ops->common->sb_init(edev, sb_info,
429                                         sb_virt, sb_phys, sb_id,
430                                         QED_SB_TYPE_L2_QUEUE);
431         if (rc) {
432                 DP_ERR(edev, "Status block initialization failed\n");
433                 /* TBD: No dma_free_coherent possible */
434                 return rc;
435         }
436
437         return 0;
438 }
439
440 static int qede_alloc_mem_fp(struct qede_dev *qdev, struct qede_fastpath *fp)
441 {
442         return qede_alloc_mem_sb(qdev, fp->sb_info, fp->rss_id);
443 }
444
445 static void qede_shrink_txq(struct qede_dev *qdev, uint16_t num_rss)
446 {
447         /* @@@TBD - this should also re-set the qed interrupts */
448 }
449
450 /* This function allocates all qede memory at NIC load. */
451 static int qede_alloc_mem_load(struct qede_dev *qdev)
452 {
453         int rc = 0, rss_id;
454         struct ecore_dev *edev = &qdev->edev;
455
456         for (rss_id = 0; rss_id < QEDE_RSS_CNT(qdev); rss_id++) {
457                 struct qede_fastpath *fp = &qdev->fp_array[rss_id];
458
459                 rc = qede_alloc_mem_fp(qdev, fp);
460                 if (rc)
461                         break;
462         }
463
464         if (rss_id != QEDE_RSS_CNT(qdev)) {
465                 /* Failed allocating memory for all the queues */
466                 if (!rss_id) {
467                         DP_ERR(edev,
468                                "Failed to alloc memory for leading queue\n");
469                         rc = -ENOMEM;
470                 } else {
471                         DP_NOTICE(edev, false,
472                                   "Failed to allocate memory for all of "
473                                   "RSS queues\n"
474                                   "Desired: %d queues, allocated: %d queues\n",
475                                   QEDE_RSS_CNT(qdev), rss_id);
476                         qede_shrink_txq(qdev, rss_id);
477                 }
478                 qdev->num_rss = rss_id;
479         }
480
481         return 0;
482 }
483
484 static inline void
485 qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq)
486 {
487         uint16_t bd_prod = ecore_chain_get_prod_idx(&rxq->rx_bd_ring);
488         uint16_t cqe_prod = ecore_chain_get_prod_idx(&rxq->rx_comp_ring);
489         struct eth_rx_prod_data rx_prods = { 0 };
490
491         /* Update producers */
492         rx_prods.bd_prod = rte_cpu_to_le_16(bd_prod);
493         rx_prods.cqe_prod = rte_cpu_to_le_16(cqe_prod);
494
495         /* Make sure that the BD and SGE data is updated before updating the
496          * producers since FW might read the BD/SGE right after the producer
497          * is updated.
498          */
499         rte_wmb();
500
501         internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
502                         (uint32_t *)&rx_prods);
503
504         /* mmiowb is needed to synchronize doorbell writes from more than one
505          * processor. It guarantees that the write arrives to the device before
506          * the napi lock is released and another qede_poll is called (possibly
507          * on another CPU). Without this barrier, the next doorbell can bypass
508          * this doorbell. This is applicable to IA64/Altix systems.
509          */
510         rte_wmb();
511
512         PMD_RX_LOG(DEBUG, rxq, "bd_prod %u  cqe_prod %u\n", bd_prod, cqe_prod);
513 }
514
515 static inline uint32_t
516 qede_rxfh_indir_default(uint32_t index, uint32_t n_rx_rings)
517 {
518         return index % n_rx_rings;
519 }
520
521 static void qede_prandom_bytes(uint32_t *buff, size_t bytes)
522 {
523         unsigned int i;
524
525         srand((unsigned int)time(NULL));
526
527         for (i = 0; i < ECORE_RSS_KEY_SIZE; i++)
528                 buff[i] = rand();
529 }
530
531 static int
532 qede_config_rss(struct rte_eth_dev *eth_dev,
533                 struct qed_update_vport_rss_params *rss_params)
534 {
535         struct rte_eth_rss_conf rss_conf;
536         enum rte_eth_rx_mq_mode mode = eth_dev->data->dev_conf.rxmode.mq_mode;
537         struct qede_dev *qdev = eth_dev->data->dev_private;
538         struct ecore_dev *edev = &qdev->edev;
539         uint8_t rss_caps;
540         unsigned int i;
541         uint64_t hf;
542         uint32_t *key;
543
544         rss_conf = eth_dev->data->dev_conf.rx_adv_conf.rss_conf;
545         key = (uint32_t *)rss_conf.rss_key;
546         hf = rss_conf.rss_hf;
547         PMD_INIT_FUNC_TRACE(edev);
548
549         /* Check if RSS conditions are met.
550          * Note: Even though its meaningless to enable RSS with one queue, it
551          * could be used to produce RSS Hash, so skipping that check.
552          */
553
554         if (!(mode & ETH_MQ_RX_RSS)) {
555                 DP_INFO(edev, "RSS flag is not set\n");
556                 return -EINVAL;
557         }
558
559         DP_INFO(edev, "RSS flag is set\n");
560
561         if (rss_conf.rss_hf == 0)
562                 DP_NOTICE(edev, false, "RSS hash function = 0, disables RSS\n");
563
564         if (rss_conf.rss_key != NULL)
565                 memcpy(qdev->rss_params.rss_key, rss_conf.rss_key,
566                        rss_conf.rss_key_len);
567
568         memset(rss_params, 0, sizeof(*rss_params));
569
570         for (i = 0; i < ECORE_RSS_IND_TABLE_SIZE; i++)
571                 rss_params->rss_ind_table[i] = qede_rxfh_indir_default(i,
572                                                         QEDE_RSS_CNT(qdev));
573
574         /* key and protocols */
575         if (rss_conf.rss_key == NULL)
576                 qede_prandom_bytes(rss_params->rss_key,
577                                    sizeof(rss_params->rss_key));
578         else
579                 memcpy(rss_params->rss_key, rss_conf.rss_key,
580                        rss_conf.rss_key_len);
581
582         rss_caps = 0;
583         rss_caps |= (hf & ETH_RSS_IPV4)              ? ECORE_RSS_IPV4 : 0;
584         rss_caps |= (hf & ETH_RSS_IPV6)              ? ECORE_RSS_IPV6 : 0;
585         rss_caps |= (hf & ETH_RSS_IPV6_EX)           ? ECORE_RSS_IPV6 : 0;
586         rss_caps |= (hf & ETH_RSS_NONFRAG_IPV4_TCP)  ? ECORE_RSS_IPV4_TCP : 0;
587         rss_caps |= (hf & ETH_RSS_NONFRAG_IPV6_TCP)  ? ECORE_RSS_IPV6_TCP : 0;
588         rss_caps |= (hf & ETH_RSS_IPV6_TCP_EX)       ? ECORE_RSS_IPV6_TCP : 0;
589
590         rss_params->rss_caps = rss_caps;
591
592         DP_INFO(edev, "RSS check passes\n");
593
594         return 0;
595 }
596
597 static int qede_start_queues(struct rte_eth_dev *eth_dev, bool clear_stats)
598 {
599         struct qede_dev *qdev = eth_dev->data->dev_private;
600         struct ecore_dev *edev = &qdev->edev;
601         struct qed_update_vport_rss_params *rss_params = &qdev->rss_params;
602         struct qed_dev_info *qed_info = &qdev->dev_info.common;
603         struct qed_update_vport_params vport_update_params;
604         struct qed_start_vport_params start = { 0 };
605         int vlan_removal_en = 1;
606         int rc, tc, i;
607
608         if (!qdev->num_rss) {
609                 DP_ERR(edev,
610                        "Cannot update V-VPORT as active as "
611                        "there are no Rx queues\n");
612                 return -EINVAL;
613         }
614
615         start.remove_inner_vlan = vlan_removal_en;
616         start.gro_enable = !qdev->gro_disable;
617         start.mtu = qdev->mtu;
618         start.vport_id = 0;
619         start.drop_ttl0 = true;
620         start.clear_stats = clear_stats;
621
622         rc = qdev->ops->vport_start(edev, &start);
623         if (rc) {
624                 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
625                 return rc;
626         }
627
628         DP_INFO(edev,
629                 "Start vport ramrod passed, vport_id = %d,"
630                 " MTU = %d, vlan_removal_en = %d\n",
631                 start.vport_id, qdev->mtu, vlan_removal_en);
632
633         for_each_rss(i) {
634                 struct qede_fastpath *fp = &qdev->fp_array[i];
635                 dma_addr_t p_phys_table;
636                 uint16_t page_cnt;
637
638                 p_phys_table = ecore_chain_get_pbl_phys(&fp->rxq->rx_comp_ring);
639                 page_cnt = ecore_chain_get_page_cnt(&fp->rxq->rx_comp_ring);
640
641                 ecore_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0);  /* @DPDK */
642
643                 rc = qdev->ops->q_rx_start(edev, i, i, 0,
644                                            fp->sb_info->igu_sb_id,
645                                            RX_PI,
646                                            fp->rxq->rx_buf_size,
647                                            fp->rxq->rx_bd_ring.p_phys_addr,
648                                            p_phys_table,
649                                            page_cnt,
650                                            &fp->rxq->hw_rxq_prod_addr);
651                 if (rc) {
652                         DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
653                         return rc;
654                 }
655
656                 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
657
658                 qede_update_rx_prod(qdev, fp->rxq);
659
660                 for (tc = 0; tc < qdev->num_tc; tc++) {
661                         struct qede_tx_queue *txq = fp->txqs[tc];
662                         int txq_index = tc * QEDE_RSS_CNT(qdev) + i;
663
664                         p_phys_table = ecore_chain_get_pbl_phys(&txq->tx_pbl);
665                         page_cnt = ecore_chain_get_page_cnt(&txq->tx_pbl);
666                         rc = qdev->ops->q_tx_start(edev, i, txq_index,
667                                                    0,
668                                                    fp->sb_info->igu_sb_id,
669                                                    TX_PI(tc),
670                                                    p_phys_table, page_cnt,
671                                                    &txq->doorbell_addr);
672                         if (rc) {
673                                 DP_ERR(edev, "Start txq %u failed %d\n",
674                                        txq_index, rc);
675                                 return rc;
676                         }
677
678                         txq->hw_cons_ptr =
679                             &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
680                         SET_FIELD(txq->tx_db.data.params,
681                                   ETH_DB_DATA_DEST, DB_DEST_XCM);
682                         SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
683                                   DB_AGG_CMD_SET);
684                         SET_FIELD(txq->tx_db.data.params,
685                                   ETH_DB_DATA_AGG_VAL_SEL,
686                                   DQ_XCM_ETH_TX_BD_PROD_CMD);
687
688                         txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
689                 }
690         }
691
692         /* Prepare and send the vport enable */
693         memset(&vport_update_params, 0, sizeof(vport_update_params));
694         vport_update_params.vport_id = start.vport_id;
695         vport_update_params.update_vport_active_flg = 1;
696         vport_update_params.vport_active_flg = 1;
697
698         /* @DPDK */
699         if (qed_info->mf_mode == MF_NPAR && qed_info->tx_switching) {
700                 /* TBD: Check SRIOV enabled for VF */
701                 vport_update_params.update_tx_switching_flg = 1;
702                 vport_update_params.tx_switching_flg = 1;
703         }
704
705         if (!qede_config_rss(eth_dev, rss_params)) {
706                 vport_update_params.update_rss_flg = 1;
707
708                 qdev->rss_enabled = 1;
709                 DP_INFO(edev, "Updating RSS flag\n");
710         } else {
711                 qdev->rss_enabled = 0;
712                 DP_INFO(edev, "Not Updating RSS flag\n");
713         }
714
715         rte_memcpy(&vport_update_params.rss_params, rss_params,
716                sizeof(*rss_params));
717
718         rc = qdev->ops->vport_update(edev, &vport_update_params);
719         if (rc) {
720                 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
721                 return rc;
722         }
723
724         return 0;
725 }
726
727 #ifdef ENC_SUPPORTED
728 static bool qede_tunn_exist(uint16_t flag)
729 {
730         return !!((PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
731                     PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT) & flag);
732 }
733
734 static inline uint8_t qede_check_tunn_csum(uint16_t flag)
735 {
736         uint8_t tcsum = 0;
737         uint16_t csum_flag = 0;
738
739         if ((PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
740              PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT) & flag)
741                 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
742                     PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
743
744         if ((PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
745              PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT) & flag) {
746                 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
747                     PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
748                 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
749         }
750
751         csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
752             PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
753             PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
754             PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
755
756         if (csum_flag & flag)
757                 return QEDE_CSUM_ERROR;
758
759         return QEDE_CSUM_UNNECESSARY | tcsum;
760 }
761 #else
762 static inline uint8_t qede_tunn_exist(uint16_t flag)
763 {
764         return 0;
765 }
766
767 static inline uint8_t qede_check_tunn_csum(uint16_t flag)
768 {
769         return 0;
770 }
771 #endif
772
773 static inline uint8_t qede_check_notunn_csum(uint16_t flag)
774 {
775         uint8_t csum = 0;
776         uint16_t csum_flag = 0;
777
778         if ((PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
779              PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT) & flag) {
780                 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
781                     PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
782                 csum = QEDE_CSUM_UNNECESSARY;
783         }
784
785         csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
786             PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
787
788         if (csum_flag & flag)
789                 return QEDE_CSUM_ERROR;
790
791         return csum;
792 }
793
794 static inline uint8_t qede_check_csum(uint16_t flag)
795 {
796         if (likely(!qede_tunn_exist(flag)))
797                 return qede_check_notunn_csum(flag);
798         else
799                 return qede_check_tunn_csum(flag);
800 }
801
802 static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
803 {
804         ecore_chain_consume(&rxq->rx_bd_ring);
805         rxq->sw_rx_cons++;
806 }
807
808 static inline void
809 qede_reuse_page(struct qede_dev *qdev,
810                 struct qede_rx_queue *rxq, struct qede_rx_entry *curr_cons)
811 {
812         struct eth_rx_bd *rx_bd_prod = ecore_chain_produce(&rxq->rx_bd_ring);
813         uint16_t idx = rxq->sw_rx_cons & NUM_RX_BDS(rxq);
814         struct qede_rx_entry *curr_prod;
815         dma_addr_t new_mapping;
816
817         curr_prod = &rxq->sw_rx_ring[idx];
818         *curr_prod = *curr_cons;
819
820         new_mapping = rte_mbuf_data_dma_addr_default(curr_prod->mbuf) +
821                       curr_prod->page_offset;
822
823         rx_bd_prod->addr.hi = rte_cpu_to_le_32(U64_HI(new_mapping));
824         rx_bd_prod->addr.lo = rte_cpu_to_le_32(U64_LO(new_mapping));
825
826         rxq->sw_rx_prod++;
827 }
828
829 static inline void
830 qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq,
831                         struct qede_dev *qdev, uint8_t count)
832 {
833         struct qede_rx_entry *curr_cons;
834
835         for (; count > 0; count--) {
836                 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS(rxq)];
837                 qede_reuse_page(qdev, rxq, curr_cons);
838                 qede_rx_bd_ring_consume(rxq);
839         }
840 }
841
842 static inline uint32_t qede_rx_cqe_to_pkt_type(uint16_t flags)
843 {
844         uint32_t p_type;
845         /* TBD - L4 indications needed ? */
846         uint16_t protocol = ((PARSING_AND_ERR_FLAGS_L3TYPE_MASK <<
847                               PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) & flags);
848
849         /* protocol = 3 means LLC/SNAP over Ethernet */
850         if (unlikely(protocol == 0 || protocol == 3))
851                 p_type = RTE_PTYPE_UNKNOWN;
852         else if (protocol == 1)
853                 p_type = RTE_PTYPE_L3_IPV4;
854         else if (protocol == 2)
855                 p_type = RTE_PTYPE_L3_IPV6;
856
857         return RTE_PTYPE_L2_ETHER | p_type;
858 }
859
860 uint16_t
861 qede_recv_pkts(void *p_rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
862 {
863         struct qede_rx_queue *rxq = p_rxq;
864         struct qede_dev *qdev = rxq->qdev;
865         struct ecore_dev *edev = &qdev->edev;
866         struct qede_fastpath *fp = &qdev->fp_array[rxq->queue_id];
867         uint16_t hw_comp_cons, sw_comp_cons, sw_rx_index;
868         uint16_t rx_pkt = 0;
869         union eth_rx_cqe *cqe;
870         struct eth_fast_path_rx_reg_cqe *fp_cqe;
871         register struct rte_mbuf *rx_mb = NULL;
872         enum eth_rx_cqe_type cqe_type;
873         uint16_t len, pad;
874         uint16_t preload_idx;
875         uint8_t csum_flag;
876         uint16_t parse_flag;
877         enum rss_hash_type htype;
878
879         hw_comp_cons = rte_le_to_cpu_16(*rxq->hw_cons_ptr);
880         sw_comp_cons = ecore_chain_get_cons_idx(&rxq->rx_comp_ring);
881
882         rte_rmb();
883
884         if (hw_comp_cons == sw_comp_cons)
885                 return 0;
886
887         while (sw_comp_cons != hw_comp_cons) {
888                 /* Get the CQE from the completion ring */
889                 cqe =
890                     (union eth_rx_cqe *)ecore_chain_consume(&rxq->rx_comp_ring);
891                 cqe_type = cqe->fast_path_regular.type;
892
893                 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
894                         PMD_RX_LOG(DEBUG, rxq, "Got a slowath CQE\n");
895
896                         qdev->ops->eth_cqe_completion(edev, fp->rss_id,
897                                 (struct eth_slow_path_rx_cqe *)cqe);
898                         goto next_cqe;
899                 }
900
901                 /* Get the data from the SW ring */
902                 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS(rxq);
903                 rx_mb = rxq->sw_rx_ring[sw_rx_index].mbuf;
904                 assert(rx_mb != NULL);
905
906                 /* non GRO */
907                 fp_cqe = &cqe->fast_path_regular;
908
909                 len = rte_le_to_cpu_16(fp_cqe->len_on_first_bd);
910                 pad = fp_cqe->placement_offset;
911                 assert((len + pad) <= rx_mb->buf_len);
912
913                 PMD_RX_LOG(DEBUG, rxq,
914                            "CQE type = 0x%x, flags = 0x%x, vlan = 0x%x"
915                            " len = %u, parsing_flags = %d\n",
916                            cqe_type, fp_cqe->bitfields,
917                            rte_le_to_cpu_16(fp_cqe->vlan_tag),
918                            len, rte_le_to_cpu_16(fp_cqe->pars_flags.flags));
919
920                 /* If this is an error packet then drop it */
921                 parse_flag =
922                     rte_le_to_cpu_16(cqe->fast_path_regular.pars_flags.flags);
923                 csum_flag = qede_check_csum(parse_flag);
924                 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
925                         PMD_RX_LOG(ERR, rxq,
926                                    "CQE in CONS = %u has error, flags = 0x%x "
927                                    "dropping incoming packet\n",
928                                    sw_comp_cons, parse_flag);
929                         rxq->rx_hw_errors++;
930                         qede_recycle_rx_bd_ring(rxq, qdev, fp_cqe->bd_num);
931                         goto next_cqe;
932                 }
933
934                 if (unlikely(qede_alloc_rx_buffer(rxq) != 0)) {
935                         PMD_RX_LOG(ERR, rxq,
936                                    "New buffer allocation failed,"
937                                    "dropping incoming packet\n");
938                         qede_recycle_rx_bd_ring(rxq, qdev, fp_cqe->bd_num);
939                         rte_eth_devices[rxq->port_id].
940                             data->rx_mbuf_alloc_failed++;
941                         rxq->rx_alloc_errors++;
942                         break;
943                 }
944
945                 qede_rx_bd_ring_consume(rxq);
946
947                 /* Prefetch next mbuf while processing current one. */
948                 preload_idx = rxq->sw_rx_cons & NUM_RX_BDS(rxq);
949                 rte_prefetch0(rxq->sw_rx_ring[preload_idx].mbuf);
950
951                 if (fp_cqe->bd_num != 1)
952                         PMD_RX_LOG(DEBUG, rxq,
953                                    "Jumbo-over-BD packet not supported\n");
954
955                 /* Update MBUF fields */
956                 rx_mb->ol_flags = 0;
957                 rx_mb->data_off = pad + RTE_PKTMBUF_HEADROOM;
958                 rx_mb->nb_segs = 1;
959                 rx_mb->data_len = len;
960                 rx_mb->pkt_len = len;
961                 rx_mb->port = rxq->port_id;
962                 rx_mb->packet_type = qede_rx_cqe_to_pkt_type(parse_flag);
963
964                 htype = (uint8_t)GET_FIELD(fp_cqe->bitfields,
965                                 ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
966                 if (qdev->rss_enabled && htype) {
967                         rx_mb->ol_flags |= PKT_RX_RSS_HASH;
968                         rx_mb->hash.rss = rte_le_to_cpu_32(fp_cqe->rss_hash);
969                         PMD_RX_LOG(DEBUG, rxq, "Hash result 0x%x\n",
970                                    rx_mb->hash.rss);
971                 }
972
973                 rte_prefetch1(rte_pktmbuf_mtod(rx_mb, void *));
974
975                 if (CQE_HAS_VLAN(parse_flag)) {
976                         rx_mb->vlan_tci = rte_le_to_cpu_16(fp_cqe->vlan_tag);
977                         rx_mb->ol_flags |= PKT_RX_VLAN_PKT;
978                 }
979
980                 if (CQE_HAS_OUTER_VLAN(parse_flag)) {
981                         /* FW does not provide indication of Outer VLAN tag,
982                          * which is always stripped, so vlan_tci_outer is set
983                          * to 0. Here vlan_tag represents inner VLAN tag.
984                          */
985                         rx_mb->vlan_tci = rte_le_to_cpu_16(fp_cqe->vlan_tag);
986                         rx_mb->ol_flags |= PKT_RX_QINQ_PKT;
987                 }
988
989                 rx_pkts[rx_pkt] = rx_mb;
990                 rx_pkt++;
991 next_cqe:
992                 ecore_chain_recycle_consumed(&rxq->rx_comp_ring);
993                 sw_comp_cons = ecore_chain_get_cons_idx(&rxq->rx_comp_ring);
994                 if (rx_pkt == nb_pkts) {
995                         PMD_RX_LOG(DEBUG, rxq,
996                                    "Budget reached nb_pkts=%u received=%u\n",
997                                    rx_pkt, nb_pkts);
998                         break;
999                 }
1000         }
1001
1002         qede_update_rx_prod(qdev, rxq);
1003
1004         PMD_RX_LOG(DEBUG, rxq, "rx_pkts=%u core=%d\n", rx_pkt, rte_lcore_id());
1005
1006         return rx_pkt;
1007 }
1008
1009 static inline int
1010 qede_free_tx_pkt(struct ecore_dev *edev, struct qede_tx_queue *txq)
1011 {
1012         uint16_t idx = TX_CONS(txq);
1013         struct eth_tx_bd *tx_data_bd;
1014         struct rte_mbuf *mbuf = txq->sw_tx_ring[idx].mbuf;
1015
1016         if (unlikely(!mbuf)) {
1017                 PMD_TX_LOG(ERR, txq,
1018                            "null mbuf nb_tx_desc %u nb_tx_avail %u "
1019                            "sw_tx_cons %u sw_tx_prod %u\n",
1020                            txq->nb_tx_desc, txq->nb_tx_avail, idx,
1021                            TX_PROD(txq));
1022                 return -1;
1023         }
1024
1025         /* Free now */
1026         rte_pktmbuf_free_seg(mbuf);
1027         txq->sw_tx_ring[idx].mbuf = NULL;
1028         ecore_chain_consume(&txq->tx_pbl);
1029         txq->nb_tx_avail++;
1030
1031         return 0;
1032 }
1033
1034 static inline uint16_t
1035 qede_process_tx_compl(struct ecore_dev *edev, struct qede_tx_queue *txq)
1036 {
1037         uint16_t tx_compl = 0;
1038         uint16_t hw_bd_cons;
1039         int rc;
1040
1041         hw_bd_cons = rte_le_to_cpu_16(*txq->hw_cons_ptr);
1042         rte_compiler_barrier();
1043
1044         while (hw_bd_cons != ecore_chain_get_cons_idx(&txq->tx_pbl)) {
1045                 rc = qede_free_tx_pkt(edev, txq);
1046                 if (rc) {
1047                         DP_NOTICE(edev, false,
1048                                   "hw_bd_cons = %d, chain_cons=%d\n",
1049                                   hw_bd_cons,
1050                                   ecore_chain_get_cons_idx(&txq->tx_pbl));
1051                         break;
1052                 }
1053                 txq->sw_tx_cons++;      /* Making TXD available */
1054                 tx_compl++;
1055         }
1056
1057         PMD_TX_LOG(DEBUG, txq, "Tx compl %u sw_tx_cons %u avail %u\n",
1058                    tx_compl, txq->sw_tx_cons, txq->nb_tx_avail);
1059         return tx_compl;
1060 }
1061
1062 uint16_t
1063 qede_xmit_pkts(void *p_txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
1064 {
1065         struct qede_tx_queue *txq = p_txq;
1066         struct qede_dev *qdev = txq->qdev;
1067         struct ecore_dev *edev = &qdev->edev;
1068         struct qede_fastpath *fp = &qdev->fp_array[txq->queue_id];
1069         struct eth_tx_1st_bd *first_bd;
1070         uint16_t nb_tx_pkts;
1071         uint16_t nb_pkt_sent = 0;
1072         uint16_t bd_prod;
1073         uint16_t idx;
1074         uint16_t tx_count;
1075
1076         if (unlikely(txq->nb_tx_avail < txq->tx_free_thresh)) {
1077                 PMD_TX_LOG(DEBUG, txq, "send=%u avail=%u free_thresh=%u\n",
1078                            nb_pkts, txq->nb_tx_avail, txq->tx_free_thresh);
1079                 (void)qede_process_tx_compl(edev, txq);
1080         }
1081
1082         nb_tx_pkts = RTE_MIN(nb_pkts, (txq->nb_tx_avail / MAX_NUM_TX_BDS));
1083         if (unlikely(nb_tx_pkts == 0)) {
1084                 PMD_TX_LOG(DEBUG, txq, "Out of BDs nb_pkts=%u avail=%u\n",
1085                            nb_pkts, txq->nb_tx_avail);
1086                 return 0;
1087         }
1088
1089         tx_count = nb_tx_pkts;
1090         while (nb_tx_pkts--) {
1091                 /* Fill the entry in the SW ring and the BDs in the FW ring */
1092                 idx = TX_PROD(txq);
1093                 struct rte_mbuf *mbuf = *tx_pkts++;
1094                 txq->sw_tx_ring[idx].mbuf = mbuf;
1095                 first_bd = (struct eth_tx_1st_bd *)
1096                     ecore_chain_produce(&txq->tx_pbl);
1097                 first_bd->data.bd_flags.bitfields =
1098                     1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
1099                 /* Map MBUF linear data for DMA and set in the first BD */
1100                 QEDE_BD_SET_ADDR_LEN(first_bd, rte_mbuf_data_dma_addr(mbuf),
1101                                      mbuf->data_len);
1102
1103                 /* Descriptor based VLAN insertion */
1104                 if (mbuf->ol_flags & (PKT_TX_VLAN_PKT | PKT_TX_QINQ_PKT)) {
1105                         first_bd->data.vlan = rte_cpu_to_le_16(mbuf->vlan_tci);
1106                         first_bd->data.bd_flags.bitfields |=
1107                             1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
1108                 }
1109
1110                 /* Offload the IP checksum in the hardware */
1111                 if (mbuf->ol_flags & PKT_TX_IP_CKSUM) {
1112                         first_bd->data.bd_flags.bitfields |=
1113                             1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
1114                 }
1115
1116                 /* L4 checksum offload (tcp or udp) */
1117                 if (mbuf->ol_flags & (PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM)) {
1118                         first_bd->data.bd_flags.bitfields |=
1119                             1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
1120                         /* IPv6 + extn. -> later */
1121                 }
1122                 first_bd->data.nbds = MAX_NUM_TX_BDS;
1123                 txq->sw_tx_prod++;
1124                 rte_prefetch0(txq->sw_tx_ring[TX_PROD(txq)].mbuf);
1125                 txq->nb_tx_avail--;
1126                 bd_prod =
1127                     rte_cpu_to_le_16(ecore_chain_get_prod_idx(&txq->tx_pbl));
1128                 nb_pkt_sent++;
1129         }
1130
1131         /* Write value of prod idx into bd_prod */
1132         txq->tx_db.data.bd_prod = bd_prod;
1133         rte_wmb();
1134         rte_compiler_barrier();
1135         DIRECT_REG_WR(edev, txq->doorbell_addr, txq->tx_db.raw);
1136         rte_wmb();
1137
1138         /* Check again for Tx completions */
1139         (void)qede_process_tx_compl(edev, txq);
1140
1141         PMD_TX_LOG(DEBUG, txq, "to_send=%u can_send=%u sent=%u core=%d\n",
1142                    nb_pkts, tx_count, nb_pkt_sent, rte_lcore_id());
1143
1144         return nb_pkt_sent;
1145 }
1146
1147 int qede_dev_start(struct rte_eth_dev *eth_dev)
1148 {
1149         struct qede_dev *qdev = eth_dev->data->dev_private;
1150         struct ecore_dev *edev = &qdev->edev;
1151         struct qed_link_output link_output;
1152         int rc;
1153
1154         DP_INFO(edev, "port %u\n", eth_dev->data->port_id);
1155
1156         if (qdev->state == QEDE_START) {
1157                 DP_INFO(edev, "device already started\n");
1158                 return 0;
1159         }
1160
1161         if (qdev->state == QEDE_CLOSE) {
1162                 rc = qede_alloc_fp_array(qdev);
1163                 qede_init_fp(qdev);
1164                 rc = qede_alloc_mem_load(qdev);
1165                 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
1166                         QEDE_RSS_CNT(qdev), qdev->num_tc);
1167         } else if (qdev->state == QEDE_STOP) {
1168                 DP_INFO(edev, "restarting port %u\n", eth_dev->data->port_id);
1169         } else {
1170                 DP_INFO(edev, "unknown state port %u\n",
1171                         eth_dev->data->port_id);
1172                 return -EINVAL;
1173         }
1174
1175         rc = qede_start_queues(eth_dev, true);
1176
1177         if (rc) {
1178                 DP_ERR(edev, "Failed to start queues\n");
1179                 /* TBD: free */
1180                 return rc;
1181         }
1182
1183         DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
1184
1185         qede_dev_set_link_state(eth_dev, true);
1186
1187         /* Query whether link is already-up */
1188         memset(&link_output, 0, sizeof(link_output));
1189         qdev->ops->common->get_link(edev, &link_output);
1190         DP_NOTICE(edev, false, "link status: %s\n",
1191                   link_output.link_up ? "up" : "down");
1192
1193         qdev->state = QEDE_START;
1194
1195         qede_config_rx_mode(eth_dev);
1196
1197         DP_INFO(edev, "dev_state is QEDE_START\n");
1198
1199         return 0;
1200 }
1201
1202 static int qede_drain_txq(struct qede_dev *qdev,
1203                           struct qede_tx_queue *txq, bool allow_drain)
1204 {
1205         struct ecore_dev *edev = &qdev->edev;
1206         int rc, cnt = 1000;
1207
1208         while (txq->sw_tx_cons != txq->sw_tx_prod) {
1209                 qede_process_tx_compl(edev, txq);
1210                 if (!cnt) {
1211                         if (allow_drain) {
1212                                 DP_NOTICE(edev, false,
1213                                           "Tx queue[%u] is stuck,"
1214                                           "requesting MCP to drain\n",
1215                                           txq->queue_id);
1216                                 rc = qdev->ops->common->drain(edev);
1217                                 if (rc)
1218                                         return rc;
1219                                 return qede_drain_txq(qdev, txq, false);
1220                         }
1221
1222                         DP_NOTICE(edev, false,
1223                                   "Timeout waiting for tx queue[%d]:"
1224                                   "PROD=%d, CONS=%d\n",
1225                                   txq->queue_id, txq->sw_tx_prod,
1226                                   txq->sw_tx_cons);
1227                         return -ENODEV;
1228                 }
1229                 cnt--;
1230                 DELAY(1000);
1231                 rte_compiler_barrier();
1232         }
1233
1234         /* FW finished processing, wait for HW to transmit all tx packets */
1235         DELAY(2000);
1236
1237         return 0;
1238 }
1239
1240 static int qede_stop_queues(struct qede_dev *qdev)
1241 {
1242         struct qed_update_vport_params vport_update_params;
1243         struct ecore_dev *edev = &qdev->edev;
1244         int rc, tc, i;
1245
1246         /* Disable the vport */
1247         memset(&vport_update_params, 0, sizeof(vport_update_params));
1248         vport_update_params.vport_id = 0;
1249         vport_update_params.update_vport_active_flg = 1;
1250         vport_update_params.vport_active_flg = 0;
1251         vport_update_params.update_rss_flg = 0;
1252
1253         DP_INFO(edev, "vport_update\n");
1254
1255         rc = qdev->ops->vport_update(edev, &vport_update_params);
1256         if (rc) {
1257                 DP_ERR(edev, "Failed to update vport\n");
1258                 return rc;
1259         }
1260
1261         DP_INFO(edev, "Flushing tx queues\n");
1262
1263         /* Flush Tx queues. If needed, request drain from MCP */
1264         for_each_rss(i) {
1265                 struct qede_fastpath *fp = &qdev->fp_array[i];
1266                 for (tc = 0; tc < qdev->num_tc; tc++) {
1267                         struct qede_tx_queue *txq = fp->txqs[tc];
1268                         rc = qede_drain_txq(qdev, txq, true);
1269                         if (rc)
1270                                 return rc;
1271                 }
1272         }
1273
1274         /* Stop all Queues in reverse order */
1275         for (i = QEDE_RSS_CNT(qdev) - 1; i >= 0; i--) {
1276                 struct qed_stop_rxq_params rx_params;
1277
1278                 /* Stop the Tx Queue(s) */
1279                 for (tc = 0; tc < qdev->num_tc; tc++) {
1280                         struct qed_stop_txq_params tx_params;
1281
1282                         tx_params.rss_id = i;
1283                         tx_params.tx_queue_id = tc * QEDE_RSS_CNT(qdev) + i;
1284
1285                         DP_INFO(edev, "Stopping tx queues\n");
1286                         rc = qdev->ops->q_tx_stop(edev, &tx_params);
1287                         if (rc) {
1288                                 DP_ERR(edev, "Failed to stop TXQ #%d\n",
1289                                        tx_params.tx_queue_id);
1290                                 return rc;
1291                         }
1292                 }
1293
1294                 /* Stop the Rx Queue */
1295                 memset(&rx_params, 0, sizeof(rx_params));
1296                 rx_params.rss_id = i;
1297                 rx_params.rx_queue_id = i;
1298                 rx_params.eq_completion_only = 1;
1299
1300                 DP_INFO(edev, "Stopping rx queues\n");
1301
1302                 rc = qdev->ops->q_rx_stop(edev, &rx_params);
1303                 if (rc) {
1304                         DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
1305                         return rc;
1306                 }
1307         }
1308
1309         DP_INFO(edev, "Stopping vports\n");
1310
1311         /* Stop the vport */
1312         rc = qdev->ops->vport_stop(edev, 0);
1313         if (rc)
1314                 DP_ERR(edev, "Failed to stop VPORT\n");
1315
1316         return rc;
1317 }
1318
1319 void qede_reset_fp_rings(struct qede_dev *qdev)
1320 {
1321         uint16_t rss_id;
1322         uint8_t tc;
1323
1324         for_each_rss(rss_id) {
1325                 DP_INFO(&qdev->edev, "reset fp chain for rss %u\n", rss_id);
1326                 struct qede_fastpath *fp = &qdev->fp_array[rss_id];
1327                 ecore_chain_reset(&fp->rxq->rx_bd_ring);
1328                 ecore_chain_reset(&fp->rxq->rx_comp_ring);
1329                 for (tc = 0; tc < qdev->num_tc; tc++) {
1330                         struct qede_tx_queue *txq = fp->txqs[tc];
1331                         ecore_chain_reset(&txq->tx_pbl);
1332                 }
1333         }
1334 }
1335
1336 /* This function frees all memory of a single fp */
1337 static void qede_free_mem_fp(struct qede_dev *qdev, struct qede_fastpath *fp)
1338 {
1339         uint8_t tc;
1340
1341         qede_rx_queue_release(fp->rxq);
1342         for (tc = 0; tc < qdev->num_tc; tc++)
1343                 qede_tx_queue_release(fp->txqs[tc]);
1344 }
1345
1346 void qede_free_mem_load(struct qede_dev *qdev)
1347 {
1348         uint8_t rss_id;
1349
1350         for_each_rss(rss_id) {
1351                 struct qede_fastpath *fp = &qdev->fp_array[rss_id];
1352                 qede_free_mem_fp(qdev, fp);
1353         }
1354         /* qdev->num_rss = 0; */
1355 }
1356
1357 /*
1358  * Stop an Ethernet device. The device can be restarted with a call to
1359  * rte_eth_dev_start().
1360  * Do not change link state and do not release sw structures.
1361  */
1362 void qede_dev_stop(struct rte_eth_dev *eth_dev)
1363 {
1364         struct qede_dev *qdev = eth_dev->data->dev_private;
1365         struct ecore_dev *edev = &qdev->edev;
1366         int rc;
1367
1368         DP_INFO(edev, "port %u\n", eth_dev->data->port_id);
1369
1370         if (qdev->state != QEDE_START) {
1371                 DP_INFO(edev, "device not yet started\n");
1372                 return;
1373         }
1374
1375         rc = qede_stop_queues(qdev);
1376
1377         if (rc)
1378                 DP_ERR(edev, "Didn't succeed to close queues\n");
1379
1380         DP_INFO(edev, "Stopped queues\n");
1381
1382         qdev->ops->fastpath_stop(edev);
1383
1384         qede_reset_fp_rings(qdev);
1385
1386         qdev->state = QEDE_STOP;
1387
1388         DP_INFO(edev, "dev_state is QEDE_STOP\n");
1389 }