drivers/net/qede/qede_rxtx.c

   1 /*
   2  * Copyright (c) 2016 QLogic Corporation.
   3  * All rights reserved.
   4  * www.qlogic.com
   5  *
   6  * See LICENSE.qede_pmd for copyright and licensing details.
   7  */
   8
   9 #include "qede_rxtx.h"
  10
  11 static bool gro_disable = 1;    /* mod_param */
  12
  13 static inline struct
  14 rte_mbuf *qede_rxmbuf_alloc(struct rte_mempool *mp)
  15 {
  16         struct rte_mbuf *m;
  17
  18         m = __rte_mbuf_raw_alloc(mp);
  19         __rte_mbuf_sanity_check(m, 0);
  20
  21         return m;
  22 }
  23
  24 static inline int qede_alloc_rx_buffer(struct qede_rx_queue *rxq)
  25 {
  26         struct rte_mbuf *new_mb = NULL;
  27         struct eth_rx_bd *rx_bd;
  28         dma_addr_t mapping;
  29         uint16_t idx = rxq->sw_rx_prod & NUM_RX_BDS(rxq);
  30
  31         new_mb = qede_rxmbuf_alloc(rxq->mb_pool);
  32         if (unlikely(!new_mb)) {
  33                 PMD_RX_LOG(ERR, rxq,
  34                            "Failed to allocate rx buffer "
  35                            "sw_rx_prod %u sw_rx_cons %u mp entries %u free %u",
  36                            idx, rxq->sw_rx_cons & NUM_RX_BDS(rxq),
  37                            rte_mempool_count(rxq->mb_pool),
  38                            rte_mempool_free_count(rxq->mb_pool));
  39                 return -ENOMEM;
  40         }
  41         rxq->sw_rx_ring[idx].mbuf = new_mb;
  42         rxq->sw_rx_ring[idx].page_offset = 0;
  43         mapping = rte_mbuf_data_dma_addr_default(new_mb);
  44         /* Advance PROD and get BD pointer */
  45         rx_bd = (struct eth_rx_bd *)ecore_chain_produce(&rxq->rx_bd_ring);
  46         rx_bd->addr.hi = rte_cpu_to_le_32(U64_HI(mapping));
  47         rx_bd->addr.lo = rte_cpu_to_le_32(U64_LO(mapping));
  48         rxq->sw_rx_prod++;
  49         return 0;
  50 }
  51
  52 static void qede_rx_queue_release_mbufs(struct qede_rx_queue *rxq)
  53 {
  54         uint16_t i;
  55
  56         if (rxq->sw_rx_ring != NULL) {
  57                 for (i = 0; i < rxq->nb_rx_desc; i++) {
  58                         if (rxq->sw_rx_ring[i].mbuf != NULL) {
  59                                 rte_pktmbuf_free(rxq->sw_rx_ring[i].mbuf);
  60                                 rxq->sw_rx_ring[i].mbuf = NULL;
  61                         }
  62                 }
  63         }
  64 }
  65
  66 void qede_rx_queue_release(void *rx_queue)
  67 {
  68         struct qede_rx_queue *rxq = rx_queue;
  69
  70         if (rxq != NULL) {
  71                 qede_rx_queue_release_mbufs(rxq);
  72                 rte_free(rxq->sw_rx_ring);
  73                 rxq->sw_rx_ring = NULL;
  74                 rte_free(rxq);
  75                 rx_queue = NULL;
  76         }
  77 }
  78
  79 int
  80 qede_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
  81                     uint16_t nb_desc, unsigned int socket_id,
  82                     const struct rte_eth_rxconf *rx_conf,
  83                     struct rte_mempool *mp)
  84 {
  85         struct qede_dev *qdev = dev->data->dev_private;
  86         struct ecore_dev *edev = &qdev->edev;
  87         struct rte_eth_dev_data *eth_data = dev->data;
  88         struct qede_rx_queue *rxq;
  89         uint16_t pkt_len = (uint16_t)dev->data->dev_conf.rxmode.max_rx_pkt_len;
  90         size_t size;
  91         uint16_t data_size;
  92         int rc;
  93         int i;
  94
  95         PMD_INIT_FUNC_TRACE(edev);
  96
  97         /* Note: Ring size/align is controlled by struct rte_eth_desc_lim */
  98         if (!rte_is_power_of_2(nb_desc)) {
  99                 DP_ERR(edev, "Ring size %u is not power of 2\n",
 100                           nb_desc);
 101                 return -EINVAL;
 102         }
 103
 104         /* Free memory prior to re-allocation if needed... */
 105         if (dev->data->rx_queues[queue_idx] != NULL) {
 106                 qede_rx_queue_release(dev->data->rx_queues[queue_idx]);
 107                 dev->data->rx_queues[queue_idx] = NULL;
 108         }
 109
 110         /* First allocate the rx queue data structure */
 111         rxq = rte_zmalloc_socket("qede_rx_queue", sizeof(struct qede_rx_queue),
 112                                  RTE_CACHE_LINE_SIZE, socket_id);
 113
 114         if (!rxq) {
 115                 DP_ERR(edev, "Unable to allocate memory for rxq on socket %u",
 116                           socket_id);
 117                 return -ENOMEM;
 118         }
 119
 120         rxq->qdev = qdev;
 121         rxq->mb_pool = mp;
 122         rxq->nb_rx_desc = nb_desc;
 123         rxq->queue_id = queue_idx;
 124         rxq->port_id = dev->data->port_id;
 125
 126         /* Sanity check */
 127         data_size = (uint16_t)rte_pktmbuf_data_room_size(mp) -
 128                                 RTE_PKTMBUF_HEADROOM;
 129
 130         if (pkt_len > data_size) {
 131                 DP_ERR(edev, "MTU %u should not exceed dataroom %u\n",
 132                        pkt_len, data_size);
 133                 rte_free(rxq);
 134                 return -EINVAL;
 135         }
 136
 137         qdev->mtu = pkt_len;
 138         rxq->rx_buf_size = pkt_len + QEDE_ETH_OVERHEAD;
 139
 140         DP_INFO(edev, "MTU = %u ; RX buffer = %u\n",
 141                 qdev->mtu, rxq->rx_buf_size);
 142
 143         if (pkt_len > ETHER_MAX_LEN) {
 144                 dev->data->dev_conf.rxmode.jumbo_frame = 1;
 145                 DP_NOTICE(edev, false, "jumbo frame enabled\n");
 146         } else {
 147                 dev->data->dev_conf.rxmode.jumbo_frame = 0;
 148         }
 149
 150         /* Allocate the parallel driver ring for Rx buffers */
 151         size = sizeof(*rxq->sw_rx_ring) * rxq->nb_rx_desc;
 152         rxq->sw_rx_ring = rte_zmalloc_socket("sw_rx_ring", size,
 153                                              RTE_CACHE_LINE_SIZE, socket_id);
 154         if (!rxq->sw_rx_ring) {
 155                 DP_NOTICE(edev, false,
 156                           "Unable to alloc memory for sw_rx_ring on socket %u\n",
 157                           socket_id);
 158                 rte_free(rxq);
 159                 rxq = NULL;
 160                 return -ENOMEM;
 161         }
 162
 163         /* Allocate FW Rx ring  */
 164         rc = qdev->ops->common->chain_alloc(edev,
 165                                             ECORE_CHAIN_USE_TO_CONSUME_PRODUCE,
 166                                             ECORE_CHAIN_MODE_NEXT_PTR,
 167                                             ECORE_CHAIN_CNT_TYPE_U16,
 168                                             rxq->nb_rx_desc,
 169                                             sizeof(struct eth_rx_bd),
 170                                             &rxq->rx_bd_ring);
 171
 172         if (rc != ECORE_SUCCESS) {
 173                 DP_NOTICE(edev, false,
 174                           "Unable to alloc memory for rxbd ring on socket %u\n",
 175                           socket_id);
 176                 rte_free(rxq->sw_rx_ring);
 177                 rxq->sw_rx_ring = NULL;
 178                 rte_free(rxq);
 179                 rxq = NULL;
 180         }
 181
 182         /* Allocate FW completion ring */
 183         rc = qdev->ops->common->chain_alloc(edev,
 184                                             ECORE_CHAIN_USE_TO_CONSUME,
 185                                             ECORE_CHAIN_MODE_PBL,
 186                                             ECORE_CHAIN_CNT_TYPE_U16,
 187                                             rxq->nb_rx_desc,
 188                                             sizeof(union eth_rx_cqe),
 189                                             &rxq->rx_comp_ring);
 190
 191         if (rc != ECORE_SUCCESS) {
 192                 DP_NOTICE(edev, false,
 193                           "Unable to alloc memory for cqe ring on socket %u\n",
 194                           socket_id);
 195                 /* TBD: Freeing RX BD ring */
 196                 rte_free(rxq->sw_rx_ring);
 197                 rxq->sw_rx_ring = NULL;
 198                 rte_free(rxq);
 199         }
 200
 201         /* Allocate buffers for the Rx ring */
 202         for (i = 0; i < rxq->nb_rx_desc; i++) {
 203                 rc = qede_alloc_rx_buffer(rxq);
 204                 if (rc) {
 205                         DP_NOTICE(edev, false,
 206                                   "RX buffer allocation failed at idx=%d\n", i);
 207                         goto err4;
 208                 }
 209         }
 210
 211         dev->data->rx_queues[queue_idx] = rxq;
 212         if (!qdev->rx_queues)
 213                 qdev->rx_queues = (struct qede_rx_queue **)dev->data->rx_queues;
 214
 215         DP_INFO(edev, "rxq %d num_desc %u rx_buf_size=%u socket %u\n",
 216                   queue_idx, nb_desc, qdev->mtu, socket_id);
 217
 218         return 0;
 219 err4:
 220         qede_rx_queue_release(rxq);
 221         return -ENOMEM;
 222 }
 223
 224 static void qede_tx_queue_release_mbufs(struct qede_tx_queue *txq)
 225 {
 226         unsigned int i;
 227
 228         PMD_TX_LOG(DEBUG, txq, "releasing %u mbufs\n", txq->nb_tx_desc);
 229
 230         if (txq->sw_tx_ring != NULL) {
 231                 for (i = 0; i < txq->nb_tx_desc; i++) {
 232                         if (txq->sw_tx_ring[i].mbuf != NULL) {
 233                                 rte_pktmbuf_free(txq->sw_tx_ring[i].mbuf);
 234                                 txq->sw_tx_ring[i].mbuf = NULL;
 235                         }
 236                 }
 237         }
 238 }
 239
 240 void qede_tx_queue_release(void *tx_queue)
 241 {
 242         struct qede_tx_queue *txq = tx_queue;
 243
 244         if (txq != NULL) {
 245                 qede_tx_queue_release_mbufs(txq);
 246                 if (txq->sw_tx_ring) {
 247                         rte_free(txq->sw_tx_ring);
 248                         txq->sw_tx_ring = NULL;
 249                 }
 250                 rte_free(txq);
 251         }
 252         tx_queue = NULL;
 253 }
 254
 255 int
 256 qede_tx_queue_setup(struct rte_eth_dev *dev,
 257                     uint16_t queue_idx,
 258                     uint16_t nb_desc,
 259                     unsigned int socket_id,
 260                     const struct rte_eth_txconf *tx_conf)
 261 {
 262         struct qede_dev *qdev = dev->data->dev_private;
 263         struct ecore_dev *edev = &qdev->edev;
 264         struct qede_tx_queue *txq;
 265         int rc;
 266
 267         PMD_INIT_FUNC_TRACE(edev);
 268
 269         if (!rte_is_power_of_2(nb_desc)) {
 270                 DP_ERR(edev, "Ring size %u is not power of 2\n",
 271                        nb_desc);
 272                 return -EINVAL;
 273         }
 274
 275         /* Free memory prior to re-allocation if needed... */
 276         if (dev->data->tx_queues[queue_idx] != NULL) {
 277                 qede_tx_queue_release(dev->data->tx_queues[queue_idx]);
 278                 dev->data->tx_queues[queue_idx] = NULL;
 279         }
 280
 281         txq = rte_zmalloc_socket("qede_tx_queue", sizeof(struct qede_tx_queue),
 282                                  RTE_CACHE_LINE_SIZE, socket_id);
 283
 284         if (txq == NULL) {
 285                 DP_ERR(edev,
 286                        "Unable to allocate memory for txq on socket %u",
 287                        socket_id);
 288                 return -ENOMEM;
 289         }
 290
 291         txq->nb_tx_desc = nb_desc;
 292         txq->qdev = qdev;
 293         txq->port_id = dev->data->port_id;
 294
 295         rc = qdev->ops->common->chain_alloc(edev,
 296                                             ECORE_CHAIN_USE_TO_CONSUME_PRODUCE,
 297                                             ECORE_CHAIN_MODE_PBL,
 298                                             ECORE_CHAIN_CNT_TYPE_U16,
 299                                             txq->nb_tx_desc,
 300                                             sizeof(union eth_tx_bd_types),
 301                                             &txq->tx_pbl);
 302         if (rc != ECORE_SUCCESS) {
 303                 DP_ERR(edev,
 304                        "Unable to allocate memory for txbd ring on socket %u",
 305                        socket_id);
 306                 qede_tx_queue_release(txq);
 307                 return -ENOMEM;
 308         }
 309
 310         /* Allocate software ring */
 311         txq->sw_tx_ring = rte_zmalloc_socket("txq->sw_tx_ring",
 312                                              (sizeof(struct qede_tx_entry) *
 313                                               txq->nb_tx_desc),
 314                                              RTE_CACHE_LINE_SIZE, socket_id);
 315
 316         if (!txq->sw_tx_ring) {
 317                 DP_ERR(edev,
 318                        "Unable to allocate memory for txbd ring on socket %u",
 319                        socket_id);
 320                 qede_tx_queue_release(txq);
 321                 return -ENOMEM;
 322         }
 323
 324         txq->queue_id = queue_idx;
 325
 326         txq->nb_tx_avail = txq->nb_tx_desc;
 327
 328         txq->tx_free_thresh =
 329             tx_conf->tx_free_thresh ? tx_conf->tx_free_thresh :
 330             (txq->nb_tx_desc - QEDE_DEFAULT_TX_FREE_THRESH);
 331
 332         dev->data->tx_queues[queue_idx] = txq;
 333         if (!qdev->tx_queues)
 334                 qdev->tx_queues = (struct qede_tx_queue **)dev->data->tx_queues;
 335
 336         txq->txq_counter = 0;
 337
 338         DP_INFO(edev,
 339                   "txq %u num_desc %u tx_free_thresh %u socket %u\n",
 340                   queue_idx, nb_desc, txq->tx_free_thresh, socket_id);
 341
 342         return 0;
 343 }
 344
 345 /* This function inits fp content and resets the SB, RXQ and TXQ arrays */
 346 static void qede_init_fp(struct qede_dev *qdev)
 347 {
 348         struct qede_fastpath *fp;
 349         int rss_id, txq_index, tc;
 350
 351         memset((void *)qdev->fp_array, 0, (QEDE_RSS_CNT(qdev) *
 352                                            sizeof(*qdev->fp_array)));
 353         memset((void *)qdev->sb_array, 0, (QEDE_RSS_CNT(qdev) *
 354                                            sizeof(*qdev->sb_array)));
 355         for_each_rss(rss_id) {
 356                 fp = &qdev->fp_array[rss_id];
 357
 358                 fp->qdev = qdev;
 359                 fp->rss_id = rss_id;
 360
 361                 /* Point rxq to generic rte queues that was created
 362                  * as part of queue creation.
 363                  */
 364                 fp->rxq = qdev->rx_queues[rss_id];
 365                 fp->sb_info = &qdev->sb_array[rss_id];
 366
 367                 for (tc = 0; tc < qdev->num_tc; tc++) {
 368                         txq_index = tc * QEDE_RSS_CNT(qdev) + rss_id;
 369                         fp->txqs[tc] = qdev->tx_queues[txq_index];
 370                         fp->txqs[tc]->queue_id = txq_index;
 371                         /* Updating it to main structure */
 372                         snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
 373                                  "qdev", rss_id);
 374                 }
 375         }
 376
 377         qdev->gro_disable = gro_disable;
 378 }
 379
 380 void qede_free_fp_arrays(struct qede_dev *qdev)
 381 {
 382         /* It asseumes qede_free_mem_load() is called before */
 383         if (qdev->fp_array != NULL) {
 384                 rte_free(qdev->fp_array);
 385                 qdev->fp_array = NULL;
 386         }
 387
 388         if (qdev->sb_array != NULL) {
 389                 rte_free(qdev->sb_array);
 390                 qdev->sb_array = NULL;
 391         }
 392 }
 393
 394 int qede_alloc_fp_array(struct qede_dev *qdev)
 395 {
 396         struct qede_fastpath *fp;
 397         struct ecore_dev *edev = &qdev->edev;
 398         int i;
 399
 400         qdev->fp_array = rte_calloc("fp", QEDE_RSS_CNT(qdev),
 401                                     sizeof(*qdev->fp_array),
 402                                     RTE_CACHE_LINE_SIZE);
 403
 404         if (!qdev->fp_array) {
 405                 DP_ERR(edev, "fp array allocation failed\n");
 406                 return -ENOMEM;
 407         }
 408
 409         qdev->sb_array = rte_calloc("sb", QEDE_RSS_CNT(qdev),
 410                                     sizeof(*qdev->sb_array),
 411                                     RTE_CACHE_LINE_SIZE);
 412
 413         if (!qdev->sb_array) {
 414                 DP_ERR(edev, "sb array allocation failed\n");
 415                 rte_free(qdev->fp_array);
 416                 return -ENOMEM;
 417         }
 418
 419         return 0;
 420 }
 421
 422 /* This function allocates fast-path status block memory */
 423 static int
 424 qede_alloc_mem_sb(struct qede_dev *qdev, struct ecore_sb_info *sb_info,
 425                   uint16_t sb_id)
 426 {
 427         struct ecore_dev *edev = &qdev->edev;
 428         struct status_block *sb_virt;
 429         dma_addr_t sb_phys;
 430         int rc;
 431
 432         sb_virt = OSAL_DMA_ALLOC_COHERENT(edev, &sb_phys, sizeof(*sb_virt));
 433
 434         if (!sb_virt) {
 435                 DP_ERR(edev, "Status block allocation failed\n");
 436                 return -ENOMEM;
 437         }
 438
 439         rc = qdev->ops->common->sb_init(edev, sb_info,
 440                                         sb_virt, sb_phys, sb_id,
 441                                         QED_SB_TYPE_L2_QUEUE);
 442         if (rc) {
 443                 DP_ERR(edev, "Status block initialization failed\n");
 444                 /* TBD: No dma_free_coherent possible */
 445                 return rc;
 446         }
 447
 448         return 0;
 449 }
 450
 451 static int qede_alloc_mem_fp(struct qede_dev *qdev, struct qede_fastpath *fp)
 452 {
 453         return qede_alloc_mem_sb(qdev, fp->sb_info, fp->rss_id);
 454 }
 455
 456 static void qede_shrink_txq(struct qede_dev *qdev, uint16_t num_rss)
 457 {
 458         /* @@@TBD - this should also re-set the qed interrupts */
 459 }
 460
 461 /* This function allocates all qede memory at NIC load. */
 462 static int qede_alloc_mem_load(struct qede_dev *qdev)
 463 {
 464         int rc = 0, rss_id;
 465         struct ecore_dev *edev = &qdev->edev;
 466
 467         for (rss_id = 0; rss_id < QEDE_RSS_CNT(qdev); rss_id++) {
 468                 struct qede_fastpath *fp = &qdev->fp_array[rss_id];
 469
 470                 rc = qede_alloc_mem_fp(qdev, fp);
 471                 if (rc)
 472                         break;
 473         }
 474
 475         if (rss_id != QEDE_RSS_CNT(qdev)) {
 476                 /* Failed allocating memory for all the queues */
 477                 if (!rss_id) {
 478                         DP_ERR(edev,
 479                                "Failed to alloc memory for leading queue\n");
 480                         rc = -ENOMEM;
 481                 } else {
 482                         DP_NOTICE(edev, false,
 483                                   "Failed to allocate memory for all of "
 484                                   "RSS queues\n"
 485                                   "Desired: %d queues, allocated: %d queues\n",
 486                                   QEDE_RSS_CNT(qdev), rss_id);
 487                         qede_shrink_txq(qdev, rss_id);
 488                 }
 489                 qdev->num_rss = rss_id;
 490         }
 491
 492         return 0;
 493 }
 494
 495 static inline void
 496 qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq)
 497 {
 498         uint16_t bd_prod = ecore_chain_get_prod_idx(&rxq->rx_bd_ring);
 499         uint16_t cqe_prod = ecore_chain_get_prod_idx(&rxq->rx_comp_ring);
 500         struct eth_rx_prod_data rx_prods = { 0 };
 501
 502         /* Update producers */
 503         rx_prods.bd_prod = rte_cpu_to_le_16(bd_prod);
 504         rx_prods.cqe_prod = rte_cpu_to_le_16(cqe_prod);
 505
 506         /* Make sure that the BD and SGE data is updated before updating the
 507          * producers since FW might read the BD/SGE right after the producer
 508          * is updated.
 509          */
 510         rte_wmb();
 511
 512         internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
 513                         (uint32_t *)&rx_prods);
 514
 515         /* mmiowb is needed to synchronize doorbell writes from more than one
 516          * processor. It guarantees that the write arrives to the device before
 517          * the napi lock is released and another qede_poll is called (possibly
 518          * on another CPU). Without this barrier, the next doorbell can bypass
 519          * this doorbell. This is applicable to IA64/Altix systems.
 520          */
 521         rte_wmb();
 522
 523         PMD_RX_LOG(DEBUG, rxq, "bd_prod %u  cqe_prod %u\n", bd_prod, cqe_prod);
 524 }
 525
 526 static inline uint32_t
 527 qede_rxfh_indir_default(uint32_t index, uint32_t n_rx_rings)
 528 {
 529         return index % n_rx_rings;
 530 }
 531
 532 #ifdef ENC_SUPPORTED
 533 static bool qede_tunn_exist(uint16_t flag)
 534 {
 535         return !!((PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
 536                     PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT) & flag);
 537 }
 538
 539 static inline uint8_t qede_check_tunn_csum(uint16_t flag)
 540 {
 541         uint8_t tcsum = 0;
 542         uint16_t csum_flag = 0;
 543
 544         if ((PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
 545              PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT) & flag)
 546                 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
 547                     PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
 548
 549         if ((PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
 550              PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT) & flag) {
 551                 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
 552                     PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
 553                 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
 554         }
 555
 556         csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
 557             PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
 558             PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
 559             PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
 560
 561         if (csum_flag & flag)
 562                 return QEDE_CSUM_ERROR;
 563
 564         return QEDE_CSUM_UNNECESSARY | tcsum;
 565 }
 566 #else
 567 static inline uint8_t qede_tunn_exist(uint16_t flag)
 568 {
 569         return 0;
 570 }
 571
 572 static inline uint8_t qede_check_tunn_csum(uint16_t flag)
 573 {
 574         return 0;
 575 }
 576 #endif
 577
 578 static inline uint8_t qede_check_notunn_csum(uint16_t flag)
 579 {
 580         uint8_t csum = 0;
 581         uint16_t csum_flag = 0;
 582
 583         if ((PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
 584              PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT) & flag) {
 585                 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
 586                     PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
 587                 csum = QEDE_CSUM_UNNECESSARY;
 588         }
 589
 590         csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
 591             PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
 592
 593         if (csum_flag & flag)
 594                 return QEDE_CSUM_ERROR;
 595
 596         return csum;
 597 }
 598
 599 static inline uint8_t qede_check_csum(uint16_t flag)
 600 {
 601         if (likely(!qede_tunn_exist(flag)))
 602                 return qede_check_notunn_csum(flag);
 603         else
 604                 return qede_check_tunn_csum(flag);
 605 }
 606
 607 static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
 608 {
 609         ecore_chain_consume(&rxq->rx_bd_ring);
 610         rxq->sw_rx_cons++;
 611 }
 612
 613 static inline void
 614 qede_reuse_page(struct qede_dev *qdev,
 615                 struct qede_rx_queue *rxq, struct qede_rx_entry *curr_cons)
 616 {
 617         struct eth_rx_bd *rx_bd_prod = ecore_chain_produce(&rxq->rx_bd_ring);
 618         uint16_t idx = rxq->sw_rx_cons & NUM_RX_BDS(rxq);
 619         struct qede_rx_entry *curr_prod;
 620         dma_addr_t new_mapping;
 621
 622         curr_prod = &rxq->sw_rx_ring[idx];
 623         *curr_prod = *curr_cons;
 624
 625         new_mapping = rte_mbuf_data_dma_addr_default(curr_prod->mbuf) +
 626                       curr_prod->page_offset;
 627
 628         rx_bd_prod->addr.hi = rte_cpu_to_le_32(U64_HI(new_mapping));
 629         rx_bd_prod->addr.lo = rte_cpu_to_le_32(U64_LO(new_mapping));
 630
 631         rxq->sw_rx_prod++;
 632 }
 633
 634 static inline void
 635 qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq,
 636                         struct qede_dev *qdev, uint8_t count)
 637 {
 638         struct qede_rx_entry *curr_cons;
 639
 640         for (; count > 0; count--) {
 641                 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS(rxq)];
 642                 qede_reuse_page(qdev, rxq, curr_cons);
 643                 qede_rx_bd_ring_consume(rxq);
 644         }
 645 }
 646
 647 static inline uint32_t qede_rx_cqe_to_pkt_type(uint16_t flags)
 648 {
 649         uint32_t p_type;
 650         /* TBD - L4 indications needed ? */
 651         uint16_t protocol = ((PARSING_AND_ERR_FLAGS_L3TYPE_MASK <<
 652                               PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) & flags);
 653
 654         /* protocol = 3 means LLC/SNAP over Ethernet */
 655         if (unlikely(protocol == 0 || protocol == 3))
 656                 p_type = RTE_PTYPE_UNKNOWN;
 657         else if (protocol == 1)
 658                 p_type = RTE_PTYPE_L3_IPV4;
 659         else if (protocol == 2)
 660                 p_type = RTE_PTYPE_L3_IPV6;
 661
 662         return RTE_PTYPE_L2_ETHER | p_type;
 663 }
 664
 665 uint16_t
 666 qede_recv_pkts(void *p_rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
 667 {
 668         struct qede_rx_queue *rxq = p_rxq;
 669         struct qede_dev *qdev = rxq->qdev;
 670         struct ecore_dev *edev = &qdev->edev;
 671         struct qede_fastpath *fp = &qdev->fp_array[rxq->queue_id];
 672         uint16_t hw_comp_cons, sw_comp_cons, sw_rx_index;
 673         uint16_t rx_pkt = 0;
 674         union eth_rx_cqe *cqe;
 675         struct eth_fast_path_rx_reg_cqe *fp_cqe;
 676         register struct rte_mbuf *rx_mb = NULL;
 677         enum eth_rx_cqe_type cqe_type;
 678         uint16_t len, pad;
 679         uint16_t preload_idx;
 680         uint8_t csum_flag;
 681         uint16_t parse_flag;
 682         enum rss_hash_type htype;
 683
 684         hw_comp_cons = rte_le_to_cpu_16(*rxq->hw_cons_ptr);
 685         sw_comp_cons = ecore_chain_get_cons_idx(&rxq->rx_comp_ring);
 686
 687         rte_rmb();
 688
 689         if (hw_comp_cons == sw_comp_cons)
 690                 return 0;
 691
 692         while (sw_comp_cons != hw_comp_cons) {
 693                 /* Get the CQE from the completion ring */
 694                 cqe =
 695                     (union eth_rx_cqe *)ecore_chain_consume(&rxq->rx_comp_ring);
 696                 cqe_type = cqe->fast_path_regular.type;
 697
 698                 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
 699                         PMD_RX_LOG(DEBUG, rxq, "Got a slowath CQE\n");
 700
 701                         qdev->ops->eth_cqe_completion(edev, fp->rss_id,
 702                                 (struct eth_slow_path_rx_cqe *)cqe);
 703                         goto next_cqe;
 704                 }
 705
 706                 /* Get the data from the SW ring */
 707                 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS(rxq);
 708                 rx_mb = rxq->sw_rx_ring[sw_rx_index].mbuf;
 709                 assert(rx_mb != NULL);
 710
 711                 /* non GRO */
 712                 fp_cqe = &cqe->fast_path_regular;
 713
 714                 len = rte_le_to_cpu_16(fp_cqe->len_on_first_bd);
 715                 pad = fp_cqe->placement_offset;
 716                 assert((len + pad) <= rx_mb->buf_len);
 717
 718                 PMD_RX_LOG(DEBUG, rxq,
 719                            "CQE type = 0x%x, flags = 0x%x, vlan = 0x%x"
 720                            " len = %u, parsing_flags = %d\n",
 721                            cqe_type, fp_cqe->bitfields,
 722                            rte_le_to_cpu_16(fp_cqe->vlan_tag),
 723                            len, rte_le_to_cpu_16(fp_cqe->pars_flags.flags));
 724
 725                 /* If this is an error packet then drop it */
 726                 parse_flag =
 727                     rte_le_to_cpu_16(cqe->fast_path_regular.pars_flags.flags);
 728                 csum_flag = qede_check_csum(parse_flag);
 729                 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
 730                         PMD_RX_LOG(ERR, rxq,
 731                                    "CQE in CONS = %u has error, flags = 0x%x "
 732                                    "dropping incoming packet\n",
 733                                    sw_comp_cons, parse_flag);
 734                         rxq->rx_hw_errors++;
 735                         qede_recycle_rx_bd_ring(rxq, qdev, fp_cqe->bd_num);
 736                         goto next_cqe;
 737                 }
 738
 739                 if (unlikely(qede_alloc_rx_buffer(rxq) != 0)) {
 740                         PMD_RX_LOG(ERR, rxq,
 741                                    "New buffer allocation failed,"
 742                                    "dropping incoming packet\n");
 743                         qede_recycle_rx_bd_ring(rxq, qdev, fp_cqe->bd_num);
 744                         rte_eth_devices[rxq->port_id].
 745                             data->rx_mbuf_alloc_failed++;
 746                         rxq->rx_alloc_errors++;
 747                         break;
 748                 }
 749
 750                 qede_rx_bd_ring_consume(rxq);
 751
 752                 /* Prefetch next mbuf while processing current one. */
 753                 preload_idx = rxq->sw_rx_cons & NUM_RX_BDS(rxq);
 754                 rte_prefetch0(rxq->sw_rx_ring[preload_idx].mbuf);
 755
 756                 if (fp_cqe->bd_num != 1)
 757                         PMD_RX_LOG(DEBUG, rxq,
 758                                    "Jumbo-over-BD packet not supported\n");
 759
 760                 /* Update MBUF fields */
 761                 rx_mb->ol_flags = 0;
 762                 rx_mb->data_off = pad + RTE_PKTMBUF_HEADROOM;
 763                 rx_mb->nb_segs = 1;
 764                 rx_mb->data_len = len;
 765                 rx_mb->pkt_len = len;
 766                 rx_mb->port = rxq->port_id;
 767                 rx_mb->packet_type = qede_rx_cqe_to_pkt_type(parse_flag);
 768
 769                 htype = (uint8_t)GET_FIELD(fp_cqe->bitfields,
 770                                 ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
 771                 if (qdev->rss_enabled && htype) {
 772                         rx_mb->ol_flags |= PKT_RX_RSS_HASH;
 773                         rx_mb->hash.rss = rte_le_to_cpu_32(fp_cqe->rss_hash);
 774                         PMD_RX_LOG(DEBUG, rxq, "Hash result 0x%x\n",
 775                                    rx_mb->hash.rss);
 776                 }
 777
 778                 rte_prefetch1(rte_pktmbuf_mtod(rx_mb, void *));
 779
 780                 if (CQE_HAS_VLAN(parse_flag)) {
 781                         rx_mb->vlan_tci = rte_le_to_cpu_16(fp_cqe->vlan_tag);
 782                         rx_mb->ol_flags |= PKT_RX_VLAN_PKT;
 783                 }
 784
 785                 if (CQE_HAS_OUTER_VLAN(parse_flag)) {
 786                         /* FW does not provide indication of Outer VLAN tag,
 787                          * which is always stripped, so vlan_tci_outer is set
 788                          * to 0. Here vlan_tag represents inner VLAN tag.
 789                          */
 790                         rx_mb->vlan_tci = rte_le_to_cpu_16(fp_cqe->vlan_tag);
 791                         rx_mb->ol_flags |= PKT_RX_QINQ_PKT;
 792                 }
 793
 794                 rx_pkts[rx_pkt] = rx_mb;
 795                 rx_pkt++;
 796 next_cqe:
 797                 ecore_chain_recycle_consumed(&rxq->rx_comp_ring);
 798                 sw_comp_cons = ecore_chain_get_cons_idx(&rxq->rx_comp_ring);
 799                 if (rx_pkt == nb_pkts) {
 800                         PMD_RX_LOG(DEBUG, rxq,
 801                                    "Budget reached nb_pkts=%u received=%u\n",
 802                                    rx_pkt, nb_pkts);
 803                         break;
 804                 }
 805         }
 806
 807         qede_update_rx_prod(qdev, rxq);
 808
 809         PMD_RX_LOG(DEBUG, rxq, "rx_pkts=%u core=%d\n", rx_pkt, rte_lcore_id());
 810
 811         return rx_pkt;
 812 }
 813
 814 static inline int
 815 qede_free_tx_pkt(struct ecore_dev *edev, struct qede_tx_queue *txq)
 816 {
 817         uint16_t idx = TX_CONS(txq);
 818         struct eth_tx_bd *tx_data_bd;
 819         struct rte_mbuf *mbuf = txq->sw_tx_ring[idx].mbuf;
 820
 821         if (unlikely(!mbuf)) {
 822                 PMD_TX_LOG(ERR, txq,
 823                            "null mbuf nb_tx_desc %u nb_tx_avail %u "
 824                            "sw_tx_cons %u sw_tx_prod %u\n",
 825                            txq->nb_tx_desc, txq->nb_tx_avail, idx,
 826                            TX_PROD(txq));
 827                 return -1;
 828         }
 829
 830         /* Free now */
 831         rte_pktmbuf_free_seg(mbuf);
 832         txq->sw_tx_ring[idx].mbuf = NULL;
 833         ecore_chain_consume(&txq->tx_pbl);
 834         txq->nb_tx_avail++;
 835
 836         return 0;
 837 }
 838
 839 static inline uint16_t
 840 qede_process_tx_compl(struct ecore_dev *edev, struct qede_tx_queue *txq)
 841 {
 842         uint16_t tx_compl = 0;
 843         uint16_t hw_bd_cons;
 844         int rc;
 845
 846         hw_bd_cons = rte_le_to_cpu_16(*txq->hw_cons_ptr);
 847         rte_compiler_barrier();
 848
 849         while (hw_bd_cons != ecore_chain_get_cons_idx(&txq->tx_pbl)) {
 850                 rc = qede_free_tx_pkt(edev, txq);
 851                 if (rc) {
 852                         DP_NOTICE(edev, false,
 853                                   "hw_bd_cons = %d, chain_cons=%d\n",
 854                                   hw_bd_cons,
 855                                   ecore_chain_get_cons_idx(&txq->tx_pbl));
 856                         break;
 857                 }
 858                 txq->sw_tx_cons++;      /* Making TXD available */
 859                 tx_compl++;
 860         }
 861
 862         PMD_TX_LOG(DEBUG, txq, "Tx compl %u sw_tx_cons %u avail %u\n",
 863                    tx_compl, txq->sw_tx_cons, txq->nb_tx_avail);
 864         return tx_compl;
 865 }
 866
 867 uint16_t
 868 qede_xmit_pkts(void *p_txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
 869 {
 870         struct qede_tx_queue *txq = p_txq;
 871         struct qede_dev *qdev = txq->qdev;
 872         struct ecore_dev *edev = &qdev->edev;
 873         struct qede_fastpath *fp = &qdev->fp_array[txq->queue_id];
 874         struct eth_tx_1st_bd *first_bd;
 875         uint16_t nb_tx_pkts;
 876         uint16_t nb_pkt_sent = 0;
 877         uint16_t bd_prod;
 878         uint16_t idx;
 879         uint16_t tx_count;
 880
 881         if (unlikely(txq->nb_tx_avail < txq->tx_free_thresh)) {
 882                 PMD_TX_LOG(DEBUG, txq, "send=%u avail=%u free_thresh=%u\n",
 883                            nb_pkts, txq->nb_tx_avail, txq->tx_free_thresh);
 884                 (void)qede_process_tx_compl(edev, txq);
 885         }
 886
 887         nb_tx_pkts = RTE_MIN(nb_pkts, (txq->nb_tx_avail / MAX_NUM_TX_BDS));
 888         if (unlikely(nb_tx_pkts == 0)) {
 889                 PMD_TX_LOG(DEBUG, txq, "Out of BDs nb_pkts=%u avail=%u\n",
 890                            nb_pkts, txq->nb_tx_avail);
 891                 return 0;
 892         }
 893
 894         tx_count = nb_tx_pkts;
 895         while (nb_tx_pkts--) {
 896                 /* Fill the entry in the SW ring and the BDs in the FW ring */
 897                 idx = TX_PROD(txq);
 898                 struct rte_mbuf *mbuf = *tx_pkts++;
 899                 txq->sw_tx_ring[idx].mbuf = mbuf;
 900                 first_bd = (struct eth_tx_1st_bd *)
 901                     ecore_chain_produce(&txq->tx_pbl);
 902                 first_bd->data.bd_flags.bitfields =
 903                     1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
 904                 /* Map MBUF linear data for DMA and set in the first BD */
 905                 QEDE_BD_SET_ADDR_LEN(first_bd, rte_mbuf_data_dma_addr(mbuf),
 906                                      mbuf->data_len);
 907
 908                 /* Descriptor based VLAN insertion */
 909                 if (mbuf->ol_flags & (PKT_TX_VLAN_PKT | PKT_TX_QINQ_PKT)) {
 910                         first_bd->data.vlan = rte_cpu_to_le_16(mbuf->vlan_tci);
 911                         first_bd->data.bd_flags.bitfields |=
 912                             1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
 913                 }
 914
 915                 /* Offload the IP checksum in the hardware */
 916                 if (mbuf->ol_flags & PKT_TX_IP_CKSUM) {
 917                         first_bd->data.bd_flags.bitfields |=
 918                             1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
 919                 }
 920
 921                 /* L4 checksum offload (tcp or udp) */
 922                 if (mbuf->ol_flags & (PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM)) {
 923                         first_bd->data.bd_flags.bitfields |=
 924                             1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
 925                         /* IPv6 + extn. -> later */
 926                 }
 927                 first_bd->data.nbds = MAX_NUM_TX_BDS;
 928                 txq->sw_tx_prod++;
 929                 rte_prefetch0(txq->sw_tx_ring[TX_PROD(txq)].mbuf);
 930                 txq->nb_tx_avail--;
 931                 bd_prod =
 932                     rte_cpu_to_le_16(ecore_chain_get_prod_idx(&txq->tx_pbl));
 933                 nb_pkt_sent++;
 934         }
 935
 936         /* Write value of prod idx into bd_prod */
 937         txq->tx_db.data.bd_prod = bd_prod;
 938         rte_wmb();
 939         rte_compiler_barrier();
 940         DIRECT_REG_WR(edev, txq->doorbell_addr, txq->tx_db.raw);
 941         rte_wmb();
 942
 943         /* Check again for Tx completions */
 944         (void)qede_process_tx_compl(edev, txq);
 945
 946         PMD_TX_LOG(DEBUG, txq, "to_send=%u can_send=%u sent=%u core=%d\n",
 947                    nb_pkts, tx_count, nb_pkt_sent, rte_lcore_id());
 948
 949         return nb_pkt_sent;
 950 }
 951
 952 int qede_dev_start(struct rte_eth_dev *eth_dev)
 953 {
 954         struct qede_dev *qdev = eth_dev->data->dev_private;
 955         struct ecore_dev *edev = &qdev->edev;
 956         struct qed_link_output link_output;
 957         int rc;
 958
 959         DP_INFO(edev, "port %u\n", eth_dev->data->port_id);
 960
 961         if (qdev->state == QEDE_START) {
 962                 DP_INFO(edev, "device already started\n");
 963                 return 0;
 964         }
 965
 966         if (qdev->state == QEDE_CLOSE) {
 967                 rc = qede_alloc_fp_array(qdev);
 968                 qede_init_fp(qdev);
 969                 rc = qede_alloc_mem_load(qdev);
 970                 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
 971                         QEDE_RSS_CNT(qdev), qdev->num_tc);
 972         } else if (qdev->state == QEDE_STOP) {
 973                 DP_INFO(edev, "restarting port %u\n", eth_dev->data->port_id);
 974         } else {
 975                 DP_INFO(edev, "unknown state port %u\n",
 976                         eth_dev->data->port_id);
 977                 return -EINVAL;
 978         }
 979
 980         if (rc) {
 981                 DP_ERR(edev, "Failed to start queues\n");
 982                 /* TBD: free */
 983                 return rc;
 984         }
 985
 986         DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
 987
 988         qede_dev_set_link_state(eth_dev, true);
 989
 990         /* Query whether link is already-up */
 991         memset(&link_output, 0, sizeof(link_output));
 992         qdev->ops->common->get_link(edev, &link_output);
 993         DP_NOTICE(edev, false, "link status: %s\n",
 994                   link_output.link_up ? "up" : "down");
 995
 996         qdev->state = QEDE_START;
 997
 998         qede_config_rx_mode(eth_dev);
 999
1000         DP_INFO(edev, "dev_state is QEDE_START\n");
1001
1002         return 0;
1003 }
1004
1005 static int qede_drain_txq(struct qede_dev *qdev,
1006                           struct qede_tx_queue *txq, bool allow_drain)
1007 {
1008         struct ecore_dev *edev = &qdev->edev;
1009         int rc, cnt = 1000;
1010
1011         while (txq->sw_tx_cons != txq->sw_tx_prod) {
1012                 qede_process_tx_compl(edev, txq);
1013                 if (!cnt) {
1014                         if (allow_drain) {
1015                                 DP_NOTICE(edev, false,
1016                                           "Tx queue[%u] is stuck,"
1017                                           "requesting MCP to drain\n",
1018                                           txq->queue_id);
1019                                 rc = qdev->ops->common->drain(edev);
1020                                 if (rc)
1021                                         return rc;
1022                                 return qede_drain_txq(qdev, txq, false);
1023                         }
1024
1025                         DP_NOTICE(edev, false,
1026                                   "Timeout waiting for tx queue[%d]:"
1027                                   "PROD=%d, CONS=%d\n",
1028                                   txq->queue_id, txq->sw_tx_prod,
1029                                   txq->sw_tx_cons);
1030                         return -ENODEV;
1031                 }
1032                 cnt--;
1033                 DELAY(1000);
1034                 rte_compiler_barrier();
1035         }
1036
1037         /* FW finished processing, wait for HW to transmit all tx packets */
1038         DELAY(2000);
1039
1040         return 0;
1041 }
1042
1043 static int qede_stop_queues(struct qede_dev *qdev)
1044 {
1045         struct qed_update_vport_params vport_update_params;
1046         struct ecore_dev *edev = &qdev->edev;
1047         int rc, tc, i;
1048
1049         /* Disable the vport */
1050         memset(&vport_update_params, 0, sizeof(vport_update_params));
1051         vport_update_params.vport_id = 0;
1052         vport_update_params.update_vport_active_flg = 1;
1053         vport_update_params.vport_active_flg = 0;
1054         vport_update_params.update_rss_flg = 0;
1055
1056         DP_INFO(edev, "vport_update\n");
1057
1058         rc = qdev->ops->vport_update(edev, &vport_update_params);
1059         if (rc) {
1060                 DP_ERR(edev, "Failed to update vport\n");
1061                 return rc;
1062         }
1063
1064         DP_INFO(edev, "Flushing tx queues\n");
1065
1066         /* Flush Tx queues. If needed, request drain from MCP */
1067         for_each_rss(i) {
1068                 struct qede_fastpath *fp = &qdev->fp_array[i];
1069                 for (tc = 0; tc < qdev->num_tc; tc++) {
1070                         struct qede_tx_queue *txq = fp->txqs[tc];
1071                         rc = qede_drain_txq(qdev, txq, true);
1072                         if (rc)
1073                                 return rc;
1074                 }
1075         }
1076
1077         /* Stop all Queues in reverse order */
1078         for (i = QEDE_RSS_CNT(qdev) - 1; i >= 0; i--) {
1079                 struct qed_stop_rxq_params rx_params;
1080
1081                 /* Stop the Tx Queue(s) */
1082                 for (tc = 0; tc < qdev->num_tc; tc++) {
1083                         struct qed_stop_txq_params tx_params;
1084
1085                         tx_params.rss_id = i;
1086                         tx_params.tx_queue_id = tc * QEDE_RSS_CNT(qdev) + i;
1087
1088                         DP_INFO(edev, "Stopping tx queues\n");
1089                         rc = qdev->ops->q_tx_stop(edev, &tx_params);
1090                         if (rc) {
1091                                 DP_ERR(edev, "Failed to stop TXQ #%d\n",
1092                                        tx_params.tx_queue_id);
1093                                 return rc;
1094                         }
1095                 }
1096
1097                 /* Stop the Rx Queue */
1098                 memset(&rx_params, 0, sizeof(rx_params));
1099                 rx_params.rss_id = i;
1100                 rx_params.rx_queue_id = i;
1101                 rx_params.eq_completion_only = 1;
1102
1103                 DP_INFO(edev, "Stopping rx queues\n");
1104
1105                 rc = qdev->ops->q_rx_stop(edev, &rx_params);
1106                 if (rc) {
1107                         DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
1108                         return rc;
1109                 }
1110         }
1111
1112         DP_INFO(edev, "Stopping vports\n");
1113
1114         /* Stop the vport */
1115         rc = qdev->ops->vport_stop(edev, 0);
1116         if (rc)
1117                 DP_ERR(edev, "Failed to stop VPORT\n");
1118
1119         return rc;
1120 }
1121
1122 void qede_reset_fp_rings(struct qede_dev *qdev)
1123 {
1124         uint16_t rss_id;
1125         uint8_t tc;
1126
1127         for_each_rss(rss_id) {
1128                 DP_INFO(&qdev->edev, "reset fp chain for rss %u\n", rss_id);
1129                 struct qede_fastpath *fp = &qdev->fp_array[rss_id];
1130                 ecore_chain_reset(&fp->rxq->rx_bd_ring);
1131                 ecore_chain_reset(&fp->rxq->rx_comp_ring);
1132                 for (tc = 0; tc < qdev->num_tc; tc++) {
1133                         struct qede_tx_queue *txq = fp->txqs[tc];
1134                         ecore_chain_reset(&txq->tx_pbl);
1135                 }
1136         }
1137 }
1138
1139 /* This function frees all memory of a single fp */
1140 static void qede_free_mem_fp(struct qede_dev *qdev, struct qede_fastpath *fp)
1141 {
1142         uint8_t tc;
1143
1144         qede_rx_queue_release(fp->rxq);
1145         for (tc = 0; tc < qdev->num_tc; tc++)
1146                 qede_tx_queue_release(fp->txqs[tc]);
1147 }
1148
1149 void qede_free_mem_load(struct qede_dev *qdev)
1150 {
1151         uint8_t rss_id;
1152
1153         for_each_rss(rss_id) {
1154                 struct qede_fastpath *fp = &qdev->fp_array[rss_id];
1155                 qede_free_mem_fp(qdev, fp);
1156         }
1157         /* qdev->num_rss = 0; */
1158 }
1159
1160 /*
1161  * Stop an Ethernet device. The device can be restarted with a call to
1162  * rte_eth_dev_start().
1163  * Do not change link state and do not release sw structures.
1164  */
1165 void qede_dev_stop(struct rte_eth_dev *eth_dev)
1166 {
1167         struct qede_dev *qdev = eth_dev->data->dev_private;
1168         struct ecore_dev *edev = &qdev->edev;
1169         int rc;
1170
1171         DP_INFO(edev, "port %u\n", eth_dev->data->port_id);
1172
1173         if (qdev->state != QEDE_START) {
1174                 DP_INFO(edev, "device not yet started\n");
1175                 return;
1176         }
1177
1178         rc = qede_stop_queues(qdev);
1179
1180         if (rc)
1181                 DP_ERR(edev, "Didn't succeed to close queues\n");
1182
1183         DP_INFO(edev, "Stopped queues\n");
1184
1185         qdev->ops->fastpath_stop(edev);
1186
1187         qede_reset_fp_rings(qdev);
1188
1189         qdev->state = QEDE_STOP;
1190
1191         DP_INFO(edev, "dev_state is QEDE_STOP\n");
1192 }