2 * Copyright (c) 2015-2016 Solarflare Communications Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * The views and conclusions contained in the software and documentation are
27 * those of the authors and should not be interpreted as representing official
28 * policies, either expressed or implied, of the FreeBSD Project.
31 #ifndef _SYS_EF10_IMPL_H
32 #define _SYS_EF10_IMPL_H
38 #if (EFSYS_OPT_HUNTINGTON && EFSYS_OPT_MEDFORD)
39 #define EF10_MAX_PIOBUF_NBUFS MAX(HUNT_PIOBUF_NBUFS, MEDFORD_PIOBUF_NBUFS)
40 #elif EFSYS_OPT_HUNTINGTON
41 #define EF10_MAX_PIOBUF_NBUFS HUNT_PIOBUF_NBUFS
42 #elif EFSYS_OPT_MEDFORD
43 #define EF10_MAX_PIOBUF_NBUFS MEDFORD_PIOBUF_NBUFS
47 * FIXME: This is just a power of 2 which fits in an MCDI v1 message, and could
48 * possibly be increased, or the write size reported by newer firmware used
51 #define EF10_NVRAM_CHUNK 0x80
53 /* Alignment requirement for value written to RX WPTR:
54 * the WPTR must be aligned to an 8 descriptor boundary
56 #define EF10_RX_WPTR_ALIGN 8
59 * Max byte offset into the packet the TCP header must start for the hardware
60 * to be able to parse the packet correctly.
62 #define EF10_TCP_HEADER_OFFSET_LIMIT 208
64 /* Invalid RSS context handle */
65 #define EF10_RSS_CONTEXT_INVALID (0xffffffff)
70 __checkReturn efx_rc_t
78 __checkReturn efx_rc_t
81 __in unsigned int index,
82 __in efsys_mem_t *esmp,
93 __checkReturn efx_rc_t
96 __in unsigned int count);
103 __checkReturn efx_rc_t
106 __in unsigned int us);
110 ef10_ev_qstats_update(
112 __inout_ecount(EV_NQSTATS) efsys_stat_t *stat);
113 #endif /* EFSYS_OPT_QSTATS */
116 ef10_ev_rxlabel_init(
119 __in unsigned int label,
120 __in boolean_t packed_stream);
123 ef10_ev_rxlabel_fini(
125 __in unsigned int label);
129 __checkReturn efx_rc_t
132 __in efx_intr_type_t type,
133 __in efsys_mem_t *esmp);
137 __in efx_nic_t *enp);
141 __in efx_nic_t *enp);
144 ef10_intr_disable_unlocked(
145 __in efx_nic_t *enp);
147 __checkReturn efx_rc_t
150 __in unsigned int level);
153 ef10_intr_status_line(
155 __out boolean_t *fatalp,
156 __out uint32_t *qmaskp);
159 ef10_intr_status_message(
161 __in unsigned int message,
162 __out boolean_t *fatalp);
166 __in efx_nic_t *enp);
169 __in efx_nic_t *enp);
173 extern __checkReturn efx_rc_t
175 __in efx_nic_t *enp);
177 extern __checkReturn efx_rc_t
178 ef10_nic_set_drv_limits(
179 __inout efx_nic_t *enp,
180 __in efx_drv_limits_t *edlp);
182 extern __checkReturn efx_rc_t
183 ef10_nic_get_vi_pool(
185 __out uint32_t *vi_countp);
187 extern __checkReturn efx_rc_t
188 ef10_nic_get_bar_region(
190 __in efx_nic_region_t region,
191 __out uint32_t *offsetp,
192 __out size_t *sizep);
194 extern __checkReturn efx_rc_t
196 __in efx_nic_t *enp);
198 extern __checkReturn efx_rc_t
200 __in efx_nic_t *enp);
204 extern __checkReturn efx_rc_t
205 ef10_nic_register_test(
206 __in efx_nic_t *enp);
208 #endif /* EFSYS_OPT_DIAG */
212 __in efx_nic_t *enp);
216 __in efx_nic_t *enp);
221 extern __checkReturn efx_rc_t
224 __out efx_link_mode_t *link_modep);
226 extern __checkReturn efx_rc_t
229 __out boolean_t *mac_upp);
231 extern __checkReturn efx_rc_t
233 __in efx_nic_t *enp);
235 extern __checkReturn efx_rc_t
237 __in efx_nic_t *enp);
239 extern __checkReturn efx_rc_t
244 extern __checkReturn efx_rc_t
245 ef10_mac_reconfigure(
246 __in efx_nic_t *enp);
248 extern __checkReturn efx_rc_t
249 ef10_mac_multicast_list_set(
250 __in efx_nic_t *enp);
252 extern __checkReturn efx_rc_t
253 ef10_mac_filter_default_rxq_set(
256 __in boolean_t using_rss);
259 ef10_mac_filter_default_rxq_clear(
260 __in efx_nic_t *enp);
262 #if EFSYS_OPT_LOOPBACK
264 extern __checkReturn efx_rc_t
265 ef10_mac_loopback_set(
267 __in efx_link_mode_t link_mode,
268 __in efx_loopback_type_t loopback_type);
270 #endif /* EFSYS_OPT_LOOPBACK */
272 #if EFSYS_OPT_MAC_STATS
274 extern __checkReturn efx_rc_t
275 ef10_mac_stats_get_mask(
277 __inout_bcount(mask_size) uint32_t *maskp,
278 __in size_t mask_size);
280 extern __checkReturn efx_rc_t
281 ef10_mac_stats_update(
283 __in efsys_mem_t *esmp,
284 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
285 __inout_opt uint32_t *generationp);
287 #endif /* EFSYS_OPT_MAC_STATS */
294 extern __checkReturn efx_rc_t
297 __in const efx_mcdi_transport_t *mtp);
301 __in efx_nic_t *enp);
304 ef10_mcdi_send_request(
306 __in_bcount(hdr_len) void *hdrp,
308 __in_bcount(sdu_len) void *sdup,
309 __in size_t sdu_len);
311 extern __checkReturn boolean_t
312 ef10_mcdi_poll_response(
313 __in efx_nic_t *enp);
316 ef10_mcdi_read_response(
318 __out_bcount(length) void *bufferp,
323 ef10_mcdi_poll_reboot(
324 __in efx_nic_t *enp);
326 extern __checkReturn efx_rc_t
327 ef10_mcdi_feature_supported(
329 __in efx_mcdi_feature_id_t id,
330 __out boolean_t *supportedp);
333 ef10_mcdi_get_timeout(
335 __in efx_mcdi_req_t *emrp,
336 __out uint32_t *timeoutp);
338 #endif /* EFSYS_OPT_MCDI */
342 #if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD
344 extern __checkReturn efx_rc_t
345 ef10_nvram_buf_read_tlv(
347 __in_bcount(max_seg_size) caddr_t seg_data,
348 __in size_t max_seg_size,
350 __deref_out_bcount_opt(*sizep) caddr_t *datap,
351 __out size_t *sizep);
353 extern __checkReturn efx_rc_t
354 ef10_nvram_buf_write_tlv(
355 __inout_bcount(partn_size) caddr_t partn_data,
356 __in size_t partn_size,
358 __in_bcount(tag_size) caddr_t tag_data,
359 __in size_t tag_size,
360 __out size_t *total_lengthp);
362 extern __checkReturn efx_rc_t
363 ef10_nvram_partn_read_tlv(
367 __deref_out_bcount_opt(*sizep) caddr_t *datap,
368 __out size_t *sizep);
370 extern __checkReturn efx_rc_t
371 ef10_nvram_partn_write_tlv(
375 __in_bcount(size) caddr_t data,
378 extern __checkReturn efx_rc_t
379 ef10_nvram_partn_write_segment_tlv(
383 __in_bcount(size) caddr_t data,
385 __in boolean_t all_segments);
387 extern __checkReturn efx_rc_t
388 ef10_nvram_partn_lock(
390 __in uint32_t partn);
392 extern __checkReturn efx_rc_t
393 ef10_nvram_partn_unlock(
396 __out_opt uint32_t *resultp);
398 #endif /* EFSYS_OPT_NVRAM || EFSYS_OPT_VPD */
404 extern __checkReturn efx_rc_t
406 __in efx_nic_t *enp);
408 #endif /* EFSYS_OPT_DIAG */
410 extern __checkReturn efx_rc_t
411 ef10_nvram_type_to_partn(
413 __in efx_nvram_type_t type,
414 __out uint32_t *partnp);
416 extern __checkReturn efx_rc_t
417 ef10_nvram_partn_size(
420 __out size_t *sizep);
422 extern __checkReturn efx_rc_t
423 ef10_nvram_partn_rw_start(
426 __out size_t *chunk_sizep);
428 extern __checkReturn efx_rc_t
429 ef10_nvram_partn_read_mode(
432 __in unsigned int offset,
433 __out_bcount(size) caddr_t data,
437 extern __checkReturn efx_rc_t
438 ef10_nvram_partn_read(
441 __in unsigned int offset,
442 __out_bcount(size) caddr_t data,
445 extern __checkReturn efx_rc_t
446 ef10_nvram_partn_erase(
449 __in unsigned int offset,
452 extern __checkReturn efx_rc_t
453 ef10_nvram_partn_write(
456 __in unsigned int offset,
457 __out_bcount(size) caddr_t data,
460 extern __checkReturn efx_rc_t
461 ef10_nvram_partn_rw_finish(
463 __in uint32_t partn);
465 extern __checkReturn efx_rc_t
466 ef10_nvram_partn_get_version(
469 __out uint32_t *subtypep,
470 __out_ecount(4) uint16_t version[4]);
472 extern __checkReturn efx_rc_t
473 ef10_nvram_partn_set_version(
476 __in_ecount(4) uint16_t version[4]);
478 extern __checkReturn efx_rc_t
479 ef10_nvram_buffer_validate(
482 __in_bcount(buffer_size)
484 __in size_t buffer_size);
486 extern __checkReturn efx_rc_t
487 ef10_nvram_buffer_create(
489 __in uint16_t partn_type,
490 __in_bcount(buffer_size)
492 __in size_t buffer_size);
494 extern __checkReturn efx_rc_t
495 ef10_nvram_buffer_find_item_start(
496 __in_bcount(buffer_size)
498 __in size_t buffer_size,
499 __out uint32_t *startp
502 extern __checkReturn efx_rc_t
503 ef10_nvram_buffer_find_end(
504 __in_bcount(buffer_size)
506 __in size_t buffer_size,
507 __in uint32_t offset,
511 extern __checkReturn __success(return != B_FALSE) boolean_t
512 ef10_nvram_buffer_find_item(
513 __in_bcount(buffer_size)
515 __in size_t buffer_size,
516 __in uint32_t offset,
517 __out uint32_t *startp,
518 __out uint32_t *lengthp
521 extern __checkReturn efx_rc_t
522 ef10_nvram_buffer_get_item(
523 __in_bcount(buffer_size)
525 __in size_t buffer_size,
526 __in uint32_t offset,
527 __in uint32_t length,
528 __out_bcount_part(item_max_size, *lengthp)
530 __in size_t item_max_size,
531 __out uint32_t *lengthp
534 extern __checkReturn efx_rc_t
535 ef10_nvram_buffer_insert_item(
536 __in_bcount(buffer_size)
538 __in size_t buffer_size,
539 __in uint32_t offset,
540 __in_bcount(length) caddr_t keyp,
541 __in uint32_t length,
542 __out uint32_t *lengthp
545 extern __checkReturn efx_rc_t
546 ef10_nvram_buffer_delete_item(
547 __in_bcount(buffer_size)
549 __in size_t buffer_size,
550 __in uint32_t offset,
551 __in uint32_t length,
555 extern __checkReturn efx_rc_t
556 ef10_nvram_buffer_finish(
557 __in_bcount(buffer_size)
559 __in size_t buffer_size
562 #endif /* EFSYS_OPT_NVRAM */
567 typedef struct ef10_link_state_s {
568 uint32_t els_adv_cap_mask;
569 uint32_t els_lp_cap_mask;
570 unsigned int els_fcntl;
571 efx_link_mode_t els_link_mode;
572 #if EFSYS_OPT_LOOPBACK
573 efx_loopback_type_t els_loopback;
575 boolean_t els_mac_up;
581 __in efx_qword_t *eqp,
582 __out efx_link_mode_t *link_modep);
584 extern __checkReturn efx_rc_t
587 __out ef10_link_state_t *elsp);
589 extern __checkReturn efx_rc_t
594 extern __checkReturn efx_rc_t
595 ef10_phy_reconfigure(
596 __in efx_nic_t *enp);
598 extern __checkReturn efx_rc_t
600 __in efx_nic_t *enp);
602 extern __checkReturn efx_rc_t
605 __out uint32_t *ouip);
607 #if EFSYS_OPT_PHY_STATS
609 extern __checkReturn efx_rc_t
610 ef10_phy_stats_update(
612 __in efsys_mem_t *esmp,
613 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat);
615 #endif /* EFSYS_OPT_PHY_STATS */
619 extern __checkReturn efx_rc_t
620 ef10_bist_enable_offline(
621 __in efx_nic_t *enp);
623 extern __checkReturn efx_rc_t
626 __in efx_bist_type_t type);
628 extern __checkReturn efx_rc_t
631 __in efx_bist_type_t type,
632 __out efx_bist_result_t *resultp,
633 __out_opt __drv_when(count > 0, __notnull)
634 uint32_t *value_maskp,
635 __out_ecount_opt(count) __drv_when(count > 0, __notnull)
636 unsigned long *valuesp,
642 __in efx_bist_type_t type);
644 #endif /* EFSYS_OPT_BIST */
648 extern __checkReturn efx_rc_t
650 __in efx_nic_t *enp);
654 __in efx_nic_t *enp);
656 extern __checkReturn efx_rc_t
659 __in unsigned int index,
660 __in unsigned int label,
661 __in efsys_mem_t *esmp,
667 __out unsigned int *addedp);
671 __in efx_txq_t *etp);
673 extern __checkReturn efx_rc_t
676 __in_ecount(n) efx_buffer_t *eb,
678 __in unsigned int completed,
679 __inout unsigned int *addedp);
684 __in unsigned int added,
685 __in unsigned int pushed);
687 #if EFSYS_OPT_RX_PACKED_STREAM
689 ef10_rx_qps_update_credits(
690 __in efx_rxq_t *erp);
692 extern __checkReturn uint8_t *
693 ef10_rx_qps_packet_info(
695 __in uint8_t *buffer,
696 __in uint32_t buffer_length,
697 __in uint32_t current_offset,
698 __out uint16_t *lengthp,
699 __out uint32_t *next_offsetp,
700 __out uint32_t *timestamp);
703 extern __checkReturn efx_rc_t
706 __in unsigned int ns);
708 extern __checkReturn efx_rc_t
710 __in efx_txq_t *etp);
714 __in efx_txq_t *etp);
716 extern __checkReturn efx_rc_t
718 __in efx_txq_t *etp);
721 ef10_tx_qpio_disable(
722 __in efx_txq_t *etp);
724 extern __checkReturn efx_rc_t
727 __in_ecount(buf_length) uint8_t *buffer,
728 __in size_t buf_length,
729 __in size_t pio_buf_offset);
731 extern __checkReturn efx_rc_t
734 __in size_t pkt_length,
735 __in unsigned int completed,
736 __inout unsigned int *addedp);
738 extern __checkReturn efx_rc_t
741 __in_ecount(n) efx_desc_t *ed,
743 __in unsigned int completed,
744 __inout unsigned int *addedp);
747 ef10_tx_qdesc_dma_create(
749 __in efsys_dma_addr_t addr,
752 __out efx_desc_t *edp);
755 ef10_tx_qdesc_tso_create(
757 __in uint16_t ipv4_id,
758 __in uint32_t tcp_seq,
759 __in uint8_t tcp_flags,
760 __out efx_desc_t *edp);
763 ef10_tx_qdesc_tso2_create(
765 __in uint16_t ipv4_id,
766 __in uint32_t tcp_seq,
767 __in uint16_t tcp_mss,
768 __out_ecount(count) efx_desc_t *edp,
772 ef10_tx_qdesc_vlantci_create(
774 __in uint16_t vlan_tci,
775 __out efx_desc_t *edp);
781 ef10_tx_qstats_update(
783 __inout_ecount(TX_NQSTATS) efsys_stat_t *stat);
785 #endif /* EFSYS_OPT_QSTATS */
787 typedef uint32_t efx_piobuf_handle_t;
789 #define EFX_PIOBUF_HANDLE_INVALID ((efx_piobuf_handle_t) -1)
791 extern __checkReturn efx_rc_t
793 __inout efx_nic_t *enp,
794 __out uint32_t *bufnump,
795 __out efx_piobuf_handle_t *handlep,
796 __out uint32_t *blknump,
797 __out uint32_t *offsetp,
798 __out size_t *sizep);
800 extern __checkReturn efx_rc_t
802 __inout efx_nic_t *enp,
803 __in uint32_t bufnum,
804 __in uint32_t blknum);
806 extern __checkReturn efx_rc_t
808 __inout efx_nic_t *enp,
809 __in uint32_t vi_index,
810 __in efx_piobuf_handle_t handle);
812 extern __checkReturn efx_rc_t
814 __inout efx_nic_t *enp,
815 __in uint32_t vi_index);
822 extern __checkReturn efx_rc_t
824 __in efx_nic_t *enp);
826 extern __checkReturn efx_rc_t
829 __out size_t *sizep);
831 extern __checkReturn efx_rc_t
834 __out_bcount(size) caddr_t data,
837 extern __checkReturn efx_rc_t
840 __in_bcount(size) caddr_t data,
843 extern __checkReturn efx_rc_t
846 __in_bcount(size) caddr_t data,
849 extern __checkReturn efx_rc_t
852 __in_bcount(size) caddr_t data,
854 __inout efx_vpd_value_t *evvp);
856 extern __checkReturn efx_rc_t
859 __in_bcount(size) caddr_t data,
861 __in efx_vpd_value_t *evvp);
863 extern __checkReturn efx_rc_t
866 __in_bcount(size) caddr_t data,
868 __out efx_vpd_value_t *evvp,
869 __inout unsigned int *contp);
871 extern __checkReturn efx_rc_t
874 __in_bcount(size) caddr_t data,
879 __in efx_nic_t *enp);
881 #endif /* EFSYS_OPT_VPD */
886 extern __checkReturn efx_rc_t
888 __in efx_nic_t *enp);
890 #if EFSYS_OPT_RX_SCATTER
891 extern __checkReturn efx_rc_t
892 ef10_rx_scatter_enable(
894 __in unsigned int buf_size);
895 #endif /* EFSYS_OPT_RX_SCATTER */
898 #if EFSYS_OPT_RX_SCALE
900 extern __checkReturn efx_rc_t
901 ef10_rx_scale_mode_set(
903 __in efx_rx_hash_alg_t alg,
904 __in efx_rx_hash_type_t type,
905 __in boolean_t insert);
907 extern __checkReturn efx_rc_t
908 ef10_rx_scale_key_set(
910 __in_ecount(n) uint8_t *key,
913 extern __checkReturn efx_rc_t
914 ef10_rx_scale_tbl_set(
916 __in_ecount(n) unsigned int *table,
919 extern __checkReturn uint32_t
922 __in efx_rx_hash_alg_t func,
923 __in uint8_t *buffer);
925 #endif /* EFSYS_OPT_RX_SCALE */
927 extern __checkReturn efx_rc_t
928 ef10_rx_prefix_pktlen(
930 __in uint8_t *buffer,
931 __out uint16_t *lengthp);
936 __in_ecount(n) efsys_dma_addr_t *addrp,
939 __in unsigned int completed,
940 __in unsigned int added);
945 __in unsigned int added,
946 __inout unsigned int *pushedp);
948 extern __checkReturn efx_rc_t
950 __in efx_rxq_t *erp);
954 __in efx_rxq_t *erp);
956 extern __checkReturn efx_rc_t
959 __in unsigned int index,
960 __in unsigned int label,
961 __in efx_rxq_type_t type,
962 __in efsys_mem_t *esmp,
966 __in efx_rxq_t *erp);
970 __in efx_rxq_t *erp);
974 __in efx_nic_t *enp);
978 typedef struct ef10_filter_handle_s {
981 } ef10_filter_handle_t;
983 typedef struct ef10_filter_entry_s {
984 uintptr_t efe_spec; /* pointer to filter spec plus busy bit */
985 ef10_filter_handle_t efe_handle;
986 } ef10_filter_entry_t;
989 * BUSY flag indicates that an update is in progress.
990 * AUTO_OLD flag is used to mark and sweep MAC packet filters.
992 #define EFX_EF10_FILTER_FLAG_BUSY 1U
993 #define EFX_EF10_FILTER_FLAG_AUTO_OLD 2U
994 #define EFX_EF10_FILTER_FLAGS 3U
997 * Size of the hash table used by the driver. Doesn't need to be the
998 * same size as the hardware's table.
1000 #define EFX_EF10_FILTER_TBL_ROWS 8192
1002 /* Only need to allow for one directed and one unknown unicast filter */
1003 #define EFX_EF10_FILTER_UNICAST_FILTERS_MAX 2
1005 /* Allow for the broadcast address to be added to the multicast list */
1006 #define EFX_EF10_FILTER_MULTICAST_FILTERS_MAX (EFX_MAC_MULTICAST_LIST_MAX + 1)
1008 typedef struct ef10_filter_table_s {
1009 ef10_filter_entry_t eft_entry[EFX_EF10_FILTER_TBL_ROWS];
1010 efx_rxq_t *eft_default_rxq;
1011 boolean_t eft_using_rss;
1012 uint32_t eft_unicst_filter_indexes[
1013 EFX_EF10_FILTER_UNICAST_FILTERS_MAX];
1014 uint32_t eft_unicst_filter_count;
1015 uint32_t eft_mulcst_filter_indexes[
1016 EFX_EF10_FILTER_MULTICAST_FILTERS_MAX];
1017 uint32_t eft_mulcst_filter_count;
1018 boolean_t eft_using_all_mulcst;
1019 } ef10_filter_table_t;
1021 __checkReturn efx_rc_t
1023 __in efx_nic_t *enp);
1027 __in efx_nic_t *enp);
1029 __checkReturn efx_rc_t
1030 ef10_filter_restore(
1031 __in efx_nic_t *enp);
1033 __checkReturn efx_rc_t
1035 __in efx_nic_t *enp,
1036 __inout efx_filter_spec_t *spec,
1037 __in boolean_t may_replace);
1039 __checkReturn efx_rc_t
1041 __in efx_nic_t *enp,
1042 __inout efx_filter_spec_t *spec);
1044 extern __checkReturn efx_rc_t
1045 ef10_filter_supported_filters(
1046 __in efx_nic_t *enp,
1047 __out uint32_t *list,
1048 __out size_t *length);
1050 extern __checkReturn efx_rc_t
1051 ef10_filter_reconfigure(
1052 __in efx_nic_t *enp,
1053 __in_ecount(6) uint8_t const *mac_addr,
1054 __in boolean_t all_unicst,
1055 __in boolean_t mulcst,
1056 __in boolean_t all_mulcst,
1057 __in boolean_t brdcst,
1058 __in_ecount(6*count) uint8_t const *addrs,
1059 __in uint32_t count);
1062 ef10_filter_get_default_rxq(
1063 __in efx_nic_t *enp,
1064 __out efx_rxq_t **erpp,
1065 __out boolean_t *using_rss);
1068 ef10_filter_default_rxq_set(
1069 __in efx_nic_t *enp,
1070 __in efx_rxq_t *erp,
1071 __in boolean_t using_rss);
1074 ef10_filter_default_rxq_clear(
1075 __in efx_nic_t *enp);
1078 #endif /* EFSYS_OPT_FILTER */
1080 extern __checkReturn efx_rc_t
1081 efx_mcdi_get_function_info(
1082 __in efx_nic_t *enp,
1083 __out uint32_t *pfp,
1084 __out_opt uint32_t *vfp);
1086 extern __checkReturn efx_rc_t
1087 efx_mcdi_privilege_mask(
1088 __in efx_nic_t *enp,
1091 __out uint32_t *maskp);
1093 extern __checkReturn efx_rc_t
1094 efx_mcdi_get_port_assignment(
1095 __in efx_nic_t *enp,
1096 __out uint32_t *portp);
1098 extern __checkReturn efx_rc_t
1099 efx_mcdi_get_port_modes(
1100 __in efx_nic_t *enp,
1101 __out uint32_t *modesp,
1102 __out_opt uint32_t *current_modep);
1104 extern __checkReturn efx_rc_t
1105 ef10_nic_get_port_mode_bandwidth(
1106 __in uint32_t port_mode,
1107 __out uint32_t *bandwidth_mbpsp);
1109 extern __checkReturn efx_rc_t
1110 efx_mcdi_get_mac_address_pf(
1111 __in efx_nic_t *enp,
1112 __out_ecount_opt(6) uint8_t mac_addrp[6]);
1114 extern __checkReturn efx_rc_t
1115 efx_mcdi_get_mac_address_vf(
1116 __in efx_nic_t *enp,
1117 __out_ecount_opt(6) uint8_t mac_addrp[6]);
1119 extern __checkReturn efx_rc_t
1121 __in efx_nic_t *enp,
1122 __out uint32_t *sys_freqp,
1123 __out uint32_t *dpcpu_freqp);
1126 extern __checkReturn efx_rc_t
1127 efx_mcdi_get_vector_cfg(
1128 __in efx_nic_t *enp,
1129 __out_opt uint32_t *vec_basep,
1130 __out_opt uint32_t *pf_nvecp,
1131 __out_opt uint32_t *vf_nvecp);
1133 extern __checkReturn efx_rc_t
1134 ef10_get_datapath_caps(
1135 __in efx_nic_t *enp);
1137 extern __checkReturn efx_rc_t
1138 ef10_get_privilege_mask(
1139 __in efx_nic_t *enp,
1140 __out uint32_t *maskp);
1142 extern __checkReturn efx_rc_t
1143 ef10_external_port_mapping(
1144 __in efx_nic_t *enp,
1146 __out uint8_t *external_portp);
1148 #if EFSYS_OPT_RX_PACKED_STREAM
1150 /* Data space per credit in packed stream mode */
1151 #define EFX_RX_PACKED_STREAM_MEM_PER_CREDIT (1 << 16)
1154 * Received packets are always aligned at this boundary. Also there always
1155 * exists a gap of this size between packets.
1156 * (see SF-112241-TC, 4.5)
1158 #define EFX_RX_PACKED_STREAM_ALIGNMENT 64
1161 * Size of a pseudo-header prepended to received packets
1162 * in packed stream mode
1164 #define EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE 8
1166 /* Minimum space for packet in packed stream mode */
1167 #define EFX_RX_PACKED_STREAM_MIN_PACKET_SPACE \
1168 P2ROUNDUP(EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE + \
1170 EFX_RX_PACKED_STREAM_ALIGNMENT, \
1171 EFX_RX_PACKED_STREAM_ALIGNMENT)
1173 /* Maximum number of credits */
1174 #define EFX_RX_PACKED_STREAM_MAX_CREDITS 127
1176 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
1182 #endif /* _SYS_EF10_IMPL_H */