2 * Copyright (c) 2015-2016 Solarflare Communications Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * The views and conclusions contained in the software and documentation are
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28 * policies, either expressed or implied, of the FreeBSD Project.
31 #ifndef _SYS_EF10_IMPL_H
32 #define _SYS_EF10_IMPL_H
38 #if (EFSYS_OPT_HUNTINGTON && EFSYS_OPT_MEDFORD)
39 #define EF10_MAX_PIOBUF_NBUFS MAX(HUNT_PIOBUF_NBUFS, MEDFORD_PIOBUF_NBUFS)
40 #elif EFSYS_OPT_HUNTINGTON
41 #define EF10_MAX_PIOBUF_NBUFS HUNT_PIOBUF_NBUFS
42 #elif EFSYS_OPT_MEDFORD
43 #define EF10_MAX_PIOBUF_NBUFS MEDFORD_PIOBUF_NBUFS
47 * FIXME: This is just a power of 2 which fits in an MCDI v1 message, and could
48 * possibly be increased, or the write size reported by newer firmware used
51 #define EF10_NVRAM_CHUNK 0x80
53 /* Alignment requirement for value written to RX WPTR:
54 * the WPTR must be aligned to an 8 descriptor boundary
56 #define EF10_RX_WPTR_ALIGN 8
59 * Max byte offset into the packet the TCP header must start for the hardware
60 * to be able to parse the packet correctly.
62 #define EF10_TCP_HEADER_OFFSET_LIMIT 208
64 /* Invalid RSS context handle */
65 #define EF10_RSS_CONTEXT_INVALID (0xffffffff)
70 __checkReturn efx_rc_t
78 __checkReturn efx_rc_t
81 __in unsigned int index,
82 __in efsys_mem_t *esmp,
93 __checkReturn efx_rc_t
96 __in unsigned int count);
103 __checkReturn efx_rc_t
106 __in unsigned int us);
110 ef10_ev_qstats_update(
112 __inout_ecount(EV_NQSTATS) efsys_stat_t *stat);
113 #endif /* EFSYS_OPT_QSTATS */
116 ef10_ev_rxlabel_init(
119 __in unsigned int label,
120 __in boolean_t packed_stream);
123 ef10_ev_rxlabel_fini(
125 __in unsigned int label);
129 __checkReturn efx_rc_t
132 __in efx_intr_type_t type,
133 __in efsys_mem_t *esmp);
137 __in efx_nic_t *enp);
141 __in efx_nic_t *enp);
144 ef10_intr_disable_unlocked(
145 __in efx_nic_t *enp);
147 __checkReturn efx_rc_t
150 __in unsigned int level);
153 ef10_intr_status_line(
155 __out boolean_t *fatalp,
156 __out uint32_t *qmaskp);
159 ef10_intr_status_message(
161 __in unsigned int message,
162 __out boolean_t *fatalp);
166 __in efx_nic_t *enp);
169 __in efx_nic_t *enp);
173 extern __checkReturn efx_rc_t
175 __in efx_nic_t *enp);
177 extern __checkReturn efx_rc_t
178 ef10_nic_set_drv_limits(
179 __inout efx_nic_t *enp,
180 __in efx_drv_limits_t *edlp);
182 extern __checkReturn efx_rc_t
183 ef10_nic_get_vi_pool(
185 __out uint32_t *vi_countp);
187 extern __checkReturn efx_rc_t
188 ef10_nic_get_bar_region(
190 __in efx_nic_region_t region,
191 __out uint32_t *offsetp,
192 __out size_t *sizep);
194 extern __checkReturn efx_rc_t
196 __in efx_nic_t *enp);
198 extern __checkReturn efx_rc_t
200 __in efx_nic_t *enp);
204 extern __checkReturn efx_rc_t
205 ef10_nic_register_test(
206 __in efx_nic_t *enp);
208 #endif /* EFSYS_OPT_DIAG */
212 __in efx_nic_t *enp);
216 __in efx_nic_t *enp);
221 extern __checkReturn efx_rc_t
224 __out efx_link_mode_t *link_modep);
226 extern __checkReturn efx_rc_t
229 __out boolean_t *mac_upp);
231 extern __checkReturn efx_rc_t
233 __in efx_nic_t *enp);
235 extern __checkReturn efx_rc_t
237 __in efx_nic_t *enp);
239 extern __checkReturn efx_rc_t
244 extern __checkReturn efx_rc_t
245 ef10_mac_reconfigure(
246 __in efx_nic_t *enp);
248 extern __checkReturn efx_rc_t
249 ef10_mac_multicast_list_set(
250 __in efx_nic_t *enp);
252 extern __checkReturn efx_rc_t
253 ef10_mac_filter_default_rxq_set(
256 __in boolean_t using_rss);
259 ef10_mac_filter_default_rxq_clear(
260 __in efx_nic_t *enp);
267 extern __checkReturn efx_rc_t
270 __in const efx_mcdi_transport_t *mtp);
274 __in efx_nic_t *enp);
277 ef10_mcdi_send_request(
279 __in_bcount(hdr_len) void *hdrp,
281 __in_bcount(sdu_len) void *sdup,
282 __in size_t sdu_len);
284 extern __checkReturn boolean_t
285 ef10_mcdi_poll_response(
286 __in efx_nic_t *enp);
289 ef10_mcdi_read_response(
291 __out_bcount(length) void *bufferp,
296 ef10_mcdi_poll_reboot(
297 __in efx_nic_t *enp);
299 extern __checkReturn efx_rc_t
300 ef10_mcdi_feature_supported(
302 __in efx_mcdi_feature_id_t id,
303 __out boolean_t *supportedp);
306 ef10_mcdi_get_timeout(
308 __in efx_mcdi_req_t *emrp,
309 __out uint32_t *timeoutp);
311 #endif /* EFSYS_OPT_MCDI */
318 typedef struct ef10_link_state_s {
319 uint32_t els_adv_cap_mask;
320 uint32_t els_lp_cap_mask;
321 unsigned int els_fcntl;
322 efx_link_mode_t els_link_mode;
323 boolean_t els_mac_up;
329 __in efx_qword_t *eqp,
330 __out efx_link_mode_t *link_modep);
332 extern __checkReturn efx_rc_t
335 __out ef10_link_state_t *elsp);
337 extern __checkReturn efx_rc_t
342 extern __checkReturn efx_rc_t
343 ef10_phy_reconfigure(
344 __in efx_nic_t *enp);
346 extern __checkReturn efx_rc_t
348 __in efx_nic_t *enp);
350 extern __checkReturn efx_rc_t
353 __out uint32_t *ouip);
357 extern __checkReturn efx_rc_t
358 ef10_bist_enable_offline(
359 __in efx_nic_t *enp);
361 extern __checkReturn efx_rc_t
364 __in efx_bist_type_t type);
366 extern __checkReturn efx_rc_t
369 __in efx_bist_type_t type,
370 __out efx_bist_result_t *resultp,
371 __out_opt __drv_when(count > 0, __notnull)
372 uint32_t *value_maskp,
373 __out_ecount_opt(count) __drv_when(count > 0, __notnull)
374 unsigned long *valuesp,
380 __in efx_bist_type_t type);
382 #endif /* EFSYS_OPT_BIST */
386 extern __checkReturn efx_rc_t
388 __in efx_nic_t *enp);
392 __in efx_nic_t *enp);
394 extern __checkReturn efx_rc_t
397 __in unsigned int index,
398 __in unsigned int label,
399 __in efsys_mem_t *esmp,
405 __out unsigned int *addedp);
409 __in efx_txq_t *etp);
411 extern __checkReturn efx_rc_t
414 __in_ecount(n) efx_buffer_t *eb,
416 __in unsigned int completed,
417 __inout unsigned int *addedp);
422 __in unsigned int added,
423 __in unsigned int pushed);
425 extern __checkReturn efx_rc_t
428 __in unsigned int ns);
430 extern __checkReturn efx_rc_t
432 __in efx_txq_t *etp);
436 __in efx_txq_t *etp);
438 extern __checkReturn efx_rc_t
440 __in efx_txq_t *etp);
443 ef10_tx_qpio_disable(
444 __in efx_txq_t *etp);
446 extern __checkReturn efx_rc_t
449 __in_ecount(buf_length) uint8_t *buffer,
450 __in size_t buf_length,
451 __in size_t pio_buf_offset);
453 extern __checkReturn efx_rc_t
456 __in size_t pkt_length,
457 __in unsigned int completed,
458 __inout unsigned int *addedp);
460 extern __checkReturn efx_rc_t
463 __in_ecount(n) efx_desc_t *ed,
465 __in unsigned int completed,
466 __inout unsigned int *addedp);
469 ef10_tx_qdesc_dma_create(
471 __in efsys_dma_addr_t addr,
474 __out efx_desc_t *edp);
477 ef10_tx_qdesc_tso_create(
479 __in uint16_t ipv4_id,
480 __in uint32_t tcp_seq,
481 __in uint8_t tcp_flags,
482 __out efx_desc_t *edp);
485 ef10_tx_qdesc_tso2_create(
487 __in uint16_t ipv4_id,
488 __in uint32_t tcp_seq,
489 __in uint16_t tcp_mss,
490 __out_ecount(count) efx_desc_t *edp,
494 ef10_tx_qdesc_vlantci_create(
496 __in uint16_t vlan_tci,
497 __out efx_desc_t *edp);
503 ef10_tx_qstats_update(
505 __inout_ecount(TX_NQSTATS) efsys_stat_t *stat);
507 #endif /* EFSYS_OPT_QSTATS */
509 typedef uint32_t efx_piobuf_handle_t;
511 #define EFX_PIOBUF_HANDLE_INVALID ((efx_piobuf_handle_t) -1)
513 extern __checkReturn efx_rc_t
515 __inout efx_nic_t *enp,
516 __out uint32_t *bufnump,
517 __out efx_piobuf_handle_t *handlep,
518 __out uint32_t *blknump,
519 __out uint32_t *offsetp,
520 __out size_t *sizep);
522 extern __checkReturn efx_rc_t
524 __inout efx_nic_t *enp,
525 __in uint32_t bufnum,
526 __in uint32_t blknum);
528 extern __checkReturn efx_rc_t
530 __inout efx_nic_t *enp,
531 __in uint32_t vi_index,
532 __in efx_piobuf_handle_t handle);
534 extern __checkReturn efx_rc_t
536 __inout efx_nic_t *enp,
537 __in uint32_t vi_index);
545 extern __checkReturn efx_rc_t
547 __in efx_nic_t *enp);
550 extern __checkReturn efx_rc_t
551 ef10_rx_prefix_pktlen(
553 __in uint8_t *buffer,
554 __out uint16_t *lengthp);
559 __in_ecount(n) efsys_dma_addr_t *addrp,
562 __in unsigned int completed,
563 __in unsigned int added);
568 __in unsigned int added,
569 __inout unsigned int *pushedp);
571 extern __checkReturn efx_rc_t
573 __in efx_rxq_t *erp);
577 __in efx_rxq_t *erp);
579 extern __checkReturn efx_rc_t
582 __in unsigned int index,
583 __in unsigned int label,
584 __in efx_rxq_type_t type,
585 __in efsys_mem_t *esmp,
589 __in efx_rxq_t *erp);
593 __in efx_rxq_t *erp);
597 __in efx_nic_t *enp);
601 typedef struct ef10_filter_handle_s {
604 } ef10_filter_handle_t;
606 typedef struct ef10_filter_entry_s {
607 uintptr_t efe_spec; /* pointer to filter spec plus busy bit */
608 ef10_filter_handle_t efe_handle;
609 } ef10_filter_entry_t;
612 * BUSY flag indicates that an update is in progress.
613 * AUTO_OLD flag is used to mark and sweep MAC packet filters.
615 #define EFX_EF10_FILTER_FLAG_BUSY 1U
616 #define EFX_EF10_FILTER_FLAG_AUTO_OLD 2U
617 #define EFX_EF10_FILTER_FLAGS 3U
620 * Size of the hash table used by the driver. Doesn't need to be the
621 * same size as the hardware's table.
623 #define EFX_EF10_FILTER_TBL_ROWS 8192
625 /* Only need to allow for one directed and one unknown unicast filter */
626 #define EFX_EF10_FILTER_UNICAST_FILTERS_MAX 2
628 /* Allow for the broadcast address to be added to the multicast list */
629 #define EFX_EF10_FILTER_MULTICAST_FILTERS_MAX (EFX_MAC_MULTICAST_LIST_MAX + 1)
631 typedef struct ef10_filter_table_s {
632 ef10_filter_entry_t eft_entry[EFX_EF10_FILTER_TBL_ROWS];
633 efx_rxq_t *eft_default_rxq;
634 boolean_t eft_using_rss;
635 uint32_t eft_unicst_filter_indexes[
636 EFX_EF10_FILTER_UNICAST_FILTERS_MAX];
637 uint32_t eft_unicst_filter_count;
638 uint32_t eft_mulcst_filter_indexes[
639 EFX_EF10_FILTER_MULTICAST_FILTERS_MAX];
640 uint32_t eft_mulcst_filter_count;
641 boolean_t eft_using_all_mulcst;
642 } ef10_filter_table_t;
644 __checkReturn efx_rc_t
646 __in efx_nic_t *enp);
650 __in efx_nic_t *enp);
652 __checkReturn efx_rc_t
654 __in efx_nic_t *enp);
656 __checkReturn efx_rc_t
659 __inout efx_filter_spec_t *spec,
660 __in boolean_t may_replace);
662 __checkReturn efx_rc_t
665 __inout efx_filter_spec_t *spec);
667 extern __checkReturn efx_rc_t
668 ef10_filter_supported_filters(
670 __out uint32_t *list,
671 __out size_t *length);
673 extern __checkReturn efx_rc_t
674 ef10_filter_reconfigure(
676 __in_ecount(6) uint8_t const *mac_addr,
677 __in boolean_t all_unicst,
678 __in boolean_t mulcst,
679 __in boolean_t all_mulcst,
680 __in boolean_t brdcst,
681 __in_ecount(6*count) uint8_t const *addrs,
682 __in uint32_t count);
685 ef10_filter_get_default_rxq(
687 __out efx_rxq_t **erpp,
688 __out boolean_t *using_rss);
691 ef10_filter_default_rxq_set(
694 __in boolean_t using_rss);
697 ef10_filter_default_rxq_clear(
698 __in efx_nic_t *enp);
701 #endif /* EFSYS_OPT_FILTER */
703 extern __checkReturn efx_rc_t
704 efx_mcdi_get_function_info(
707 __out_opt uint32_t *vfp);
709 extern __checkReturn efx_rc_t
710 efx_mcdi_privilege_mask(
714 __out uint32_t *maskp);
716 extern __checkReturn efx_rc_t
717 efx_mcdi_get_port_assignment(
719 __out uint32_t *portp);
721 extern __checkReturn efx_rc_t
722 efx_mcdi_get_port_modes(
724 __out uint32_t *modesp,
725 __out_opt uint32_t *current_modep);
727 extern __checkReturn efx_rc_t
728 ef10_nic_get_port_mode_bandwidth(
729 __in uint32_t port_mode,
730 __out uint32_t *bandwidth_mbpsp);
732 extern __checkReturn efx_rc_t
733 efx_mcdi_get_mac_address_pf(
735 __out_ecount_opt(6) uint8_t mac_addrp[6]);
737 extern __checkReturn efx_rc_t
738 efx_mcdi_get_mac_address_vf(
740 __out_ecount_opt(6) uint8_t mac_addrp[6]);
742 extern __checkReturn efx_rc_t
745 __out uint32_t *sys_freqp,
746 __out uint32_t *dpcpu_freqp);
749 extern __checkReturn efx_rc_t
750 efx_mcdi_get_vector_cfg(
752 __out_opt uint32_t *vec_basep,
753 __out_opt uint32_t *pf_nvecp,
754 __out_opt uint32_t *vf_nvecp);
756 extern __checkReturn efx_rc_t
757 ef10_get_datapath_caps(
758 __in efx_nic_t *enp);
760 extern __checkReturn efx_rc_t
761 ef10_get_privilege_mask(
763 __out uint32_t *maskp);
765 extern __checkReturn efx_rc_t
766 ef10_external_port_mapping(
769 __out uint8_t *external_portp);
775 #endif /* _SYS_EF10_IMPL_H */