2 * Copyright (c) 2015-2016 Solarflare Communications Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * The views and conclusions contained in the software and documentation are
27 * those of the authors and should not be interpreted as representing official
28 * policies, either expressed or implied, of the FreeBSD Project.
31 #ifndef _SYS_EF10_IMPL_H
32 #define _SYS_EF10_IMPL_H
38 #if (EFSYS_OPT_HUNTINGTON && EFSYS_OPT_MEDFORD)
39 #define EF10_MAX_PIOBUF_NBUFS MAX(HUNT_PIOBUF_NBUFS, MEDFORD_PIOBUF_NBUFS)
40 #elif EFSYS_OPT_HUNTINGTON
41 #define EF10_MAX_PIOBUF_NBUFS HUNT_PIOBUF_NBUFS
42 #elif EFSYS_OPT_MEDFORD
43 #define EF10_MAX_PIOBUF_NBUFS MEDFORD_PIOBUF_NBUFS
47 * FIXME: This is just a power of 2 which fits in an MCDI v1 message, and could
48 * possibly be increased, or the write size reported by newer firmware used
51 #define EF10_NVRAM_CHUNK 0x80
53 /* Alignment requirement for value written to RX WPTR:
54 * the WPTR must be aligned to an 8 descriptor boundary
56 #define EF10_RX_WPTR_ALIGN 8
59 * Max byte offset into the packet the TCP header must start for the hardware
60 * to be able to parse the packet correctly.
62 #define EF10_TCP_HEADER_OFFSET_LIMIT 208
64 /* Invalid RSS context handle */
65 #define EF10_RSS_CONTEXT_INVALID (0xffffffff)
70 __checkReturn efx_rc_t
78 __checkReturn efx_rc_t
81 __in unsigned int index,
82 __in efsys_mem_t *esmp,
93 __checkReturn efx_rc_t
96 __in unsigned int count);
103 __checkReturn efx_rc_t
106 __in unsigned int us);
110 ef10_ev_qstats_update(
112 __inout_ecount(EV_NQSTATS) efsys_stat_t *stat);
113 #endif /* EFSYS_OPT_QSTATS */
116 ef10_ev_rxlabel_init(
119 __in unsigned int label,
120 __in boolean_t packed_stream);
123 ef10_ev_rxlabel_fini(
125 __in unsigned int label);
129 __checkReturn efx_rc_t
132 __in efx_intr_type_t type,
133 __in efsys_mem_t *esmp);
137 __in efx_nic_t *enp);
141 __in efx_nic_t *enp);
144 ef10_intr_disable_unlocked(
145 __in efx_nic_t *enp);
147 __checkReturn efx_rc_t
150 __in unsigned int level);
153 ef10_intr_status_line(
155 __out boolean_t *fatalp,
156 __out uint32_t *qmaskp);
159 ef10_intr_status_message(
161 __in unsigned int message,
162 __out boolean_t *fatalp);
166 __in efx_nic_t *enp);
169 __in efx_nic_t *enp);
173 extern __checkReturn efx_rc_t
175 __in efx_nic_t *enp);
177 extern __checkReturn efx_rc_t
178 ef10_nic_set_drv_limits(
179 __inout efx_nic_t *enp,
180 __in efx_drv_limits_t *edlp);
182 extern __checkReturn efx_rc_t
183 ef10_nic_get_vi_pool(
185 __out uint32_t *vi_countp);
187 extern __checkReturn efx_rc_t
188 ef10_nic_get_bar_region(
190 __in efx_nic_region_t region,
191 __out uint32_t *offsetp,
192 __out size_t *sizep);
194 extern __checkReturn efx_rc_t
196 __in efx_nic_t *enp);
198 extern __checkReturn efx_rc_t
200 __in efx_nic_t *enp);
204 extern __checkReturn efx_rc_t
205 ef10_nic_register_test(
206 __in efx_nic_t *enp);
208 #endif /* EFSYS_OPT_DIAG */
212 __in efx_nic_t *enp);
216 __in efx_nic_t *enp);
221 extern __checkReturn efx_rc_t
224 __out efx_link_mode_t *link_modep);
226 extern __checkReturn efx_rc_t
229 __out boolean_t *mac_upp);
231 extern __checkReturn efx_rc_t
233 __in efx_nic_t *enp);
235 extern __checkReturn efx_rc_t
237 __in efx_nic_t *enp);
239 extern __checkReturn efx_rc_t
244 extern __checkReturn efx_rc_t
245 ef10_mac_reconfigure(
246 __in efx_nic_t *enp);
248 extern __checkReturn efx_rc_t
249 ef10_mac_multicast_list_set(
250 __in efx_nic_t *enp);
252 extern __checkReturn efx_rc_t
253 ef10_mac_filter_default_rxq_set(
256 __in boolean_t using_rss);
259 ef10_mac_filter_default_rxq_clear(
260 __in efx_nic_t *enp);
262 #if EFSYS_OPT_LOOPBACK
264 extern __checkReturn efx_rc_t
265 ef10_mac_loopback_set(
267 __in efx_link_mode_t link_mode,
268 __in efx_loopback_type_t loopback_type);
270 #endif /* EFSYS_OPT_LOOPBACK */
272 #if EFSYS_OPT_MAC_STATS
274 extern __checkReturn efx_rc_t
275 ef10_mac_stats_get_mask(
277 __inout_bcount(mask_size) uint32_t *maskp,
278 __in size_t mask_size);
280 extern __checkReturn efx_rc_t
281 ef10_mac_stats_update(
283 __in efsys_mem_t *esmp,
284 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
285 __inout_opt uint32_t *generationp);
287 #endif /* EFSYS_OPT_MAC_STATS */
294 extern __checkReturn efx_rc_t
297 __in const efx_mcdi_transport_t *mtp);
301 __in efx_nic_t *enp);
304 ef10_mcdi_send_request(
306 __in_bcount(hdr_len) void *hdrp,
308 __in_bcount(sdu_len) void *sdup,
309 __in size_t sdu_len);
311 extern __checkReturn boolean_t
312 ef10_mcdi_poll_response(
313 __in efx_nic_t *enp);
316 ef10_mcdi_read_response(
318 __out_bcount(length) void *bufferp,
323 ef10_mcdi_poll_reboot(
324 __in efx_nic_t *enp);
326 extern __checkReturn efx_rc_t
327 ef10_mcdi_feature_supported(
329 __in efx_mcdi_feature_id_t id,
330 __out boolean_t *supportedp);
333 ef10_mcdi_get_timeout(
335 __in efx_mcdi_req_t *emrp,
336 __out uint32_t *timeoutp);
338 #endif /* EFSYS_OPT_MCDI */
345 typedef struct ef10_link_state_s {
346 uint32_t els_adv_cap_mask;
347 uint32_t els_lp_cap_mask;
348 unsigned int els_fcntl;
349 efx_link_mode_t els_link_mode;
350 #if EFSYS_OPT_LOOPBACK
351 efx_loopback_type_t els_loopback;
353 boolean_t els_mac_up;
359 __in efx_qword_t *eqp,
360 __out efx_link_mode_t *link_modep);
362 extern __checkReturn efx_rc_t
365 __out ef10_link_state_t *elsp);
367 extern __checkReturn efx_rc_t
372 extern __checkReturn efx_rc_t
373 ef10_phy_reconfigure(
374 __in efx_nic_t *enp);
376 extern __checkReturn efx_rc_t
378 __in efx_nic_t *enp);
380 extern __checkReturn efx_rc_t
383 __out uint32_t *ouip);
385 #if EFSYS_OPT_PHY_STATS
387 extern __checkReturn efx_rc_t
388 ef10_phy_stats_update(
390 __in efsys_mem_t *esmp,
391 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat);
393 #endif /* EFSYS_OPT_PHY_STATS */
397 extern __checkReturn efx_rc_t
398 ef10_bist_enable_offline(
399 __in efx_nic_t *enp);
401 extern __checkReturn efx_rc_t
404 __in efx_bist_type_t type);
406 extern __checkReturn efx_rc_t
409 __in efx_bist_type_t type,
410 __out efx_bist_result_t *resultp,
411 __out_opt __drv_when(count > 0, __notnull)
412 uint32_t *value_maskp,
413 __out_ecount_opt(count) __drv_when(count > 0, __notnull)
414 unsigned long *valuesp,
420 __in efx_bist_type_t type);
422 #endif /* EFSYS_OPT_BIST */
426 extern __checkReturn efx_rc_t
428 __in efx_nic_t *enp);
432 __in efx_nic_t *enp);
434 extern __checkReturn efx_rc_t
437 __in unsigned int index,
438 __in unsigned int label,
439 __in efsys_mem_t *esmp,
445 __out unsigned int *addedp);
449 __in efx_txq_t *etp);
451 extern __checkReturn efx_rc_t
454 __in_ecount(n) efx_buffer_t *eb,
456 __in unsigned int completed,
457 __inout unsigned int *addedp);
462 __in unsigned int added,
463 __in unsigned int pushed);
465 #if EFSYS_OPT_RX_PACKED_STREAM
467 ef10_rx_qps_update_credits(
468 __in efx_rxq_t *erp);
470 extern __checkReturn uint8_t *
471 ef10_rx_qps_packet_info(
473 __in uint8_t *buffer,
474 __in uint32_t buffer_length,
475 __in uint32_t current_offset,
476 __out uint16_t *lengthp,
477 __out uint32_t *next_offsetp,
478 __out uint32_t *timestamp);
481 extern __checkReturn efx_rc_t
484 __in unsigned int ns);
486 extern __checkReturn efx_rc_t
488 __in efx_txq_t *etp);
492 __in efx_txq_t *etp);
494 extern __checkReturn efx_rc_t
496 __in efx_txq_t *etp);
499 ef10_tx_qpio_disable(
500 __in efx_txq_t *etp);
502 extern __checkReturn efx_rc_t
505 __in_ecount(buf_length) uint8_t *buffer,
506 __in size_t buf_length,
507 __in size_t pio_buf_offset);
509 extern __checkReturn efx_rc_t
512 __in size_t pkt_length,
513 __in unsigned int completed,
514 __inout unsigned int *addedp);
516 extern __checkReturn efx_rc_t
519 __in_ecount(n) efx_desc_t *ed,
521 __in unsigned int completed,
522 __inout unsigned int *addedp);
525 ef10_tx_qdesc_dma_create(
527 __in efsys_dma_addr_t addr,
530 __out efx_desc_t *edp);
533 ef10_tx_qdesc_tso_create(
535 __in uint16_t ipv4_id,
536 __in uint32_t tcp_seq,
537 __in uint8_t tcp_flags,
538 __out efx_desc_t *edp);
541 ef10_tx_qdesc_tso2_create(
543 __in uint16_t ipv4_id,
544 __in uint32_t tcp_seq,
545 __in uint16_t tcp_mss,
546 __out_ecount(count) efx_desc_t *edp,
550 ef10_tx_qdesc_vlantci_create(
552 __in uint16_t vlan_tci,
553 __out efx_desc_t *edp);
559 ef10_tx_qstats_update(
561 __inout_ecount(TX_NQSTATS) efsys_stat_t *stat);
563 #endif /* EFSYS_OPT_QSTATS */
565 typedef uint32_t efx_piobuf_handle_t;
567 #define EFX_PIOBUF_HANDLE_INVALID ((efx_piobuf_handle_t) -1)
569 extern __checkReturn efx_rc_t
571 __inout efx_nic_t *enp,
572 __out uint32_t *bufnump,
573 __out efx_piobuf_handle_t *handlep,
574 __out uint32_t *blknump,
575 __out uint32_t *offsetp,
576 __out size_t *sizep);
578 extern __checkReturn efx_rc_t
580 __inout efx_nic_t *enp,
581 __in uint32_t bufnum,
582 __in uint32_t blknum);
584 extern __checkReturn efx_rc_t
586 __inout efx_nic_t *enp,
587 __in uint32_t vi_index,
588 __in efx_piobuf_handle_t handle);
590 extern __checkReturn efx_rc_t
592 __inout efx_nic_t *enp,
593 __in uint32_t vi_index);
601 extern __checkReturn efx_rc_t
603 __in efx_nic_t *enp);
605 #if EFSYS_OPT_RX_SCATTER
606 extern __checkReturn efx_rc_t
607 ef10_rx_scatter_enable(
609 __in unsigned int buf_size);
610 #endif /* EFSYS_OPT_RX_SCATTER */
613 #if EFSYS_OPT_RX_SCALE
615 extern __checkReturn efx_rc_t
616 ef10_rx_scale_mode_set(
618 __in efx_rx_hash_alg_t alg,
619 __in efx_rx_hash_type_t type,
620 __in boolean_t insert);
622 extern __checkReturn efx_rc_t
623 ef10_rx_scale_key_set(
625 __in_ecount(n) uint8_t *key,
628 extern __checkReturn efx_rc_t
629 ef10_rx_scale_tbl_set(
631 __in_ecount(n) unsigned int *table,
634 extern __checkReturn uint32_t
637 __in efx_rx_hash_alg_t func,
638 __in uint8_t *buffer);
640 #endif /* EFSYS_OPT_RX_SCALE */
642 extern __checkReturn efx_rc_t
643 ef10_rx_prefix_pktlen(
645 __in uint8_t *buffer,
646 __out uint16_t *lengthp);
651 __in_ecount(n) efsys_dma_addr_t *addrp,
654 __in unsigned int completed,
655 __in unsigned int added);
660 __in unsigned int added,
661 __inout unsigned int *pushedp);
663 extern __checkReturn efx_rc_t
665 __in efx_rxq_t *erp);
669 __in efx_rxq_t *erp);
671 extern __checkReturn efx_rc_t
674 __in unsigned int index,
675 __in unsigned int label,
676 __in efx_rxq_type_t type,
677 __in efsys_mem_t *esmp,
681 __in efx_rxq_t *erp);
685 __in efx_rxq_t *erp);
689 __in efx_nic_t *enp);
693 typedef struct ef10_filter_handle_s {
696 } ef10_filter_handle_t;
698 typedef struct ef10_filter_entry_s {
699 uintptr_t efe_spec; /* pointer to filter spec plus busy bit */
700 ef10_filter_handle_t efe_handle;
701 } ef10_filter_entry_t;
704 * BUSY flag indicates that an update is in progress.
705 * AUTO_OLD flag is used to mark and sweep MAC packet filters.
707 #define EFX_EF10_FILTER_FLAG_BUSY 1U
708 #define EFX_EF10_FILTER_FLAG_AUTO_OLD 2U
709 #define EFX_EF10_FILTER_FLAGS 3U
712 * Size of the hash table used by the driver. Doesn't need to be the
713 * same size as the hardware's table.
715 #define EFX_EF10_FILTER_TBL_ROWS 8192
717 /* Only need to allow for one directed and one unknown unicast filter */
718 #define EFX_EF10_FILTER_UNICAST_FILTERS_MAX 2
720 /* Allow for the broadcast address to be added to the multicast list */
721 #define EFX_EF10_FILTER_MULTICAST_FILTERS_MAX (EFX_MAC_MULTICAST_LIST_MAX + 1)
723 typedef struct ef10_filter_table_s {
724 ef10_filter_entry_t eft_entry[EFX_EF10_FILTER_TBL_ROWS];
725 efx_rxq_t *eft_default_rxq;
726 boolean_t eft_using_rss;
727 uint32_t eft_unicst_filter_indexes[
728 EFX_EF10_FILTER_UNICAST_FILTERS_MAX];
729 uint32_t eft_unicst_filter_count;
730 uint32_t eft_mulcst_filter_indexes[
731 EFX_EF10_FILTER_MULTICAST_FILTERS_MAX];
732 uint32_t eft_mulcst_filter_count;
733 boolean_t eft_using_all_mulcst;
734 } ef10_filter_table_t;
736 __checkReturn efx_rc_t
738 __in efx_nic_t *enp);
742 __in efx_nic_t *enp);
744 __checkReturn efx_rc_t
746 __in efx_nic_t *enp);
748 __checkReturn efx_rc_t
751 __inout efx_filter_spec_t *spec,
752 __in boolean_t may_replace);
754 __checkReturn efx_rc_t
757 __inout efx_filter_spec_t *spec);
759 extern __checkReturn efx_rc_t
760 ef10_filter_supported_filters(
762 __out uint32_t *list,
763 __out size_t *length);
765 extern __checkReturn efx_rc_t
766 ef10_filter_reconfigure(
768 __in_ecount(6) uint8_t const *mac_addr,
769 __in boolean_t all_unicst,
770 __in boolean_t mulcst,
771 __in boolean_t all_mulcst,
772 __in boolean_t brdcst,
773 __in_ecount(6*count) uint8_t const *addrs,
774 __in uint32_t count);
777 ef10_filter_get_default_rxq(
779 __out efx_rxq_t **erpp,
780 __out boolean_t *using_rss);
783 ef10_filter_default_rxq_set(
786 __in boolean_t using_rss);
789 ef10_filter_default_rxq_clear(
790 __in efx_nic_t *enp);
793 #endif /* EFSYS_OPT_FILTER */
795 extern __checkReturn efx_rc_t
796 efx_mcdi_get_function_info(
799 __out_opt uint32_t *vfp);
801 extern __checkReturn efx_rc_t
802 efx_mcdi_privilege_mask(
806 __out uint32_t *maskp);
808 extern __checkReturn efx_rc_t
809 efx_mcdi_get_port_assignment(
811 __out uint32_t *portp);
813 extern __checkReturn efx_rc_t
814 efx_mcdi_get_port_modes(
816 __out uint32_t *modesp,
817 __out_opt uint32_t *current_modep);
819 extern __checkReturn efx_rc_t
820 ef10_nic_get_port_mode_bandwidth(
821 __in uint32_t port_mode,
822 __out uint32_t *bandwidth_mbpsp);
824 extern __checkReturn efx_rc_t
825 efx_mcdi_get_mac_address_pf(
827 __out_ecount_opt(6) uint8_t mac_addrp[6]);
829 extern __checkReturn efx_rc_t
830 efx_mcdi_get_mac_address_vf(
832 __out_ecount_opt(6) uint8_t mac_addrp[6]);
834 extern __checkReturn efx_rc_t
837 __out uint32_t *sys_freqp,
838 __out uint32_t *dpcpu_freqp);
841 extern __checkReturn efx_rc_t
842 efx_mcdi_get_vector_cfg(
844 __out_opt uint32_t *vec_basep,
845 __out_opt uint32_t *pf_nvecp,
846 __out_opt uint32_t *vf_nvecp);
848 extern __checkReturn efx_rc_t
849 ef10_get_datapath_caps(
850 __in efx_nic_t *enp);
852 extern __checkReturn efx_rc_t
853 ef10_get_privilege_mask(
855 __out uint32_t *maskp);
857 extern __checkReturn efx_rc_t
858 ef10_external_port_mapping(
861 __out uint8_t *external_portp);
863 #if EFSYS_OPT_RX_PACKED_STREAM
865 /* Data space per credit in packed stream mode */
866 #define EFX_RX_PACKED_STREAM_MEM_PER_CREDIT (1 << 16)
869 * Received packets are always aligned at this boundary. Also there always
870 * exists a gap of this size between packets.
871 * (see SF-112241-TC, 4.5)
873 #define EFX_RX_PACKED_STREAM_ALIGNMENT 64
876 * Size of a pseudo-header prepended to received packets
877 * in packed stream mode
879 #define EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE 8
881 /* Minimum space for packet in packed stream mode */
882 #define EFX_RX_PACKED_STREAM_MIN_PACKET_SPACE \
883 P2ROUNDUP(EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE + \
885 EFX_RX_PACKED_STREAM_ALIGNMENT, \
886 EFX_RX_PACKED_STREAM_ALIGNMENT)
888 /* Maximum number of credits */
889 #define EFX_RX_PACKED_STREAM_MAX_CREDITS 127
891 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
897 #endif /* _SYS_EF10_IMPL_H */