2 * Copyright (c) 2015-2016 Solarflare Communications Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * The views and conclusions contained in the software and documentation are
27 * those of the authors and should not be interpreted as representing official
28 * policies, either expressed or implied, of the FreeBSD Project.
31 #ifndef _SYS_EF10_IMPL_H
32 #define _SYS_EF10_IMPL_H
38 #if (EFSYS_OPT_HUNTINGTON && EFSYS_OPT_MEDFORD)
39 #define EF10_MAX_PIOBUF_NBUFS MAX(HUNT_PIOBUF_NBUFS, MEDFORD_PIOBUF_NBUFS)
40 #elif EFSYS_OPT_HUNTINGTON
41 #define EF10_MAX_PIOBUF_NBUFS HUNT_PIOBUF_NBUFS
42 #elif EFSYS_OPT_MEDFORD
43 #define EF10_MAX_PIOBUF_NBUFS MEDFORD_PIOBUF_NBUFS
47 * FIXME: This is just a power of 2 which fits in an MCDI v1 message, and could
48 * possibly be increased, or the write size reported by newer firmware used
51 #define EF10_NVRAM_CHUNK 0x80
54 * Alignment requirement for value written to RX WPTR: the WPTR must be aligned
55 * to an 8 descriptor boundary.
57 #define EF10_RX_WPTR_ALIGN 8
60 * Max byte offset into the packet the TCP header must start for the hardware
61 * to be able to parse the packet correctly.
63 #define EF10_TCP_HEADER_OFFSET_LIMIT 208
65 /* Invalid RSS context handle */
66 #define EF10_RSS_CONTEXT_INVALID (0xffffffff)
71 __checkReturn efx_rc_t
79 __checkReturn efx_rc_t
82 __in unsigned int index,
83 __in efsys_mem_t *esmp,
94 __checkReturn efx_rc_t
97 __in unsigned int count);
104 __checkReturn efx_rc_t
107 __in unsigned int us);
111 ef10_ev_qstats_update(
113 __inout_ecount(EV_NQSTATS) efsys_stat_t *stat);
114 #endif /* EFSYS_OPT_QSTATS */
117 ef10_ev_rxlabel_init(
120 __in unsigned int label,
121 __in efx_rxq_type_t type);
124 ef10_ev_rxlabel_fini(
126 __in unsigned int label);
130 __checkReturn efx_rc_t
133 __in efx_intr_type_t type,
134 __in efsys_mem_t *esmp);
138 __in efx_nic_t *enp);
142 __in efx_nic_t *enp);
145 ef10_intr_disable_unlocked(
146 __in efx_nic_t *enp);
148 __checkReturn efx_rc_t
151 __in unsigned int level);
154 ef10_intr_status_line(
156 __out boolean_t *fatalp,
157 __out uint32_t *qmaskp);
160 ef10_intr_status_message(
162 __in unsigned int message,
163 __out boolean_t *fatalp);
167 __in efx_nic_t *enp);
170 __in efx_nic_t *enp);
174 extern __checkReturn efx_rc_t
176 __in efx_nic_t *enp);
178 extern __checkReturn efx_rc_t
179 ef10_nic_set_drv_limits(
180 __inout efx_nic_t *enp,
181 __in efx_drv_limits_t *edlp);
183 extern __checkReturn efx_rc_t
184 ef10_nic_get_vi_pool(
186 __out uint32_t *vi_countp);
188 extern __checkReturn efx_rc_t
189 ef10_nic_get_bar_region(
191 __in efx_nic_region_t region,
192 __out uint32_t *offsetp,
193 __out size_t *sizep);
195 extern __checkReturn efx_rc_t
197 __in efx_nic_t *enp);
199 extern __checkReturn efx_rc_t
201 __in efx_nic_t *enp);
205 extern __checkReturn efx_rc_t
206 ef10_nic_register_test(
207 __in efx_nic_t *enp);
209 #endif /* EFSYS_OPT_DIAG */
213 __in efx_nic_t *enp);
217 __in efx_nic_t *enp);
222 extern __checkReturn efx_rc_t
225 __out efx_link_mode_t *link_modep);
227 extern __checkReturn efx_rc_t
230 __out boolean_t *mac_upp);
232 extern __checkReturn efx_rc_t
234 __in efx_nic_t *enp);
236 extern __checkReturn efx_rc_t
238 __in efx_nic_t *enp);
240 extern __checkReturn efx_rc_t
245 extern __checkReturn efx_rc_t
246 ef10_mac_reconfigure(
247 __in efx_nic_t *enp);
249 extern __checkReturn efx_rc_t
250 ef10_mac_multicast_list_set(
251 __in efx_nic_t *enp);
253 extern __checkReturn efx_rc_t
254 ef10_mac_filter_default_rxq_set(
257 __in boolean_t using_rss);
260 ef10_mac_filter_default_rxq_clear(
261 __in efx_nic_t *enp);
263 #if EFSYS_OPT_LOOPBACK
265 extern __checkReturn efx_rc_t
266 ef10_mac_loopback_set(
268 __in efx_link_mode_t link_mode,
269 __in efx_loopback_type_t loopback_type);
271 #endif /* EFSYS_OPT_LOOPBACK */
273 #if EFSYS_OPT_MAC_STATS
275 extern __checkReturn efx_rc_t
276 ef10_mac_stats_get_mask(
278 __inout_bcount(mask_size) uint32_t *maskp,
279 __in size_t mask_size);
281 extern __checkReturn efx_rc_t
282 ef10_mac_stats_update(
284 __in efsys_mem_t *esmp,
285 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
286 __inout_opt uint32_t *generationp);
288 #endif /* EFSYS_OPT_MAC_STATS */
295 extern __checkReturn efx_rc_t
298 __in const efx_mcdi_transport_t *mtp);
302 __in efx_nic_t *enp);
305 ef10_mcdi_send_request(
307 __in_bcount(hdr_len) void *hdrp,
309 __in_bcount(sdu_len) void *sdup,
310 __in size_t sdu_len);
312 extern __checkReturn boolean_t
313 ef10_mcdi_poll_response(
314 __in efx_nic_t *enp);
317 ef10_mcdi_read_response(
319 __out_bcount(length) void *bufferp,
324 ef10_mcdi_poll_reboot(
325 __in efx_nic_t *enp);
327 extern __checkReturn efx_rc_t
328 ef10_mcdi_feature_supported(
330 __in efx_mcdi_feature_id_t id,
331 __out boolean_t *supportedp);
334 ef10_mcdi_get_timeout(
336 __in efx_mcdi_req_t *emrp,
337 __out uint32_t *timeoutp);
339 #endif /* EFSYS_OPT_MCDI */
343 #if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD
345 extern __checkReturn efx_rc_t
346 ef10_nvram_buf_read_tlv(
348 __in_bcount(max_seg_size) caddr_t seg_data,
349 __in size_t max_seg_size,
351 __deref_out_bcount_opt(*sizep) caddr_t *datap,
352 __out size_t *sizep);
354 extern __checkReturn efx_rc_t
355 ef10_nvram_buf_write_tlv(
356 __inout_bcount(partn_size) caddr_t partn_data,
357 __in size_t partn_size,
359 __in_bcount(tag_size) caddr_t tag_data,
360 __in size_t tag_size,
361 __out size_t *total_lengthp);
363 extern __checkReturn efx_rc_t
364 ef10_nvram_partn_read_tlv(
368 __deref_out_bcount_opt(*sizep) caddr_t *datap,
369 __out size_t *sizep);
371 extern __checkReturn efx_rc_t
372 ef10_nvram_partn_write_tlv(
376 __in_bcount(size) caddr_t data,
379 extern __checkReturn efx_rc_t
380 ef10_nvram_partn_write_segment_tlv(
384 __in_bcount(size) caddr_t data,
386 __in boolean_t all_segments);
388 extern __checkReturn efx_rc_t
389 ef10_nvram_partn_lock(
391 __in uint32_t partn);
393 extern __checkReturn efx_rc_t
394 ef10_nvram_partn_unlock(
397 __out_opt uint32_t *resultp);
399 #endif /* EFSYS_OPT_NVRAM || EFSYS_OPT_VPD */
405 extern __checkReturn efx_rc_t
407 __in efx_nic_t *enp);
409 #endif /* EFSYS_OPT_DIAG */
411 extern __checkReturn efx_rc_t
412 ef10_nvram_type_to_partn(
414 __in efx_nvram_type_t type,
415 __out uint32_t *partnp);
417 extern __checkReturn efx_rc_t
418 ef10_nvram_partn_size(
421 __out size_t *sizep);
423 extern __checkReturn efx_rc_t
424 ef10_nvram_partn_rw_start(
427 __out size_t *chunk_sizep);
429 extern __checkReturn efx_rc_t
430 ef10_nvram_partn_read_mode(
433 __in unsigned int offset,
434 __out_bcount(size) caddr_t data,
438 extern __checkReturn efx_rc_t
439 ef10_nvram_partn_read(
442 __in unsigned int offset,
443 __out_bcount(size) caddr_t data,
446 extern __checkReturn efx_rc_t
447 ef10_nvram_partn_read_backup(
450 __in unsigned int offset,
451 __out_bcount(size) caddr_t data,
454 extern __checkReturn efx_rc_t
455 ef10_nvram_partn_erase(
458 __in unsigned int offset,
461 extern __checkReturn efx_rc_t
462 ef10_nvram_partn_write(
465 __in unsigned int offset,
466 __out_bcount(size) caddr_t data,
469 extern __checkReturn efx_rc_t
470 ef10_nvram_partn_rw_finish(
473 __out_opt uint32_t *verify_resultp);
475 extern __checkReturn efx_rc_t
476 ef10_nvram_partn_get_version(
479 __out uint32_t *subtypep,
480 __out_ecount(4) uint16_t version[4]);
482 extern __checkReturn efx_rc_t
483 ef10_nvram_partn_set_version(
486 __in_ecount(4) uint16_t version[4]);
488 extern __checkReturn efx_rc_t
489 ef10_nvram_buffer_validate(
492 __in_bcount(buffer_size)
494 __in size_t buffer_size);
496 extern __checkReturn efx_rc_t
497 ef10_nvram_buffer_create(
499 __in uint16_t partn_type,
500 __in_bcount(buffer_size)
502 __in size_t buffer_size);
504 extern __checkReturn efx_rc_t
505 ef10_nvram_buffer_find_item_start(
506 __in_bcount(buffer_size)
508 __in size_t buffer_size,
509 __out uint32_t *startp);
511 extern __checkReturn efx_rc_t
512 ef10_nvram_buffer_find_end(
513 __in_bcount(buffer_size)
515 __in size_t buffer_size,
516 __in uint32_t offset,
517 __out uint32_t *endp);
519 extern __checkReturn __success(return != B_FALSE) boolean_t
520 ef10_nvram_buffer_find_item(
521 __in_bcount(buffer_size)
523 __in size_t buffer_size,
524 __in uint32_t offset,
525 __out uint32_t *startp,
526 __out uint32_t *lengthp);
528 extern __checkReturn efx_rc_t
529 ef10_nvram_buffer_get_item(
530 __in_bcount(buffer_size)
532 __in size_t buffer_size,
533 __in uint32_t offset,
534 __in uint32_t length,
535 __out_bcount_part(item_max_size, *lengthp)
537 __in size_t item_max_size,
538 __out uint32_t *lengthp);
540 extern __checkReturn efx_rc_t
541 ef10_nvram_buffer_insert_item(
542 __in_bcount(buffer_size)
544 __in size_t buffer_size,
545 __in uint32_t offset,
546 __in_bcount(length) caddr_t keyp,
547 __in uint32_t length,
548 __out uint32_t *lengthp);
550 extern __checkReturn efx_rc_t
551 ef10_nvram_buffer_delete_item(
552 __in_bcount(buffer_size)
554 __in size_t buffer_size,
555 __in uint32_t offset,
556 __in uint32_t length,
559 extern __checkReturn efx_rc_t
560 ef10_nvram_buffer_finish(
561 __in_bcount(buffer_size)
563 __in size_t buffer_size);
565 #endif /* EFSYS_OPT_NVRAM */
570 typedef struct ef10_link_state_s {
571 uint32_t els_adv_cap_mask;
572 uint32_t els_lp_cap_mask;
573 unsigned int els_fcntl;
574 efx_link_mode_t els_link_mode;
575 #if EFSYS_OPT_LOOPBACK
576 efx_loopback_type_t els_loopback;
578 boolean_t els_mac_up;
584 __in efx_qword_t *eqp,
585 __out efx_link_mode_t *link_modep);
587 extern __checkReturn efx_rc_t
590 __out ef10_link_state_t *elsp);
592 extern __checkReturn efx_rc_t
597 extern __checkReturn efx_rc_t
598 ef10_phy_reconfigure(
599 __in efx_nic_t *enp);
601 extern __checkReturn efx_rc_t
603 __in efx_nic_t *enp);
605 extern __checkReturn efx_rc_t
608 __out uint32_t *ouip);
610 #if EFSYS_OPT_PHY_STATS
612 extern __checkReturn efx_rc_t
613 ef10_phy_stats_update(
615 __in efsys_mem_t *esmp,
616 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat);
618 #endif /* EFSYS_OPT_PHY_STATS */
622 extern __checkReturn efx_rc_t
623 ef10_bist_enable_offline(
624 __in efx_nic_t *enp);
626 extern __checkReturn efx_rc_t
629 __in efx_bist_type_t type);
631 extern __checkReturn efx_rc_t
634 __in efx_bist_type_t type,
635 __out efx_bist_result_t *resultp,
636 __out_opt __drv_when(count > 0, __notnull)
637 uint32_t *value_maskp,
638 __out_ecount_opt(count) __drv_when(count > 0, __notnull)
639 unsigned long *valuesp,
645 __in efx_bist_type_t type);
647 #endif /* EFSYS_OPT_BIST */
651 extern __checkReturn efx_rc_t
653 __in efx_nic_t *enp);
657 __in efx_nic_t *enp);
659 extern __checkReturn efx_rc_t
662 __in unsigned int index,
663 __in unsigned int label,
664 __in efsys_mem_t *esmp,
670 __out unsigned int *addedp);
674 __in efx_txq_t *etp);
676 extern __checkReturn efx_rc_t
679 __in_ecount(ndescs) efx_buffer_t *ebp,
680 __in unsigned int ndescs,
681 __in unsigned int completed,
682 __inout unsigned int *addedp);
687 __in unsigned int added,
688 __in unsigned int pushed);
690 #if EFSYS_OPT_RX_PACKED_STREAM
692 ef10_rx_qpush_ps_credits(
693 __in efx_rxq_t *erp);
695 extern __checkReturn uint8_t *
696 ef10_rx_qps_packet_info(
698 __in uint8_t *buffer,
699 __in uint32_t buffer_length,
700 __in uint32_t current_offset,
701 __out uint16_t *lengthp,
702 __out uint32_t *next_offsetp,
703 __out uint32_t *timestamp);
706 extern __checkReturn efx_rc_t
709 __in unsigned int ns);
711 extern __checkReturn efx_rc_t
713 __in efx_txq_t *etp);
717 __in efx_txq_t *etp);
719 extern __checkReturn efx_rc_t
721 __in efx_txq_t *etp);
724 ef10_tx_qpio_disable(
725 __in efx_txq_t *etp);
727 extern __checkReturn efx_rc_t
730 __in_ecount(buf_length) uint8_t *buffer,
731 __in size_t buf_length,
732 __in size_t pio_buf_offset);
734 extern __checkReturn efx_rc_t
737 __in size_t pkt_length,
738 __in unsigned int completed,
739 __inout unsigned int *addedp);
741 extern __checkReturn efx_rc_t
744 __in_ecount(n) efx_desc_t *ed,
746 __in unsigned int completed,
747 __inout unsigned int *addedp);
750 ef10_tx_qdesc_dma_create(
752 __in efsys_dma_addr_t addr,
755 __out efx_desc_t *edp);
758 ef10_tx_qdesc_tso_create(
760 __in uint16_t ipv4_id,
761 __in uint32_t tcp_seq,
762 __in uint8_t tcp_flags,
763 __out efx_desc_t *edp);
766 ef10_tx_qdesc_tso2_create(
768 __in uint16_t ipv4_id,
769 __in uint32_t tcp_seq,
770 __in uint16_t tcp_mss,
771 __out_ecount(count) efx_desc_t *edp,
775 ef10_tx_qdesc_vlantci_create(
777 __in uint16_t vlan_tci,
778 __out efx_desc_t *edp);
784 ef10_tx_qstats_update(
786 __inout_ecount(TX_NQSTATS) efsys_stat_t *stat);
788 #endif /* EFSYS_OPT_QSTATS */
790 typedef uint32_t efx_piobuf_handle_t;
792 #define EFX_PIOBUF_HANDLE_INVALID ((efx_piobuf_handle_t)-1)
794 extern __checkReturn efx_rc_t
796 __inout efx_nic_t *enp,
797 __out uint32_t *bufnump,
798 __out efx_piobuf_handle_t *handlep,
799 __out uint32_t *blknump,
800 __out uint32_t *offsetp,
801 __out size_t *sizep);
803 extern __checkReturn efx_rc_t
805 __inout efx_nic_t *enp,
806 __in uint32_t bufnum,
807 __in uint32_t blknum);
809 extern __checkReturn efx_rc_t
811 __inout efx_nic_t *enp,
812 __in uint32_t vi_index,
813 __in efx_piobuf_handle_t handle);
815 extern __checkReturn efx_rc_t
817 __inout efx_nic_t *enp,
818 __in uint32_t vi_index);
825 extern __checkReturn efx_rc_t
827 __in efx_nic_t *enp);
829 extern __checkReturn efx_rc_t
832 __out size_t *sizep);
834 extern __checkReturn efx_rc_t
837 __out_bcount(size) caddr_t data,
840 extern __checkReturn efx_rc_t
843 __in_bcount(size) caddr_t data,
846 extern __checkReturn efx_rc_t
849 __in_bcount(size) caddr_t data,
852 extern __checkReturn efx_rc_t
855 __in_bcount(size) caddr_t data,
857 __inout efx_vpd_value_t *evvp);
859 extern __checkReturn efx_rc_t
862 __in_bcount(size) caddr_t data,
864 __in efx_vpd_value_t *evvp);
866 extern __checkReturn efx_rc_t
869 __in_bcount(size) caddr_t data,
871 __out efx_vpd_value_t *evvp,
872 __inout unsigned int *contp);
874 extern __checkReturn efx_rc_t
877 __in_bcount(size) caddr_t data,
882 __in efx_nic_t *enp);
884 #endif /* EFSYS_OPT_VPD */
889 extern __checkReturn efx_rc_t
891 __in efx_nic_t *enp);
893 #if EFSYS_OPT_RX_SCATTER
894 extern __checkReturn efx_rc_t
895 ef10_rx_scatter_enable(
897 __in unsigned int buf_size);
898 #endif /* EFSYS_OPT_RX_SCATTER */
901 #if EFSYS_OPT_RX_SCALE
903 extern __checkReturn efx_rc_t
904 ef10_rx_scale_context_alloc(
906 __in efx_rx_scale_context_type_t type,
907 __in uint32_t num_queues,
908 __out uint32_t *rss_contextp);
910 extern __checkReturn efx_rc_t
911 ef10_rx_scale_context_free(
913 __in uint32_t rss_context);
915 extern __checkReturn efx_rc_t
916 ef10_rx_scale_mode_set(
918 __in uint32_t rss_context,
919 __in efx_rx_hash_alg_t alg,
920 __in efx_rx_hash_type_t type,
921 __in boolean_t insert);
923 extern __checkReturn efx_rc_t
924 ef10_rx_scale_key_set(
926 __in uint32_t rss_context,
927 __in_ecount(n) uint8_t *key,
930 extern __checkReturn efx_rc_t
931 ef10_rx_scale_tbl_set(
933 __in uint32_t rss_context,
934 __in_ecount(n) unsigned int *table,
937 extern __checkReturn uint32_t
940 __in efx_rx_hash_alg_t func,
941 __in uint8_t *buffer);
943 #endif /* EFSYS_OPT_RX_SCALE */
945 extern __checkReturn efx_rc_t
946 ef10_rx_prefix_pktlen(
948 __in uint8_t *buffer,
949 __out uint16_t *lengthp);
954 __in_ecount(ndescs) efsys_dma_addr_t *addrp,
956 __in unsigned int ndescs,
957 __in unsigned int completed,
958 __in unsigned int added);
963 __in unsigned int added,
964 __inout unsigned int *pushedp);
966 extern __checkReturn efx_rc_t
968 __in efx_rxq_t *erp);
972 __in efx_rxq_t *erp);
974 extern __checkReturn efx_rc_t
977 __in unsigned int index,
978 __in unsigned int label,
979 __in efx_rxq_type_t type,
980 __in efsys_mem_t *esmp,
984 __in efx_rxq_t *erp);
988 __in efx_rxq_t *erp);
992 __in efx_nic_t *enp);
996 typedef struct ef10_filter_handle_s {
999 } ef10_filter_handle_t;
1001 typedef struct ef10_filter_entry_s {
1002 uintptr_t efe_spec; /* pointer to filter spec plus busy bit */
1003 ef10_filter_handle_t efe_handle;
1004 } ef10_filter_entry_t;
1007 * BUSY flag indicates that an update is in progress.
1008 * AUTO_OLD flag is used to mark and sweep MAC packet filters.
1010 #define EFX_EF10_FILTER_FLAG_BUSY 1U
1011 #define EFX_EF10_FILTER_FLAG_AUTO_OLD 2U
1012 #define EFX_EF10_FILTER_FLAGS 3U
1015 * Size of the hash table used by the driver. Doesn't need to be the
1016 * same size as the hardware's table.
1018 #define EFX_EF10_FILTER_TBL_ROWS 8192
1020 /* Only need to allow for one directed and one unknown unicast filter */
1021 #define EFX_EF10_FILTER_UNICAST_FILTERS_MAX 2
1023 /* Allow for the broadcast address to be added to the multicast list */
1024 #define EFX_EF10_FILTER_MULTICAST_FILTERS_MAX (EFX_MAC_MULTICAST_LIST_MAX + 1)
1027 * For encapsulated packets, there is one filter each for each combination of
1028 * IPv4 or IPv6 outer frame, VXLAN, GENEVE or NVGRE packet type, and unicast or
1029 * multicast inner frames.
1031 #define EFX_EF10_FILTER_ENCAP_FILTERS_MAX 12
1033 typedef struct ef10_filter_table_s {
1034 ef10_filter_entry_t eft_entry[EFX_EF10_FILTER_TBL_ROWS];
1035 efx_rxq_t *eft_default_rxq;
1036 boolean_t eft_using_rss;
1037 uint32_t eft_unicst_filter_indexes[
1038 EFX_EF10_FILTER_UNICAST_FILTERS_MAX];
1039 uint32_t eft_unicst_filter_count;
1040 uint32_t eft_mulcst_filter_indexes[
1041 EFX_EF10_FILTER_MULTICAST_FILTERS_MAX];
1042 uint32_t eft_mulcst_filter_count;
1043 boolean_t eft_using_all_mulcst;
1044 uint32_t eft_encap_filter_indexes[
1045 EFX_EF10_FILTER_ENCAP_FILTERS_MAX];
1046 uint32_t eft_encap_filter_count;
1047 } ef10_filter_table_t;
1049 __checkReturn efx_rc_t
1051 __in efx_nic_t *enp);
1055 __in efx_nic_t *enp);
1057 __checkReturn efx_rc_t
1058 ef10_filter_restore(
1059 __in efx_nic_t *enp);
1061 __checkReturn efx_rc_t
1063 __in efx_nic_t *enp,
1064 __inout efx_filter_spec_t *spec,
1065 __in boolean_t may_replace);
1067 __checkReturn efx_rc_t
1069 __in efx_nic_t *enp,
1070 __inout efx_filter_spec_t *spec);
1072 extern __checkReturn efx_rc_t
1073 ef10_filter_supported_filters(
1074 __in efx_nic_t *enp,
1075 __out_ecount(buffer_length) uint32_t *buffer,
1076 __in size_t buffer_length,
1077 __out size_t *list_lengthp);
1079 extern __checkReturn efx_rc_t
1080 ef10_filter_reconfigure(
1081 __in efx_nic_t *enp,
1082 __in_ecount(6) uint8_t const *mac_addr,
1083 __in boolean_t all_unicst,
1084 __in boolean_t mulcst,
1085 __in boolean_t all_mulcst,
1086 __in boolean_t brdcst,
1087 __in_ecount(6*count) uint8_t const *addrs,
1088 __in uint32_t count);
1091 ef10_filter_get_default_rxq(
1092 __in efx_nic_t *enp,
1093 __out efx_rxq_t **erpp,
1094 __out boolean_t *using_rss);
1097 ef10_filter_default_rxq_set(
1098 __in efx_nic_t *enp,
1099 __in efx_rxq_t *erp,
1100 __in boolean_t using_rss);
1103 ef10_filter_default_rxq_clear(
1104 __in efx_nic_t *enp);
1107 #endif /* EFSYS_OPT_FILTER */
1109 extern __checkReturn efx_rc_t
1110 efx_mcdi_get_function_info(
1111 __in efx_nic_t *enp,
1112 __out uint32_t *pfp,
1113 __out_opt uint32_t *vfp);
1115 extern __checkReturn efx_rc_t
1116 efx_mcdi_privilege_mask(
1117 __in efx_nic_t *enp,
1120 __out uint32_t *maskp);
1122 extern __checkReturn efx_rc_t
1123 efx_mcdi_get_port_assignment(
1124 __in efx_nic_t *enp,
1125 __out uint32_t *portp);
1127 extern __checkReturn efx_rc_t
1128 efx_mcdi_get_port_modes(
1129 __in efx_nic_t *enp,
1130 __out uint32_t *modesp,
1131 __out_opt uint32_t *current_modep);
1133 extern __checkReturn efx_rc_t
1134 ef10_nic_get_port_mode_bandwidth(
1135 __in uint32_t port_mode,
1136 __out uint32_t *bandwidth_mbpsp);
1138 extern __checkReturn efx_rc_t
1139 efx_mcdi_get_mac_address_pf(
1140 __in efx_nic_t *enp,
1141 __out_ecount_opt(6) uint8_t mac_addrp[6]);
1143 extern __checkReturn efx_rc_t
1144 efx_mcdi_get_mac_address_vf(
1145 __in efx_nic_t *enp,
1146 __out_ecount_opt(6) uint8_t mac_addrp[6]);
1148 extern __checkReturn efx_rc_t
1150 __in efx_nic_t *enp,
1151 __out uint32_t *sys_freqp,
1152 __out uint32_t *dpcpu_freqp);
1155 extern __checkReturn efx_rc_t
1156 efx_mcdi_get_vector_cfg(
1157 __in efx_nic_t *enp,
1158 __out_opt uint32_t *vec_basep,
1159 __out_opt uint32_t *pf_nvecp,
1160 __out_opt uint32_t *vf_nvecp);
1162 extern __checkReturn efx_rc_t
1163 ef10_get_datapath_caps(
1164 __in efx_nic_t *enp);
1166 extern __checkReturn efx_rc_t
1167 ef10_get_privilege_mask(
1168 __in efx_nic_t *enp,
1169 __out uint32_t *maskp);
1171 extern __checkReturn efx_rc_t
1172 ef10_external_port_mapping(
1173 __in efx_nic_t *enp,
1175 __out uint8_t *external_portp);
1177 #if EFSYS_OPT_RX_PACKED_STREAM
1179 /* Data space per credit in packed stream mode */
1180 #define EFX_RX_PACKED_STREAM_MEM_PER_CREDIT (1 << 16)
1183 * Received packets are always aligned at this boundary. Also there always
1184 * exists a gap of this size between packets.
1185 * (see SF-112241-TC, 4.5)
1187 #define EFX_RX_PACKED_STREAM_ALIGNMENT 64
1190 * Size of a pseudo-header prepended to received packets
1191 * in packed stream mode
1193 #define EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE 8
1195 /* Minimum space for packet in packed stream mode */
1196 #define EFX_RX_PACKED_STREAM_MIN_PACKET_SPACE \
1197 P2ROUNDUP(EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE + \
1199 EFX_RX_PACKED_STREAM_ALIGNMENT, \
1200 EFX_RX_PACKED_STREAM_ALIGNMENT)
1202 /* Maximum number of credits */
1203 #define EFX_RX_PACKED_STREAM_MAX_CREDITS 127
1205 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
1211 #endif /* _SYS_EF10_IMPL_H */