1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2012-2018 Solarflare Communications Inc.
10 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
14 __in uint32_t mcdi_cap,
15 __out uint32_t *maskp)
19 #define CHECK_CAP(_cap) \
20 EFX_STATIC_ASSERT(EFX_PHY_CAP_##_cap == MC_CMD_PHY_CAP_##_cap##_LBN)
38 CHECK_CAP(BASER_FEC_REQUESTED);
40 CHECK_CAP(RS_FEC_REQUESTED);
41 CHECK_CAP(25G_BASER_FEC);
42 CHECK_CAP(25G_BASER_FEC_REQUESTED);
46 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10HDX_LBN))
47 mask |= (1 << EFX_PHY_CAP_10HDX);
48 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10FDX_LBN))
49 mask |= (1 << EFX_PHY_CAP_10FDX);
50 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_100HDX_LBN))
51 mask |= (1 << EFX_PHY_CAP_100HDX);
52 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_100FDX_LBN))
53 mask |= (1 << EFX_PHY_CAP_100FDX);
54 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_1000HDX_LBN))
55 mask |= (1 << EFX_PHY_CAP_1000HDX);
56 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN))
57 mask |= (1 << EFX_PHY_CAP_1000FDX);
58 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN))
59 mask |= (1 << EFX_PHY_CAP_10000FDX);
60 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_25000FDX_LBN))
61 mask |= (1 << EFX_PHY_CAP_25000FDX);
62 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_40000FDX_LBN))
63 mask |= (1 << EFX_PHY_CAP_40000FDX);
64 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_50000FDX_LBN))
65 mask |= (1 << EFX_PHY_CAP_50000FDX);
66 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_100000FDX_LBN))
67 mask |= (1 << EFX_PHY_CAP_100000FDX);
69 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_PAUSE_LBN))
70 mask |= (1 << EFX_PHY_CAP_PAUSE);
71 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_ASYM_LBN))
72 mask |= (1 << EFX_PHY_CAP_ASYM);
73 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_AN_LBN))
74 mask |= (1 << EFX_PHY_CAP_AN);
76 /* FEC caps (supported on Medford2 and later) */
77 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_BASER_FEC_LBN))
78 mask |= (1 << EFX_PHY_CAP_BASER_FEC);
79 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_BASER_FEC_REQUESTED_LBN))
80 mask |= (1 << EFX_PHY_CAP_BASER_FEC_REQUESTED);
82 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_RS_FEC_LBN))
83 mask |= (1 << EFX_PHY_CAP_RS_FEC);
84 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_RS_FEC_REQUESTED_LBN))
85 mask |= (1 << EFX_PHY_CAP_RS_FEC_REQUESTED);
87 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_25G_BASER_FEC_LBN))
88 mask |= (1 << EFX_PHY_CAP_25G_BASER_FEC);
89 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_LBN))
90 mask |= (1 << EFX_PHY_CAP_25G_BASER_FEC_REQUESTED);
96 mcdi_phy_decode_link_mode(
98 __in uint32_t link_flags,
99 __in unsigned int speed,
100 __in unsigned int fcntl,
101 __out efx_link_mode_t *link_modep,
102 __out unsigned int *fcntlp)
104 boolean_t fd = !!(link_flags &
105 (1 << MC_CMD_GET_LINK_OUT_FULL_DUPLEX_LBN));
106 boolean_t up = !!(link_flags &
107 (1 << MC_CMD_GET_LINK_OUT_LINK_UP_LBN));
109 _NOTE(ARGUNUSED(enp))
112 *link_modep = EFX_LINK_DOWN;
113 else if (speed == 100000 && fd)
114 *link_modep = EFX_LINK_100000FDX;
115 else if (speed == 50000 && fd)
116 *link_modep = EFX_LINK_50000FDX;
117 else if (speed == 40000 && fd)
118 *link_modep = EFX_LINK_40000FDX;
119 else if (speed == 25000 && fd)
120 *link_modep = EFX_LINK_25000FDX;
121 else if (speed == 10000 && fd)
122 *link_modep = EFX_LINK_10000FDX;
123 else if (speed == 1000)
124 *link_modep = fd ? EFX_LINK_1000FDX : EFX_LINK_1000HDX;
125 else if (speed == 100)
126 *link_modep = fd ? EFX_LINK_100FDX : EFX_LINK_100HDX;
127 else if (speed == 10)
128 *link_modep = fd ? EFX_LINK_10FDX : EFX_LINK_10HDX;
130 *link_modep = EFX_LINK_UNKNOWN;
132 if (fcntl == MC_CMD_FCNTL_OFF)
134 else if (fcntl == MC_CMD_FCNTL_RESPOND)
135 *fcntlp = EFX_FCNTL_RESPOND;
136 else if (fcntl == MC_CMD_FCNTL_GENERATE)
137 *fcntlp = EFX_FCNTL_GENERATE;
138 else if (fcntl == MC_CMD_FCNTL_BIDIR)
139 *fcntlp = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
141 EFSYS_PROBE1(mc_pcol_error, int, fcntl);
150 __in efx_qword_t *eqp,
151 __out efx_link_mode_t *link_modep)
153 efx_port_t *epp = &(enp->en_port);
154 unsigned int link_flags;
157 efx_link_mode_t link_mode;
158 uint32_t lp_cap_mask;
161 * Convert the LINKCHANGE speed enumeration into mbit/s, in the
162 * same way as GET_LINK encodes the speed
164 switch (MCDI_EV_FIELD(eqp, LINKCHANGE_SPEED)) {
165 case MCDI_EVENT_LINKCHANGE_SPEED_100M:
168 case MCDI_EVENT_LINKCHANGE_SPEED_1G:
171 case MCDI_EVENT_LINKCHANGE_SPEED_10G:
174 case MCDI_EVENT_LINKCHANGE_SPEED_25G:
177 case MCDI_EVENT_LINKCHANGE_SPEED_40G:
180 case MCDI_EVENT_LINKCHANGE_SPEED_50G:
183 case MCDI_EVENT_LINKCHANGE_SPEED_100G:
191 link_flags = MCDI_EV_FIELD(eqp, LINKCHANGE_LINK_FLAGS);
192 mcdi_phy_decode_link_mode(enp, link_flags, speed,
193 MCDI_EV_FIELD(eqp, LINKCHANGE_FCNTL),
195 mcdi_phy_decode_cap(MCDI_EV_FIELD(eqp, LINKCHANGE_LP_CAP),
199 * It's safe to update ep_lp_cap_mask without the driver's port lock
200 * because presumably any concurrently running efx_port_poll() is
201 * only going to arrive at the same value.
203 * ep_fcntl has two meanings. It's either the link common fcntl
204 * (if the PHY supports AN), or it's the forced link state. If
205 * the former, it's safe to update the value for the same reason as
206 * for ep_lp_cap_mask. If the latter, then just ignore the value,
207 * because we can race with efx_mac_fcntl_set().
209 epp->ep_lp_cap_mask = lp_cap_mask;
210 epp->ep_fcntl = fcntl;
212 *link_modep = link_mode;
215 __checkReturn efx_rc_t
218 __in boolean_t power)
225 /* Check if the PHY is a zombie */
226 if ((rc = ef10_phy_verify(enp)) != 0)
229 enp->en_reset_flags |= EFX_RESET_PHY;
234 EFSYS_PROBE1(fail1, efx_rc_t, rc);
239 __checkReturn efx_rc_t
242 __out ef10_link_state_t *elsp)
245 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_LINK_IN_LEN,
246 MC_CMD_GET_LINK_OUT_LEN);
249 req.emr_cmd = MC_CMD_GET_LINK;
250 req.emr_in_buf = payload;
251 req.emr_in_length = MC_CMD_GET_LINK_IN_LEN;
252 req.emr_out_buf = payload;
253 req.emr_out_length = MC_CMD_GET_LINK_OUT_LEN;
255 efx_mcdi_execute(enp, &req);
257 if (req.emr_rc != 0) {
262 if (req.emr_out_length_used < MC_CMD_GET_LINK_OUT_LEN) {
267 mcdi_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_CAP),
268 &elsp->els_adv_cap_mask);
269 mcdi_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_LP_CAP),
270 &elsp->els_lp_cap_mask);
272 mcdi_phy_decode_link_mode(enp, MCDI_OUT_DWORD(req, GET_LINK_OUT_FLAGS),
273 MCDI_OUT_DWORD(req, GET_LINK_OUT_LINK_SPEED),
274 MCDI_OUT_DWORD(req, GET_LINK_OUT_FCNTL),
275 &elsp->els_link_mode, &elsp->els_fcntl);
277 #if EFSYS_OPT_LOOPBACK
279 * MC_CMD_LOOPBACK and EFX_LOOPBACK names are equivalent, so use the
280 * MCDI value directly. Agreement is checked in efx_loopback_mask().
282 elsp->els_loopback = MCDI_OUT_DWORD(req, GET_LINK_OUT_LOOPBACK_MODE);
283 #endif /* EFSYS_OPT_LOOPBACK */
285 elsp->els_mac_up = MCDI_OUT_DWORD(req, GET_LINK_OUT_MAC_FAULT) == 0;
292 EFSYS_PROBE1(fail1, efx_rc_t, rc);
297 __checkReturn efx_rc_t
298 ef10_phy_reconfigure(
301 efx_port_t *epp = &(enp->en_port);
303 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_SET_LINK_IN_LEN,
304 MC_CMD_SET_LINK_OUT_LEN);
306 #if EFSYS_OPT_PHY_LED_CONTROL
307 unsigned int led_mode;
313 if ((rc = efx_mcdi_link_control_supported(enp, &supported)) != 0)
315 if (supported == B_FALSE)
318 req.emr_cmd = MC_CMD_SET_LINK;
319 req.emr_in_buf = payload;
320 req.emr_in_length = MC_CMD_SET_LINK_IN_LEN;
321 req.emr_out_buf = payload;
322 req.emr_out_length = MC_CMD_SET_LINK_OUT_LEN;
324 cap_mask = epp->ep_adv_cap_mask;
325 MCDI_IN_POPULATE_DWORD_10(req, SET_LINK_IN_CAP,
326 PHY_CAP_10HDX, (cap_mask >> EFX_PHY_CAP_10HDX) & 0x1,
327 PHY_CAP_10FDX, (cap_mask >> EFX_PHY_CAP_10FDX) & 0x1,
328 PHY_CAP_100HDX, (cap_mask >> EFX_PHY_CAP_100HDX) & 0x1,
329 PHY_CAP_100FDX, (cap_mask >> EFX_PHY_CAP_100FDX) & 0x1,
330 PHY_CAP_1000HDX, (cap_mask >> EFX_PHY_CAP_1000HDX) & 0x1,
331 PHY_CAP_1000FDX, (cap_mask >> EFX_PHY_CAP_1000FDX) & 0x1,
332 PHY_CAP_10000FDX, (cap_mask >> EFX_PHY_CAP_10000FDX) & 0x1,
333 PHY_CAP_PAUSE, (cap_mask >> EFX_PHY_CAP_PAUSE) & 0x1,
334 PHY_CAP_ASYM, (cap_mask >> EFX_PHY_CAP_ASYM) & 0x1,
335 PHY_CAP_AN, (cap_mask >> EFX_PHY_CAP_AN) & 0x1);
336 /* Too many fields for for POPULATE macros, so insert this afterwards */
337 MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
338 PHY_CAP_25000FDX, (cap_mask >> EFX_PHY_CAP_25000FDX) & 0x1);
339 MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
340 PHY_CAP_40000FDX, (cap_mask >> EFX_PHY_CAP_40000FDX) & 0x1);
341 MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
342 PHY_CAP_50000FDX, (cap_mask >> EFX_PHY_CAP_50000FDX) & 0x1);
343 MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
344 PHY_CAP_100000FDX, (cap_mask >> EFX_PHY_CAP_100000FDX) & 0x1);
346 MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
347 PHY_CAP_BASER_FEC, (cap_mask >> EFX_PHY_CAP_BASER_FEC) & 0x1);
348 MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
349 PHY_CAP_BASER_FEC_REQUESTED,
350 (cap_mask >> EFX_PHY_CAP_BASER_FEC_REQUESTED) & 0x1);
352 MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
353 PHY_CAP_RS_FEC, (cap_mask >> EFX_PHY_CAP_RS_FEC) & 0x1);
354 MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
355 PHY_CAP_RS_FEC_REQUESTED,
356 (cap_mask >> EFX_PHY_CAP_RS_FEC_REQUESTED) & 0x1);
358 MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
359 PHY_CAP_25G_BASER_FEC,
360 (cap_mask >> EFX_PHY_CAP_25G_BASER_FEC) & 0x1);
361 MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
362 PHY_CAP_25G_BASER_FEC_REQUESTED,
363 (cap_mask >> EFX_PHY_CAP_25G_BASER_FEC_REQUESTED) & 0x1);
365 #if EFSYS_OPT_LOOPBACK
366 MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_MODE,
367 epp->ep_loopback_type);
368 switch (epp->ep_loopback_link_mode) {
369 case EFX_LINK_100FDX:
372 case EFX_LINK_1000FDX:
375 case EFX_LINK_10000FDX:
378 case EFX_LINK_25000FDX:
381 case EFX_LINK_40000FDX:
384 case EFX_LINK_50000FDX:
387 case EFX_LINK_100000FDX:
394 MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_MODE, MC_CMD_LOOPBACK_NONE);
396 #endif /* EFSYS_OPT_LOOPBACK */
397 MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_SPEED, speed);
399 #if EFSYS_OPT_PHY_FLAGS
400 MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, epp->ep_phy_flags);
402 MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, 0);
403 #endif /* EFSYS_OPT_PHY_FLAGS */
405 efx_mcdi_execute(enp, &req);
407 if (req.emr_rc != 0) {
412 /* And set the blink mode */
413 (void) memset(payload, 0, sizeof (payload));
414 req.emr_cmd = MC_CMD_SET_ID_LED;
415 req.emr_in_buf = payload;
416 req.emr_in_length = MC_CMD_SET_ID_LED_IN_LEN;
417 req.emr_out_buf = payload;
418 req.emr_out_length = MC_CMD_SET_ID_LED_OUT_LEN;
420 #if EFSYS_OPT_PHY_LED_CONTROL
421 switch (epp->ep_phy_led_mode) {
422 case EFX_PHY_LED_DEFAULT:
423 led_mode = MC_CMD_LED_DEFAULT;
425 case EFX_PHY_LED_OFF:
426 led_mode = MC_CMD_LED_OFF;
429 led_mode = MC_CMD_LED_ON;
433 led_mode = MC_CMD_LED_DEFAULT;
436 MCDI_IN_SET_DWORD(req, SET_ID_LED_IN_STATE, led_mode);
438 MCDI_IN_SET_DWORD(req, SET_ID_LED_IN_STATE, MC_CMD_LED_DEFAULT);
439 #endif /* EFSYS_OPT_PHY_LED_CONTROL */
441 efx_mcdi_execute(enp, &req);
443 if (req.emr_rc != 0) {
455 EFSYS_PROBE1(fail1, efx_rc_t, rc);
460 __checkReturn efx_rc_t
465 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_PHY_STATE_IN_LEN,
466 MC_CMD_GET_PHY_STATE_OUT_LEN);
470 req.emr_cmd = MC_CMD_GET_PHY_STATE;
471 req.emr_in_buf = payload;
472 req.emr_in_length = MC_CMD_GET_PHY_STATE_IN_LEN;
473 req.emr_out_buf = payload;
474 req.emr_out_length = MC_CMD_GET_PHY_STATE_OUT_LEN;
476 efx_mcdi_execute(enp, &req);
478 if (req.emr_rc != 0) {
483 if (req.emr_out_length_used < MC_CMD_GET_PHY_STATE_OUT_LEN) {
488 state = MCDI_OUT_DWORD(req, GET_PHY_STATE_OUT_STATE);
489 if (state != MC_CMD_PHY_STATE_OK) {
490 if (state != MC_CMD_PHY_STATE_ZOMBIE)
491 EFSYS_PROBE1(mc_pcol_error, int, state);
503 EFSYS_PROBE1(fail1, efx_rc_t, rc);
508 __checkReturn efx_rc_t
511 __out uint32_t *ouip)
513 _NOTE(ARGUNUSED(enp, ouip))
518 #if EFSYS_OPT_PHY_STATS
520 __checkReturn efx_rc_t
521 ef10_phy_stats_update(
523 __in efsys_mem_t *esmp,
524 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat)
526 /* TBD: no stats support in firmware yet */
527 _NOTE(ARGUNUSED(enp, esmp))
528 memset(stat, 0, EFX_PHY_NSTATS * sizeof (*stat));
533 #endif /* EFSYS_OPT_PHY_STATS */
537 __checkReturn efx_rc_t
538 ef10_bist_enable_offline(
543 if ((rc = efx_mcdi_bist_enable_offline(enp)) != 0)
549 EFSYS_PROBE1(fail1, efx_rc_t, rc);
554 __checkReturn efx_rc_t
557 __in efx_bist_type_t type)
561 if ((rc = efx_mcdi_bist_start(enp, type)) != 0)
567 EFSYS_PROBE1(fail1, efx_rc_t, rc);
572 __checkReturn efx_rc_t
575 __in efx_bist_type_t type,
576 __out efx_bist_result_t *resultp,
577 __out_opt __drv_when(count > 0, __notnull)
578 uint32_t *value_maskp,
579 __out_ecount_opt(count) __drv_when(count > 0, __notnull)
580 unsigned long *valuesp,
584 * MCDI_CTL_SDU_LEN_MAX_V1 is large enough cover all BIST results,
585 * whilst not wasting stack.
587 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_POLL_BIST_IN_LEN,
588 MCDI_CTL_SDU_LEN_MAX_V1);
589 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
591 uint32_t value_mask = 0;
595 EFX_STATIC_ASSERT(MC_CMD_POLL_BIST_OUT_LEN <=
596 MCDI_CTL_SDU_LEN_MAX_V1);
597 EFX_STATIC_ASSERT(MC_CMD_POLL_BIST_OUT_SFT9001_LEN <=
598 MCDI_CTL_SDU_LEN_MAX_V1);
599 EFX_STATIC_ASSERT(MC_CMD_POLL_BIST_OUT_MRSFP_LEN <=
600 MCDI_CTL_SDU_LEN_MAX_V1);
601 EFX_STATIC_ASSERT(MC_CMD_POLL_BIST_OUT_MEM_LEN <=
602 MCDI_CTL_SDU_LEN_MAX_V1);
604 _NOTE(ARGUNUSED(type))
606 req.emr_cmd = MC_CMD_POLL_BIST;
607 req.emr_in_buf = payload;
608 req.emr_in_length = MC_CMD_POLL_BIST_IN_LEN;
609 req.emr_out_buf = payload;
610 req.emr_out_length = MCDI_CTL_SDU_LEN_MAX_V1;
612 efx_mcdi_execute(enp, &req);
614 if (req.emr_rc != 0) {
619 if (req.emr_out_length_used < MC_CMD_POLL_BIST_OUT_RESULT_OFST + 4) {
625 (void) memset(valuesp, '\0', count * sizeof (unsigned long));
627 result = MCDI_OUT_DWORD(req, POLL_BIST_OUT_RESULT);
629 if (result == MC_CMD_POLL_BIST_FAILED &&
630 req.emr_out_length >= MC_CMD_POLL_BIST_OUT_MEM_LEN &&
631 count > EFX_BIST_MEM_ECC_FATAL) {
632 if (valuesp != NULL) {
633 valuesp[EFX_BIST_MEM_TEST] =
634 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_TEST);
635 valuesp[EFX_BIST_MEM_ADDR] =
636 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ADDR);
637 valuesp[EFX_BIST_MEM_BUS] =
638 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_BUS);
639 valuesp[EFX_BIST_MEM_EXPECT] =
640 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_EXPECT);
641 valuesp[EFX_BIST_MEM_ACTUAL] =
642 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ACTUAL);
643 valuesp[EFX_BIST_MEM_ECC] =
644 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC);
645 valuesp[EFX_BIST_MEM_ECC_PARITY] =
646 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC_PARITY);
647 valuesp[EFX_BIST_MEM_ECC_FATAL] =
648 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC_FATAL);
650 value_mask |= (1 << EFX_BIST_MEM_TEST) |
651 (1 << EFX_BIST_MEM_ADDR) |
652 (1 << EFX_BIST_MEM_BUS) |
653 (1 << EFX_BIST_MEM_EXPECT) |
654 (1 << EFX_BIST_MEM_ACTUAL) |
655 (1 << EFX_BIST_MEM_ECC) |
656 (1 << EFX_BIST_MEM_ECC_PARITY) |
657 (1 << EFX_BIST_MEM_ECC_FATAL);
658 } else if (result == MC_CMD_POLL_BIST_FAILED &&
659 encp->enc_phy_type == EFX_PHY_XFI_FARMI &&
660 req.emr_out_length >= MC_CMD_POLL_BIST_OUT_MRSFP_LEN &&
661 count > EFX_BIST_FAULT_CODE) {
663 valuesp[EFX_BIST_FAULT_CODE] =
664 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MRSFP_TEST);
665 value_mask |= 1 << EFX_BIST_FAULT_CODE;
668 if (value_maskp != NULL)
669 *value_maskp = value_mask;
671 EFSYS_ASSERT(resultp != NULL);
672 if (result == MC_CMD_POLL_BIST_RUNNING)
673 *resultp = EFX_BIST_RESULT_RUNNING;
674 else if (result == MC_CMD_POLL_BIST_PASSED)
675 *resultp = EFX_BIST_RESULT_PASSED;
677 *resultp = EFX_BIST_RESULT_FAILED;
684 EFSYS_PROBE1(fail1, efx_rc_t, rc);
692 __in efx_bist_type_t type)
694 /* There is no way to stop BIST on EF10. */
695 _NOTE(ARGUNUSED(enp, type))
698 #endif /* EFSYS_OPT_BIST */
700 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */