2 * Copyright (c) 2012-2016 Solarflare Communications Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * The views and conclusions contained in the software and documentation are
27 * those of the authors and should not be interpreted as representing official
28 * policies, either expressed or implied, of the FreeBSD Project.
35 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
38 static __checkReturn efx_rc_t
42 __in uint32_t target_evq,
44 __in uint32_t instance,
45 __in efsys_mem_t *esmp,
46 __in boolean_t disable_scatter,
47 __in uint32_t ps_bufsize)
50 uint8_t payload[MAX(MC_CMD_INIT_RXQ_EXT_IN_LEN,
51 MC_CMD_INIT_RXQ_EXT_OUT_LEN)];
52 int npages = EFX_RXQ_NBUFS(size);
54 efx_qword_t *dma_addr;
59 /* If this changes, then the payload size might need to change. */
60 EFSYS_ASSERT3U(MC_CMD_INIT_RXQ_OUT_LEN, ==, 0);
61 EFSYS_ASSERT3U(size, <=, EFX_RXQ_MAXNDESCS);
64 dma_mode = MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM;
66 dma_mode = MC_CMD_INIT_RXQ_EXT_IN_SINGLE_PACKET;
68 (void) memset(payload, 0, sizeof (payload));
69 req.emr_cmd = MC_CMD_INIT_RXQ;
70 req.emr_in_buf = payload;
71 req.emr_in_length = MC_CMD_INIT_RXQ_EXT_IN_LEN;
72 req.emr_out_buf = payload;
73 req.emr_out_length = MC_CMD_INIT_RXQ_EXT_OUT_LEN;
75 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_SIZE, size);
76 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_TARGET_EVQ, target_evq);
77 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_LABEL, label);
78 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_INSTANCE, instance);
79 MCDI_IN_POPULATE_DWORD_8(req, INIT_RXQ_EXT_IN_FLAGS,
80 INIT_RXQ_EXT_IN_FLAG_BUFF_MODE, 0,
81 INIT_RXQ_EXT_IN_FLAG_HDR_SPLIT, 0,
82 INIT_RXQ_EXT_IN_FLAG_TIMESTAMP, 0,
83 INIT_RXQ_EXT_IN_CRC_MODE, 0,
84 INIT_RXQ_EXT_IN_FLAG_PREFIX, 1,
85 INIT_RXQ_EXT_IN_FLAG_DISABLE_SCATTER, disable_scatter,
86 INIT_RXQ_EXT_IN_DMA_MODE,
88 INIT_RXQ_EXT_IN_PACKED_STREAM_BUFF_SIZE, ps_bufsize);
89 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_OWNER_ID, 0);
90 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_PORT_ID, EVB_PORT_ID_ASSIGNED);
92 dma_addr = MCDI_IN2(req, efx_qword_t, INIT_RXQ_IN_DMA_ADDR);
93 addr = EFSYS_MEM_ADDR(esmp);
95 for (i = 0; i < npages; i++) {
96 EFX_POPULATE_QWORD_2(*dma_addr,
97 EFX_DWORD_1, (uint32_t)(addr >> 32),
98 EFX_DWORD_0, (uint32_t)(addr & 0xffffffff));
101 addr += EFX_BUF_SIZE;
104 efx_mcdi_execute(enp, &req);
106 if (req.emr_rc != 0) {
114 EFSYS_PROBE1(fail1, efx_rc_t, rc);
119 static __checkReturn efx_rc_t
122 __in uint32_t instance)
125 uint8_t payload[MAX(MC_CMD_FINI_RXQ_IN_LEN,
126 MC_CMD_FINI_RXQ_OUT_LEN)];
129 (void) memset(payload, 0, sizeof (payload));
130 req.emr_cmd = MC_CMD_FINI_RXQ;
131 req.emr_in_buf = payload;
132 req.emr_in_length = MC_CMD_FINI_RXQ_IN_LEN;
133 req.emr_out_buf = payload;
134 req.emr_out_length = MC_CMD_FINI_RXQ_OUT_LEN;
136 MCDI_IN_SET_DWORD(req, FINI_RXQ_IN_INSTANCE, instance);
138 efx_mcdi_execute_quiet(enp, &req);
140 if (req.emr_rc != 0) {
149 * EALREADY is not an error, but indicates that the MC has rebooted and
150 * that the RXQ has already been destroyed.
153 EFSYS_PROBE1(fail1, efx_rc_t, rc);
158 #if EFSYS_OPT_RX_SCALE
159 static __checkReturn efx_rc_t
160 efx_mcdi_rss_context_alloc(
162 __in efx_rx_scale_context_type_t type,
163 __in uint32_t num_queues,
164 __out uint32_t *rss_contextp)
167 uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_ALLOC_IN_LEN,
168 MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN)];
169 uint32_t rss_context;
170 uint32_t context_type;
173 if (num_queues > EFX_MAXRSS) {
179 case EFX_RX_SCALE_EXCLUSIVE:
180 context_type = MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_EXCLUSIVE;
182 case EFX_RX_SCALE_SHARED:
183 context_type = MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_SHARED;
190 (void) memset(payload, 0, sizeof (payload));
191 req.emr_cmd = MC_CMD_RSS_CONTEXT_ALLOC;
192 req.emr_in_buf = payload;
193 req.emr_in_length = MC_CMD_RSS_CONTEXT_ALLOC_IN_LEN;
194 req.emr_out_buf = payload;
195 req.emr_out_length = MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN;
197 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_UPSTREAM_PORT_ID,
198 EVB_PORT_ID_ASSIGNED);
199 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_TYPE, context_type);
200 /* NUM_QUEUES is only used to validate indirection table offsets */
201 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_NUM_QUEUES, num_queues);
203 efx_mcdi_execute(enp, &req);
205 if (req.emr_rc != 0) {
210 if (req.emr_out_length_used < MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN) {
215 rss_context = MCDI_OUT_DWORD(req, RSS_CONTEXT_ALLOC_OUT_RSS_CONTEXT_ID);
216 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
221 *rss_contextp = rss_context;
234 EFSYS_PROBE1(fail1, efx_rc_t, rc);
238 #endif /* EFSYS_OPT_RX_SCALE */
240 #if EFSYS_OPT_RX_SCALE
242 efx_mcdi_rss_context_free(
244 __in uint32_t rss_context)
247 uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_FREE_IN_LEN,
248 MC_CMD_RSS_CONTEXT_FREE_OUT_LEN)];
251 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
256 (void) memset(payload, 0, sizeof (payload));
257 req.emr_cmd = MC_CMD_RSS_CONTEXT_FREE;
258 req.emr_in_buf = payload;
259 req.emr_in_length = MC_CMD_RSS_CONTEXT_FREE_IN_LEN;
260 req.emr_out_buf = payload;
261 req.emr_out_length = MC_CMD_RSS_CONTEXT_FREE_OUT_LEN;
263 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_FREE_IN_RSS_CONTEXT_ID, rss_context);
265 efx_mcdi_execute_quiet(enp, &req);
267 if (req.emr_rc != 0) {
277 EFSYS_PROBE1(fail1, efx_rc_t, rc);
281 #endif /* EFSYS_OPT_RX_SCALE */
283 #if EFSYS_OPT_RX_SCALE
285 efx_mcdi_rss_context_set_flags(
287 __in uint32_t rss_context,
288 __in efx_rx_hash_type_t type)
291 uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN,
292 MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN)];
295 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
300 (void) memset(payload, 0, sizeof (payload));
301 req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_FLAGS;
302 req.emr_in_buf = payload;
303 req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN;
304 req.emr_out_buf = payload;
305 req.emr_out_length = MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN;
307 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_FLAGS_IN_RSS_CONTEXT_ID,
310 MCDI_IN_POPULATE_DWORD_4(req, RSS_CONTEXT_SET_FLAGS_IN_FLAGS,
311 RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV4_EN,
312 (type & EFX_RX_HASH_IPV4) ? 1 : 0,
313 RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV4_EN,
314 (type & EFX_RX_HASH_TCPIPV4) ? 1 : 0,
315 RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV6_EN,
316 (type & EFX_RX_HASH_IPV6) ? 1 : 0,
317 RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV6_EN,
318 (type & EFX_RX_HASH_TCPIPV6) ? 1 : 0);
320 efx_mcdi_execute(enp, &req);
322 if (req.emr_rc != 0) {
332 EFSYS_PROBE1(fail1, efx_rc_t, rc);
336 #endif /* EFSYS_OPT_RX_SCALE */
338 #if EFSYS_OPT_RX_SCALE
340 efx_mcdi_rss_context_set_key(
342 __in uint32_t rss_context,
343 __in_ecount(n) uint8_t *key,
347 uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_KEY_IN_LEN,
348 MC_CMD_RSS_CONTEXT_SET_KEY_OUT_LEN)];
351 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
356 (void) memset(payload, 0, sizeof (payload));
357 req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_KEY;
358 req.emr_in_buf = payload;
359 req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_KEY_IN_LEN;
360 req.emr_out_buf = payload;
361 req.emr_out_length = MC_CMD_RSS_CONTEXT_SET_KEY_OUT_LEN;
363 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_KEY_IN_RSS_CONTEXT_ID,
366 EFSYS_ASSERT3U(n, ==, MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_LEN);
367 if (n != MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_LEN) {
372 memcpy(MCDI_IN2(req, uint8_t, RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY),
375 efx_mcdi_execute(enp, &req);
377 if (req.emr_rc != 0) {
389 EFSYS_PROBE1(fail1, efx_rc_t, rc);
393 #endif /* EFSYS_OPT_RX_SCALE */
395 #if EFSYS_OPT_RX_SCALE
397 efx_mcdi_rss_context_set_table(
399 __in uint32_t rss_context,
400 __in_ecount(n) unsigned int *table,
404 uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_TABLE_IN_LEN,
405 MC_CMD_RSS_CONTEXT_SET_TABLE_OUT_LEN)];
409 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
414 (void) memset(payload, 0, sizeof (payload));
415 req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_TABLE;
416 req.emr_in_buf = payload;
417 req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_TABLE_IN_LEN;
418 req.emr_out_buf = payload;
419 req.emr_out_length = MC_CMD_RSS_CONTEXT_SET_TABLE_OUT_LEN;
421 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_TABLE_IN_RSS_CONTEXT_ID,
425 MCDI_IN2(req, uint8_t, RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE);
428 i < MC_CMD_RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE_LEN;
430 req_table[i] = (n > 0) ? (uint8_t)table[i % n] : 0;
433 efx_mcdi_execute(enp, &req);
435 if (req.emr_rc != 0) {
445 EFSYS_PROBE1(fail1, efx_rc_t, rc);
449 #endif /* EFSYS_OPT_RX_SCALE */
452 __checkReturn efx_rc_t
456 #if EFSYS_OPT_RX_SCALE
458 if (efx_mcdi_rss_context_alloc(enp, EFX_RX_SCALE_EXCLUSIVE, EFX_MAXRSS,
459 &enp->en_rss_context) == 0) {
461 * Allocated an exclusive RSS context, which allows both the
462 * indirection table and key to be modified.
464 enp->en_rss_context_type = EFX_RX_SCALE_EXCLUSIVE;
465 enp->en_hash_support = EFX_RX_HASH_AVAILABLE;
468 * Failed to allocate an exclusive RSS context. Continue
469 * operation without support for RSS. The pseudo-header in
470 * received packets will not contain a Toeplitz hash value.
472 enp->en_rss_context_type = EFX_RX_SCALE_UNAVAILABLE;
473 enp->en_hash_support = EFX_RX_HASH_UNAVAILABLE;
476 #endif /* EFSYS_OPT_RX_SCALE */
481 #if EFSYS_OPT_RX_SCATTER
482 __checkReturn efx_rc_t
483 ef10_rx_scatter_enable(
485 __in unsigned int buf_size)
487 _NOTE(ARGUNUSED(enp, buf_size))
490 #endif /* EFSYS_OPT_RX_SCATTER */
492 #if EFSYS_OPT_RX_SCALE
493 __checkReturn efx_rc_t
494 ef10_rx_scale_context_alloc(
496 __in efx_rx_scale_context_type_t type,
497 __in uint32_t num_queues,
498 __out uint32_t *rss_contextp)
502 rc = efx_mcdi_rss_context_alloc(enp, type, num_queues, rss_contextp);
509 EFSYS_PROBE1(fail1, efx_rc_t, rc);
512 #endif /* EFSYS_OPT_RX_SCALE */
514 #if EFSYS_OPT_RX_SCALE
515 __checkReturn efx_rc_t
516 ef10_rx_scale_context_free(
518 __in uint32_t rss_context)
522 rc = efx_mcdi_rss_context_free(enp, rss_context);
529 EFSYS_PROBE1(fail1, efx_rc_t, rc);
532 #endif /* EFSYS_OPT_RX_SCALE */
534 #if EFSYS_OPT_RX_SCALE
535 __checkReturn efx_rc_t
536 ef10_rx_scale_mode_set(
538 __in efx_rx_hash_alg_t alg,
539 __in efx_rx_hash_type_t type,
540 __in boolean_t insert)
544 EFSYS_ASSERT3U(alg, ==, EFX_RX_HASHALG_TOEPLITZ);
545 EFSYS_ASSERT3U(insert, ==, B_TRUE);
547 if ((alg != EFX_RX_HASHALG_TOEPLITZ) || (insert == B_FALSE)) {
552 if (enp->en_rss_context_type == EFX_RX_SCALE_UNAVAILABLE) {
557 if ((rc = efx_mcdi_rss_context_set_flags(enp,
558 enp->en_rss_context, type)) != 0)
568 EFSYS_PROBE1(fail1, efx_rc_t, rc);
572 #endif /* EFSYS_OPT_RX_SCALE */
574 #if EFSYS_OPT_RX_SCALE
575 __checkReturn efx_rc_t
576 ef10_rx_scale_key_set(
578 __in_ecount(n) uint8_t *key,
583 if (enp->en_rss_context_type == EFX_RX_SCALE_UNAVAILABLE) {
588 if ((rc = efx_mcdi_rss_context_set_key(enp,
589 enp->en_rss_context, key, n)) != 0)
597 EFSYS_PROBE1(fail1, efx_rc_t, rc);
601 #endif /* EFSYS_OPT_RX_SCALE */
603 #if EFSYS_OPT_RX_SCALE
604 __checkReturn efx_rc_t
605 ef10_rx_scale_tbl_set(
607 __in_ecount(n) unsigned int *table,
612 if (enp->en_rss_context_type == EFX_RX_SCALE_UNAVAILABLE) {
617 if ((rc = efx_mcdi_rss_context_set_table(enp,
618 enp->en_rss_context, table, n)) != 0)
626 EFSYS_PROBE1(fail1, efx_rc_t, rc);
630 #endif /* EFSYS_OPT_RX_SCALE */
634 * EF10 RX pseudo-header
635 * ---------------------
637 * Receive packets are prefixed by an (optional) 14 byte pseudo-header:
639 * +00: Toeplitz hash value.
640 * (32bit little-endian)
641 * +04: Outer VLAN tag. Zero if the packet did not have an outer VLAN tag.
643 * +06: Inner VLAN tag. Zero if the packet did not have an inner VLAN tag.
645 * +08: Packet Length. Zero if the RX datapath was in cut-through mode.
646 * (16bit little-endian)
647 * +10: MAC timestamp. Zero if timestamping is not enabled.
648 * (32bit little-endian)
650 * See "The RX Pseudo-header" in SF-109306-TC.
653 __checkReturn efx_rc_t
654 ef10_rx_prefix_pktlen(
656 __in uint8_t *buffer,
657 __out uint16_t *lengthp)
659 _NOTE(ARGUNUSED(enp))
662 * The RX pseudo-header contains the packet length, excluding the
663 * pseudo-header. If the hardware receive datapath was operating in
664 * cut-through mode then the length in the RX pseudo-header will be
665 * zero, and the packet length must be obtained from the DMA length
666 * reported in the RX event.
668 *lengthp = buffer[8] | (buffer[9] << 8);
672 #if EFSYS_OPT_RX_SCALE
673 __checkReturn uint32_t
676 __in efx_rx_hash_alg_t func,
677 __in uint8_t *buffer)
679 _NOTE(ARGUNUSED(enp))
682 case EFX_RX_HASHALG_TOEPLITZ:
693 #endif /* EFSYS_OPT_RX_SCALE */
698 __in_ecount(n) efsys_dma_addr_t *addrp,
701 __in unsigned int completed,
702 __in unsigned int added)
709 /* The client driver must not overfill the queue */
710 EFSYS_ASSERT3U(added - completed + n, <=,
711 EFX_RXQ_LIMIT(erp->er_mask + 1));
713 id = added & (erp->er_mask);
714 for (i = 0; i < n; i++) {
715 EFSYS_PROBE4(rx_post, unsigned int, erp->er_index,
716 unsigned int, id, efsys_dma_addr_t, addrp[i],
719 EFX_POPULATE_QWORD_3(qword,
720 ESF_DZ_RX_KER_BYTE_CNT, (uint32_t)(size),
721 ESF_DZ_RX_KER_BUF_ADDR_DW0,
722 (uint32_t)(addrp[i] & 0xffffffff),
723 ESF_DZ_RX_KER_BUF_ADDR_DW1,
724 (uint32_t)(addrp[i] >> 32));
726 offset = id * sizeof (efx_qword_t);
727 EFSYS_MEM_WRITEQ(erp->er_esmp, offset, &qword);
729 id = (id + 1) & (erp->er_mask);
736 __in unsigned int added,
737 __inout unsigned int *pushedp)
739 efx_nic_t *enp = erp->er_enp;
740 unsigned int pushed = *pushedp;
744 /* Hardware has alignment restriction for WPTR */
745 wptr = P2ALIGN(added, EF10_RX_WPTR_ALIGN);
751 /* Push the populated descriptors out */
752 wptr &= erp->er_mask;
754 EFX_POPULATE_DWORD_1(dword, ERF_DZ_RX_DESC_WPTR, wptr);
756 /* Guarantee ordering of memory (descriptors) and PIO (doorbell) */
757 EFX_DMA_SYNC_QUEUE_FOR_DEVICE(erp->er_esmp, erp->er_mask + 1,
758 wptr, pushed & erp->er_mask);
759 EFSYS_PIO_WRITE_BARRIER();
760 EFX_BAR_TBL_WRITED(enp, ER_DZ_RX_DESC_UPD_REG,
761 erp->er_index, &dword, B_FALSE);
764 #if EFSYS_OPT_RX_PACKED_STREAM
767 ef10_rx_qps_update_credits(
770 efx_nic_t *enp = erp->er_enp;
772 efx_evq_rxq_state_t *rxq_state =
773 &erp->er_eep->ee_rxq_state[erp->er_label];
775 EFSYS_ASSERT(rxq_state->eers_rx_packed_stream);
777 if (rxq_state->eers_rx_packed_stream_credits == 0)
780 EFX_POPULATE_DWORD_3(dword,
781 ERF_DZ_RX_DESC_MAGIC_DOORBELL, 1,
782 ERF_DZ_RX_DESC_MAGIC_CMD,
783 ERE_DZ_RX_DESC_MAGIC_CMD_PS_CREDITS,
784 ERF_DZ_RX_DESC_MAGIC_DATA,
785 rxq_state->eers_rx_packed_stream_credits);
786 EFX_BAR_TBL_WRITED(enp, ER_DZ_RX_DESC_UPD_REG,
787 erp->er_index, &dword, B_FALSE);
789 rxq_state->eers_rx_packed_stream_credits = 0;
792 __checkReturn uint8_t *
793 ef10_rx_qps_packet_info(
795 __in uint8_t *buffer,
796 __in uint32_t buffer_length,
797 __in uint32_t current_offset,
798 __out uint16_t *lengthp,
799 __out uint32_t *next_offsetp,
800 __out uint32_t *timestamp)
805 efx_evq_rxq_state_t *rxq_state =
806 &erp->er_eep->ee_rxq_state[erp->er_label];
808 EFSYS_ASSERT(rxq_state->eers_rx_packed_stream);
810 buffer += current_offset;
811 pkt_start = buffer + EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE;
813 qwordp = (efx_qword_t *)buffer;
814 *timestamp = EFX_QWORD_FIELD(*qwordp, ES_DZ_PS_RX_PREFIX_TSTAMP);
815 *lengthp = EFX_QWORD_FIELD(*qwordp, ES_DZ_PS_RX_PREFIX_ORIG_LEN);
816 buf_len = EFX_QWORD_FIELD(*qwordp, ES_DZ_PS_RX_PREFIX_CAP_LEN);
818 buf_len = P2ROUNDUP(buf_len + EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE,
819 EFX_RX_PACKED_STREAM_ALIGNMENT);
821 current_offset + buf_len + EFX_RX_PACKED_STREAM_ALIGNMENT;
823 EFSYS_ASSERT3U(*next_offsetp, <=, buffer_length);
824 EFSYS_ASSERT3U(current_offset + *lengthp, <, *next_offsetp);
826 if ((*next_offsetp ^ current_offset) &
827 EFX_RX_PACKED_STREAM_MEM_PER_CREDIT) {
828 if (rxq_state->eers_rx_packed_stream_credits <
829 EFX_RX_PACKED_STREAM_MAX_CREDITS)
830 rxq_state->eers_rx_packed_stream_credits++;
839 __checkReturn efx_rc_t
843 efx_nic_t *enp = erp->er_enp;
846 if ((rc = efx_mcdi_fini_rxq(enp, erp->er_index)) != 0)
853 * EALREADY is not an error, but indicates that the MC has rebooted and
854 * that the RXQ has already been destroyed. Callers need to know that
855 * the RXQ flush has completed to avoid waiting until timeout for a
856 * flush done event that will not be delivered.
859 EFSYS_PROBE1(fail1, efx_rc_t, rc);
869 _NOTE(ARGUNUSED(erp))
873 __checkReturn efx_rc_t
876 __in unsigned int index,
877 __in unsigned int label,
878 __in efx_rxq_type_t type,
879 __in efsys_mem_t *esmp,
885 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
887 boolean_t disable_scatter;
888 unsigned int ps_buf_size;
890 _NOTE(ARGUNUSED(id, erp))
892 EFX_STATIC_ASSERT(EFX_EV_RX_NLABELS == (1 << ESF_DZ_RX_QLABEL_WIDTH));
893 EFSYS_ASSERT3U(label, <, EFX_EV_RX_NLABELS);
894 EFSYS_ASSERT3U(enp->en_rx_qcount + 1, <, encp->enc_rxq_limit);
896 EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MAXNDESCS));
897 EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MINNDESCS));
899 if (!ISP2(n) || (n < EFX_RXQ_MINNDESCS) || (n > EFX_RXQ_MAXNDESCS)) {
903 if (index >= encp->enc_rxq_limit) {
909 case EFX_RXQ_TYPE_DEFAULT:
910 case EFX_RXQ_TYPE_SCATTER:
913 #if EFSYS_OPT_RX_PACKED_STREAM
914 case EFX_RXQ_TYPE_PACKED_STREAM_1M:
915 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M;
917 case EFX_RXQ_TYPE_PACKED_STREAM_512K:
918 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_512K;
920 case EFX_RXQ_TYPE_PACKED_STREAM_256K:
921 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_256K;
923 case EFX_RXQ_TYPE_PACKED_STREAM_128K:
924 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_128K;
926 case EFX_RXQ_TYPE_PACKED_STREAM_64K:
927 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_64K;
929 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
935 #if EFSYS_OPT_RX_PACKED_STREAM
936 if (ps_buf_size != 0) {
937 /* Check if datapath firmware supports packed stream mode */
938 if (encp->enc_rx_packed_stream_supported == B_FALSE) {
942 /* Check if packed stream allows configurable buffer sizes */
943 if ((type != EFX_RXQ_TYPE_PACKED_STREAM_1M) &&
944 (encp->enc_rx_var_packed_stream_supported == B_FALSE)) {
949 #else /* EFSYS_OPT_RX_PACKED_STREAM */
950 EFSYS_ASSERT(ps_buf_size == 0);
951 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
953 /* Scatter can only be disabled if the firmware supports doing so */
954 if (type == EFX_RXQ_TYPE_SCATTER)
955 disable_scatter = B_FALSE;
957 disable_scatter = encp->enc_rx_disable_scatter_supported;
959 if ((rc = efx_mcdi_init_rxq(enp, n, eep->ee_index, label, index,
960 esmp, disable_scatter, ps_buf_size)) != 0)
964 erp->er_label = label;
966 ef10_ev_rxlabel_init(eep, erp, label, ps_buf_size != 0);
972 #if EFSYS_OPT_RX_PACKED_STREAM
977 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
983 EFSYS_PROBE1(fail1, efx_rc_t, rc);
992 efx_nic_t *enp = erp->er_enp;
993 efx_evq_t *eep = erp->er_eep;
994 unsigned int label = erp->er_label;
996 ef10_ev_rxlabel_fini(eep, label);
998 EFSYS_ASSERT(enp->en_rx_qcount != 0);
1001 EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_rxq_t), erp);
1006 __in efx_nic_t *enp)
1008 #if EFSYS_OPT_RX_SCALE
1009 if (enp->en_rss_context_type != EFX_RX_SCALE_UNAVAILABLE)
1010 (void) efx_mcdi_rss_context_free(enp, enp->en_rss_context);
1011 enp->en_rss_context = 0;
1012 enp->en_rss_context_type = EFX_RX_SCALE_UNAVAILABLE;
1014 _NOTE(ARGUNUSED(enp))
1015 #endif /* EFSYS_OPT_RX_SCALE */
1018 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */