1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2012-2018 Solarflare Communications Inc.
11 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
14 static __checkReturn efx_rc_t
18 __in uint32_t target_evq,
20 __in uint32_t instance,
21 __in efsys_mem_t *esmp,
22 __in boolean_t disable_scatter,
23 __in boolean_t want_inner_classes,
24 __in uint32_t ps_bufsize)
26 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
28 uint8_t payload[MAX(MC_CMD_INIT_RXQ_EXT_IN_LEN,
29 MC_CMD_INIT_RXQ_EXT_OUT_LEN)];
30 int npages = EFX_RXQ_NBUFS(ndescs);
32 efx_qword_t *dma_addr;
36 boolean_t want_outer_classes;
38 EFSYS_ASSERT3U(ndescs, <=, EFX_RXQ_MAXNDESCS);
40 if ((esmp == NULL) || (EFSYS_MEM_SIZE(esmp) < EFX_RXQ_SIZE(ndescs))) {
46 dma_mode = MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM;
48 dma_mode = MC_CMD_INIT_RXQ_EXT_IN_SINGLE_PACKET;
50 if (encp->enc_tunnel_encapsulations_supported != 0 &&
51 !want_inner_classes) {
53 * WANT_OUTER_CLASSES can only be specified on hardware which
54 * supports tunnel encapsulation offloads, even though it is
55 * effectively the behaviour the hardware gives.
57 * Also, on hardware which does support such offloads, older
58 * firmware rejects the flag if the offloads are not supported
59 * by the current firmware variant, which means this may fail if
60 * the capabilities are not updated when the firmware variant
61 * changes. This is not an issue on newer firmware, as it was
62 * changed in bug 69842 (v6.4.2.1007) to permit this flag to be
63 * specified on all firmware variants.
65 want_outer_classes = B_TRUE;
67 want_outer_classes = B_FALSE;
70 (void) memset(payload, 0, sizeof (payload));
71 req.emr_cmd = MC_CMD_INIT_RXQ;
72 req.emr_in_buf = payload;
73 req.emr_in_length = MC_CMD_INIT_RXQ_EXT_IN_LEN;
74 req.emr_out_buf = payload;
75 req.emr_out_length = MC_CMD_INIT_RXQ_EXT_OUT_LEN;
77 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_SIZE, ndescs);
78 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_TARGET_EVQ, target_evq);
79 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_LABEL, label);
80 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_INSTANCE, instance);
81 MCDI_IN_POPULATE_DWORD_9(req, INIT_RXQ_EXT_IN_FLAGS,
82 INIT_RXQ_EXT_IN_FLAG_BUFF_MODE, 0,
83 INIT_RXQ_EXT_IN_FLAG_HDR_SPLIT, 0,
84 INIT_RXQ_EXT_IN_FLAG_TIMESTAMP, 0,
85 INIT_RXQ_EXT_IN_CRC_MODE, 0,
86 INIT_RXQ_EXT_IN_FLAG_PREFIX, 1,
87 INIT_RXQ_EXT_IN_FLAG_DISABLE_SCATTER, disable_scatter,
88 INIT_RXQ_EXT_IN_DMA_MODE,
90 INIT_RXQ_EXT_IN_PACKED_STREAM_BUFF_SIZE, ps_bufsize,
91 INIT_RXQ_EXT_IN_FLAG_WANT_OUTER_CLASSES, want_outer_classes);
92 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_OWNER_ID, 0);
93 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_PORT_ID, EVB_PORT_ID_ASSIGNED);
95 dma_addr = MCDI_IN2(req, efx_qword_t, INIT_RXQ_IN_DMA_ADDR);
96 addr = EFSYS_MEM_ADDR(esmp);
98 for (i = 0; i < npages; i++) {
99 EFX_POPULATE_QWORD_2(*dma_addr,
100 EFX_DWORD_1, (uint32_t)(addr >> 32),
101 EFX_DWORD_0, (uint32_t)(addr & 0xffffffff));
104 addr += EFX_BUF_SIZE;
107 efx_mcdi_execute(enp, &req);
109 if (req.emr_rc != 0) {
119 EFSYS_PROBE1(fail1, efx_rc_t, rc);
124 static __checkReturn efx_rc_t
127 __in uint32_t instance)
130 uint8_t payload[MAX(MC_CMD_FINI_RXQ_IN_LEN,
131 MC_CMD_FINI_RXQ_OUT_LEN)];
134 (void) memset(payload, 0, sizeof (payload));
135 req.emr_cmd = MC_CMD_FINI_RXQ;
136 req.emr_in_buf = payload;
137 req.emr_in_length = MC_CMD_FINI_RXQ_IN_LEN;
138 req.emr_out_buf = payload;
139 req.emr_out_length = MC_CMD_FINI_RXQ_OUT_LEN;
141 MCDI_IN_SET_DWORD(req, FINI_RXQ_IN_INSTANCE, instance);
143 efx_mcdi_execute_quiet(enp, &req);
145 if (req.emr_rc != 0) {
154 * EALREADY is not an error, but indicates that the MC has rebooted and
155 * that the RXQ has already been destroyed.
158 EFSYS_PROBE1(fail1, efx_rc_t, rc);
163 #if EFSYS_OPT_RX_SCALE
164 static __checkReturn efx_rc_t
165 efx_mcdi_rss_context_alloc(
167 __in efx_rx_scale_context_type_t type,
168 __in uint32_t num_queues,
169 __out uint32_t *rss_contextp)
172 uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_ALLOC_IN_LEN,
173 MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN)];
174 uint32_t rss_context;
175 uint32_t context_type;
178 if (num_queues > EFX_MAXRSS) {
184 case EFX_RX_SCALE_EXCLUSIVE:
185 context_type = MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_EXCLUSIVE;
187 case EFX_RX_SCALE_SHARED:
188 context_type = MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_SHARED;
195 (void) memset(payload, 0, sizeof (payload));
196 req.emr_cmd = MC_CMD_RSS_CONTEXT_ALLOC;
197 req.emr_in_buf = payload;
198 req.emr_in_length = MC_CMD_RSS_CONTEXT_ALLOC_IN_LEN;
199 req.emr_out_buf = payload;
200 req.emr_out_length = MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN;
202 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_UPSTREAM_PORT_ID,
203 EVB_PORT_ID_ASSIGNED);
204 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_TYPE, context_type);
207 * For exclusive contexts, NUM_QUEUES is only used to validate
208 * indirection table offsets.
209 * For shared contexts, the provided context will spread traffic over
210 * NUM_QUEUES many queues.
212 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_NUM_QUEUES, num_queues);
214 efx_mcdi_execute(enp, &req);
216 if (req.emr_rc != 0) {
221 if (req.emr_out_length_used < MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN) {
226 rss_context = MCDI_OUT_DWORD(req, RSS_CONTEXT_ALLOC_OUT_RSS_CONTEXT_ID);
227 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
232 *rss_contextp = rss_context;
245 EFSYS_PROBE1(fail1, efx_rc_t, rc);
249 #endif /* EFSYS_OPT_RX_SCALE */
251 #if EFSYS_OPT_RX_SCALE
253 efx_mcdi_rss_context_free(
255 __in uint32_t rss_context)
258 uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_FREE_IN_LEN,
259 MC_CMD_RSS_CONTEXT_FREE_OUT_LEN)];
262 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
267 (void) memset(payload, 0, sizeof (payload));
268 req.emr_cmd = MC_CMD_RSS_CONTEXT_FREE;
269 req.emr_in_buf = payload;
270 req.emr_in_length = MC_CMD_RSS_CONTEXT_FREE_IN_LEN;
271 req.emr_out_buf = payload;
272 req.emr_out_length = MC_CMD_RSS_CONTEXT_FREE_OUT_LEN;
274 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_FREE_IN_RSS_CONTEXT_ID, rss_context);
276 efx_mcdi_execute_quiet(enp, &req);
278 if (req.emr_rc != 0) {
288 EFSYS_PROBE1(fail1, efx_rc_t, rc);
292 #endif /* EFSYS_OPT_RX_SCALE */
294 #if EFSYS_OPT_RX_SCALE
296 efx_mcdi_rss_context_set_flags(
298 __in uint32_t rss_context,
299 __in efx_rx_hash_type_t type)
302 uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN,
303 MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN)];
306 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
311 (void) memset(payload, 0, sizeof (payload));
312 req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_FLAGS;
313 req.emr_in_buf = payload;
314 req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN;
315 req.emr_out_buf = payload;
316 req.emr_out_length = MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN;
318 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_FLAGS_IN_RSS_CONTEXT_ID,
321 MCDI_IN_POPULATE_DWORD_4(req, RSS_CONTEXT_SET_FLAGS_IN_FLAGS,
322 RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV4_EN,
323 (type & EFX_RX_HASH_IPV4) ? 1 : 0,
324 RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV4_EN,
325 (type & EFX_RX_HASH_TCPIPV4) ? 1 : 0,
326 RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV6_EN,
327 (type & EFX_RX_HASH_IPV6) ? 1 : 0,
328 RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV6_EN,
329 (type & EFX_RX_HASH_TCPIPV6) ? 1 : 0);
331 efx_mcdi_execute(enp, &req);
333 if (req.emr_rc != 0) {
343 EFSYS_PROBE1(fail1, efx_rc_t, rc);
347 #endif /* EFSYS_OPT_RX_SCALE */
349 #if EFSYS_OPT_RX_SCALE
351 efx_mcdi_rss_context_set_key(
353 __in uint32_t rss_context,
354 __in_ecount(n) uint8_t *key,
358 uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_KEY_IN_LEN,
359 MC_CMD_RSS_CONTEXT_SET_KEY_OUT_LEN)];
362 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
367 (void) memset(payload, 0, sizeof (payload));
368 req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_KEY;
369 req.emr_in_buf = payload;
370 req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_KEY_IN_LEN;
371 req.emr_out_buf = payload;
372 req.emr_out_length = MC_CMD_RSS_CONTEXT_SET_KEY_OUT_LEN;
374 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_KEY_IN_RSS_CONTEXT_ID,
377 EFSYS_ASSERT3U(n, ==, MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_LEN);
378 if (n != MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_LEN) {
383 memcpy(MCDI_IN2(req, uint8_t, RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY),
386 efx_mcdi_execute(enp, &req);
388 if (req.emr_rc != 0) {
400 EFSYS_PROBE1(fail1, efx_rc_t, rc);
404 #endif /* EFSYS_OPT_RX_SCALE */
406 #if EFSYS_OPT_RX_SCALE
408 efx_mcdi_rss_context_set_table(
410 __in uint32_t rss_context,
411 __in_ecount(n) unsigned int *table,
415 uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_TABLE_IN_LEN,
416 MC_CMD_RSS_CONTEXT_SET_TABLE_OUT_LEN)];
420 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
425 (void) memset(payload, 0, sizeof (payload));
426 req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_TABLE;
427 req.emr_in_buf = payload;
428 req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_TABLE_IN_LEN;
429 req.emr_out_buf = payload;
430 req.emr_out_length = MC_CMD_RSS_CONTEXT_SET_TABLE_OUT_LEN;
432 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_TABLE_IN_RSS_CONTEXT_ID,
436 MCDI_IN2(req, uint8_t, RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE);
439 i < MC_CMD_RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE_LEN;
441 req_table[i] = (n > 0) ? (uint8_t)table[i % n] : 0;
444 efx_mcdi_execute(enp, &req);
446 if (req.emr_rc != 0) {
456 EFSYS_PROBE1(fail1, efx_rc_t, rc);
460 #endif /* EFSYS_OPT_RX_SCALE */
463 __checkReturn efx_rc_t
467 #if EFSYS_OPT_RX_SCALE
469 if (efx_mcdi_rss_context_alloc(enp, EFX_RX_SCALE_EXCLUSIVE, EFX_MAXRSS,
470 &enp->en_rss_context) == 0) {
472 * Allocated an exclusive RSS context, which allows both the
473 * indirection table and key to be modified.
475 enp->en_rss_context_type = EFX_RX_SCALE_EXCLUSIVE;
476 enp->en_hash_support = EFX_RX_HASH_AVAILABLE;
479 * Failed to allocate an exclusive RSS context. Continue
480 * operation without support for RSS. The pseudo-header in
481 * received packets will not contain a Toeplitz hash value.
483 enp->en_rss_context_type = EFX_RX_SCALE_UNAVAILABLE;
484 enp->en_hash_support = EFX_RX_HASH_UNAVAILABLE;
487 #endif /* EFSYS_OPT_RX_SCALE */
492 #if EFSYS_OPT_RX_SCATTER
493 __checkReturn efx_rc_t
494 ef10_rx_scatter_enable(
496 __in unsigned int buf_size)
498 _NOTE(ARGUNUSED(enp, buf_size))
501 #endif /* EFSYS_OPT_RX_SCATTER */
503 #if EFSYS_OPT_RX_SCALE
504 __checkReturn efx_rc_t
505 ef10_rx_scale_context_alloc(
507 __in efx_rx_scale_context_type_t type,
508 __in uint32_t num_queues,
509 __out uint32_t *rss_contextp)
513 rc = efx_mcdi_rss_context_alloc(enp, type, num_queues, rss_contextp);
520 EFSYS_PROBE1(fail1, efx_rc_t, rc);
523 #endif /* EFSYS_OPT_RX_SCALE */
525 #if EFSYS_OPT_RX_SCALE
526 __checkReturn efx_rc_t
527 ef10_rx_scale_context_free(
529 __in uint32_t rss_context)
533 rc = efx_mcdi_rss_context_free(enp, rss_context);
540 EFSYS_PROBE1(fail1, efx_rc_t, rc);
543 #endif /* EFSYS_OPT_RX_SCALE */
545 #if EFSYS_OPT_RX_SCALE
546 __checkReturn efx_rc_t
547 ef10_rx_scale_mode_set(
549 __in uint32_t rss_context,
550 __in efx_rx_hash_alg_t alg,
551 __in efx_rx_hash_type_t type,
552 __in boolean_t insert)
556 EFSYS_ASSERT3U(alg, ==, EFX_RX_HASHALG_TOEPLITZ);
557 EFSYS_ASSERT3U(insert, ==, B_TRUE);
559 if ((alg != EFX_RX_HASHALG_TOEPLITZ) || (insert == B_FALSE)) {
564 if (rss_context == EFX_RSS_CONTEXT_DEFAULT) {
565 if (enp->en_rss_context_type == EFX_RX_SCALE_UNAVAILABLE) {
569 rss_context = enp->en_rss_context;
572 if ((rc = efx_mcdi_rss_context_set_flags(enp,
573 rss_context, type)) != 0)
583 EFSYS_PROBE1(fail1, efx_rc_t, rc);
587 #endif /* EFSYS_OPT_RX_SCALE */
589 #if EFSYS_OPT_RX_SCALE
590 __checkReturn efx_rc_t
591 ef10_rx_scale_key_set(
593 __in uint32_t rss_context,
594 __in_ecount(n) uint8_t *key,
599 EFX_STATIC_ASSERT(EFX_RSS_KEY_SIZE ==
600 MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_LEN);
602 if (rss_context == EFX_RSS_CONTEXT_DEFAULT) {
603 if (enp->en_rss_context_type == EFX_RX_SCALE_UNAVAILABLE) {
607 rss_context = enp->en_rss_context;
610 if ((rc = efx_mcdi_rss_context_set_key(enp, rss_context, key, n)) != 0)
618 EFSYS_PROBE1(fail1, efx_rc_t, rc);
622 #endif /* EFSYS_OPT_RX_SCALE */
624 #if EFSYS_OPT_RX_SCALE
625 __checkReturn efx_rc_t
626 ef10_rx_scale_tbl_set(
628 __in uint32_t rss_context,
629 __in_ecount(n) unsigned int *table,
635 if (rss_context == EFX_RSS_CONTEXT_DEFAULT) {
636 if (enp->en_rss_context_type == EFX_RX_SCALE_UNAVAILABLE) {
640 rss_context = enp->en_rss_context;
643 if ((rc = efx_mcdi_rss_context_set_table(enp,
644 rss_context, table, n)) != 0)
652 EFSYS_PROBE1(fail1, efx_rc_t, rc);
656 #endif /* EFSYS_OPT_RX_SCALE */
660 * EF10 RX pseudo-header
661 * ---------------------
663 * Receive packets are prefixed by an (optional) 14 byte pseudo-header:
665 * +00: Toeplitz hash value.
666 * (32bit little-endian)
667 * +04: Outer VLAN tag. Zero if the packet did not have an outer VLAN tag.
669 * +06: Inner VLAN tag. Zero if the packet did not have an inner VLAN tag.
671 * +08: Packet Length. Zero if the RX datapath was in cut-through mode.
672 * (16bit little-endian)
673 * +10: MAC timestamp. Zero if timestamping is not enabled.
674 * (32bit little-endian)
676 * See "The RX Pseudo-header" in SF-109306-TC.
679 __checkReturn efx_rc_t
680 ef10_rx_prefix_pktlen(
682 __in uint8_t *buffer,
683 __out uint16_t *lengthp)
685 _NOTE(ARGUNUSED(enp))
688 * The RX pseudo-header contains the packet length, excluding the
689 * pseudo-header. If the hardware receive datapath was operating in
690 * cut-through mode then the length in the RX pseudo-header will be
691 * zero, and the packet length must be obtained from the DMA length
692 * reported in the RX event.
694 *lengthp = buffer[8] | (buffer[9] << 8);
698 #if EFSYS_OPT_RX_SCALE
699 __checkReturn uint32_t
702 __in efx_rx_hash_alg_t func,
703 __in uint8_t *buffer)
705 _NOTE(ARGUNUSED(enp))
708 case EFX_RX_HASHALG_TOEPLITZ:
719 #endif /* EFSYS_OPT_RX_SCALE */
721 #if EFSYS_OPT_RX_PACKED_STREAM
723 * Fake length for RXQ descriptors in packed stream mode
724 * to make hardware happy
726 #define EFX_RXQ_PACKED_STREAM_FAKE_BUF_SIZE 32
732 __in_ecount(ndescs) efsys_dma_addr_t *addrp,
734 __in unsigned int ndescs,
735 __in unsigned int completed,
736 __in unsigned int added)
743 _NOTE(ARGUNUSED(completed))
745 #if EFSYS_OPT_RX_PACKED_STREAM
747 * Real size of the buffer does not fit into ESF_DZ_RX_KER_BYTE_CNT
748 * and equal to 0 after applying mask. Hardware does not like it.
750 if (erp->er_ev_qstate->eers_rx_packed_stream)
751 size = EFX_RXQ_PACKED_STREAM_FAKE_BUF_SIZE;
754 /* The client driver must not overfill the queue */
755 EFSYS_ASSERT3U(added - completed + ndescs, <=,
756 EFX_RXQ_LIMIT(erp->er_mask + 1));
758 id = added & (erp->er_mask);
759 for (i = 0; i < ndescs; i++) {
760 EFSYS_PROBE4(rx_post, unsigned int, erp->er_index,
761 unsigned int, id, efsys_dma_addr_t, addrp[i],
764 EFX_POPULATE_QWORD_3(qword,
765 ESF_DZ_RX_KER_BYTE_CNT, (uint32_t)(size),
766 ESF_DZ_RX_KER_BUF_ADDR_DW0,
767 (uint32_t)(addrp[i] & 0xffffffff),
768 ESF_DZ_RX_KER_BUF_ADDR_DW1,
769 (uint32_t)(addrp[i] >> 32));
771 offset = id * sizeof (efx_qword_t);
772 EFSYS_MEM_WRITEQ(erp->er_esmp, offset, &qword);
774 id = (id + 1) & (erp->er_mask);
781 __in unsigned int added,
782 __inout unsigned int *pushedp)
784 efx_nic_t *enp = erp->er_enp;
785 unsigned int pushed = *pushedp;
789 /* Hardware has alignment restriction for WPTR */
790 wptr = P2ALIGN(added, EF10_RX_WPTR_ALIGN);
796 /* Push the populated descriptors out */
797 wptr &= erp->er_mask;
799 EFX_POPULATE_DWORD_1(dword, ERF_DZ_RX_DESC_WPTR, wptr);
801 /* Guarantee ordering of memory (descriptors) and PIO (doorbell) */
802 EFX_DMA_SYNC_QUEUE_FOR_DEVICE(erp->er_esmp, erp->er_mask + 1,
803 wptr, pushed & erp->er_mask);
804 EFSYS_PIO_WRITE_BARRIER();
805 EFX_BAR_VI_WRITED(enp, ER_DZ_RX_DESC_UPD_REG,
806 erp->er_index, &dword, B_FALSE);
809 #if EFSYS_OPT_RX_PACKED_STREAM
812 ef10_rx_qpush_ps_credits(
815 efx_nic_t *enp = erp->er_enp;
817 efx_evq_rxq_state_t *rxq_state = erp->er_ev_qstate;
820 EFSYS_ASSERT(rxq_state->eers_rx_packed_stream);
822 if (rxq_state->eers_rx_packed_stream_credits == 0)
826 * It is a bug if we think that FW has utilized more
827 * credits than it is allowed to have (maximum). However,
828 * make sure that we do not credit more than maximum anyway.
830 credits = MIN(rxq_state->eers_rx_packed_stream_credits,
831 EFX_RX_PACKED_STREAM_MAX_CREDITS);
832 EFX_POPULATE_DWORD_3(dword,
833 ERF_DZ_RX_DESC_MAGIC_DOORBELL, 1,
834 ERF_DZ_RX_DESC_MAGIC_CMD,
835 ERE_DZ_RX_DESC_MAGIC_CMD_PS_CREDITS,
836 ERF_DZ_RX_DESC_MAGIC_DATA, credits);
837 EFX_BAR_VI_WRITED(enp, ER_DZ_RX_DESC_UPD_REG,
838 erp->er_index, &dword, B_FALSE);
840 rxq_state->eers_rx_packed_stream_credits = 0;
844 * In accordance with SF-112241-TC the received data has the following layout:
845 * - 8 byte pseudo-header which consist of:
846 * - 4 byte little-endian timestamp
847 * - 2 byte little-endian captured length in bytes
848 * - 2 byte little-endian original packet length in bytes
849 * - captured packet bytes
850 * - optional padding to align to 64 bytes boundary
851 * - 64 bytes scratch space for the host software
853 __checkReturn uint8_t *
854 ef10_rx_qps_packet_info(
856 __in uint8_t *buffer,
857 __in uint32_t buffer_length,
858 __in uint32_t current_offset,
859 __out uint16_t *lengthp,
860 __out uint32_t *next_offsetp,
861 __out uint32_t *timestamp)
866 efx_evq_rxq_state_t *rxq_state = erp->er_ev_qstate;
868 EFSYS_ASSERT(rxq_state->eers_rx_packed_stream);
870 buffer += current_offset;
871 pkt_start = buffer + EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE;
873 qwordp = (efx_qword_t *)buffer;
874 *timestamp = EFX_QWORD_FIELD(*qwordp, ES_DZ_PS_RX_PREFIX_TSTAMP);
875 *lengthp = EFX_QWORD_FIELD(*qwordp, ES_DZ_PS_RX_PREFIX_ORIG_LEN);
876 buf_len = EFX_QWORD_FIELD(*qwordp, ES_DZ_PS_RX_PREFIX_CAP_LEN);
878 buf_len = P2ROUNDUP(buf_len + EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE,
879 EFX_RX_PACKED_STREAM_ALIGNMENT);
881 current_offset + buf_len + EFX_RX_PACKED_STREAM_ALIGNMENT;
883 EFSYS_ASSERT3U(*next_offsetp, <=, buffer_length);
884 EFSYS_ASSERT3U(current_offset + *lengthp, <, *next_offsetp);
886 if ((*next_offsetp ^ current_offset) &
887 EFX_RX_PACKED_STREAM_MEM_PER_CREDIT)
888 rxq_state->eers_rx_packed_stream_credits++;
896 __checkReturn efx_rc_t
900 efx_nic_t *enp = erp->er_enp;
903 if ((rc = efx_mcdi_fini_rxq(enp, erp->er_index)) != 0)
910 * EALREADY is not an error, but indicates that the MC has rebooted and
911 * that the RXQ has already been destroyed. Callers need to know that
912 * the RXQ flush has completed to avoid waiting until timeout for a
913 * flush done event that will not be delivered.
916 EFSYS_PROBE1(fail1, efx_rc_t, rc);
926 _NOTE(ARGUNUSED(erp))
930 __checkReturn efx_rc_t
933 __in unsigned int index,
934 __in unsigned int label,
935 __in efx_rxq_type_t type,
936 __in uint32_t type_data,
937 __in efsys_mem_t *esmp,
940 __in unsigned int flags,
944 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
946 boolean_t disable_scatter;
947 boolean_t want_inner_classes;
948 unsigned int ps_buf_size;
950 _NOTE(ARGUNUSED(id, erp, type_data))
952 EFX_STATIC_ASSERT(EFX_EV_RX_NLABELS == (1 << ESF_DZ_RX_QLABEL_WIDTH));
953 EFSYS_ASSERT3U(label, <, EFX_EV_RX_NLABELS);
954 EFSYS_ASSERT3U(enp->en_rx_qcount + 1, <, encp->enc_rxq_limit);
956 EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MAXNDESCS));
957 EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MINNDESCS));
960 (ndescs < EFX_RXQ_MINNDESCS) || (ndescs > EFX_RXQ_MAXNDESCS)) {
964 if (index >= encp->enc_rxq_limit) {
970 case EFX_RXQ_TYPE_DEFAULT:
973 #if EFSYS_OPT_RX_PACKED_STREAM
974 case EFX_RXQ_TYPE_PACKED_STREAM:
976 case EFX_RXQ_PACKED_STREAM_BUF_SIZE_1M:
977 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M;
979 case EFX_RXQ_PACKED_STREAM_BUF_SIZE_512K:
980 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_512K;
982 case EFX_RXQ_PACKED_STREAM_BUF_SIZE_256K:
983 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_256K;
985 case EFX_RXQ_PACKED_STREAM_BUF_SIZE_128K:
986 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_128K;
988 case EFX_RXQ_PACKED_STREAM_BUF_SIZE_64K:
989 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_64K;
996 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
1002 #if EFSYS_OPT_RX_PACKED_STREAM
1003 if (ps_buf_size != 0) {
1004 /* Check if datapath firmware supports packed stream mode */
1005 if (encp->enc_rx_packed_stream_supported == B_FALSE) {
1009 /* Check if packed stream allows configurable buffer sizes */
1010 if ((ps_buf_size != MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M) &&
1011 (encp->enc_rx_var_packed_stream_supported == B_FALSE)) {
1016 #else /* EFSYS_OPT_RX_PACKED_STREAM */
1017 EFSYS_ASSERT(ps_buf_size == 0);
1018 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
1020 /* Scatter can only be disabled if the firmware supports doing so */
1021 if (flags & EFX_RXQ_FLAG_SCATTER)
1022 disable_scatter = B_FALSE;
1024 disable_scatter = encp->enc_rx_disable_scatter_supported;
1026 if (flags & EFX_RXQ_FLAG_INNER_CLASSES)
1027 want_inner_classes = B_TRUE;
1029 want_inner_classes = B_FALSE;
1031 if ((rc = efx_mcdi_init_rxq(enp, ndescs, eep->ee_index, label, index,
1032 esmp, disable_scatter, want_inner_classes,
1037 erp->er_label = label;
1039 ef10_ev_rxlabel_init(eep, erp, label, type);
1041 erp->er_ev_qstate = &erp->er_eep->ee_rxq_state[label];
1047 #if EFSYS_OPT_RX_PACKED_STREAM
1052 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
1055 #if EFSYS_OPT_RX_PACKED_STREAM
1058 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
1062 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1069 __in efx_rxq_t *erp)
1071 efx_nic_t *enp = erp->er_enp;
1072 efx_evq_t *eep = erp->er_eep;
1073 unsigned int label = erp->er_label;
1075 ef10_ev_rxlabel_fini(eep, label);
1077 EFSYS_ASSERT(enp->en_rx_qcount != 0);
1078 --enp->en_rx_qcount;
1080 EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_rxq_t), erp);
1085 __in efx_nic_t *enp)
1087 #if EFSYS_OPT_RX_SCALE
1088 if (enp->en_rss_context_type != EFX_RX_SCALE_UNAVAILABLE)
1089 (void) efx_mcdi_rss_context_free(enp, enp->en_rss_context);
1090 enp->en_rss_context = 0;
1091 enp->en_rss_context_type = EFX_RX_SCALE_UNAVAILABLE;
1093 _NOTE(ARGUNUSED(enp))
1094 #endif /* EFSYS_OPT_RX_SCALE */
1097 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */