drivers/net/sfc/base/efx_ev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  * Copyright (c) 2007-2018 Solarflare Communications Inc.
   4  * All rights reserved.
   5  */
   6
   7 #include "efx.h"
   8 #include "efx_impl.h"
   9 #if EFSYS_OPT_MON_MCDI
  10 #include "mcdi_mon.h"
  11 #endif
  12
  13 #if EFSYS_OPT_QSTATS
  14 #define EFX_EV_QSTAT_INCR(_eep, _stat)                                  \
  15         do {                                                            \
  16                 (_eep)->ee_stat[_stat]++;                               \
  17         _NOTE(CONSTANTCONDITION)                                        \
  18         } while (B_FALSE)
  19 #else
  20 #define EFX_EV_QSTAT_INCR(_eep, _stat)
  21 #endif
  22
  23 #define EFX_EV_PRESENT(_qword)                                          \
  24         (EFX_QWORD_FIELD((_qword), EFX_DWORD_0) != 0xffffffff &&        \
  25         EFX_QWORD_FIELD((_qword), EFX_DWORD_1) != 0xffffffff)
  26
  27
  28
  29 #if EFSYS_OPT_SIENA
  30
  31 static  __checkReturn   efx_rc_t
  32 siena_ev_init(
  33         __in            efx_nic_t *enp);
  34
  35 static                  void
  36 siena_ev_fini(
  37         __in            efx_nic_t *enp);
  38
  39 static  __checkReturn   efx_rc_t
  40 siena_ev_qcreate(
  41         __in            efx_nic_t *enp,
  42         __in            unsigned int index,
  43         __in            efsys_mem_t *esmp,
  44         __in            size_t ndescs,
  45         __in            uint32_t id,
  46         __in            uint32_t us,
  47         __in            uint32_t flags,
  48         __in            efx_evq_t *eep);
  49
  50 static                  void
  51 siena_ev_qdestroy(
  52         __in            efx_evq_t *eep);
  53
  54 static  __checkReturn   efx_rc_t
  55 siena_ev_qprime(
  56         __in            efx_evq_t *eep,
  57         __in            unsigned int count);
  58
  59 static                  void
  60 siena_ev_qpost(
  61         __in    efx_evq_t *eep,
  62         __in    uint16_t data);
  63
  64 static  __checkReturn   efx_rc_t
  65 siena_ev_qmoderate(
  66         __in            efx_evq_t *eep,
  67         __in            unsigned int us);
  68
  69 #if EFSYS_OPT_QSTATS
  70 static                  void
  71 siena_ev_qstats_update(
  72         __in                            efx_evq_t *eep,
  73         __inout_ecount(EV_NQSTATS)      efsys_stat_t *stat);
  74
  75 #endif
  76
  77 #endif /* EFSYS_OPT_SIENA */
  78
  79 #if EFSYS_OPT_SIENA
  80 static const efx_ev_ops_t       __efx_ev_siena_ops = {
  81         siena_ev_init,                          /* eevo_init */
  82         siena_ev_fini,                          /* eevo_fini */
  83         siena_ev_qcreate,                       /* eevo_qcreate */
  84         siena_ev_qdestroy,                      /* eevo_qdestroy */
  85         siena_ev_qprime,                        /* eevo_qprime */
  86         siena_ev_qpost,                         /* eevo_qpost */
  87         siena_ev_qmoderate,                     /* eevo_qmoderate */
  88 #if EFSYS_OPT_QSTATS
  89         siena_ev_qstats_update,                 /* eevo_qstats_update */
  90 #endif
  91 };
  92 #endif /* EFSYS_OPT_SIENA */
  93
  94 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
  95 static const efx_ev_ops_t       __efx_ev_ef10_ops = {
  96         ef10_ev_init,                           /* eevo_init */
  97         ef10_ev_fini,                           /* eevo_fini */
  98         ef10_ev_qcreate,                        /* eevo_qcreate */
  99         ef10_ev_qdestroy,                       /* eevo_qdestroy */
 100         ef10_ev_qprime,                         /* eevo_qprime */
 101         ef10_ev_qpost,                          /* eevo_qpost */
 102         ef10_ev_qmoderate,                      /* eevo_qmoderate */
 103 #if EFSYS_OPT_QSTATS
 104         ef10_ev_qstats_update,                  /* eevo_qstats_update */
 105 #endif
 106 };
 107 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
 108
 109
 110         __checkReturn   efx_rc_t
 111 efx_ev_init(
 112         __in            efx_nic_t *enp)
 113 {
 114         const efx_ev_ops_t *eevop;
 115         efx_rc_t rc;
 116
 117         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 118         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR);
 119
 120         if (enp->en_mod_flags & EFX_MOD_EV) {
 121                 rc = EINVAL;
 122                 goto fail1;
 123         }
 124
 125         switch (enp->en_family) {
 126 #if EFSYS_OPT_SIENA
 127         case EFX_FAMILY_SIENA:
 128                 eevop = &__efx_ev_siena_ops;
 129                 break;
 130 #endif /* EFSYS_OPT_SIENA */
 131
 132 #if EFSYS_OPT_HUNTINGTON
 133         case EFX_FAMILY_HUNTINGTON:
 134                 eevop = &__efx_ev_ef10_ops;
 135                 break;
 136 #endif /* EFSYS_OPT_HUNTINGTON */
 137
 138 #if EFSYS_OPT_MEDFORD
 139         case EFX_FAMILY_MEDFORD:
 140                 eevop = &__efx_ev_ef10_ops;
 141                 break;
 142 #endif /* EFSYS_OPT_MEDFORD */
 143
 144 #if EFSYS_OPT_MEDFORD2
 145         case EFX_FAMILY_MEDFORD2:
 146                 eevop = &__efx_ev_ef10_ops;
 147                 break;
 148 #endif /* EFSYS_OPT_MEDFORD2 */
 149
 150         default:
 151                 EFSYS_ASSERT(0);
 152                 rc = ENOTSUP;
 153                 goto fail1;
 154         }
 155
 156         EFSYS_ASSERT3U(enp->en_ev_qcount, ==, 0);
 157
 158         if ((rc = eevop->eevo_init(enp)) != 0)
 159                 goto fail2;
 160
 161         enp->en_eevop = eevop;
 162         enp->en_mod_flags |= EFX_MOD_EV;
 163         return (0);
 164
 165 fail2:
 166         EFSYS_PROBE(fail2);
 167
 168 fail1:
 169         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 170
 171         enp->en_eevop = NULL;
 172         enp->en_mod_flags &= ~EFX_MOD_EV;
 173         return (rc);
 174 }
 175
 176                 void
 177 efx_ev_fini(
 178         __in    efx_nic_t *enp)
 179 {
 180         const efx_ev_ops_t *eevop = enp->en_eevop;
 181
 182         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 183         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR);
 184         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_EV);
 185         EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_RX));
 186         EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_TX));
 187         EFSYS_ASSERT3U(enp->en_ev_qcount, ==, 0);
 188
 189         eevop->eevo_fini(enp);
 190
 191         enp->en_eevop = NULL;
 192         enp->en_mod_flags &= ~EFX_MOD_EV;
 193 }
 194
 195
 196         __checkReturn   efx_rc_t
 197 efx_ev_qcreate(
 198         __in            efx_nic_t *enp,
 199         __in            unsigned int index,
 200         __in            efsys_mem_t *esmp,
 201         __in            size_t ndescs,
 202         __in            uint32_t id,
 203         __in            uint32_t us,
 204         __in            uint32_t flags,
 205         __deref_out     efx_evq_t **eepp)
 206 {
 207         const efx_ev_ops_t *eevop = enp->en_eevop;
 208         efx_evq_t *eep;
 209         const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
 210         efx_rc_t rc;
 211
 212         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 213         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_EV);
 214
 215         EFSYS_ASSERT3U(enp->en_ev_qcount + 1, <,
 216             enp->en_nic_cfg.enc_evq_limit);
 217
 218         switch (flags & EFX_EVQ_FLAGS_NOTIFY_MASK) {
 219         case EFX_EVQ_FLAGS_NOTIFY_INTERRUPT:
 220                 break;
 221         case EFX_EVQ_FLAGS_NOTIFY_DISABLED:
 222                 if (us != 0) {
 223                         rc = EINVAL;
 224                         goto fail1;
 225                 }
 226                 break;
 227         default:
 228                 rc = EINVAL;
 229                 goto fail2;
 230         }
 231
 232         EFSYS_ASSERT(ISP2(encp->enc_evq_max_nevs));
 233         EFSYS_ASSERT(ISP2(encp->enc_evq_min_nevs));
 234
 235         if (!ISP2(ndescs) ||
 236             ndescs < encp->enc_evq_min_nevs ||
 237             ndescs > encp->enc_evq_max_nevs) {
 238                 rc = EINVAL;
 239                 goto fail3;
 240         }
 241
 242         /* Allocate an EVQ object */
 243         EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (efx_evq_t), eep);
 244         if (eep == NULL) {
 245                 rc = ENOMEM;
 246                 goto fail4;
 247         }
 248
 249         eep->ee_magic = EFX_EVQ_MAGIC;
 250         eep->ee_enp = enp;
 251         eep->ee_index = index;
 252         eep->ee_mask = ndescs - 1;
 253         eep->ee_flags = flags;
 254         eep->ee_esmp = esmp;
 255
 256         /*
 257          * Set outputs before the queue is created because interrupts may be
 258          * raised for events immediately after the queue is created, before the
 259          * function call below returns. See bug58606.
 260          *
 261          * The eepp pointer passed in by the client must therefore point to data
 262          * shared with the client's event processing context.
 263          */
 264         enp->en_ev_qcount++;
 265         *eepp = eep;
 266
 267         if ((rc = eevop->eevo_qcreate(enp, index, esmp, ndescs, id, us, flags,
 268             eep)) != 0)
 269                 goto fail5;
 270
 271         return (0);
 272
 273 fail5:
 274         EFSYS_PROBE(fail5);
 275
 276         *eepp = NULL;
 277         enp->en_ev_qcount--;
 278         EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_evq_t), eep);
 279 fail4:
 280         EFSYS_PROBE(fail4);
 281 fail3:
 282         EFSYS_PROBE(fail3);
 283 fail2:
 284         EFSYS_PROBE(fail2);
 285 fail1:
 286         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 287         return (rc);
 288 }
 289
 290                 void
 291 efx_ev_qdestroy(
 292         __in    efx_evq_t *eep)
 293 {
 294         efx_nic_t *enp = eep->ee_enp;
 295         const efx_ev_ops_t *eevop = enp->en_eevop;
 296
 297         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 298
 299         EFSYS_ASSERT(enp->en_ev_qcount != 0);
 300         --enp->en_ev_qcount;
 301
 302         eevop->eevo_qdestroy(eep);
 303
 304         /* Free the EVQ object */
 305         EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_evq_t), eep);
 306 }
 307
 308         __checkReturn   efx_rc_t
 309 efx_ev_qprime(
 310         __in            efx_evq_t *eep,
 311         __in            unsigned int count)
 312 {
 313         efx_nic_t *enp = eep->ee_enp;
 314         const efx_ev_ops_t *eevop = enp->en_eevop;
 315         efx_rc_t rc;
 316
 317         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 318
 319         if (!(enp->en_mod_flags & EFX_MOD_INTR)) {
 320                 rc = EINVAL;
 321                 goto fail1;
 322         }
 323
 324         if ((rc = eevop->eevo_qprime(eep, count)) != 0)
 325                 goto fail2;
 326
 327         return (0);
 328
 329 fail2:
 330         EFSYS_PROBE(fail2);
 331 fail1:
 332         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 333         return (rc);
 334 }
 335
 336         __checkReturn   boolean_t
 337 efx_ev_qpending(
 338         __in            efx_evq_t *eep,
 339         __in            unsigned int count)
 340 {
 341         size_t offset;
 342         efx_qword_t qword;
 343
 344         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 345
 346         offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 347         EFSYS_MEM_READQ(eep->ee_esmp, offset, &qword);
 348
 349         return (EFX_EV_PRESENT(qword));
 350 }
 351
 352 #if EFSYS_OPT_EV_PREFETCH
 353
 354                         void
 355 efx_ev_qprefetch(
 356         __in            efx_evq_t *eep,
 357         __in            unsigned int count)
 358 {
 359         unsigned int offset;
 360
 361         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 362
 363         offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 364         EFSYS_MEM_PREFETCH(eep->ee_esmp, offset);
 365 }
 366
 367 #endif  /* EFSYS_OPT_EV_PREFETCH */
 368
 369 #define EFX_EV_BATCH    8
 370
 371                         void
 372 efx_ev_qpoll(
 373         __in            efx_evq_t *eep,
 374         __inout         unsigned int *countp,
 375         __in            const efx_ev_callbacks_t *eecp,
 376         __in_opt        void *arg)
 377 {
 378         efx_qword_t ev[EFX_EV_BATCH];
 379         unsigned int batch;
 380         unsigned int total;
 381         unsigned int count;
 382         unsigned int index;
 383         size_t offset;
 384
 385         /* Ensure events codes match for EF10 (Huntington/Medford) and Siena */
 386         EFX_STATIC_ASSERT(ESF_DZ_EV_CODE_LBN == FSF_AZ_EV_CODE_LBN);
 387         EFX_STATIC_ASSERT(ESF_DZ_EV_CODE_WIDTH == FSF_AZ_EV_CODE_WIDTH);
 388
 389         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_RX_EV == FSE_AZ_EV_CODE_RX_EV);
 390         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_TX_EV == FSE_AZ_EV_CODE_TX_EV);
 391         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_DRIVER_EV == FSE_AZ_EV_CODE_DRIVER_EV);
 392         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_DRV_GEN_EV ==
 393             FSE_AZ_EV_CODE_DRV_GEN_EV);
 394 #if EFSYS_OPT_MCDI
 395         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_MCDI_EV ==
 396             FSE_AZ_EV_CODE_MCDI_EVRESPONSE);
 397 #endif
 398
 399         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 400         EFSYS_ASSERT(countp != NULL);
 401         EFSYS_ASSERT(eecp != NULL);
 402
 403         count = *countp;
 404         do {
 405                 /* Read up until the end of the batch period */
 406                 batch = EFX_EV_BATCH - (count & (EFX_EV_BATCH - 1));
 407                 offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 408                 for (total = 0; total < batch; ++total) {
 409                         EFSYS_MEM_READQ(eep->ee_esmp, offset, &(ev[total]));
 410
 411                         if (!EFX_EV_PRESENT(ev[total]))
 412                                 break;
 413
 414                         EFSYS_PROBE3(event, unsigned int, eep->ee_index,
 415                             uint32_t, EFX_QWORD_FIELD(ev[total], EFX_DWORD_1),
 416                             uint32_t, EFX_QWORD_FIELD(ev[total], EFX_DWORD_0));
 417
 418                         offset += sizeof (efx_qword_t);
 419                 }
 420
 421 #if EFSYS_OPT_EV_PREFETCH && (EFSYS_OPT_EV_PREFETCH_PERIOD > 1)
 422                 /*
 423                  * Prefetch the next batch when we get within PREFETCH_PERIOD
 424                  * of a completed batch. If the batch is smaller, then prefetch
 425                  * immediately.
 426                  */
 427                 if (total == batch && total < EFSYS_OPT_EV_PREFETCH_PERIOD)
 428                         EFSYS_MEM_PREFETCH(eep->ee_esmp, offset);
 429 #endif  /* EFSYS_OPT_EV_PREFETCH */
 430
 431                 /* Process the batch of events */
 432                 for (index = 0; index < total; ++index) {
 433                         boolean_t should_abort;
 434                         uint32_t code;
 435
 436 #if EFSYS_OPT_EV_PREFETCH
 437                         /* Prefetch if we've now reached the batch period */
 438                         if (total == batch &&
 439                             index + EFSYS_OPT_EV_PREFETCH_PERIOD == total) {
 440                                 offset = (count + batch) & eep->ee_mask;
 441                                 offset *= sizeof (efx_qword_t);
 442
 443                                 EFSYS_MEM_PREFETCH(eep->ee_esmp, offset);
 444                         }
 445 #endif  /* EFSYS_OPT_EV_PREFETCH */
 446
 447                         EFX_EV_QSTAT_INCR(eep, EV_ALL);
 448
 449                         code = EFX_QWORD_FIELD(ev[index], FSF_AZ_EV_CODE);
 450                         switch (code) {
 451                         case FSE_AZ_EV_CODE_RX_EV:
 452                                 should_abort = eep->ee_rx(eep,
 453                                     &(ev[index]), eecp, arg);
 454                                 break;
 455                         case FSE_AZ_EV_CODE_TX_EV:
 456                                 should_abort = eep->ee_tx(eep,
 457                                     &(ev[index]), eecp, arg);
 458                                 break;
 459                         case FSE_AZ_EV_CODE_DRIVER_EV:
 460                                 should_abort = eep->ee_driver(eep,
 461                                     &(ev[index]), eecp, arg);
 462                                 break;
 463                         case FSE_AZ_EV_CODE_DRV_GEN_EV:
 464                                 should_abort = eep->ee_drv_gen(eep,
 465                                     &(ev[index]), eecp, arg);
 466                                 break;
 467 #if EFSYS_OPT_MCDI
 468                         case FSE_AZ_EV_CODE_MCDI_EVRESPONSE:
 469                                 should_abort = eep->ee_mcdi(eep,
 470                                     &(ev[index]), eecp, arg);
 471                                 break;
 472 #endif
 473                         case FSE_AZ_EV_CODE_GLOBAL_EV:
 474                                 if (eep->ee_global) {
 475                                         should_abort = eep->ee_global(eep,
 476                                             &(ev[index]), eecp, arg);
 477                                         break;
 478                                 }
 479                                 /* else fallthrough */
 480                         default:
 481                                 EFSYS_PROBE3(bad_event,
 482                                     unsigned int, eep->ee_index,
 483                                     uint32_t,
 484                                     EFX_QWORD_FIELD(ev[index], EFX_DWORD_1),
 485                                     uint32_t,
 486                                     EFX_QWORD_FIELD(ev[index], EFX_DWORD_0));
 487
 488                                 EFSYS_ASSERT(eecp->eec_exception != NULL);
 489                                 (void) eecp->eec_exception(arg,
 490                                         EFX_EXCEPTION_EV_ERROR, code);
 491                                 should_abort = B_TRUE;
 492                         }
 493                         if (should_abort) {
 494                                 /* Ignore subsequent events */
 495                                 total = index + 1;
 496
 497                                 /*
 498                                  * Poison batch to ensure the outer
 499                                  * loop is broken out of.
 500                                  */
 501                                 EFSYS_ASSERT(batch <= EFX_EV_BATCH);
 502                                 batch += (EFX_EV_BATCH << 1);
 503                                 EFSYS_ASSERT(total != batch);
 504                                 break;
 505                         }
 506                 }
 507
 508                 /*
 509                  * Now that the hardware has most likely moved onto dma'ing
 510                  * into the next cache line, clear the processed events. Take
 511                  * care to only clear out events that we've processed
 512                  */
 513                 EFX_SET_QWORD(ev[0]);
 514                 offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 515                 for (index = 0; index < total; ++index) {
 516                         EFSYS_MEM_WRITEQ(eep->ee_esmp, offset, &(ev[0]));
 517                         offset += sizeof (efx_qword_t);
 518                 }
 519
 520                 count += total;
 521
 522         } while (total == batch);
 523
 524         *countp = count;
 525 }
 526
 527                         void
 528 efx_ev_qpost(
 529         __in    efx_evq_t *eep,
 530         __in    uint16_t data)
 531 {
 532         efx_nic_t *enp = eep->ee_enp;
 533         const efx_ev_ops_t *eevop = enp->en_eevop;
 534
 535         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 536
 537         EFSYS_ASSERT(eevop != NULL &&
 538             eevop->eevo_qpost != NULL);
 539
 540         eevop->eevo_qpost(eep, data);
 541 }
 542
 543         __checkReturn   efx_rc_t
 544 efx_ev_usecs_to_ticks(
 545         __in            efx_nic_t *enp,
 546         __in            unsigned int us,
 547         __out           unsigned int *ticksp)
 548 {
 549         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
 550         unsigned int ticks;
 551
 552         /* Convert microseconds to a timer tick count */
 553         if (us == 0)
 554                 ticks = 0;
 555         else if (us * 1000 < encp->enc_evq_timer_quantum_ns)
 556                 ticks = 1;      /* Never round down to zero */
 557         else
 558                 ticks = us * 1000 / encp->enc_evq_timer_quantum_ns;
 559
 560         *ticksp = ticks;
 561         return (0);
 562 }
 563
 564         __checkReturn   efx_rc_t
 565 efx_ev_qmoderate(
 566         __in            efx_evq_t *eep,
 567         __in            unsigned int us)
 568 {
 569         efx_nic_t *enp = eep->ee_enp;
 570         const efx_ev_ops_t *eevop = enp->en_eevop;
 571         efx_rc_t rc;
 572
 573         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 574
 575         if ((eep->ee_flags & EFX_EVQ_FLAGS_NOTIFY_MASK) ==
 576             EFX_EVQ_FLAGS_NOTIFY_DISABLED) {
 577                 rc = EINVAL;
 578                 goto fail1;
 579         }
 580
 581         if ((rc = eevop->eevo_qmoderate(eep, us)) != 0)
 582                 goto fail2;
 583
 584         return (0);
 585
 586 fail2:
 587         EFSYS_PROBE(fail2);
 588 fail1:
 589         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 590         return (rc);
 591 }
 592
 593 #if EFSYS_OPT_QSTATS
 594                                         void
 595 efx_ev_qstats_update(
 596         __in                            efx_evq_t *eep,
 597         __inout_ecount(EV_NQSTATS)      efsys_stat_t *stat)
 598
 599 {       efx_nic_t *enp = eep->ee_enp;
 600         const efx_ev_ops_t *eevop = enp->en_eevop;
 601
 602         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 603
 604         eevop->eevo_qstats_update(eep, stat);
 605 }
 606
 607 #endif  /* EFSYS_OPT_QSTATS */
 608
 609 #if EFSYS_OPT_SIENA
 610
 611 static  __checkReturn   efx_rc_t
 612 siena_ev_init(
 613         __in            efx_nic_t *enp)
 614 {
 615         efx_oword_t oword;
 616
 617         /*
 618          * Program the event queue for receive and transmit queue
 619          * flush events.
 620          */
 621         EFX_BAR_READO(enp, FR_AZ_DP_CTRL_REG, &oword);
 622         EFX_SET_OWORD_FIELD(oword, FRF_AZ_FLS_EVQ_ID, 0);
 623         EFX_BAR_WRITEO(enp, FR_AZ_DP_CTRL_REG, &oword);
 624
 625         return (0);
 626
 627 }
 628
 629 static  __checkReturn   boolean_t
 630 siena_ev_rx_not_ok(
 631         __in            efx_evq_t *eep,
 632         __in            efx_qword_t *eqp,
 633         __in            uint32_t label,
 634         __in            uint32_t id,
 635         __inout         uint16_t *flagsp)
 636 {
 637         boolean_t ignore = B_FALSE;
 638
 639         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_TOBE_DISC) != 0) {
 640                 EFX_EV_QSTAT_INCR(eep, EV_RX_TOBE_DISC);
 641                 EFSYS_PROBE(tobe_disc);
 642                 /*
 643                  * Assume this is a unicast address mismatch, unless below
 644                  * we find either FSF_AZ_RX_EV_ETH_CRC_ERR or
 645                  * EV_RX_PAUSE_FRM_ERR is set.
 646                  */
 647                 (*flagsp) |= EFX_ADDR_MISMATCH;
 648         }
 649
 650         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_FRM_TRUNC) != 0) {
 651                 EFSYS_PROBE2(frm_trunc, uint32_t, label, uint32_t, id);
 652                 EFX_EV_QSTAT_INCR(eep, EV_RX_FRM_TRUNC);
 653                 (*flagsp) |= EFX_DISCARD;
 654
 655 #if EFSYS_OPT_RX_SCATTER
 656                 /*
 657                  * Lookout for payload queue ran dry errors and ignore them.
 658                  *
 659                  * Sadly for the header/data split cases, the descriptor
 660                  * pointer in this event refers to the header queue and
 661                  * therefore cannot be easily detected as duplicate.
 662                  * So we drop these and rely on the receive processing seeing
 663                  * a subsequent packet with FSF_AZ_RX_EV_SOP set to discard
 664                  * the partially received packet.
 665                  */
 666                 if ((EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_SOP) == 0) &&
 667                     (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_JUMBO_CONT) == 0) &&
 668                     (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_BYTE_CNT) == 0))
 669                         ignore = B_TRUE;
 670 #endif  /* EFSYS_OPT_RX_SCATTER */
 671         }
 672
 673         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_ETH_CRC_ERR) != 0) {
 674                 EFX_EV_QSTAT_INCR(eep, EV_RX_ETH_CRC_ERR);
 675                 EFSYS_PROBE(crc_err);
 676                 (*flagsp) &= ~EFX_ADDR_MISMATCH;
 677                 (*flagsp) |= EFX_DISCARD;
 678         }
 679
 680         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_PAUSE_FRM_ERR) != 0) {
 681                 EFX_EV_QSTAT_INCR(eep, EV_RX_PAUSE_FRM_ERR);
 682                 EFSYS_PROBE(pause_frm_err);
 683                 (*flagsp) &= ~EFX_ADDR_MISMATCH;
 684                 (*flagsp) |= EFX_DISCARD;
 685         }
 686
 687         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_BUF_OWNER_ID_ERR) != 0) {
 688                 EFX_EV_QSTAT_INCR(eep, EV_RX_BUF_OWNER_ID_ERR);
 689                 EFSYS_PROBE(owner_id_err);
 690                 (*flagsp) |= EFX_DISCARD;
 691         }
 692
 693         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_IP_HDR_CHKSUM_ERR) != 0) {
 694                 EFX_EV_QSTAT_INCR(eep, EV_RX_IPV4_HDR_CHKSUM_ERR);
 695                 EFSYS_PROBE(ipv4_err);
 696                 (*flagsp) &= ~EFX_CKSUM_IPV4;
 697         }
 698
 699         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_TCP_UDP_CHKSUM_ERR) != 0) {
 700                 EFX_EV_QSTAT_INCR(eep, EV_RX_TCP_UDP_CHKSUM_ERR);
 701                 EFSYS_PROBE(udp_chk_err);
 702                 (*flagsp) &= ~EFX_CKSUM_TCPUDP;
 703         }
 704
 705         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_IP_FRAG_ERR) != 0) {
 706                 EFX_EV_QSTAT_INCR(eep, EV_RX_IP_FRAG_ERR);
 707
 708                 /*
 709                  * If IP is fragmented FSF_AZ_RX_EV_IP_FRAG_ERR is set. This
 710                  * causes FSF_AZ_RX_EV_PKT_OK to be clear. This is not an error
 711                  * condition.
 712                  */
 713                 (*flagsp) &= ~(EFX_PKT_TCP | EFX_PKT_UDP | EFX_CKSUM_TCPUDP);
 714         }
 715
 716         return (ignore);
 717 }
 718
 719 static  __checkReturn   boolean_t
 720 siena_ev_rx(
 721         __in            efx_evq_t *eep,
 722         __in            efx_qword_t *eqp,
 723         __in            const efx_ev_callbacks_t *eecp,
 724         __in_opt        void *arg)
 725 {
 726         uint32_t id;
 727         uint32_t size;
 728         uint32_t label;
 729         boolean_t ok;
 730 #if EFSYS_OPT_RX_SCATTER
 731         boolean_t sop;
 732         boolean_t jumbo_cont;
 733 #endif  /* EFSYS_OPT_RX_SCATTER */
 734         uint32_t hdr_type;
 735         boolean_t is_v6;
 736         uint16_t flags;
 737         boolean_t ignore;
 738         boolean_t should_abort;
 739
 740         EFX_EV_QSTAT_INCR(eep, EV_RX);
 741
 742         /* Basic packet information */
 743         id = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_DESC_PTR);
 744         size = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_BYTE_CNT);
 745         label = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_Q_LABEL);
 746         ok = (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_PKT_OK) != 0);
 747
 748 #if EFSYS_OPT_RX_SCATTER
 749         sop = (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_SOP) != 0);
 750         jumbo_cont = (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_JUMBO_CONT) != 0);
 751 #endif  /* EFSYS_OPT_RX_SCATTER */
 752
 753         hdr_type = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_HDR_TYPE);
 754
 755         is_v6 = (EFX_QWORD_FIELD(*eqp, FSF_CZ_RX_EV_IPV6_PKT) != 0);
 756
 757         /*
 758          * If packet is marked as OK and packet type is TCP/IP or
 759          * UDP/IP or other IP, then we can rely on the hardware checksums.
 760          */
 761         switch (hdr_type) {
 762         case FSE_AZ_RX_EV_HDR_TYPE_IPV4V6_TCP:
 763                 flags = EFX_PKT_TCP | EFX_CKSUM_TCPUDP;
 764                 if (is_v6) {
 765                         EFX_EV_QSTAT_INCR(eep, EV_RX_TCP_IPV6);
 766                         flags |= EFX_PKT_IPV6;
 767                 } else {
 768                         EFX_EV_QSTAT_INCR(eep, EV_RX_TCP_IPV4);
 769                         flags |= EFX_PKT_IPV4 | EFX_CKSUM_IPV4;
 770                 }
 771                 break;
 772
 773         case FSE_AZ_RX_EV_HDR_TYPE_IPV4V6_UDP:
 774                 flags = EFX_PKT_UDP | EFX_CKSUM_TCPUDP;
 775                 if (is_v6) {
 776                         EFX_EV_QSTAT_INCR(eep, EV_RX_UDP_IPV6);
 777                         flags |= EFX_PKT_IPV6;
 778                 } else {
 779                         EFX_EV_QSTAT_INCR(eep, EV_RX_UDP_IPV4);
 780                         flags |= EFX_PKT_IPV4 | EFX_CKSUM_IPV4;
 781                 }
 782                 break;
 783
 784         case FSE_AZ_RX_EV_HDR_TYPE_IPV4V6_OTHER:
 785                 if (is_v6) {
 786                         EFX_EV_QSTAT_INCR(eep, EV_RX_OTHER_IPV6);
 787                         flags = EFX_PKT_IPV6;
 788                 } else {
 789                         EFX_EV_QSTAT_INCR(eep, EV_RX_OTHER_IPV4);
 790                         flags = EFX_PKT_IPV4 | EFX_CKSUM_IPV4;
 791                 }
 792                 break;
 793
 794         case FSE_AZ_RX_EV_HDR_TYPE_OTHER:
 795                 EFX_EV_QSTAT_INCR(eep, EV_RX_NON_IP);
 796                 flags = 0;
 797                 break;
 798
 799         default:
 800                 EFSYS_ASSERT(B_FALSE);
 801                 flags = 0;
 802                 break;
 803         }
 804
 805 #if EFSYS_OPT_RX_SCATTER
 806         /* Report scatter and header/lookahead split buffer flags */
 807         if (sop)
 808                 flags |= EFX_PKT_START;
 809         if (jumbo_cont)
 810                 flags |= EFX_PKT_CONT;
 811 #endif  /* EFSYS_OPT_RX_SCATTER */
 812
 813         /* Detect errors included in the FSF_AZ_RX_EV_PKT_OK indication */
 814         if (!ok) {
 815                 ignore = siena_ev_rx_not_ok(eep, eqp, label, id, &flags);
 816                 if (ignore) {
 817                         EFSYS_PROBE4(rx_complete, uint32_t, label, uint32_t, id,
 818                             uint32_t, size, uint16_t, flags);
 819
 820                         return (B_FALSE);
 821                 }
 822         }
 823
 824         /* If we're not discarding the packet then it is ok */
 825         if (~flags & EFX_DISCARD)
 826                 EFX_EV_QSTAT_INCR(eep, EV_RX_OK);
 827
 828         /* Detect multicast packets that didn't match the filter */
 829         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_MCAST_PKT) != 0) {
 830                 EFX_EV_QSTAT_INCR(eep, EV_RX_MCAST_PKT);
 831
 832                 if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_MCAST_HASH_MATCH) != 0) {
 833                         EFX_EV_QSTAT_INCR(eep, EV_RX_MCAST_HASH_MATCH);
 834                 } else {
 835                         EFSYS_PROBE(mcast_mismatch);
 836                         flags |= EFX_ADDR_MISMATCH;
 837                 }
 838         } else {
 839                 flags |= EFX_PKT_UNICAST;
 840         }
 841
 842         /*
 843          * The packet parser in Siena can abort parsing packets under
 844          * certain error conditions, setting the PKT_NOT_PARSED bit
 845          * (which clears PKT_OK). If this is set, then don't trust
 846          * the PKT_TYPE field.
 847          */
 848         if (!ok) {
 849                 uint32_t parse_err;
 850
 851                 parse_err = EFX_QWORD_FIELD(*eqp, FSF_CZ_RX_EV_PKT_NOT_PARSED);
 852                 if (parse_err != 0)
 853                         flags |= EFX_CHECK_VLAN;
 854         }
 855
 856         if (~flags & EFX_CHECK_VLAN) {
 857                 uint32_t pkt_type;
 858
 859                 pkt_type = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_PKT_TYPE);
 860                 if (pkt_type >= FSE_AZ_RX_EV_PKT_TYPE_VLAN)
 861                         flags |= EFX_PKT_VLAN_TAGGED;
 862         }
 863
 864         EFSYS_PROBE4(rx_complete, uint32_t, label, uint32_t, id,
 865             uint32_t, size, uint16_t, flags);
 866
 867         EFSYS_ASSERT(eecp->eec_rx != NULL);
 868         should_abort = eecp->eec_rx(arg, label, id, size, flags);
 869
 870         return (should_abort);
 871 }
 872
 873 static  __checkReturn   boolean_t
 874 siena_ev_tx(
 875         __in            efx_evq_t *eep,
 876         __in            efx_qword_t *eqp,
 877         __in            const efx_ev_callbacks_t *eecp,
 878         __in_opt        void *arg)
 879 {
 880         uint32_t id;
 881         uint32_t label;
 882         boolean_t should_abort;
 883
 884         EFX_EV_QSTAT_INCR(eep, EV_TX);
 885
 886         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_COMP) != 0 &&
 887             EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_ERR) == 0 &&
 888             EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_TOO_BIG) == 0 &&
 889             EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_WQ_FF_FULL) == 0) {
 890
 891                 id = EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_DESC_PTR);
 892                 label = EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_Q_LABEL);
 893
 894                 EFSYS_PROBE2(tx_complete, uint32_t, label, uint32_t, id);
 895
 896                 EFSYS_ASSERT(eecp->eec_tx != NULL);
 897                 should_abort = eecp->eec_tx(arg, label, id);
 898
 899                 return (should_abort);
 900         }
 901
 902         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_COMP) != 0)
 903                 EFSYS_PROBE3(bad_event, unsigned int, eep->ee_index,
 904                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_1),
 905                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_0));
 906
 907         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_ERR) != 0)
 908                 EFX_EV_QSTAT_INCR(eep, EV_TX_PKT_ERR);
 909
 910         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_TOO_BIG) != 0)
 911                 EFX_EV_QSTAT_INCR(eep, EV_TX_PKT_TOO_BIG);
 912
 913         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_WQ_FF_FULL) != 0)
 914                 EFX_EV_QSTAT_INCR(eep, EV_TX_WQ_FF_FULL);
 915
 916         EFX_EV_QSTAT_INCR(eep, EV_TX_UNEXPECTED);
 917         return (B_FALSE);
 918 }
 919
 920 static  __checkReturn   boolean_t
 921 siena_ev_global(
 922         __in            efx_evq_t *eep,
 923         __in            efx_qword_t *eqp,
 924         __in            const efx_ev_callbacks_t *eecp,
 925         __in_opt        void *arg)
 926 {
 927         _NOTE(ARGUNUSED(eqp, eecp, arg))
 928
 929         EFX_EV_QSTAT_INCR(eep, EV_GLOBAL);
 930
 931         return (B_FALSE);
 932 }
 933
 934 static  __checkReturn   boolean_t
 935 siena_ev_driver(
 936         __in            efx_evq_t *eep,
 937         __in            efx_qword_t *eqp,
 938         __in            const efx_ev_callbacks_t *eecp,
 939         __in_opt        void *arg)
 940 {
 941         boolean_t should_abort;
 942
 943         EFX_EV_QSTAT_INCR(eep, EV_DRIVER);
 944         should_abort = B_FALSE;
 945
 946         switch (EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBCODE)) {
 947         case FSE_AZ_TX_DESCQ_FLS_DONE_EV: {
 948                 uint32_t txq_index;
 949
 950                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_TX_DESCQ_FLS_DONE);
 951
 952                 txq_index = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
 953
 954                 EFSYS_PROBE1(tx_descq_fls_done, uint32_t, txq_index);
 955
 956                 EFSYS_ASSERT(eecp->eec_txq_flush_done != NULL);
 957                 should_abort = eecp->eec_txq_flush_done(arg, txq_index);
 958
 959                 break;
 960         }
 961         case FSE_AZ_RX_DESCQ_FLS_DONE_EV: {
 962                 uint32_t rxq_index;
 963                 uint32_t failed;
 964
 965                 rxq_index = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_RX_DESCQ_ID);
 966                 failed = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_RX_FLUSH_FAIL);
 967
 968                 EFSYS_ASSERT(eecp->eec_rxq_flush_done != NULL);
 969                 EFSYS_ASSERT(eecp->eec_rxq_flush_failed != NULL);
 970
 971                 if (failed) {
 972                         EFX_EV_QSTAT_INCR(eep, EV_DRIVER_RX_DESCQ_FLS_FAILED);
 973
 974                         EFSYS_PROBE1(rx_descq_fls_failed, uint32_t, rxq_index);
 975
 976                         should_abort = eecp->eec_rxq_flush_failed(arg,
 977                                                                     rxq_index);
 978                 } else {
 979                         EFX_EV_QSTAT_INCR(eep, EV_DRIVER_RX_DESCQ_FLS_DONE);
 980
 981                         EFSYS_PROBE1(rx_descq_fls_done, uint32_t, rxq_index);
 982
 983                         should_abort = eecp->eec_rxq_flush_done(arg, rxq_index);
 984                 }
 985
 986                 break;
 987         }
 988         case FSE_AZ_EVQ_INIT_DONE_EV:
 989                 EFSYS_ASSERT(eecp->eec_initialized != NULL);
 990                 should_abort = eecp->eec_initialized(arg);
 991
 992                 break;
 993
 994         case FSE_AZ_EVQ_NOT_EN_EV:
 995                 EFSYS_PROBE(evq_not_en);
 996                 break;
 997
 998         case FSE_AZ_SRM_UPD_DONE_EV: {
 999                 uint32_t code;
1000
1001                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_SRM_UPD_DONE);
1002
1003                 code = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
1004
1005                 EFSYS_ASSERT(eecp->eec_sram != NULL);
1006                 should_abort = eecp->eec_sram(arg, code);
1007
1008                 break;
1009         }
1010         case FSE_AZ_WAKE_UP_EV: {
1011                 uint32_t id;
1012
1013                 id = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
1014
1015                 EFSYS_ASSERT(eecp->eec_wake_up != NULL);
1016                 should_abort = eecp->eec_wake_up(arg, id);
1017
1018                 break;
1019         }
1020         case FSE_AZ_TX_PKT_NON_TCP_UDP:
1021                 EFSYS_PROBE(tx_pkt_non_tcp_udp);
1022                 break;
1023
1024         case FSE_AZ_TIMER_EV: {
1025                 uint32_t id;
1026
1027                 id = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
1028
1029                 EFSYS_ASSERT(eecp->eec_timer != NULL);
1030                 should_abort = eecp->eec_timer(arg, id);
1031
1032                 break;
1033         }
1034         case FSE_AZ_RX_DSC_ERROR_EV:
1035                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_RX_DSC_ERROR);
1036
1037                 EFSYS_PROBE(rx_dsc_error);
1038
1039                 EFSYS_ASSERT(eecp->eec_exception != NULL);
1040                 should_abort = eecp->eec_exception(arg,
1041                         EFX_EXCEPTION_RX_DSC_ERROR, 0);
1042
1043                 break;
1044
1045         case FSE_AZ_TX_DSC_ERROR_EV:
1046                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_TX_DSC_ERROR);
1047
1048                 EFSYS_PROBE(tx_dsc_error);
1049
1050                 EFSYS_ASSERT(eecp->eec_exception != NULL);
1051                 should_abort = eecp->eec_exception(arg,
1052                         EFX_EXCEPTION_TX_DSC_ERROR, 0);
1053
1054                 break;
1055
1056         default:
1057                 break;
1058         }
1059
1060         return (should_abort);
1061 }
1062
1063 static  __checkReturn   boolean_t
1064 siena_ev_drv_gen(
1065         __in            efx_evq_t *eep,
1066         __in            efx_qword_t *eqp,
1067         __in            const efx_ev_callbacks_t *eecp,
1068         __in_opt        void *arg)
1069 {
1070         uint32_t data;
1071         boolean_t should_abort;
1072
1073         EFX_EV_QSTAT_INCR(eep, EV_DRV_GEN);
1074
1075         data = EFX_QWORD_FIELD(*eqp, FSF_AZ_EV_DATA_DW0);
1076         if (data >= ((uint32_t)1 << 16)) {
1077                 EFSYS_PROBE3(bad_event, unsigned int, eep->ee_index,
1078                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_1),
1079                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_0));
1080                 return (B_TRUE);
1081         }
1082
1083         EFSYS_ASSERT(eecp->eec_software != NULL);
1084         should_abort = eecp->eec_software(arg, (uint16_t)data);
1085
1086         return (should_abort);
1087 }
1088
1089 #if EFSYS_OPT_MCDI
1090
1091 static  __checkReturn   boolean_t
1092 siena_ev_mcdi(
1093         __in            efx_evq_t *eep,
1094         __in            efx_qword_t *eqp,
1095         __in            const efx_ev_callbacks_t *eecp,
1096         __in_opt        void *arg)
1097 {
1098         efx_nic_t *enp = eep->ee_enp;
1099         unsigned int code;
1100         boolean_t should_abort = B_FALSE;
1101
1102         EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA);
1103
1104         if (enp->en_family != EFX_FAMILY_SIENA)
1105                 goto out;
1106
1107         EFSYS_ASSERT(eecp->eec_link_change != NULL);
1108         EFSYS_ASSERT(eecp->eec_exception != NULL);
1109 #if EFSYS_OPT_MON_STATS
1110         EFSYS_ASSERT(eecp->eec_monitor != NULL);
1111 #endif
1112
1113         EFX_EV_QSTAT_INCR(eep, EV_MCDI_RESPONSE);
1114
1115         code = EFX_QWORD_FIELD(*eqp, MCDI_EVENT_CODE);
1116         switch (code) {
1117         case MCDI_EVENT_CODE_BADSSERT:
1118                 efx_mcdi_ev_death(enp, EINTR);
1119                 break;
1120
1121         case MCDI_EVENT_CODE_CMDDONE:
1122                 efx_mcdi_ev_cpl(enp,
1123                     MCDI_EV_FIELD(eqp, CMDDONE_SEQ),
1124                     MCDI_EV_FIELD(eqp, CMDDONE_DATALEN),
1125                     MCDI_EV_FIELD(eqp, CMDDONE_ERRNO));
1126                 break;
1127
1128         case MCDI_EVENT_CODE_LINKCHANGE: {
1129                 efx_link_mode_t link_mode;
1130
1131                 siena_phy_link_ev(enp, eqp, &link_mode);
1132                 should_abort = eecp->eec_link_change(arg, link_mode);
1133                 break;
1134         }
1135         case MCDI_EVENT_CODE_SENSOREVT: {
1136 #if EFSYS_OPT_MON_STATS
1137                 efx_mon_stat_t id;
1138                 efx_mon_stat_value_t value;
1139                 efx_rc_t rc;
1140
1141                 if ((rc = mcdi_mon_ev(enp, eqp, &id, &value)) == 0)
1142                         should_abort = eecp->eec_monitor(arg, id, value);
1143                 else if (rc == ENOTSUP) {
1144                         should_abort = eecp->eec_exception(arg,
1145                                 EFX_EXCEPTION_UNKNOWN_SENSOREVT,
1146                                 MCDI_EV_FIELD(eqp, DATA));
1147                 } else
1148                         EFSYS_ASSERT(rc == ENODEV);     /* Wrong port */
1149 #else
1150                 should_abort = B_FALSE;
1151 #endif
1152                 break;
1153         }
1154         case MCDI_EVENT_CODE_SCHEDERR:
1155                 /* Informational only */
1156                 break;
1157
1158         case MCDI_EVENT_CODE_REBOOT:
1159                 efx_mcdi_ev_death(enp, EIO);
1160                 break;
1161
1162         case MCDI_EVENT_CODE_MAC_STATS_DMA:
1163 #if EFSYS_OPT_MAC_STATS
1164                 if (eecp->eec_mac_stats != NULL) {
1165                         eecp->eec_mac_stats(arg,
1166                             MCDI_EV_FIELD(eqp, MAC_STATS_DMA_GENERATION));
1167                 }
1168 #endif
1169                 break;
1170
1171         case MCDI_EVENT_CODE_FWALERT: {
1172                 uint32_t reason = MCDI_EV_FIELD(eqp, FWALERT_REASON);
1173
1174                 if (reason == MCDI_EVENT_FWALERT_REASON_SRAM_ACCESS)
1175                         should_abort = eecp->eec_exception(arg,
1176                                 EFX_EXCEPTION_FWALERT_SRAM,
1177                                 MCDI_EV_FIELD(eqp, FWALERT_DATA));
1178                 else
1179                         should_abort = eecp->eec_exception(arg,
1180                                 EFX_EXCEPTION_UNKNOWN_FWALERT,
1181                                 MCDI_EV_FIELD(eqp, DATA));
1182                 break;
1183         }
1184
1185         default:
1186                 EFSYS_PROBE1(mc_pcol_error, int, code);
1187                 break;
1188         }
1189
1190 out:
1191         return (should_abort);
1192 }
1193
1194 #endif  /* EFSYS_OPT_MCDI */
1195
1196 static  __checkReturn   efx_rc_t
1197 siena_ev_qprime(
1198         __in            efx_evq_t *eep,
1199         __in            unsigned int count)
1200 {
1201         efx_nic_t *enp = eep->ee_enp;
1202         uint32_t rptr;
1203         efx_dword_t dword;
1204
1205         rptr = count & eep->ee_mask;
1206
1207         EFX_POPULATE_DWORD_1(dword, FRF_AZ_EVQ_RPTR, rptr);
1208
1209         EFX_BAR_TBL_WRITED(enp, FR_AZ_EVQ_RPTR_REG, eep->ee_index,
1210                             &dword, B_FALSE);
1211
1212         return (0);
1213 }
1214
1215 static          void
1216 siena_ev_qpost(
1217         __in    efx_evq_t *eep,
1218         __in    uint16_t data)
1219 {
1220         efx_nic_t *enp = eep->ee_enp;
1221         efx_qword_t ev;
1222         efx_oword_t oword;
1223
1224         EFX_POPULATE_QWORD_2(ev, FSF_AZ_EV_CODE, FSE_AZ_EV_CODE_DRV_GEN_EV,
1225             FSF_AZ_EV_DATA_DW0, (uint32_t)data);
1226
1227         EFX_POPULATE_OWORD_3(oword, FRF_AZ_DRV_EV_QID, eep->ee_index,
1228             EFX_DWORD_0, EFX_QWORD_FIELD(ev, EFX_DWORD_0),
1229             EFX_DWORD_1, EFX_QWORD_FIELD(ev, EFX_DWORD_1));
1230
1231         EFX_BAR_WRITEO(enp, FR_AZ_DRV_EV_REG, &oword);
1232 }
1233
1234 static  __checkReturn   efx_rc_t
1235 siena_ev_qmoderate(
1236         __in            efx_evq_t *eep,
1237         __in            unsigned int us)
1238 {
1239         efx_nic_t *enp = eep->ee_enp;
1240         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1241         unsigned int locked;
1242         efx_dword_t dword;
1243         efx_rc_t rc;
1244
1245         if (us > encp->enc_evq_timer_max_us) {
1246                 rc = EINVAL;
1247                 goto fail1;
1248         }
1249
1250         /* If the value is zero then disable the timer */
1251         if (us == 0) {
1252                 EFX_POPULATE_DWORD_2(dword,
1253                     FRF_CZ_TC_TIMER_MODE, FFE_CZ_TIMER_MODE_DIS,
1254                     FRF_CZ_TC_TIMER_VAL, 0);
1255         } else {
1256                 unsigned int ticks;
1257
1258                 if ((rc = efx_ev_usecs_to_ticks(enp, us, &ticks)) != 0)
1259                         goto fail2;
1260
1261                 EFSYS_ASSERT(ticks > 0);
1262                 EFX_POPULATE_DWORD_2(dword,
1263                     FRF_CZ_TC_TIMER_MODE, FFE_CZ_TIMER_MODE_INT_HLDOFF,
1264                     FRF_CZ_TC_TIMER_VAL, ticks - 1);
1265         }
1266
1267         locked = (eep->ee_index == 0) ? 1 : 0;
1268
1269         EFX_BAR_TBL_WRITED(enp, FR_BZ_TIMER_COMMAND_REGP0,
1270             eep->ee_index, &dword, locked);
1271
1272         return (0);
1273
1274 fail2:
1275         EFSYS_PROBE(fail2);
1276 fail1:
1277         EFSYS_PROBE1(fail1, efx_rc_t, rc);
1278
1279         return (rc);
1280 }
1281
1282 static  __checkReturn   efx_rc_t
1283 siena_ev_qcreate(
1284         __in            efx_nic_t *enp,
1285         __in            unsigned int index,
1286         __in            efsys_mem_t *esmp,
1287         __in            size_t ndescs,
1288         __in            uint32_t id,
1289         __in            uint32_t us,
1290         __in            uint32_t flags,
1291         __in            efx_evq_t *eep)
1292 {
1293         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1294         uint32_t size;
1295         efx_oword_t oword;
1296         efx_rc_t rc;
1297         boolean_t notify_mode;
1298
1299         _NOTE(ARGUNUSED(esmp))
1300
1301         if (index >= encp->enc_evq_limit) {
1302                 rc = EINVAL;
1303                 goto fail1;
1304         }
1305 #if EFSYS_OPT_RX_SCALE
1306         if (enp->en_intr.ei_type == EFX_INTR_LINE &&
1307             index >= EFX_MAXRSS_LEGACY) {
1308                 rc = EINVAL;
1309                 goto fail2;
1310         }
1311 #endif
1312         for (size = 0;
1313             (1U << size) <= encp->enc_evq_max_nevs / encp->enc_evq_min_nevs;
1314             size++)
1315                 if ((1U << size) == (uint32_t)ndescs / encp->enc_evq_min_nevs)
1316                         break;
1317         if (id + (1 << size) >= encp->enc_buftbl_limit) {
1318                 rc = EINVAL;
1319                 goto fail3;
1320         }
1321
1322         /* Set up the handler table */
1323         eep->ee_rx      = siena_ev_rx;
1324         eep->ee_tx      = siena_ev_tx;
1325         eep->ee_driver  = siena_ev_driver;
1326         eep->ee_global  = siena_ev_global;
1327         eep->ee_drv_gen = siena_ev_drv_gen;
1328 #if EFSYS_OPT_MCDI
1329         eep->ee_mcdi    = siena_ev_mcdi;
1330 #endif  /* EFSYS_OPT_MCDI */
1331
1332         notify_mode = ((flags & EFX_EVQ_FLAGS_NOTIFY_MASK) !=
1333             EFX_EVQ_FLAGS_NOTIFY_INTERRUPT);
1334
1335         /* Set up the new event queue */
1336         EFX_POPULATE_OWORD_3(oword, FRF_CZ_TIMER_Q_EN, 1,
1337             FRF_CZ_HOST_NOTIFY_MODE, notify_mode,
1338             FRF_CZ_TIMER_MODE, FFE_CZ_TIMER_MODE_DIS);
1339         EFX_BAR_TBL_WRITEO(enp, FR_AZ_TIMER_TBL, index, &oword, B_TRUE);
1340
1341         EFX_POPULATE_OWORD_3(oword, FRF_AZ_EVQ_EN, 1, FRF_AZ_EVQ_SIZE, size,
1342             FRF_AZ_EVQ_BUF_BASE_ID, id);
1343
1344         EFX_BAR_TBL_WRITEO(enp, FR_AZ_EVQ_PTR_TBL, index, &oword, B_TRUE);
1345
1346         /* Set initial interrupt moderation */
1347         siena_ev_qmoderate(eep, us);
1348
1349         return (0);
1350
1351 fail3:
1352         EFSYS_PROBE(fail3);
1353 #if EFSYS_OPT_RX_SCALE
1354 fail2:
1355         EFSYS_PROBE(fail2);
1356 #endif
1357 fail1:
1358         EFSYS_PROBE1(fail1, efx_rc_t, rc);
1359
1360         return (rc);
1361 }
1362
1363 #endif /* EFSYS_OPT_SIENA */
1364
1365 #if EFSYS_OPT_QSTATS
1366 #if EFSYS_OPT_NAMES
1367 /* START MKCONFIG GENERATED EfxEventQueueStatNamesBlock c0f3bc5083b40532 */
1368 static const char * const __efx_ev_qstat_name[] = {
1369         "all",
1370         "rx",
1371         "rx_ok",
1372         "rx_frm_trunc",
1373         "rx_tobe_disc",
1374         "rx_pause_frm_err",
1375         "rx_buf_owner_id_err",
1376         "rx_ipv4_hdr_chksum_err",
1377         "rx_tcp_udp_chksum_err",
1378         "rx_eth_crc_err",
1379         "rx_ip_frag_err",
1380         "rx_mcast_pkt",
1381         "rx_mcast_hash_match",
1382         "rx_tcp_ipv4",
1383         "rx_tcp_ipv6",
1384         "rx_udp_ipv4",
1385         "rx_udp_ipv6",
1386         "rx_other_ipv4",
1387         "rx_other_ipv6",
1388         "rx_non_ip",
1389         "rx_batch",
1390         "tx",
1391         "tx_wq_ff_full",
1392         "tx_pkt_err",
1393         "tx_pkt_too_big",
1394         "tx_unexpected",
1395         "global",
1396         "global_mnt",
1397         "driver",
1398         "driver_srm_upd_done",
1399         "driver_tx_descq_fls_done",
1400         "driver_rx_descq_fls_done",
1401         "driver_rx_descq_fls_failed",
1402         "driver_rx_dsc_error",
1403         "driver_tx_dsc_error",
1404         "drv_gen",
1405         "mcdi_response",
1406 };
1407 /* END MKCONFIG GENERATED EfxEventQueueStatNamesBlock */
1408
1409                 const char *
1410 efx_ev_qstat_name(
1411         __in    efx_nic_t *enp,
1412         __in    unsigned int id)
1413 {
1414         _NOTE(ARGUNUSED(enp))
1415
1416         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
1417         EFSYS_ASSERT3U(id, <, EV_NQSTATS);
1418
1419         return (__efx_ev_qstat_name[id]);
1420 }
1421 #endif  /* EFSYS_OPT_NAMES */
1422 #endif  /* EFSYS_OPT_QSTATS */
1423
1424 #if EFSYS_OPT_SIENA
1425
1426 #if EFSYS_OPT_QSTATS
1427 static                                  void
1428 siena_ev_qstats_update(
1429         __in                            efx_evq_t *eep,
1430         __inout_ecount(EV_NQSTATS)      efsys_stat_t *stat)
1431 {
1432         unsigned int id;
1433
1434         for (id = 0; id < EV_NQSTATS; id++) {
1435                 efsys_stat_t *essp = &stat[id];
1436
1437                 EFSYS_STAT_INCR(essp, eep->ee_stat[id]);
1438                 eep->ee_stat[id] = 0;
1439         }
1440 }
1441 #endif  /* EFSYS_OPT_QSTATS */
1442
1443 static          void
1444 siena_ev_qdestroy(
1445         __in    efx_evq_t *eep)
1446 {
1447         efx_nic_t *enp = eep->ee_enp;
1448         efx_oword_t oword;
1449
1450         /* Purge event queue */
1451         EFX_ZERO_OWORD(oword);
1452
1453         EFX_BAR_TBL_WRITEO(enp, FR_AZ_EVQ_PTR_TBL,
1454             eep->ee_index, &oword, B_TRUE);
1455
1456         EFX_ZERO_OWORD(oword);
1457         EFX_BAR_TBL_WRITEO(enp, FR_AZ_TIMER_TBL, eep->ee_index, &oword, B_TRUE);
1458 }
1459
1460 static          void
1461 siena_ev_fini(
1462         __in    efx_nic_t *enp)
1463 {
1464         _NOTE(ARGUNUSED(enp))
1465 }
1466
1467 #endif /* EFSYS_OPT_SIENA */