drivers/net/sfc/base/efx_ev.c

   1 /*
   2  * Copyright (c) 2007-2016 Solarflare Communications Inc.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are met:
   7  *
   8  * 1. Redistributions of source code must retain the above copyright notice,
   9  *    this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright notice,
  11  *    this list of conditions and the following disclaimer in the documentation
  12  *    and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  15  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  16  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  18  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  19  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  20  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  21  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  22  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  23  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
  24  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  *
  26  * The views and conclusions contained in the software and documentation are
  27  * those of the authors and should not be interpreted as representing official
  28  * policies, either expressed or implied, of the FreeBSD Project.
  29  */
  30
  31 #include "efx.h"
  32 #include "efx_impl.h"
  33
  34 #define EFX_EV_QSTAT_INCR(_eep, _stat)
  35
  36 #define EFX_EV_PRESENT(_qword)                                          \
  37         (EFX_QWORD_FIELD((_qword), EFX_DWORD_0) != 0xffffffff &&        \
  38         EFX_QWORD_FIELD((_qword), EFX_DWORD_1) != 0xffffffff)
  39
  40
  41
  42 #if EFSYS_OPT_SIENA
  43
  44 static  __checkReturn   efx_rc_t
  45 siena_ev_init(
  46         __in            efx_nic_t *enp);
  47
  48 static                  void
  49 siena_ev_fini(
  50         __in            efx_nic_t *enp);
  51
  52 static  __checkReturn   efx_rc_t
  53 siena_ev_qcreate(
  54         __in            efx_nic_t *enp,
  55         __in            unsigned int index,
  56         __in            efsys_mem_t *esmp,
  57         __in            size_t n,
  58         __in            uint32_t id,
  59         __in            uint32_t us,
  60         __in            uint32_t flags,
  61         __in            efx_evq_t *eep);
  62
  63 static                  void
  64 siena_ev_qdestroy(
  65         __in            efx_evq_t *eep);
  66
  67 static  __checkReturn   efx_rc_t
  68 siena_ev_qprime(
  69         __in            efx_evq_t *eep,
  70         __in            unsigned int count);
  71
  72 static                  void
  73 siena_ev_qpost(
  74         __in    efx_evq_t *eep,
  75         __in    uint16_t data);
  76
  77 static  __checkReturn   efx_rc_t
  78 siena_ev_qmoderate(
  79         __in            efx_evq_t *eep,
  80         __in            unsigned int us);
  81
  82 #endif /* EFSYS_OPT_SIENA */
  83
  84 #if EFSYS_OPT_SIENA
  85 static const efx_ev_ops_t       __efx_ev_siena_ops = {
  86         siena_ev_init,                          /* eevo_init */
  87         siena_ev_fini,                          /* eevo_fini */
  88         siena_ev_qcreate,                       /* eevo_qcreate */
  89         siena_ev_qdestroy,                      /* eevo_qdestroy */
  90         siena_ev_qprime,                        /* eevo_qprime */
  91         siena_ev_qpost,                         /* eevo_qpost */
  92         siena_ev_qmoderate,                     /* eevo_qmoderate */
  93 };
  94 #endif /* EFSYS_OPT_SIENA */
  95
  96 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
  97 static const efx_ev_ops_t       __efx_ev_ef10_ops = {
  98         ef10_ev_init,                           /* eevo_init */
  99         ef10_ev_fini,                           /* eevo_fini */
 100         ef10_ev_qcreate,                        /* eevo_qcreate */
 101         ef10_ev_qdestroy,                       /* eevo_qdestroy */
 102         ef10_ev_qprime,                         /* eevo_qprime */
 103         ef10_ev_qpost,                          /* eevo_qpost */
 104         ef10_ev_qmoderate,                      /* eevo_qmoderate */
 105 };
 106 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */
 107
 108
 109         __checkReturn   efx_rc_t
 110 efx_ev_init(
 111         __in            efx_nic_t *enp)
 112 {
 113         const efx_ev_ops_t *eevop;
 114         efx_rc_t rc;
 115
 116         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 117         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR);
 118
 119         if (enp->en_mod_flags & EFX_MOD_EV) {
 120                 rc = EINVAL;
 121                 goto fail1;
 122         }
 123
 124         switch (enp->en_family) {
 125 #if EFSYS_OPT_SIENA
 126         case EFX_FAMILY_SIENA:
 127                 eevop = &__efx_ev_siena_ops;
 128                 break;
 129 #endif /* EFSYS_OPT_SIENA */
 130
 131 #if EFSYS_OPT_HUNTINGTON
 132         case EFX_FAMILY_HUNTINGTON:
 133                 eevop = &__efx_ev_ef10_ops;
 134                 break;
 135 #endif /* EFSYS_OPT_HUNTINGTON */
 136
 137 #if EFSYS_OPT_MEDFORD
 138         case EFX_FAMILY_MEDFORD:
 139                 eevop = &__efx_ev_ef10_ops;
 140                 break;
 141 #endif /* EFSYS_OPT_MEDFORD */
 142
 143         default:
 144                 EFSYS_ASSERT(0);
 145                 rc = ENOTSUP;
 146                 goto fail1;
 147         }
 148
 149         EFSYS_ASSERT3U(enp->en_ev_qcount, ==, 0);
 150
 151         if ((rc = eevop->eevo_init(enp)) != 0)
 152                 goto fail2;
 153
 154         enp->en_eevop = eevop;
 155         enp->en_mod_flags |= EFX_MOD_EV;
 156         return (0);
 157
 158 fail2:
 159         EFSYS_PROBE(fail2);
 160
 161 fail1:
 162         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 163
 164         enp->en_eevop = NULL;
 165         enp->en_mod_flags &= ~EFX_MOD_EV;
 166         return (rc);
 167 }
 168
 169                 void
 170 efx_ev_fini(
 171         __in    efx_nic_t *enp)
 172 {
 173         const efx_ev_ops_t *eevop = enp->en_eevop;
 174
 175         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 176         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR);
 177         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_EV);
 178         EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_RX));
 179         EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_TX));
 180         EFSYS_ASSERT3U(enp->en_ev_qcount, ==, 0);
 181
 182         eevop->eevo_fini(enp);
 183
 184         enp->en_eevop = NULL;
 185         enp->en_mod_flags &= ~EFX_MOD_EV;
 186 }
 187
 188
 189         __checkReturn   efx_rc_t
 190 efx_ev_qcreate(
 191         __in            efx_nic_t *enp,
 192         __in            unsigned int index,
 193         __in            efsys_mem_t *esmp,
 194         __in            size_t n,
 195         __in            uint32_t id,
 196         __in            uint32_t us,
 197         __in            uint32_t flags,
 198         __deref_out     efx_evq_t **eepp)
 199 {
 200         const efx_ev_ops_t *eevop = enp->en_eevop;
 201         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
 202         efx_evq_t *eep;
 203         efx_rc_t rc;
 204
 205         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 206         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_EV);
 207
 208         EFSYS_ASSERT3U(enp->en_ev_qcount + 1, <, encp->enc_evq_limit);
 209
 210         switch (flags & EFX_EVQ_FLAGS_NOTIFY_MASK) {
 211         case EFX_EVQ_FLAGS_NOTIFY_INTERRUPT:
 212                 break;
 213         case EFX_EVQ_FLAGS_NOTIFY_DISABLED:
 214                 if (us != 0) {
 215                         rc = EINVAL;
 216                         goto fail1;
 217                 }
 218                 break;
 219         default:
 220                 rc = EINVAL;
 221                 goto fail2;
 222         }
 223
 224         /* Allocate an EVQ object */
 225         EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (efx_evq_t), eep);
 226         if (eep == NULL) {
 227                 rc = ENOMEM;
 228                 goto fail3;
 229         }
 230
 231         eep->ee_magic = EFX_EVQ_MAGIC;
 232         eep->ee_enp = enp;
 233         eep->ee_index = index;
 234         eep->ee_mask = n - 1;
 235         eep->ee_flags = flags;
 236         eep->ee_esmp = esmp;
 237
 238         /*
 239          * Set outputs before the queue is created because interrupts may be
 240          * raised for events immediately after the queue is created, before the
 241          * function call below returns. See bug58606.
 242          *
 243          * The eepp pointer passed in by the client must therefore point to data
 244          * shared with the client's event processing context.
 245          */
 246         enp->en_ev_qcount++;
 247         *eepp = eep;
 248
 249         if ((rc = eevop->eevo_qcreate(enp, index, esmp, n, id, us, flags,
 250             eep)) != 0)
 251                 goto fail4;
 252
 253         return (0);
 254
 255 fail4:
 256         EFSYS_PROBE(fail4);
 257
 258         *eepp = NULL;
 259         enp->en_ev_qcount--;
 260         EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_evq_t), eep);
 261 fail3:
 262         EFSYS_PROBE(fail3);
 263 fail2:
 264         EFSYS_PROBE(fail2);
 265 fail1:
 266         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 267         return (rc);
 268 }
 269
 270                 void
 271 efx_ev_qdestroy(
 272         __in    efx_evq_t *eep)
 273 {
 274         efx_nic_t *enp = eep->ee_enp;
 275         const efx_ev_ops_t *eevop = enp->en_eevop;
 276
 277         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 278
 279         EFSYS_ASSERT(enp->en_ev_qcount != 0);
 280         --enp->en_ev_qcount;
 281
 282         eevop->eevo_qdestroy(eep);
 283
 284         /* Free the EVQ object */
 285         EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_evq_t), eep);
 286 }
 287
 288         __checkReturn   efx_rc_t
 289 efx_ev_qprime(
 290         __in            efx_evq_t *eep,
 291         __in            unsigned int count)
 292 {
 293         efx_nic_t *enp = eep->ee_enp;
 294         const efx_ev_ops_t *eevop = enp->en_eevop;
 295         efx_rc_t rc;
 296
 297         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 298
 299         if (!(enp->en_mod_flags & EFX_MOD_INTR)) {
 300                 rc = EINVAL;
 301                 goto fail1;
 302         }
 303
 304         if ((rc = eevop->eevo_qprime(eep, count)) != 0)
 305                 goto fail2;
 306
 307         return (0);
 308
 309 fail2:
 310         EFSYS_PROBE(fail2);
 311 fail1:
 312         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 313         return (rc);
 314 }
 315
 316         __checkReturn   boolean_t
 317 efx_ev_qpending(
 318         __in            efx_evq_t *eep,
 319         __in            unsigned int count)
 320 {
 321         size_t offset;
 322         efx_qword_t qword;
 323
 324         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 325
 326         offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 327         EFSYS_MEM_READQ(eep->ee_esmp, offset, &qword);
 328
 329         return (EFX_EV_PRESENT(qword));
 330 }
 331
 332 #define EFX_EV_BATCH    8
 333
 334                         void
 335 efx_ev_qpoll(
 336         __in            efx_evq_t *eep,
 337         __inout         unsigned int *countp,
 338         __in            const efx_ev_callbacks_t *eecp,
 339         __in_opt        void *arg)
 340 {
 341         efx_qword_t ev[EFX_EV_BATCH];
 342         unsigned int batch;
 343         unsigned int total;
 344         unsigned int count;
 345         unsigned int index;
 346         size_t offset;
 347
 348         /* Ensure events codes match for EF10 (Huntington/Medford) and Siena */
 349         EFX_STATIC_ASSERT(ESF_DZ_EV_CODE_LBN == FSF_AZ_EV_CODE_LBN);
 350         EFX_STATIC_ASSERT(ESF_DZ_EV_CODE_WIDTH == FSF_AZ_EV_CODE_WIDTH);
 351
 352         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_RX_EV == FSE_AZ_EV_CODE_RX_EV);
 353         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_TX_EV == FSE_AZ_EV_CODE_TX_EV);
 354         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_DRIVER_EV == FSE_AZ_EV_CODE_DRIVER_EV);
 355         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_DRV_GEN_EV ==
 356             FSE_AZ_EV_CODE_DRV_GEN_EV);
 357 #if EFSYS_OPT_MCDI
 358         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_MCDI_EV ==
 359             FSE_AZ_EV_CODE_MCDI_EVRESPONSE);
 360 #endif
 361
 362         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 363         EFSYS_ASSERT(countp != NULL);
 364         EFSYS_ASSERT(eecp != NULL);
 365
 366         count = *countp;
 367         do {
 368                 /* Read up until the end of the batch period */
 369                 batch = EFX_EV_BATCH - (count & (EFX_EV_BATCH - 1));
 370                 offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 371                 for (total = 0; total < batch; ++total) {
 372                         EFSYS_MEM_READQ(eep->ee_esmp, offset, &(ev[total]));
 373
 374                         if (!EFX_EV_PRESENT(ev[total]))
 375                                 break;
 376
 377                         EFSYS_PROBE3(event, unsigned int, eep->ee_index,
 378                             uint32_t, EFX_QWORD_FIELD(ev[total], EFX_DWORD_1),
 379                             uint32_t, EFX_QWORD_FIELD(ev[total], EFX_DWORD_0));
 380
 381                         offset += sizeof (efx_qword_t);
 382                 }
 383
 384                 /* Process the batch of events */
 385                 for (index = 0; index < total; ++index) {
 386                         boolean_t should_abort;
 387                         uint32_t code;
 388
 389                         EFX_EV_QSTAT_INCR(eep, EV_ALL);
 390
 391                         code = EFX_QWORD_FIELD(ev[index], FSF_AZ_EV_CODE);
 392                         switch (code) {
 393                         case FSE_AZ_EV_CODE_RX_EV:
 394                                 should_abort = eep->ee_rx(eep,
 395                                     &(ev[index]), eecp, arg);
 396                                 break;
 397                         case FSE_AZ_EV_CODE_TX_EV:
 398                                 should_abort = eep->ee_tx(eep,
 399                                     &(ev[index]), eecp, arg);
 400                                 break;
 401                         case FSE_AZ_EV_CODE_DRIVER_EV:
 402                                 should_abort = eep->ee_driver(eep,
 403                                     &(ev[index]), eecp, arg);
 404                                 break;
 405                         case FSE_AZ_EV_CODE_DRV_GEN_EV:
 406                                 should_abort = eep->ee_drv_gen(eep,
 407                                     &(ev[index]), eecp, arg);
 408                                 break;
 409 #if EFSYS_OPT_MCDI
 410                         case FSE_AZ_EV_CODE_MCDI_EVRESPONSE:
 411                                 should_abort = eep->ee_mcdi(eep,
 412                                     &(ev[index]), eecp, arg);
 413                                 break;
 414 #endif
 415                         case FSE_AZ_EV_CODE_GLOBAL_EV:
 416                                 if (eep->ee_global) {
 417                                         should_abort = eep->ee_global(eep,
 418                                             &(ev[index]), eecp, arg);
 419                                         break;
 420                                 }
 421                                 /* else fallthrough */
 422                         default:
 423                                 EFSYS_PROBE3(bad_event,
 424                                     unsigned int, eep->ee_index,
 425                                     uint32_t,
 426                                     EFX_QWORD_FIELD(ev[index], EFX_DWORD_1),
 427                                     uint32_t,
 428                                     EFX_QWORD_FIELD(ev[index], EFX_DWORD_0));
 429
 430                                 EFSYS_ASSERT(eecp->eec_exception != NULL);
 431                                 (void) eecp->eec_exception(arg,
 432                                         EFX_EXCEPTION_EV_ERROR, code);
 433                                 should_abort = B_TRUE;
 434                         }
 435                         if (should_abort) {
 436                                 /* Ignore subsequent events */
 437                                 total = index + 1;
 438                                 break;
 439                         }
 440                 }
 441
 442                 /*
 443                  * Now that the hardware has most likely moved onto dma'ing
 444                  * into the next cache line, clear the processed events. Take
 445                  * care to only clear out events that we've processed
 446                  */
 447                 EFX_SET_QWORD(ev[0]);
 448                 offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 449                 for (index = 0; index < total; ++index) {
 450                         EFSYS_MEM_WRITEQ(eep->ee_esmp, offset, &(ev[0]));
 451                         offset += sizeof (efx_qword_t);
 452                 }
 453
 454                 count += total;
 455
 456         } while (total == batch);
 457
 458         *countp = count;
 459 }
 460
 461                         void
 462 efx_ev_qpost(
 463         __in    efx_evq_t *eep,
 464         __in    uint16_t data)
 465 {
 466         efx_nic_t *enp = eep->ee_enp;
 467         const efx_ev_ops_t *eevop = enp->en_eevop;
 468
 469         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 470
 471         EFSYS_ASSERT(eevop != NULL &&
 472             eevop->eevo_qpost != NULL);
 473
 474         eevop->eevo_qpost(eep, data);
 475 }
 476
 477         __checkReturn   efx_rc_t
 478 efx_ev_usecs_to_ticks(
 479         __in            efx_nic_t *enp,
 480         __in            unsigned int us,
 481         __out           unsigned int *ticksp)
 482 {
 483         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
 484         unsigned int ticks;
 485
 486         /* Convert microseconds to a timer tick count */
 487         if (us == 0)
 488                 ticks = 0;
 489         else if (us * 1000 < encp->enc_evq_timer_quantum_ns)
 490                 ticks = 1;      /* Never round down to zero */
 491         else
 492                 ticks = us * 1000 / encp->enc_evq_timer_quantum_ns;
 493
 494         *ticksp = ticks;
 495         return (0);
 496 }
 497
 498         __checkReturn   efx_rc_t
 499 efx_ev_qmoderate(
 500         __in            efx_evq_t *eep,
 501         __in            unsigned int us)
 502 {
 503         efx_nic_t *enp = eep->ee_enp;
 504         const efx_ev_ops_t *eevop = enp->en_eevop;
 505         efx_rc_t rc;
 506
 507         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 508
 509         if ((eep->ee_flags & EFX_EVQ_FLAGS_NOTIFY_MASK) ==
 510             EFX_EVQ_FLAGS_NOTIFY_DISABLED) {
 511                 rc = EINVAL;
 512                 goto fail1;
 513         }
 514
 515         if ((rc = eevop->eevo_qmoderate(eep, us)) != 0)
 516                 goto fail2;
 517
 518         return (0);
 519
 520 fail2:
 521         EFSYS_PROBE(fail2);
 522 fail1:
 523         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 524         return (rc);
 525 }
 526
 527 #if EFSYS_OPT_SIENA
 528
 529 static  __checkReturn   efx_rc_t
 530 siena_ev_init(
 531         __in            efx_nic_t *enp)
 532 {
 533         efx_oword_t oword;
 534
 535         /*
 536          * Program the event queue for receive and transmit queue
 537          * flush events.
 538          */
 539         EFX_BAR_READO(enp, FR_AZ_DP_CTRL_REG, &oword);
 540         EFX_SET_OWORD_FIELD(oword, FRF_AZ_FLS_EVQ_ID, 0);
 541         EFX_BAR_WRITEO(enp, FR_AZ_DP_CTRL_REG, &oword);
 542
 543         return (0);
 544
 545 }
 546
 547 static  __checkReturn   boolean_t
 548 siena_ev_rx_not_ok(
 549         __in            efx_evq_t *eep,
 550         __in            efx_qword_t *eqp,
 551         __in            uint32_t label,
 552         __in            uint32_t id,
 553         __inout         uint16_t *flagsp)
 554 {
 555         boolean_t ignore = B_FALSE;
 556
 557         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_TOBE_DISC) != 0) {
 558                 EFX_EV_QSTAT_INCR(eep, EV_RX_TOBE_DISC);
 559                 EFSYS_PROBE(tobe_disc);
 560                 /*
 561                  * Assume this is a unicast address mismatch, unless below
 562                  * we find either FSF_AZ_RX_EV_ETH_CRC_ERR or
 563                  * EV_RX_PAUSE_FRM_ERR is set.
 564                  */
 565                 (*flagsp) |= EFX_ADDR_MISMATCH;
 566         }
 567
 568         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_FRM_TRUNC) != 0) {
 569                 EFSYS_PROBE2(frm_trunc, uint32_t, label, uint32_t, id);
 570                 EFX_EV_QSTAT_INCR(eep, EV_RX_FRM_TRUNC);
 571                 (*flagsp) |= EFX_DISCARD;
 572
 573         }
 574
 575         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_ETH_CRC_ERR) != 0) {
 576                 EFX_EV_QSTAT_INCR(eep, EV_RX_ETH_CRC_ERR);
 577                 EFSYS_PROBE(crc_err);
 578                 (*flagsp) &= ~EFX_ADDR_MISMATCH;
 579                 (*flagsp) |= EFX_DISCARD;
 580         }
 581
 582         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_PAUSE_FRM_ERR) != 0) {
 583                 EFX_EV_QSTAT_INCR(eep, EV_RX_PAUSE_FRM_ERR);
 584                 EFSYS_PROBE(pause_frm_err);
 585                 (*flagsp) &= ~EFX_ADDR_MISMATCH;
 586                 (*flagsp) |= EFX_DISCARD;
 587         }
 588
 589         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_BUF_OWNER_ID_ERR) != 0) {
 590                 EFX_EV_QSTAT_INCR(eep, EV_RX_BUF_OWNER_ID_ERR);
 591                 EFSYS_PROBE(owner_id_err);
 592                 (*flagsp) |= EFX_DISCARD;
 593         }
 594
 595         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_IP_HDR_CHKSUM_ERR) != 0) {
 596                 EFX_EV_QSTAT_INCR(eep, EV_RX_IPV4_HDR_CHKSUM_ERR);
 597                 EFSYS_PROBE(ipv4_err);
 598                 (*flagsp) &= ~EFX_CKSUM_IPV4;
 599         }
 600
 601         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_TCP_UDP_CHKSUM_ERR) != 0) {
 602                 EFX_EV_QSTAT_INCR(eep, EV_RX_TCP_UDP_CHKSUM_ERR);
 603                 EFSYS_PROBE(udp_chk_err);
 604                 (*flagsp) &= ~EFX_CKSUM_TCPUDP;
 605         }
 606
 607         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_IP_FRAG_ERR) != 0) {
 608                 EFX_EV_QSTAT_INCR(eep, EV_RX_IP_FRAG_ERR);
 609
 610                 /*
 611                  * If IP is fragmented FSF_AZ_RX_EV_IP_FRAG_ERR is set. This
 612                  * causes FSF_AZ_RX_EV_PKT_OK to be clear. This is not an error
 613                  * condition.
 614                  */
 615                 (*flagsp) &= ~(EFX_PKT_TCP | EFX_PKT_UDP | EFX_CKSUM_TCPUDP);
 616         }
 617
 618         return (ignore);
 619 }
 620
 621 static  __checkReturn   boolean_t
 622 siena_ev_rx(
 623         __in            efx_evq_t *eep,
 624         __in            efx_qword_t *eqp,
 625         __in            const efx_ev_callbacks_t *eecp,
 626         __in_opt        void *arg)
 627 {
 628         uint32_t id;
 629         uint32_t size;
 630         uint32_t label;
 631         boolean_t ok;
 632         uint32_t hdr_type;
 633         boolean_t is_v6;
 634         uint16_t flags;
 635         boolean_t ignore;
 636         boolean_t should_abort;
 637
 638         EFX_EV_QSTAT_INCR(eep, EV_RX);
 639
 640         /* Basic packet information */
 641         id = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_DESC_PTR);
 642         size = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_BYTE_CNT);
 643         label = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_Q_LABEL);
 644         ok = (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_PKT_OK) != 0);
 645
 646         hdr_type = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_HDR_TYPE);
 647
 648         is_v6 = (EFX_QWORD_FIELD(*eqp, FSF_CZ_RX_EV_IPV6_PKT) != 0);
 649
 650         /*
 651          * If packet is marked as OK and packet type is TCP/IP or
 652          * UDP/IP or other IP, then we can rely on the hardware checksums.
 653          */
 654         switch (hdr_type) {
 655         case FSE_AZ_RX_EV_HDR_TYPE_IPV4V6_TCP:
 656                 flags = EFX_PKT_TCP | EFX_CKSUM_TCPUDP;
 657                 if (is_v6) {
 658                         EFX_EV_QSTAT_INCR(eep, EV_RX_TCP_IPV6);
 659                         flags |= EFX_PKT_IPV6;
 660                 } else {
 661                         EFX_EV_QSTAT_INCR(eep, EV_RX_TCP_IPV4);
 662                         flags |= EFX_PKT_IPV4 | EFX_CKSUM_IPV4;
 663                 }
 664                 break;
 665
 666         case FSE_AZ_RX_EV_HDR_TYPE_IPV4V6_UDP:
 667                 flags = EFX_PKT_UDP | EFX_CKSUM_TCPUDP;
 668                 if (is_v6) {
 669                         EFX_EV_QSTAT_INCR(eep, EV_RX_UDP_IPV6);
 670                         flags |= EFX_PKT_IPV6;
 671                 } else {
 672                         EFX_EV_QSTAT_INCR(eep, EV_RX_UDP_IPV4);
 673                         flags |= EFX_PKT_IPV4 | EFX_CKSUM_IPV4;
 674                 }
 675                 break;
 676
 677         case FSE_AZ_RX_EV_HDR_TYPE_IPV4V6_OTHER:
 678                 if (is_v6) {
 679                         EFX_EV_QSTAT_INCR(eep, EV_RX_OTHER_IPV6);
 680                         flags = EFX_PKT_IPV6;
 681                 } else {
 682                         EFX_EV_QSTAT_INCR(eep, EV_RX_OTHER_IPV4);
 683                         flags = EFX_PKT_IPV4 | EFX_CKSUM_IPV4;
 684                 }
 685                 break;
 686
 687         case FSE_AZ_RX_EV_HDR_TYPE_OTHER:
 688                 EFX_EV_QSTAT_INCR(eep, EV_RX_NON_IP);
 689                 flags = 0;
 690                 break;
 691
 692         default:
 693                 EFSYS_ASSERT(B_FALSE);
 694                 flags = 0;
 695                 break;
 696         }
 697
 698         /* Detect errors included in the FSF_AZ_RX_EV_PKT_OK indication */
 699         if (!ok) {
 700                 ignore = siena_ev_rx_not_ok(eep, eqp, label, id, &flags);
 701                 if (ignore) {
 702                         EFSYS_PROBE4(rx_complete, uint32_t, label, uint32_t, id,
 703                             uint32_t, size, uint16_t, flags);
 704
 705                         return (B_FALSE);
 706                 }
 707         }
 708
 709         /* If we're not discarding the packet then it is ok */
 710         if (~flags & EFX_DISCARD)
 711                 EFX_EV_QSTAT_INCR(eep, EV_RX_OK);
 712
 713         /* Detect multicast packets that didn't match the filter */
 714         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_MCAST_PKT) != 0) {
 715                 EFX_EV_QSTAT_INCR(eep, EV_RX_MCAST_PKT);
 716
 717                 if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_MCAST_HASH_MATCH) != 0) {
 718                         EFX_EV_QSTAT_INCR(eep, EV_RX_MCAST_HASH_MATCH);
 719                 } else {
 720                         EFSYS_PROBE(mcast_mismatch);
 721                         flags |= EFX_ADDR_MISMATCH;
 722                 }
 723         } else {
 724                 flags |= EFX_PKT_UNICAST;
 725         }
 726
 727         /*
 728          * The packet parser in Siena can abort parsing packets under
 729          * certain error conditions, setting the PKT_NOT_PARSED bit
 730          * (which clears PKT_OK). If this is set, then don't trust
 731          * the PKT_TYPE field.
 732          */
 733         if (!ok) {
 734                 uint32_t parse_err;
 735
 736                 parse_err = EFX_QWORD_FIELD(*eqp, FSF_CZ_RX_EV_PKT_NOT_PARSED);
 737                 if (parse_err != 0)
 738                         flags |= EFX_CHECK_VLAN;
 739         }
 740
 741         if (~flags & EFX_CHECK_VLAN) {
 742                 uint32_t pkt_type;
 743
 744                 pkt_type = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_PKT_TYPE);
 745                 if (pkt_type >= FSE_AZ_RX_EV_PKT_TYPE_VLAN)
 746                         flags |= EFX_PKT_VLAN_TAGGED;
 747         }
 748
 749         EFSYS_PROBE4(rx_complete, uint32_t, label, uint32_t, id,
 750             uint32_t, size, uint16_t, flags);
 751
 752         EFSYS_ASSERT(eecp->eec_rx != NULL);
 753         should_abort = eecp->eec_rx(arg, label, id, size, flags);
 754
 755         return (should_abort);
 756 }
 757
 758 static  __checkReturn   boolean_t
 759 siena_ev_tx(
 760         __in            efx_evq_t *eep,
 761         __in            efx_qword_t *eqp,
 762         __in            const efx_ev_callbacks_t *eecp,
 763         __in_opt        void *arg)
 764 {
 765         uint32_t id;
 766         uint32_t label;
 767         boolean_t should_abort;
 768
 769         EFX_EV_QSTAT_INCR(eep, EV_TX);
 770
 771         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_COMP) != 0 &&
 772             EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_ERR) == 0 &&
 773             EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_TOO_BIG) == 0 &&
 774             EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_WQ_FF_FULL) == 0) {
 775
 776                 id = EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_DESC_PTR);
 777                 label = EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_Q_LABEL);
 778
 779                 EFSYS_PROBE2(tx_complete, uint32_t, label, uint32_t, id);
 780
 781                 EFSYS_ASSERT(eecp->eec_tx != NULL);
 782                 should_abort = eecp->eec_tx(arg, label, id);
 783
 784                 return (should_abort);
 785         }
 786
 787         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_COMP) != 0)
 788                 EFSYS_PROBE3(bad_event, unsigned int, eep->ee_index,
 789                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_1),
 790                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_0));
 791
 792         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_ERR) != 0)
 793                 EFX_EV_QSTAT_INCR(eep, EV_TX_PKT_ERR);
 794
 795         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_TOO_BIG) != 0)
 796                 EFX_EV_QSTAT_INCR(eep, EV_TX_PKT_TOO_BIG);
 797
 798         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_WQ_FF_FULL) != 0)
 799                 EFX_EV_QSTAT_INCR(eep, EV_TX_WQ_FF_FULL);
 800
 801         EFX_EV_QSTAT_INCR(eep, EV_TX_UNEXPECTED);
 802         return (B_FALSE);
 803 }
 804
 805 static  __checkReturn   boolean_t
 806 siena_ev_global(
 807         __in            efx_evq_t *eep,
 808         __in            efx_qword_t *eqp,
 809         __in            const efx_ev_callbacks_t *eecp,
 810         __in_opt        void *arg)
 811 {
 812         _NOTE(ARGUNUSED(eqp, eecp, arg))
 813
 814         EFX_EV_QSTAT_INCR(eep, EV_GLOBAL);
 815
 816         return (B_FALSE);
 817 }
 818
 819 static  __checkReturn   boolean_t
 820 siena_ev_driver(
 821         __in            efx_evq_t *eep,
 822         __in            efx_qword_t *eqp,
 823         __in            const efx_ev_callbacks_t *eecp,
 824         __in_opt        void *arg)
 825 {
 826         boolean_t should_abort;
 827
 828         EFX_EV_QSTAT_INCR(eep, EV_DRIVER);
 829         should_abort = B_FALSE;
 830
 831         switch (EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBCODE)) {
 832         case FSE_AZ_TX_DESCQ_FLS_DONE_EV: {
 833                 uint32_t txq_index;
 834
 835                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_TX_DESCQ_FLS_DONE);
 836
 837                 txq_index = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
 838
 839                 EFSYS_PROBE1(tx_descq_fls_done, uint32_t, txq_index);
 840
 841                 EFSYS_ASSERT(eecp->eec_txq_flush_done != NULL);
 842                 should_abort = eecp->eec_txq_flush_done(arg, txq_index);
 843
 844                 break;
 845         }
 846         case FSE_AZ_RX_DESCQ_FLS_DONE_EV: {
 847                 uint32_t rxq_index;
 848                 uint32_t failed;
 849
 850                 rxq_index = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_RX_DESCQ_ID);
 851                 failed = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_RX_FLUSH_FAIL);
 852
 853                 EFSYS_ASSERT(eecp->eec_rxq_flush_done != NULL);
 854                 EFSYS_ASSERT(eecp->eec_rxq_flush_failed != NULL);
 855
 856                 if (failed) {
 857                         EFX_EV_QSTAT_INCR(eep, EV_DRIVER_RX_DESCQ_FLS_FAILED);
 858
 859                         EFSYS_PROBE1(rx_descq_fls_failed, uint32_t, rxq_index);
 860
 861                         should_abort = eecp->eec_rxq_flush_failed(arg,
 862                                                                     rxq_index);
 863                 } else {
 864                         EFX_EV_QSTAT_INCR(eep, EV_DRIVER_RX_DESCQ_FLS_DONE);
 865
 866                         EFSYS_PROBE1(rx_descq_fls_done, uint32_t, rxq_index);
 867
 868                         should_abort = eecp->eec_rxq_flush_done(arg, rxq_index);
 869                 }
 870
 871                 break;
 872         }
 873         case FSE_AZ_EVQ_INIT_DONE_EV:
 874                 EFSYS_ASSERT(eecp->eec_initialized != NULL);
 875                 should_abort = eecp->eec_initialized(arg);
 876
 877                 break;
 878
 879         case FSE_AZ_EVQ_NOT_EN_EV:
 880                 EFSYS_PROBE(evq_not_en);
 881                 break;
 882
 883         case FSE_AZ_SRM_UPD_DONE_EV: {
 884                 uint32_t code;
 885
 886                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_SRM_UPD_DONE);
 887
 888                 code = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
 889
 890                 EFSYS_ASSERT(eecp->eec_sram != NULL);
 891                 should_abort = eecp->eec_sram(arg, code);
 892
 893                 break;
 894         }
 895         case FSE_AZ_WAKE_UP_EV: {
 896                 uint32_t id;
 897
 898                 id = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
 899
 900                 EFSYS_ASSERT(eecp->eec_wake_up != NULL);
 901                 should_abort = eecp->eec_wake_up(arg, id);
 902
 903                 break;
 904         }
 905         case FSE_AZ_TX_PKT_NON_TCP_UDP:
 906                 EFSYS_PROBE(tx_pkt_non_tcp_udp);
 907                 break;
 908
 909         case FSE_AZ_TIMER_EV: {
 910                 uint32_t id;
 911
 912                 id = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
 913
 914                 EFSYS_ASSERT(eecp->eec_timer != NULL);
 915                 should_abort = eecp->eec_timer(arg, id);
 916
 917                 break;
 918         }
 919         case FSE_AZ_RX_DSC_ERROR_EV:
 920                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_RX_DSC_ERROR);
 921
 922                 EFSYS_PROBE(rx_dsc_error);
 923
 924                 EFSYS_ASSERT(eecp->eec_exception != NULL);
 925                 should_abort = eecp->eec_exception(arg,
 926                         EFX_EXCEPTION_RX_DSC_ERROR, 0);
 927
 928                 break;
 929
 930         case FSE_AZ_TX_DSC_ERROR_EV:
 931                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_TX_DSC_ERROR);
 932
 933                 EFSYS_PROBE(tx_dsc_error);
 934
 935                 EFSYS_ASSERT(eecp->eec_exception != NULL);
 936                 should_abort = eecp->eec_exception(arg,
 937                         EFX_EXCEPTION_TX_DSC_ERROR, 0);
 938
 939                 break;
 940
 941         default:
 942                 break;
 943         }
 944
 945         return (should_abort);
 946 }
 947
 948 static  __checkReturn   boolean_t
 949 siena_ev_drv_gen(
 950         __in            efx_evq_t *eep,
 951         __in            efx_qword_t *eqp,
 952         __in            const efx_ev_callbacks_t *eecp,
 953         __in_opt        void *arg)
 954 {
 955         uint32_t data;
 956         boolean_t should_abort;
 957
 958         EFX_EV_QSTAT_INCR(eep, EV_DRV_GEN);
 959
 960         data = EFX_QWORD_FIELD(*eqp, FSF_AZ_EV_DATA_DW0);
 961         if (data >= ((uint32_t)1 << 16)) {
 962                 EFSYS_PROBE3(bad_event, unsigned int, eep->ee_index,
 963                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_1),
 964                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_0));
 965                 return (B_TRUE);
 966         }
 967
 968         EFSYS_ASSERT(eecp->eec_software != NULL);
 969         should_abort = eecp->eec_software(arg, (uint16_t)data);
 970
 971         return (should_abort);
 972 }
 973
 974 #if EFSYS_OPT_MCDI
 975
 976 static  __checkReturn   boolean_t
 977 siena_ev_mcdi(
 978         __in            efx_evq_t *eep,
 979         __in            efx_qword_t *eqp,
 980         __in            const efx_ev_callbacks_t *eecp,
 981         __in_opt        void *arg)
 982 {
 983         efx_nic_t *enp = eep->ee_enp;
 984         unsigned int code;
 985         boolean_t should_abort = B_FALSE;
 986
 987         EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA);
 988
 989         if (enp->en_family != EFX_FAMILY_SIENA)
 990                 goto out;
 991
 992         EFSYS_ASSERT(eecp->eec_link_change != NULL);
 993         EFSYS_ASSERT(eecp->eec_exception != NULL);
 994
 995         EFX_EV_QSTAT_INCR(eep, EV_MCDI_RESPONSE);
 996
 997         code = EFX_QWORD_FIELD(*eqp, MCDI_EVENT_CODE);
 998         switch (code) {
 999         case MCDI_EVENT_CODE_BADSSERT:
1000                 efx_mcdi_ev_death(enp, EINTR);
1001                 break;
1002
1003         case MCDI_EVENT_CODE_CMDDONE:
1004                 efx_mcdi_ev_cpl(enp,
1005                     MCDI_EV_FIELD(eqp, CMDDONE_SEQ),
1006                     MCDI_EV_FIELD(eqp, CMDDONE_DATALEN),
1007                     MCDI_EV_FIELD(eqp, CMDDONE_ERRNO));
1008                 break;
1009
1010         case MCDI_EVENT_CODE_LINKCHANGE: {
1011                 efx_link_mode_t link_mode;
1012
1013                 siena_phy_link_ev(enp, eqp, &link_mode);
1014                 should_abort = eecp->eec_link_change(arg, link_mode);
1015                 break;
1016         }
1017         case MCDI_EVENT_CODE_SENSOREVT: {
1018                 should_abort = B_FALSE;
1019                 break;
1020         }
1021         case MCDI_EVENT_CODE_SCHEDERR:
1022                 /* Informational only */
1023                 break;
1024
1025         case MCDI_EVENT_CODE_REBOOT:
1026                 efx_mcdi_ev_death(enp, EIO);
1027                 break;
1028
1029         case MCDI_EVENT_CODE_MAC_STATS_DMA:
1030                 break;
1031
1032         case MCDI_EVENT_CODE_FWALERT: {
1033                 uint32_t reason = MCDI_EV_FIELD(eqp, FWALERT_REASON);
1034
1035                 if (reason == MCDI_EVENT_FWALERT_REASON_SRAM_ACCESS)
1036                         should_abort = eecp->eec_exception(arg,
1037                                 EFX_EXCEPTION_FWALERT_SRAM,
1038                                 MCDI_EV_FIELD(eqp, FWALERT_DATA));
1039                 else
1040                         should_abort = eecp->eec_exception(arg,
1041                                 EFX_EXCEPTION_UNKNOWN_FWALERT,
1042                                 MCDI_EV_FIELD(eqp, DATA));
1043                 break;
1044         }
1045
1046         default:
1047                 EFSYS_PROBE1(mc_pcol_error, int, code);
1048                 break;
1049         }
1050
1051 out:
1052         return (should_abort);
1053 }
1054
1055 #endif  /* EFSYS_OPT_MCDI */
1056
1057 static  __checkReturn   efx_rc_t
1058 siena_ev_qprime(
1059         __in            efx_evq_t *eep,
1060         __in            unsigned int count)
1061 {
1062         efx_nic_t *enp = eep->ee_enp;
1063         uint32_t rptr;
1064         efx_dword_t dword;
1065
1066         rptr = count & eep->ee_mask;
1067
1068         EFX_POPULATE_DWORD_1(dword, FRF_AZ_EVQ_RPTR, rptr);
1069
1070         EFX_BAR_TBL_WRITED(enp, FR_AZ_EVQ_RPTR_REG, eep->ee_index,
1071                             &dword, B_FALSE);
1072
1073         return (0);
1074 }
1075
1076 static          void
1077 siena_ev_qpost(
1078         __in    efx_evq_t *eep,
1079         __in    uint16_t data)
1080 {
1081         efx_nic_t *enp = eep->ee_enp;
1082         efx_qword_t ev;
1083         efx_oword_t oword;
1084
1085         EFX_POPULATE_QWORD_2(ev, FSF_AZ_EV_CODE, FSE_AZ_EV_CODE_DRV_GEN_EV,
1086             FSF_AZ_EV_DATA_DW0, (uint32_t)data);
1087
1088         EFX_POPULATE_OWORD_3(oword, FRF_AZ_DRV_EV_QID, eep->ee_index,
1089             EFX_DWORD_0, EFX_QWORD_FIELD(ev, EFX_DWORD_0),
1090             EFX_DWORD_1, EFX_QWORD_FIELD(ev, EFX_DWORD_1));
1091
1092         EFX_BAR_WRITEO(enp, FR_AZ_DRV_EV_REG, &oword);
1093 }
1094
1095 static  __checkReturn   efx_rc_t
1096 siena_ev_qmoderate(
1097         __in            efx_evq_t *eep,
1098         __in            unsigned int us)
1099 {
1100         efx_nic_t *enp = eep->ee_enp;
1101         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1102         unsigned int locked;
1103         efx_dword_t dword;
1104         efx_rc_t rc;
1105
1106         if (us > encp->enc_evq_timer_max_us) {
1107                 rc = EINVAL;
1108                 goto fail1;
1109         }
1110
1111         /* If the value is zero then disable the timer */
1112         if (us == 0) {
1113                 EFX_POPULATE_DWORD_2(dword,
1114                     FRF_CZ_TC_TIMER_MODE, FFE_CZ_TIMER_MODE_DIS,
1115                     FRF_CZ_TC_TIMER_VAL, 0);
1116         } else {
1117                 unsigned int ticks;
1118
1119                 if ((rc = efx_ev_usecs_to_ticks(enp, us, &ticks)) != 0)
1120                         goto fail2;
1121
1122                 EFSYS_ASSERT(ticks > 0);
1123                 EFX_POPULATE_DWORD_2(dword,
1124                     FRF_CZ_TC_TIMER_MODE, FFE_CZ_TIMER_MODE_INT_HLDOFF,
1125                     FRF_CZ_TC_TIMER_VAL, ticks - 1);
1126         }
1127
1128         locked = (eep->ee_index == 0) ? 1 : 0;
1129
1130         EFX_BAR_TBL_WRITED(enp, FR_BZ_TIMER_COMMAND_REGP0,
1131             eep->ee_index, &dword, locked);
1132
1133         return (0);
1134
1135 fail2:
1136         EFSYS_PROBE(fail2);
1137 fail1:
1138         EFSYS_PROBE1(fail1, efx_rc_t, rc);
1139
1140         return (rc);
1141 }
1142
1143 static  __checkReturn   efx_rc_t
1144 siena_ev_qcreate(
1145         __in            efx_nic_t *enp,
1146         __in            unsigned int index,
1147         __in            efsys_mem_t *esmp,
1148         __in            size_t n,
1149         __in            uint32_t id,
1150         __in            uint32_t us,
1151         __in            uint32_t flags,
1152         __in            efx_evq_t *eep)
1153 {
1154         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1155         uint32_t size;
1156         efx_oword_t oword;
1157         efx_rc_t rc;
1158         boolean_t notify_mode;
1159
1160         _NOTE(ARGUNUSED(esmp))
1161
1162         EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MAXNEVS));
1163         EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MINNEVS));
1164
1165         if (!ISP2(n) || (n < EFX_EVQ_MINNEVS) || (n > EFX_EVQ_MAXNEVS)) {
1166                 rc = EINVAL;
1167                 goto fail1;
1168         }
1169         if (index >= encp->enc_evq_limit) {
1170                 rc = EINVAL;
1171                 goto fail2;
1172         }
1173         for (size = 0; (1 << size) <= (EFX_EVQ_MAXNEVS / EFX_EVQ_MINNEVS);
1174             size++)
1175                 if ((1 << size) == (int)(n / EFX_EVQ_MINNEVS))
1176                         break;
1177         if (id + (1 << size) >= encp->enc_buftbl_limit) {
1178                 rc = EINVAL;
1179                 goto fail4;
1180         }
1181
1182         /* Set up the handler table */
1183         eep->ee_rx      = siena_ev_rx;
1184         eep->ee_tx      = siena_ev_tx;
1185         eep->ee_driver  = siena_ev_driver;
1186         eep->ee_global  = siena_ev_global;
1187         eep->ee_drv_gen = siena_ev_drv_gen;
1188 #if EFSYS_OPT_MCDI
1189         eep->ee_mcdi    = siena_ev_mcdi;
1190 #endif  /* EFSYS_OPT_MCDI */
1191
1192         notify_mode = ((flags & EFX_EVQ_FLAGS_NOTIFY_MASK) !=
1193             EFX_EVQ_FLAGS_NOTIFY_INTERRUPT);
1194
1195         /* Set up the new event queue */
1196         EFX_POPULATE_OWORD_3(oword, FRF_CZ_TIMER_Q_EN, 1,
1197             FRF_CZ_HOST_NOTIFY_MODE, notify_mode,
1198             FRF_CZ_TIMER_MODE, FFE_CZ_TIMER_MODE_DIS);
1199         EFX_BAR_TBL_WRITEO(enp, FR_AZ_TIMER_TBL, index, &oword, B_TRUE);
1200
1201         EFX_POPULATE_OWORD_3(oword, FRF_AZ_EVQ_EN, 1, FRF_AZ_EVQ_SIZE, size,
1202             FRF_AZ_EVQ_BUF_BASE_ID, id);
1203
1204         EFX_BAR_TBL_WRITEO(enp, FR_AZ_EVQ_PTR_TBL, index, &oword, B_TRUE);
1205
1206         /* Set initial interrupt moderation */
1207         siena_ev_qmoderate(eep, us);
1208
1209         return (0);
1210
1211 fail4:
1212         EFSYS_PROBE(fail4);
1213 fail2:
1214         EFSYS_PROBE(fail2);
1215 fail1:
1216         EFSYS_PROBE1(fail1, efx_rc_t, rc);
1217
1218         return (rc);
1219 }
1220
1221 #endif /* EFSYS_OPT_SIENA */
1222
1223 #if EFSYS_OPT_SIENA
1224
1225 static          void
1226 siena_ev_qdestroy(
1227         __in    efx_evq_t *eep)
1228 {
1229         efx_nic_t *enp = eep->ee_enp;
1230         efx_oword_t oword;
1231
1232         /* Purge event queue */
1233         EFX_ZERO_OWORD(oword);
1234
1235         EFX_BAR_TBL_WRITEO(enp, FR_AZ_EVQ_PTR_TBL,
1236             eep->ee_index, &oword, B_TRUE);
1237
1238         EFX_ZERO_OWORD(oword);
1239         EFX_BAR_TBL_WRITEO(enp, FR_AZ_TIMER_TBL, eep->ee_index, &oword, B_TRUE);
1240 }
1241
1242 static          void
1243 siena_ev_fini(
1244         __in    efx_nic_t *enp)
1245 {
1246         _NOTE(ARGUNUSED(enp))
1247 }
1248
1249 #endif /* EFSYS_OPT_SIENA */