drivers/net/sfc/base/efx_ev.c

   1 /*
   2  * Copyright (c) 2007-2016 Solarflare Communications Inc.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are met:
   7  *
   8  * 1. Redistributions of source code must retain the above copyright notice,
   9  *    this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright notice,
  11  *    this list of conditions and the following disclaimer in the documentation
  12  *    and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  15  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  16  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  18  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  19  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  20  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  21  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  22  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  23  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
  24  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  *
  26  * The views and conclusions contained in the software and documentation are
  27  * those of the authors and should not be interpreted as representing official
  28  * policies, either expressed or implied, of the FreeBSD Project.
  29  */
  30
  31 #include "efx.h"
  32 #include "efx_impl.h"
  33
  34 #if EFSYS_OPT_QSTATS
  35 #define EFX_EV_QSTAT_INCR(_eep, _stat)                                  \
  36         do {                                                            \
  37                 (_eep)->ee_stat[_stat]++;                               \
  38         _NOTE(CONSTANTCONDITION)                                        \
  39         } while (B_FALSE)
  40 #else
  41 #define EFX_EV_QSTAT_INCR(_eep, _stat)
  42 #endif
  43
  44 #define EFX_EV_PRESENT(_qword)                                          \
  45         (EFX_QWORD_FIELD((_qword), EFX_DWORD_0) != 0xffffffff &&        \
  46         EFX_QWORD_FIELD((_qword), EFX_DWORD_1) != 0xffffffff)
  47
  48
  49
  50 #if EFSYS_OPT_SIENA
  51
  52 static  __checkReturn   efx_rc_t
  53 siena_ev_init(
  54         __in            efx_nic_t *enp);
  55
  56 static                  void
  57 siena_ev_fini(
  58         __in            efx_nic_t *enp);
  59
  60 static  __checkReturn   efx_rc_t
  61 siena_ev_qcreate(
  62         __in            efx_nic_t *enp,
  63         __in            unsigned int index,
  64         __in            efsys_mem_t *esmp,
  65         __in            size_t n,
  66         __in            uint32_t id,
  67         __in            uint32_t us,
  68         __in            uint32_t flags,
  69         __in            efx_evq_t *eep);
  70
  71 static                  void
  72 siena_ev_qdestroy(
  73         __in            efx_evq_t *eep);
  74
  75 static  __checkReturn   efx_rc_t
  76 siena_ev_qprime(
  77         __in            efx_evq_t *eep,
  78         __in            unsigned int count);
  79
  80 static                  void
  81 siena_ev_qpost(
  82         __in    efx_evq_t *eep,
  83         __in    uint16_t data);
  84
  85 static  __checkReturn   efx_rc_t
  86 siena_ev_qmoderate(
  87         __in            efx_evq_t *eep,
  88         __in            unsigned int us);
  89
  90 #if EFSYS_OPT_QSTATS
  91 static                  void
  92 siena_ev_qstats_update(
  93         __in                            efx_evq_t *eep,
  94         __inout_ecount(EV_NQSTATS)      efsys_stat_t *stat);
  95
  96 #endif
  97
  98 #endif /* EFSYS_OPT_SIENA */
  99
 100 #if EFSYS_OPT_SIENA
 101 static const efx_ev_ops_t       __efx_ev_siena_ops = {
 102         siena_ev_init,                          /* eevo_init */
 103         siena_ev_fini,                          /* eevo_fini */
 104         siena_ev_qcreate,                       /* eevo_qcreate */
 105         siena_ev_qdestroy,                      /* eevo_qdestroy */
 106         siena_ev_qprime,                        /* eevo_qprime */
 107         siena_ev_qpost,                         /* eevo_qpost */
 108         siena_ev_qmoderate,                     /* eevo_qmoderate */
 109 #if EFSYS_OPT_QSTATS
 110         siena_ev_qstats_update,                 /* eevo_qstats_update */
 111 #endif
 112 };
 113 #endif /* EFSYS_OPT_SIENA */
 114
 115 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
 116 static const efx_ev_ops_t       __efx_ev_ef10_ops = {
 117         ef10_ev_init,                           /* eevo_init */
 118         ef10_ev_fini,                           /* eevo_fini */
 119         ef10_ev_qcreate,                        /* eevo_qcreate */
 120         ef10_ev_qdestroy,                       /* eevo_qdestroy */
 121         ef10_ev_qprime,                         /* eevo_qprime */
 122         ef10_ev_qpost,                          /* eevo_qpost */
 123         ef10_ev_qmoderate,                      /* eevo_qmoderate */
 124 #if EFSYS_OPT_QSTATS
 125         ef10_ev_qstats_update,                  /* eevo_qstats_update */
 126 #endif
 127 };
 128 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */
 129
 130
 131         __checkReturn   efx_rc_t
 132 efx_ev_init(
 133         __in            efx_nic_t *enp)
 134 {
 135         const efx_ev_ops_t *eevop;
 136         efx_rc_t rc;
 137
 138         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 139         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR);
 140
 141         if (enp->en_mod_flags & EFX_MOD_EV) {
 142                 rc = EINVAL;
 143                 goto fail1;
 144         }
 145
 146         switch (enp->en_family) {
 147 #if EFSYS_OPT_SIENA
 148         case EFX_FAMILY_SIENA:
 149                 eevop = &__efx_ev_siena_ops;
 150                 break;
 151 #endif /* EFSYS_OPT_SIENA */
 152
 153 #if EFSYS_OPT_HUNTINGTON
 154         case EFX_FAMILY_HUNTINGTON:
 155                 eevop = &__efx_ev_ef10_ops;
 156                 break;
 157 #endif /* EFSYS_OPT_HUNTINGTON */
 158
 159 #if EFSYS_OPT_MEDFORD
 160         case EFX_FAMILY_MEDFORD:
 161                 eevop = &__efx_ev_ef10_ops;
 162                 break;
 163 #endif /* EFSYS_OPT_MEDFORD */
 164
 165         default:
 166                 EFSYS_ASSERT(0);
 167                 rc = ENOTSUP;
 168                 goto fail1;
 169         }
 170
 171         EFSYS_ASSERT3U(enp->en_ev_qcount, ==, 0);
 172
 173         if ((rc = eevop->eevo_init(enp)) != 0)
 174                 goto fail2;
 175
 176         enp->en_eevop = eevop;
 177         enp->en_mod_flags |= EFX_MOD_EV;
 178         return (0);
 179
 180 fail2:
 181         EFSYS_PROBE(fail2);
 182
 183 fail1:
 184         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 185
 186         enp->en_eevop = NULL;
 187         enp->en_mod_flags &= ~EFX_MOD_EV;
 188         return (rc);
 189 }
 190
 191                 void
 192 efx_ev_fini(
 193         __in    efx_nic_t *enp)
 194 {
 195         const efx_ev_ops_t *eevop = enp->en_eevop;
 196
 197         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 198         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR);
 199         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_EV);
 200         EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_RX));
 201         EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_TX));
 202         EFSYS_ASSERT3U(enp->en_ev_qcount, ==, 0);
 203
 204         eevop->eevo_fini(enp);
 205
 206         enp->en_eevop = NULL;
 207         enp->en_mod_flags &= ~EFX_MOD_EV;
 208 }
 209
 210
 211         __checkReturn   efx_rc_t
 212 efx_ev_qcreate(
 213         __in            efx_nic_t *enp,
 214         __in            unsigned int index,
 215         __in            efsys_mem_t *esmp,
 216         __in            size_t n,
 217         __in            uint32_t id,
 218         __in            uint32_t us,
 219         __in            uint32_t flags,
 220         __deref_out     efx_evq_t **eepp)
 221 {
 222         const efx_ev_ops_t *eevop = enp->en_eevop;
 223         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
 224         efx_evq_t *eep;
 225         efx_rc_t rc;
 226
 227         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 228         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_EV);
 229
 230         EFSYS_ASSERT3U(enp->en_ev_qcount + 1, <, encp->enc_evq_limit);
 231
 232         switch (flags & EFX_EVQ_FLAGS_NOTIFY_MASK) {
 233         case EFX_EVQ_FLAGS_NOTIFY_INTERRUPT:
 234                 break;
 235         case EFX_EVQ_FLAGS_NOTIFY_DISABLED:
 236                 if (us != 0) {
 237                         rc = EINVAL;
 238                         goto fail1;
 239                 }
 240                 break;
 241         default:
 242                 rc = EINVAL;
 243                 goto fail2;
 244         }
 245
 246         /* Allocate an EVQ object */
 247         EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (efx_evq_t), eep);
 248         if (eep == NULL) {
 249                 rc = ENOMEM;
 250                 goto fail3;
 251         }
 252
 253         eep->ee_magic = EFX_EVQ_MAGIC;
 254         eep->ee_enp = enp;
 255         eep->ee_index = index;
 256         eep->ee_mask = n - 1;
 257         eep->ee_flags = flags;
 258         eep->ee_esmp = esmp;
 259
 260         /*
 261          * Set outputs before the queue is created because interrupts may be
 262          * raised for events immediately after the queue is created, before the
 263          * function call below returns. See bug58606.
 264          *
 265          * The eepp pointer passed in by the client must therefore point to data
 266          * shared with the client's event processing context.
 267          */
 268         enp->en_ev_qcount++;
 269         *eepp = eep;
 270
 271         if ((rc = eevop->eevo_qcreate(enp, index, esmp, n, id, us, flags,
 272             eep)) != 0)
 273                 goto fail4;
 274
 275         return (0);
 276
 277 fail4:
 278         EFSYS_PROBE(fail4);
 279
 280         *eepp = NULL;
 281         enp->en_ev_qcount--;
 282         EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_evq_t), eep);
 283 fail3:
 284         EFSYS_PROBE(fail3);
 285 fail2:
 286         EFSYS_PROBE(fail2);
 287 fail1:
 288         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 289         return (rc);
 290 }
 291
 292                 void
 293 efx_ev_qdestroy(
 294         __in    efx_evq_t *eep)
 295 {
 296         efx_nic_t *enp = eep->ee_enp;
 297         const efx_ev_ops_t *eevop = enp->en_eevop;
 298
 299         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 300
 301         EFSYS_ASSERT(enp->en_ev_qcount != 0);
 302         --enp->en_ev_qcount;
 303
 304         eevop->eevo_qdestroy(eep);
 305
 306         /* Free the EVQ object */
 307         EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_evq_t), eep);
 308 }
 309
 310         __checkReturn   efx_rc_t
 311 efx_ev_qprime(
 312         __in            efx_evq_t *eep,
 313         __in            unsigned int count)
 314 {
 315         efx_nic_t *enp = eep->ee_enp;
 316         const efx_ev_ops_t *eevop = enp->en_eevop;
 317         efx_rc_t rc;
 318
 319         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 320
 321         if (!(enp->en_mod_flags & EFX_MOD_INTR)) {
 322                 rc = EINVAL;
 323                 goto fail1;
 324         }
 325
 326         if ((rc = eevop->eevo_qprime(eep, count)) != 0)
 327                 goto fail2;
 328
 329         return (0);
 330
 331 fail2:
 332         EFSYS_PROBE(fail2);
 333 fail1:
 334         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 335         return (rc);
 336 }
 337
 338         __checkReturn   boolean_t
 339 efx_ev_qpending(
 340         __in            efx_evq_t *eep,
 341         __in            unsigned int count)
 342 {
 343         size_t offset;
 344         efx_qword_t qword;
 345
 346         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 347
 348         offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 349         EFSYS_MEM_READQ(eep->ee_esmp, offset, &qword);
 350
 351         return (EFX_EV_PRESENT(qword));
 352 }
 353
 354 #define EFX_EV_BATCH    8
 355
 356                         void
 357 efx_ev_qpoll(
 358         __in            efx_evq_t *eep,
 359         __inout         unsigned int *countp,
 360         __in            const efx_ev_callbacks_t *eecp,
 361         __in_opt        void *arg)
 362 {
 363         efx_qword_t ev[EFX_EV_BATCH];
 364         unsigned int batch;
 365         unsigned int total;
 366         unsigned int count;
 367         unsigned int index;
 368         size_t offset;
 369
 370         /* Ensure events codes match for EF10 (Huntington/Medford) and Siena */
 371         EFX_STATIC_ASSERT(ESF_DZ_EV_CODE_LBN == FSF_AZ_EV_CODE_LBN);
 372         EFX_STATIC_ASSERT(ESF_DZ_EV_CODE_WIDTH == FSF_AZ_EV_CODE_WIDTH);
 373
 374         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_RX_EV == FSE_AZ_EV_CODE_RX_EV);
 375         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_TX_EV == FSE_AZ_EV_CODE_TX_EV);
 376         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_DRIVER_EV == FSE_AZ_EV_CODE_DRIVER_EV);
 377         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_DRV_GEN_EV ==
 378             FSE_AZ_EV_CODE_DRV_GEN_EV);
 379 #if EFSYS_OPT_MCDI
 380         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_MCDI_EV ==
 381             FSE_AZ_EV_CODE_MCDI_EVRESPONSE);
 382 #endif
 383
 384         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 385         EFSYS_ASSERT(countp != NULL);
 386         EFSYS_ASSERT(eecp != NULL);
 387
 388         count = *countp;
 389         do {
 390                 /* Read up until the end of the batch period */
 391                 batch = EFX_EV_BATCH - (count & (EFX_EV_BATCH - 1));
 392                 offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 393                 for (total = 0; total < batch; ++total) {
 394                         EFSYS_MEM_READQ(eep->ee_esmp, offset, &(ev[total]));
 395
 396                         if (!EFX_EV_PRESENT(ev[total]))
 397                                 break;
 398
 399                         EFSYS_PROBE3(event, unsigned int, eep->ee_index,
 400                             uint32_t, EFX_QWORD_FIELD(ev[total], EFX_DWORD_1),
 401                             uint32_t, EFX_QWORD_FIELD(ev[total], EFX_DWORD_0));
 402
 403                         offset += sizeof (efx_qword_t);
 404                 }
 405
 406                 /* Process the batch of events */
 407                 for (index = 0; index < total; ++index) {
 408                         boolean_t should_abort;
 409                         uint32_t code;
 410
 411                         EFX_EV_QSTAT_INCR(eep, EV_ALL);
 412
 413                         code = EFX_QWORD_FIELD(ev[index], FSF_AZ_EV_CODE);
 414                         switch (code) {
 415                         case FSE_AZ_EV_CODE_RX_EV:
 416                                 should_abort = eep->ee_rx(eep,
 417                                     &(ev[index]), eecp, arg);
 418                                 break;
 419                         case FSE_AZ_EV_CODE_TX_EV:
 420                                 should_abort = eep->ee_tx(eep,
 421                                     &(ev[index]), eecp, arg);
 422                                 break;
 423                         case FSE_AZ_EV_CODE_DRIVER_EV:
 424                                 should_abort = eep->ee_driver(eep,
 425                                     &(ev[index]), eecp, arg);
 426                                 break;
 427                         case FSE_AZ_EV_CODE_DRV_GEN_EV:
 428                                 should_abort = eep->ee_drv_gen(eep,
 429                                     &(ev[index]), eecp, arg);
 430                                 break;
 431 #if EFSYS_OPT_MCDI
 432                         case FSE_AZ_EV_CODE_MCDI_EVRESPONSE:
 433                                 should_abort = eep->ee_mcdi(eep,
 434                                     &(ev[index]), eecp, arg);
 435                                 break;
 436 #endif
 437                         case FSE_AZ_EV_CODE_GLOBAL_EV:
 438                                 if (eep->ee_global) {
 439                                         should_abort = eep->ee_global(eep,
 440                                             &(ev[index]), eecp, arg);
 441                                         break;
 442                                 }
 443                                 /* else fallthrough */
 444                         default:
 445                                 EFSYS_PROBE3(bad_event,
 446                                     unsigned int, eep->ee_index,
 447                                     uint32_t,
 448                                     EFX_QWORD_FIELD(ev[index], EFX_DWORD_1),
 449                                     uint32_t,
 450                                     EFX_QWORD_FIELD(ev[index], EFX_DWORD_0));
 451
 452                                 EFSYS_ASSERT(eecp->eec_exception != NULL);
 453                                 (void) eecp->eec_exception(arg,
 454                                         EFX_EXCEPTION_EV_ERROR, code);
 455                                 should_abort = B_TRUE;
 456                         }
 457                         if (should_abort) {
 458                                 /* Ignore subsequent events */
 459                                 total = index + 1;
 460                                 break;
 461                         }
 462                 }
 463
 464                 /*
 465                  * Now that the hardware has most likely moved onto dma'ing
 466                  * into the next cache line, clear the processed events. Take
 467                  * care to only clear out events that we've processed
 468                  */
 469                 EFX_SET_QWORD(ev[0]);
 470                 offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 471                 for (index = 0; index < total; ++index) {
 472                         EFSYS_MEM_WRITEQ(eep->ee_esmp, offset, &(ev[0]));
 473                         offset += sizeof (efx_qword_t);
 474                 }
 475
 476                 count += total;
 477
 478         } while (total == batch);
 479
 480         *countp = count;
 481 }
 482
 483                         void
 484 efx_ev_qpost(
 485         __in    efx_evq_t *eep,
 486         __in    uint16_t data)
 487 {
 488         efx_nic_t *enp = eep->ee_enp;
 489         const efx_ev_ops_t *eevop = enp->en_eevop;
 490
 491         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 492
 493         EFSYS_ASSERT(eevop != NULL &&
 494             eevop->eevo_qpost != NULL);
 495
 496         eevop->eevo_qpost(eep, data);
 497 }
 498
 499         __checkReturn   efx_rc_t
 500 efx_ev_usecs_to_ticks(
 501         __in            efx_nic_t *enp,
 502         __in            unsigned int us,
 503         __out           unsigned int *ticksp)
 504 {
 505         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
 506         unsigned int ticks;
 507
 508         /* Convert microseconds to a timer tick count */
 509         if (us == 0)
 510                 ticks = 0;
 511         else if (us * 1000 < encp->enc_evq_timer_quantum_ns)
 512                 ticks = 1;      /* Never round down to zero */
 513         else
 514                 ticks = us * 1000 / encp->enc_evq_timer_quantum_ns;
 515
 516         *ticksp = ticks;
 517         return (0);
 518 }
 519
 520         __checkReturn   efx_rc_t
 521 efx_ev_qmoderate(
 522         __in            efx_evq_t *eep,
 523         __in            unsigned int us)
 524 {
 525         efx_nic_t *enp = eep->ee_enp;
 526         const efx_ev_ops_t *eevop = enp->en_eevop;
 527         efx_rc_t rc;
 528
 529         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 530
 531         if ((eep->ee_flags & EFX_EVQ_FLAGS_NOTIFY_MASK) ==
 532             EFX_EVQ_FLAGS_NOTIFY_DISABLED) {
 533                 rc = EINVAL;
 534                 goto fail1;
 535         }
 536
 537         if ((rc = eevop->eevo_qmoderate(eep, us)) != 0)
 538                 goto fail2;
 539
 540         return (0);
 541
 542 fail2:
 543         EFSYS_PROBE(fail2);
 544 fail1:
 545         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 546         return (rc);
 547 }
 548
 549 #if EFSYS_OPT_QSTATS
 550                                         void
 551 efx_ev_qstats_update(
 552         __in                            efx_evq_t *eep,
 553         __inout_ecount(EV_NQSTATS)      efsys_stat_t *stat)
 554
 555 {       efx_nic_t *enp = eep->ee_enp;
 556         const efx_ev_ops_t *eevop = enp->en_eevop;
 557
 558         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 559
 560         eevop->eevo_qstats_update(eep, stat);
 561 }
 562
 563 #endif  /* EFSYS_OPT_QSTATS */
 564
 565 #if EFSYS_OPT_SIENA
 566
 567 static  __checkReturn   efx_rc_t
 568 siena_ev_init(
 569         __in            efx_nic_t *enp)
 570 {
 571         efx_oword_t oword;
 572
 573         /*
 574          * Program the event queue for receive and transmit queue
 575          * flush events.
 576          */
 577         EFX_BAR_READO(enp, FR_AZ_DP_CTRL_REG, &oword);
 578         EFX_SET_OWORD_FIELD(oword, FRF_AZ_FLS_EVQ_ID, 0);
 579         EFX_BAR_WRITEO(enp, FR_AZ_DP_CTRL_REG, &oword);
 580
 581         return (0);
 582
 583 }
 584
 585 static  __checkReturn   boolean_t
 586 siena_ev_rx_not_ok(
 587         __in            efx_evq_t *eep,
 588         __in            efx_qword_t *eqp,
 589         __in            uint32_t label,
 590         __in            uint32_t id,
 591         __inout         uint16_t *flagsp)
 592 {
 593         boolean_t ignore = B_FALSE;
 594
 595         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_TOBE_DISC) != 0) {
 596                 EFX_EV_QSTAT_INCR(eep, EV_RX_TOBE_DISC);
 597                 EFSYS_PROBE(tobe_disc);
 598                 /*
 599                  * Assume this is a unicast address mismatch, unless below
 600                  * we find either FSF_AZ_RX_EV_ETH_CRC_ERR or
 601                  * EV_RX_PAUSE_FRM_ERR is set.
 602                  */
 603                 (*flagsp) |= EFX_ADDR_MISMATCH;
 604         }
 605
 606         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_FRM_TRUNC) != 0) {
 607                 EFSYS_PROBE2(frm_trunc, uint32_t, label, uint32_t, id);
 608                 EFX_EV_QSTAT_INCR(eep, EV_RX_FRM_TRUNC);
 609                 (*flagsp) |= EFX_DISCARD;
 610
 611         }
 612
 613         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_ETH_CRC_ERR) != 0) {
 614                 EFX_EV_QSTAT_INCR(eep, EV_RX_ETH_CRC_ERR);
 615                 EFSYS_PROBE(crc_err);
 616                 (*flagsp) &= ~EFX_ADDR_MISMATCH;
 617                 (*flagsp) |= EFX_DISCARD;
 618         }
 619
 620         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_PAUSE_FRM_ERR) != 0) {
 621                 EFX_EV_QSTAT_INCR(eep, EV_RX_PAUSE_FRM_ERR);
 622                 EFSYS_PROBE(pause_frm_err);
 623                 (*flagsp) &= ~EFX_ADDR_MISMATCH;
 624                 (*flagsp) |= EFX_DISCARD;
 625         }
 626
 627         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_BUF_OWNER_ID_ERR) != 0) {
 628                 EFX_EV_QSTAT_INCR(eep, EV_RX_BUF_OWNER_ID_ERR);
 629                 EFSYS_PROBE(owner_id_err);
 630                 (*flagsp) |= EFX_DISCARD;
 631         }
 632
 633         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_IP_HDR_CHKSUM_ERR) != 0) {
 634                 EFX_EV_QSTAT_INCR(eep, EV_RX_IPV4_HDR_CHKSUM_ERR);
 635                 EFSYS_PROBE(ipv4_err);
 636                 (*flagsp) &= ~EFX_CKSUM_IPV4;
 637         }
 638
 639         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_TCP_UDP_CHKSUM_ERR) != 0) {
 640                 EFX_EV_QSTAT_INCR(eep, EV_RX_TCP_UDP_CHKSUM_ERR);
 641                 EFSYS_PROBE(udp_chk_err);
 642                 (*flagsp) &= ~EFX_CKSUM_TCPUDP;
 643         }
 644
 645         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_IP_FRAG_ERR) != 0) {
 646                 EFX_EV_QSTAT_INCR(eep, EV_RX_IP_FRAG_ERR);
 647
 648                 /*
 649                  * If IP is fragmented FSF_AZ_RX_EV_IP_FRAG_ERR is set. This
 650                  * causes FSF_AZ_RX_EV_PKT_OK to be clear. This is not an error
 651                  * condition.
 652                  */
 653                 (*flagsp) &= ~(EFX_PKT_TCP | EFX_PKT_UDP | EFX_CKSUM_TCPUDP);
 654         }
 655
 656         return (ignore);
 657 }
 658
 659 static  __checkReturn   boolean_t
 660 siena_ev_rx(
 661         __in            efx_evq_t *eep,
 662         __in            efx_qword_t *eqp,
 663         __in            const efx_ev_callbacks_t *eecp,
 664         __in_opt        void *arg)
 665 {
 666         uint32_t id;
 667         uint32_t size;
 668         uint32_t label;
 669         boolean_t ok;
 670         uint32_t hdr_type;
 671         boolean_t is_v6;
 672         uint16_t flags;
 673         boolean_t ignore;
 674         boolean_t should_abort;
 675
 676         EFX_EV_QSTAT_INCR(eep, EV_RX);
 677
 678         /* Basic packet information */
 679         id = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_DESC_PTR);
 680         size = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_BYTE_CNT);
 681         label = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_Q_LABEL);
 682         ok = (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_PKT_OK) != 0);
 683
 684         hdr_type = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_HDR_TYPE);
 685
 686         is_v6 = (EFX_QWORD_FIELD(*eqp, FSF_CZ_RX_EV_IPV6_PKT) != 0);
 687
 688         /*
 689          * If packet is marked as OK and packet type is TCP/IP or
 690          * UDP/IP or other IP, then we can rely on the hardware checksums.
 691          */
 692         switch (hdr_type) {
 693         case FSE_AZ_RX_EV_HDR_TYPE_IPV4V6_TCP:
 694                 flags = EFX_PKT_TCP | EFX_CKSUM_TCPUDP;
 695                 if (is_v6) {
 696                         EFX_EV_QSTAT_INCR(eep, EV_RX_TCP_IPV6);
 697                         flags |= EFX_PKT_IPV6;
 698                 } else {
 699                         EFX_EV_QSTAT_INCR(eep, EV_RX_TCP_IPV4);
 700                         flags |= EFX_PKT_IPV4 | EFX_CKSUM_IPV4;
 701                 }
 702                 break;
 703
 704         case FSE_AZ_RX_EV_HDR_TYPE_IPV4V6_UDP:
 705                 flags = EFX_PKT_UDP | EFX_CKSUM_TCPUDP;
 706                 if (is_v6) {
 707                         EFX_EV_QSTAT_INCR(eep, EV_RX_UDP_IPV6);
 708                         flags |= EFX_PKT_IPV6;
 709                 } else {
 710                         EFX_EV_QSTAT_INCR(eep, EV_RX_UDP_IPV4);
 711                         flags |= EFX_PKT_IPV4 | EFX_CKSUM_IPV4;
 712                 }
 713                 break;
 714
 715         case FSE_AZ_RX_EV_HDR_TYPE_IPV4V6_OTHER:
 716                 if (is_v6) {
 717                         EFX_EV_QSTAT_INCR(eep, EV_RX_OTHER_IPV6);
 718                         flags = EFX_PKT_IPV6;
 719                 } else {
 720                         EFX_EV_QSTAT_INCR(eep, EV_RX_OTHER_IPV4);
 721                         flags = EFX_PKT_IPV4 | EFX_CKSUM_IPV4;
 722                 }
 723                 break;
 724
 725         case FSE_AZ_RX_EV_HDR_TYPE_OTHER:
 726                 EFX_EV_QSTAT_INCR(eep, EV_RX_NON_IP);
 727                 flags = 0;
 728                 break;
 729
 730         default:
 731                 EFSYS_ASSERT(B_FALSE);
 732                 flags = 0;
 733                 break;
 734         }
 735
 736         /* Detect errors included in the FSF_AZ_RX_EV_PKT_OK indication */
 737         if (!ok) {
 738                 ignore = siena_ev_rx_not_ok(eep, eqp, label, id, &flags);
 739                 if (ignore) {
 740                         EFSYS_PROBE4(rx_complete, uint32_t, label, uint32_t, id,
 741                             uint32_t, size, uint16_t, flags);
 742
 743                         return (B_FALSE);
 744                 }
 745         }
 746
 747         /* If we're not discarding the packet then it is ok */
 748         if (~flags & EFX_DISCARD)
 749                 EFX_EV_QSTAT_INCR(eep, EV_RX_OK);
 750
 751         /* Detect multicast packets that didn't match the filter */
 752         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_MCAST_PKT) != 0) {
 753                 EFX_EV_QSTAT_INCR(eep, EV_RX_MCAST_PKT);
 754
 755                 if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_MCAST_HASH_MATCH) != 0) {
 756                         EFX_EV_QSTAT_INCR(eep, EV_RX_MCAST_HASH_MATCH);
 757                 } else {
 758                         EFSYS_PROBE(mcast_mismatch);
 759                         flags |= EFX_ADDR_MISMATCH;
 760                 }
 761         } else {
 762                 flags |= EFX_PKT_UNICAST;
 763         }
 764
 765         /*
 766          * The packet parser in Siena can abort parsing packets under
 767          * certain error conditions, setting the PKT_NOT_PARSED bit
 768          * (which clears PKT_OK). If this is set, then don't trust
 769          * the PKT_TYPE field.
 770          */
 771         if (!ok) {
 772                 uint32_t parse_err;
 773
 774                 parse_err = EFX_QWORD_FIELD(*eqp, FSF_CZ_RX_EV_PKT_NOT_PARSED);
 775                 if (parse_err != 0)
 776                         flags |= EFX_CHECK_VLAN;
 777         }
 778
 779         if (~flags & EFX_CHECK_VLAN) {
 780                 uint32_t pkt_type;
 781
 782                 pkt_type = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_PKT_TYPE);
 783                 if (pkt_type >= FSE_AZ_RX_EV_PKT_TYPE_VLAN)
 784                         flags |= EFX_PKT_VLAN_TAGGED;
 785         }
 786
 787         EFSYS_PROBE4(rx_complete, uint32_t, label, uint32_t, id,
 788             uint32_t, size, uint16_t, flags);
 789
 790         EFSYS_ASSERT(eecp->eec_rx != NULL);
 791         should_abort = eecp->eec_rx(arg, label, id, size, flags);
 792
 793         return (should_abort);
 794 }
 795
 796 static  __checkReturn   boolean_t
 797 siena_ev_tx(
 798         __in            efx_evq_t *eep,
 799         __in            efx_qword_t *eqp,
 800         __in            const efx_ev_callbacks_t *eecp,
 801         __in_opt        void *arg)
 802 {
 803         uint32_t id;
 804         uint32_t label;
 805         boolean_t should_abort;
 806
 807         EFX_EV_QSTAT_INCR(eep, EV_TX);
 808
 809         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_COMP) != 0 &&
 810             EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_ERR) == 0 &&
 811             EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_TOO_BIG) == 0 &&
 812             EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_WQ_FF_FULL) == 0) {
 813
 814                 id = EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_DESC_PTR);
 815                 label = EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_Q_LABEL);
 816
 817                 EFSYS_PROBE2(tx_complete, uint32_t, label, uint32_t, id);
 818
 819                 EFSYS_ASSERT(eecp->eec_tx != NULL);
 820                 should_abort = eecp->eec_tx(arg, label, id);
 821
 822                 return (should_abort);
 823         }
 824
 825         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_COMP) != 0)
 826                 EFSYS_PROBE3(bad_event, unsigned int, eep->ee_index,
 827                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_1),
 828                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_0));
 829
 830         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_ERR) != 0)
 831                 EFX_EV_QSTAT_INCR(eep, EV_TX_PKT_ERR);
 832
 833         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_TOO_BIG) != 0)
 834                 EFX_EV_QSTAT_INCR(eep, EV_TX_PKT_TOO_BIG);
 835
 836         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_WQ_FF_FULL) != 0)
 837                 EFX_EV_QSTAT_INCR(eep, EV_TX_WQ_FF_FULL);
 838
 839         EFX_EV_QSTAT_INCR(eep, EV_TX_UNEXPECTED);
 840         return (B_FALSE);
 841 }
 842
 843 static  __checkReturn   boolean_t
 844 siena_ev_global(
 845         __in            efx_evq_t *eep,
 846         __in            efx_qword_t *eqp,
 847         __in            const efx_ev_callbacks_t *eecp,
 848         __in_opt        void *arg)
 849 {
 850         _NOTE(ARGUNUSED(eqp, eecp, arg))
 851
 852         EFX_EV_QSTAT_INCR(eep, EV_GLOBAL);
 853
 854         return (B_FALSE);
 855 }
 856
 857 static  __checkReturn   boolean_t
 858 siena_ev_driver(
 859         __in            efx_evq_t *eep,
 860         __in            efx_qword_t *eqp,
 861         __in            const efx_ev_callbacks_t *eecp,
 862         __in_opt        void *arg)
 863 {
 864         boolean_t should_abort;
 865
 866         EFX_EV_QSTAT_INCR(eep, EV_DRIVER);
 867         should_abort = B_FALSE;
 868
 869         switch (EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBCODE)) {
 870         case FSE_AZ_TX_DESCQ_FLS_DONE_EV: {
 871                 uint32_t txq_index;
 872
 873                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_TX_DESCQ_FLS_DONE);
 874
 875                 txq_index = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
 876
 877                 EFSYS_PROBE1(tx_descq_fls_done, uint32_t, txq_index);
 878
 879                 EFSYS_ASSERT(eecp->eec_txq_flush_done != NULL);
 880                 should_abort = eecp->eec_txq_flush_done(arg, txq_index);
 881
 882                 break;
 883         }
 884         case FSE_AZ_RX_DESCQ_FLS_DONE_EV: {
 885                 uint32_t rxq_index;
 886                 uint32_t failed;
 887
 888                 rxq_index = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_RX_DESCQ_ID);
 889                 failed = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_RX_FLUSH_FAIL);
 890
 891                 EFSYS_ASSERT(eecp->eec_rxq_flush_done != NULL);
 892                 EFSYS_ASSERT(eecp->eec_rxq_flush_failed != NULL);
 893
 894                 if (failed) {
 895                         EFX_EV_QSTAT_INCR(eep, EV_DRIVER_RX_DESCQ_FLS_FAILED);
 896
 897                         EFSYS_PROBE1(rx_descq_fls_failed, uint32_t, rxq_index);
 898
 899                         should_abort = eecp->eec_rxq_flush_failed(arg,
 900                                                                     rxq_index);
 901                 } else {
 902                         EFX_EV_QSTAT_INCR(eep, EV_DRIVER_RX_DESCQ_FLS_DONE);
 903
 904                         EFSYS_PROBE1(rx_descq_fls_done, uint32_t, rxq_index);
 905
 906                         should_abort = eecp->eec_rxq_flush_done(arg, rxq_index);
 907                 }
 908
 909                 break;
 910         }
 911         case FSE_AZ_EVQ_INIT_DONE_EV:
 912                 EFSYS_ASSERT(eecp->eec_initialized != NULL);
 913                 should_abort = eecp->eec_initialized(arg);
 914
 915                 break;
 916
 917         case FSE_AZ_EVQ_NOT_EN_EV:
 918                 EFSYS_PROBE(evq_not_en);
 919                 break;
 920
 921         case FSE_AZ_SRM_UPD_DONE_EV: {
 922                 uint32_t code;
 923
 924                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_SRM_UPD_DONE);
 925
 926                 code = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
 927
 928                 EFSYS_ASSERT(eecp->eec_sram != NULL);
 929                 should_abort = eecp->eec_sram(arg, code);
 930
 931                 break;
 932         }
 933         case FSE_AZ_WAKE_UP_EV: {
 934                 uint32_t id;
 935
 936                 id = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
 937
 938                 EFSYS_ASSERT(eecp->eec_wake_up != NULL);
 939                 should_abort = eecp->eec_wake_up(arg, id);
 940
 941                 break;
 942         }
 943         case FSE_AZ_TX_PKT_NON_TCP_UDP:
 944                 EFSYS_PROBE(tx_pkt_non_tcp_udp);
 945                 break;
 946
 947         case FSE_AZ_TIMER_EV: {
 948                 uint32_t id;
 949
 950                 id = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
 951
 952                 EFSYS_ASSERT(eecp->eec_timer != NULL);
 953                 should_abort = eecp->eec_timer(arg, id);
 954
 955                 break;
 956         }
 957         case FSE_AZ_RX_DSC_ERROR_EV:
 958                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_RX_DSC_ERROR);
 959
 960                 EFSYS_PROBE(rx_dsc_error);
 961
 962                 EFSYS_ASSERT(eecp->eec_exception != NULL);
 963                 should_abort = eecp->eec_exception(arg,
 964                         EFX_EXCEPTION_RX_DSC_ERROR, 0);
 965
 966                 break;
 967
 968         case FSE_AZ_TX_DSC_ERROR_EV:
 969                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_TX_DSC_ERROR);
 970
 971                 EFSYS_PROBE(tx_dsc_error);
 972
 973                 EFSYS_ASSERT(eecp->eec_exception != NULL);
 974                 should_abort = eecp->eec_exception(arg,
 975                         EFX_EXCEPTION_TX_DSC_ERROR, 0);
 976
 977                 break;
 978
 979         default:
 980                 break;
 981         }
 982
 983         return (should_abort);
 984 }
 985
 986 static  __checkReturn   boolean_t
 987 siena_ev_drv_gen(
 988         __in            efx_evq_t *eep,
 989         __in            efx_qword_t *eqp,
 990         __in            const efx_ev_callbacks_t *eecp,
 991         __in_opt        void *arg)
 992 {
 993         uint32_t data;
 994         boolean_t should_abort;
 995
 996         EFX_EV_QSTAT_INCR(eep, EV_DRV_GEN);
 997
 998         data = EFX_QWORD_FIELD(*eqp, FSF_AZ_EV_DATA_DW0);
 999         if (data >= ((uint32_t)1 << 16)) {
1000                 EFSYS_PROBE3(bad_event, unsigned int, eep->ee_index,
1001                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_1),
1002                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_0));
1003                 return (B_TRUE);
1004         }
1005
1006         EFSYS_ASSERT(eecp->eec_software != NULL);
1007         should_abort = eecp->eec_software(arg, (uint16_t)data);
1008
1009         return (should_abort);
1010 }
1011
1012 #if EFSYS_OPT_MCDI
1013
1014 static  __checkReturn   boolean_t
1015 siena_ev_mcdi(
1016         __in            efx_evq_t *eep,
1017         __in            efx_qword_t *eqp,
1018         __in            const efx_ev_callbacks_t *eecp,
1019         __in_opt        void *arg)
1020 {
1021         efx_nic_t *enp = eep->ee_enp;
1022         unsigned int code;
1023         boolean_t should_abort = B_FALSE;
1024
1025         EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA);
1026
1027         if (enp->en_family != EFX_FAMILY_SIENA)
1028                 goto out;
1029
1030         EFSYS_ASSERT(eecp->eec_link_change != NULL);
1031         EFSYS_ASSERT(eecp->eec_exception != NULL);
1032
1033         EFX_EV_QSTAT_INCR(eep, EV_MCDI_RESPONSE);
1034
1035         code = EFX_QWORD_FIELD(*eqp, MCDI_EVENT_CODE);
1036         switch (code) {
1037         case MCDI_EVENT_CODE_BADSSERT:
1038                 efx_mcdi_ev_death(enp, EINTR);
1039                 break;
1040
1041         case MCDI_EVENT_CODE_CMDDONE:
1042                 efx_mcdi_ev_cpl(enp,
1043                     MCDI_EV_FIELD(eqp, CMDDONE_SEQ),
1044                     MCDI_EV_FIELD(eqp, CMDDONE_DATALEN),
1045                     MCDI_EV_FIELD(eqp, CMDDONE_ERRNO));
1046                 break;
1047
1048         case MCDI_EVENT_CODE_LINKCHANGE: {
1049                 efx_link_mode_t link_mode;
1050
1051                 siena_phy_link_ev(enp, eqp, &link_mode);
1052                 should_abort = eecp->eec_link_change(arg, link_mode);
1053                 break;
1054         }
1055         case MCDI_EVENT_CODE_SENSOREVT: {
1056                 should_abort = B_FALSE;
1057                 break;
1058         }
1059         case MCDI_EVENT_CODE_SCHEDERR:
1060                 /* Informational only */
1061                 break;
1062
1063         case MCDI_EVENT_CODE_REBOOT:
1064                 efx_mcdi_ev_death(enp, EIO);
1065                 break;
1066
1067         case MCDI_EVENT_CODE_MAC_STATS_DMA:
1068 #if EFSYS_OPT_MAC_STATS
1069                 if (eecp->eec_mac_stats != NULL) {
1070                         eecp->eec_mac_stats(arg,
1071                             MCDI_EV_FIELD(eqp, MAC_STATS_DMA_GENERATION));
1072                 }
1073 #endif
1074                 break;
1075
1076         case MCDI_EVENT_CODE_FWALERT: {
1077                 uint32_t reason = MCDI_EV_FIELD(eqp, FWALERT_REASON);
1078
1079                 if (reason == MCDI_EVENT_FWALERT_REASON_SRAM_ACCESS)
1080                         should_abort = eecp->eec_exception(arg,
1081                                 EFX_EXCEPTION_FWALERT_SRAM,
1082                                 MCDI_EV_FIELD(eqp, FWALERT_DATA));
1083                 else
1084                         should_abort = eecp->eec_exception(arg,
1085                                 EFX_EXCEPTION_UNKNOWN_FWALERT,
1086                                 MCDI_EV_FIELD(eqp, DATA));
1087                 break;
1088         }
1089
1090         default:
1091                 EFSYS_PROBE1(mc_pcol_error, int, code);
1092                 break;
1093         }
1094
1095 out:
1096         return (should_abort);
1097 }
1098
1099 #endif  /* EFSYS_OPT_MCDI */
1100
1101 static  __checkReturn   efx_rc_t
1102 siena_ev_qprime(
1103         __in            efx_evq_t *eep,
1104         __in            unsigned int count)
1105 {
1106         efx_nic_t *enp = eep->ee_enp;
1107         uint32_t rptr;
1108         efx_dword_t dword;
1109
1110         rptr = count & eep->ee_mask;
1111
1112         EFX_POPULATE_DWORD_1(dword, FRF_AZ_EVQ_RPTR, rptr);
1113
1114         EFX_BAR_TBL_WRITED(enp, FR_AZ_EVQ_RPTR_REG, eep->ee_index,
1115                             &dword, B_FALSE);
1116
1117         return (0);
1118 }
1119
1120 static          void
1121 siena_ev_qpost(
1122         __in    efx_evq_t *eep,
1123         __in    uint16_t data)
1124 {
1125         efx_nic_t *enp = eep->ee_enp;
1126         efx_qword_t ev;
1127         efx_oword_t oword;
1128
1129         EFX_POPULATE_QWORD_2(ev, FSF_AZ_EV_CODE, FSE_AZ_EV_CODE_DRV_GEN_EV,
1130             FSF_AZ_EV_DATA_DW0, (uint32_t)data);
1131
1132         EFX_POPULATE_OWORD_3(oword, FRF_AZ_DRV_EV_QID, eep->ee_index,
1133             EFX_DWORD_0, EFX_QWORD_FIELD(ev, EFX_DWORD_0),
1134             EFX_DWORD_1, EFX_QWORD_FIELD(ev, EFX_DWORD_1));
1135
1136         EFX_BAR_WRITEO(enp, FR_AZ_DRV_EV_REG, &oword);
1137 }
1138
1139 static  __checkReturn   efx_rc_t
1140 siena_ev_qmoderate(
1141         __in            efx_evq_t *eep,
1142         __in            unsigned int us)
1143 {
1144         efx_nic_t *enp = eep->ee_enp;
1145         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1146         unsigned int locked;
1147         efx_dword_t dword;
1148         efx_rc_t rc;
1149
1150         if (us > encp->enc_evq_timer_max_us) {
1151                 rc = EINVAL;
1152                 goto fail1;
1153         }
1154
1155         /* If the value is zero then disable the timer */
1156         if (us == 0) {
1157                 EFX_POPULATE_DWORD_2(dword,
1158                     FRF_CZ_TC_TIMER_MODE, FFE_CZ_TIMER_MODE_DIS,
1159                     FRF_CZ_TC_TIMER_VAL, 0);
1160         } else {
1161                 unsigned int ticks;
1162
1163                 if ((rc = efx_ev_usecs_to_ticks(enp, us, &ticks)) != 0)
1164                         goto fail2;
1165
1166                 EFSYS_ASSERT(ticks > 0);
1167                 EFX_POPULATE_DWORD_2(dword,
1168                     FRF_CZ_TC_TIMER_MODE, FFE_CZ_TIMER_MODE_INT_HLDOFF,
1169                     FRF_CZ_TC_TIMER_VAL, ticks - 1);
1170         }
1171
1172         locked = (eep->ee_index == 0) ? 1 : 0;
1173
1174         EFX_BAR_TBL_WRITED(enp, FR_BZ_TIMER_COMMAND_REGP0,
1175             eep->ee_index, &dword, locked);
1176
1177         return (0);
1178
1179 fail2:
1180         EFSYS_PROBE(fail2);
1181 fail1:
1182         EFSYS_PROBE1(fail1, efx_rc_t, rc);
1183
1184         return (rc);
1185 }
1186
1187 static  __checkReturn   efx_rc_t
1188 siena_ev_qcreate(
1189         __in            efx_nic_t *enp,
1190         __in            unsigned int index,
1191         __in            efsys_mem_t *esmp,
1192         __in            size_t n,
1193         __in            uint32_t id,
1194         __in            uint32_t us,
1195         __in            uint32_t flags,
1196         __in            efx_evq_t *eep)
1197 {
1198         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1199         uint32_t size;
1200         efx_oword_t oword;
1201         efx_rc_t rc;
1202         boolean_t notify_mode;
1203
1204         _NOTE(ARGUNUSED(esmp))
1205
1206         EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MAXNEVS));
1207         EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MINNEVS));
1208
1209         if (!ISP2(n) || (n < EFX_EVQ_MINNEVS) || (n > EFX_EVQ_MAXNEVS)) {
1210                 rc = EINVAL;
1211                 goto fail1;
1212         }
1213         if (index >= encp->enc_evq_limit) {
1214                 rc = EINVAL;
1215                 goto fail2;
1216         }
1217         for (size = 0; (1 << size) <= (EFX_EVQ_MAXNEVS / EFX_EVQ_MINNEVS);
1218             size++)
1219                 if ((1 << size) == (int)(n / EFX_EVQ_MINNEVS))
1220                         break;
1221         if (id + (1 << size) >= encp->enc_buftbl_limit) {
1222                 rc = EINVAL;
1223                 goto fail4;
1224         }
1225
1226         /* Set up the handler table */
1227         eep->ee_rx      = siena_ev_rx;
1228         eep->ee_tx      = siena_ev_tx;
1229         eep->ee_driver  = siena_ev_driver;
1230         eep->ee_global  = siena_ev_global;
1231         eep->ee_drv_gen = siena_ev_drv_gen;
1232 #if EFSYS_OPT_MCDI
1233         eep->ee_mcdi    = siena_ev_mcdi;
1234 #endif  /* EFSYS_OPT_MCDI */
1235
1236         notify_mode = ((flags & EFX_EVQ_FLAGS_NOTIFY_MASK) !=
1237             EFX_EVQ_FLAGS_NOTIFY_INTERRUPT);
1238
1239         /* Set up the new event queue */
1240         EFX_POPULATE_OWORD_3(oword, FRF_CZ_TIMER_Q_EN, 1,
1241             FRF_CZ_HOST_NOTIFY_MODE, notify_mode,
1242             FRF_CZ_TIMER_MODE, FFE_CZ_TIMER_MODE_DIS);
1243         EFX_BAR_TBL_WRITEO(enp, FR_AZ_TIMER_TBL, index, &oword, B_TRUE);
1244
1245         EFX_POPULATE_OWORD_3(oword, FRF_AZ_EVQ_EN, 1, FRF_AZ_EVQ_SIZE, size,
1246             FRF_AZ_EVQ_BUF_BASE_ID, id);
1247
1248         EFX_BAR_TBL_WRITEO(enp, FR_AZ_EVQ_PTR_TBL, index, &oword, B_TRUE);
1249
1250         /* Set initial interrupt moderation */
1251         siena_ev_qmoderate(eep, us);
1252
1253         return (0);
1254
1255 fail4:
1256         EFSYS_PROBE(fail4);
1257 fail2:
1258         EFSYS_PROBE(fail2);
1259 fail1:
1260         EFSYS_PROBE1(fail1, efx_rc_t, rc);
1261
1262         return (rc);
1263 }
1264
1265 #endif /* EFSYS_OPT_SIENA */
1266
1267 #if EFSYS_OPT_QSTATS
1268 #if EFSYS_OPT_NAMES
1269 /* START MKCONFIG GENERATED EfxEventQueueStatNamesBlock c0f3bc5083b40532 */
1270 static const char * const __efx_ev_qstat_name[] = {
1271         "all",
1272         "rx",
1273         "rx_ok",
1274         "rx_frm_trunc",
1275         "rx_tobe_disc",
1276         "rx_pause_frm_err",
1277         "rx_buf_owner_id_err",
1278         "rx_ipv4_hdr_chksum_err",
1279         "rx_tcp_udp_chksum_err",
1280         "rx_eth_crc_err",
1281         "rx_ip_frag_err",
1282         "rx_mcast_pkt",
1283         "rx_mcast_hash_match",
1284         "rx_tcp_ipv4",
1285         "rx_tcp_ipv6",
1286         "rx_udp_ipv4",
1287         "rx_udp_ipv6",
1288         "rx_other_ipv4",
1289         "rx_other_ipv6",
1290         "rx_non_ip",
1291         "rx_batch",
1292         "tx",
1293         "tx_wq_ff_full",
1294         "tx_pkt_err",
1295         "tx_pkt_too_big",
1296         "tx_unexpected",
1297         "global",
1298         "global_mnt",
1299         "driver",
1300         "driver_srm_upd_done",
1301         "driver_tx_descq_fls_done",
1302         "driver_rx_descq_fls_done",
1303         "driver_rx_descq_fls_failed",
1304         "driver_rx_dsc_error",
1305         "driver_tx_dsc_error",
1306         "drv_gen",
1307         "mcdi_response",
1308 };
1309 /* END MKCONFIG GENERATED EfxEventQueueStatNamesBlock */
1310
1311                 const char *
1312 efx_ev_qstat_name(
1313         __in    efx_nic_t *enp,
1314         __in    unsigned int id)
1315 {
1316         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
1317         EFSYS_ASSERT3U(id, <, EV_NQSTATS);
1318
1319         return (__efx_ev_qstat_name[id]);
1320 }
1321 #endif  /* EFSYS_OPT_NAMES */
1322 #endif  /* EFSYS_OPT_QSTATS */
1323
1324 #if EFSYS_OPT_SIENA
1325
1326 #if EFSYS_OPT_QSTATS
1327 static                                  void
1328 siena_ev_qstats_update(
1329         __in                            efx_evq_t *eep,
1330         __inout_ecount(EV_NQSTATS)      efsys_stat_t *stat)
1331 {
1332         unsigned int id;
1333
1334         for (id = 0; id < EV_NQSTATS; id++) {
1335                 efsys_stat_t *essp = &stat[id];
1336
1337                 EFSYS_STAT_INCR(essp, eep->ee_stat[id]);
1338                 eep->ee_stat[id] = 0;
1339         }
1340 }
1341 #endif  /* EFSYS_OPT_QSTATS */
1342
1343 static          void
1344 siena_ev_qdestroy(
1345         __in    efx_evq_t *eep)
1346 {
1347         efx_nic_t *enp = eep->ee_enp;
1348         efx_oword_t oword;
1349
1350         /* Purge event queue */
1351         EFX_ZERO_OWORD(oword);
1352
1353         EFX_BAR_TBL_WRITEO(enp, FR_AZ_EVQ_PTR_TBL,
1354             eep->ee_index, &oword, B_TRUE);
1355
1356         EFX_ZERO_OWORD(oword);
1357         EFX_BAR_TBL_WRITEO(enp, FR_AZ_TIMER_TBL, eep->ee_index, &oword, B_TRUE);
1358 }
1359
1360 static          void
1361 siena_ev_fini(
1362         __in    efx_nic_t *enp)
1363 {
1364         _NOTE(ARGUNUSED(enp))
1365 }
1366
1367 #endif /* EFSYS_OPT_SIENA */