net/sfc/base: regenerate headers to pick up CTPIO stats
[dpdk.git] / drivers / net / sfc / base / efx_filter.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  *
3  * Copyright (c) 2007-2018 Solarflare Communications Inc.
4  * All rights reserved.
5  */
6
7 #include "efx.h"
8 #include "efx_impl.h"
9
10
11 #if EFSYS_OPT_FILTER
12
13 #if EFSYS_OPT_SIENA
14
15 static  __checkReturn   efx_rc_t
16 siena_filter_init(
17         __in            efx_nic_t *enp);
18
19 static                  void
20 siena_filter_fini(
21         __in            efx_nic_t *enp);
22
23 static  __checkReturn   efx_rc_t
24 siena_filter_restore(
25         __in            efx_nic_t *enp);
26
27 static  __checkReturn   efx_rc_t
28 siena_filter_add(
29         __in            efx_nic_t *enp,
30         __inout         efx_filter_spec_t *spec,
31         __in            boolean_t may_replace);
32
33 static  __checkReturn   efx_rc_t
34 siena_filter_delete(
35         __in            efx_nic_t *enp,
36         __inout         efx_filter_spec_t *spec);
37
38 static  __checkReturn   efx_rc_t
39 siena_filter_supported_filters(
40         __in                            efx_nic_t *enp,
41         __out_ecount(buffer_length)     uint32_t *buffer,
42         __in                            size_t buffer_length,
43         __out                           size_t *list_lengthp);
44
45 #endif /* EFSYS_OPT_SIENA */
46
47 #if EFSYS_OPT_SIENA
48 static const efx_filter_ops_t   __efx_filter_siena_ops = {
49         siena_filter_init,              /* efo_init */
50         siena_filter_fini,              /* efo_fini */
51         siena_filter_restore,           /* efo_restore */
52         siena_filter_add,               /* efo_add */
53         siena_filter_delete,            /* efo_delete */
54         siena_filter_supported_filters, /* efo_supported_filters */
55         NULL,                           /* efo_reconfigure */
56 };
57 #endif /* EFSYS_OPT_SIENA */
58
59 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
60 static const efx_filter_ops_t   __efx_filter_ef10_ops = {
61         ef10_filter_init,               /* efo_init */
62         ef10_filter_fini,               /* efo_fini */
63         ef10_filter_restore,            /* efo_restore */
64         ef10_filter_add,                /* efo_add */
65         ef10_filter_delete,             /* efo_delete */
66         ef10_filter_supported_filters,  /* efo_supported_filters */
67         ef10_filter_reconfigure,        /* efo_reconfigure */
68 };
69 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
70
71         __checkReturn   efx_rc_t
72 efx_filter_insert(
73         __in            efx_nic_t *enp,
74         __inout         efx_filter_spec_t *spec)
75 {
76         const efx_filter_ops_t *efop = enp->en_efop;
77
78         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER);
79         EFSYS_ASSERT3P(spec, !=, NULL);
80         EFSYS_ASSERT3U(spec->efs_flags, &, EFX_FILTER_FLAG_RX);
81
82         return (efop->efo_add(enp, spec, B_FALSE));
83 }
84
85         __checkReturn   efx_rc_t
86 efx_filter_remove(
87         __in            efx_nic_t *enp,
88         __inout         efx_filter_spec_t *spec)
89 {
90         const efx_filter_ops_t *efop = enp->en_efop;
91
92         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER);
93         EFSYS_ASSERT3P(spec, !=, NULL);
94         EFSYS_ASSERT3U(spec->efs_flags, &, EFX_FILTER_FLAG_RX);
95
96         return (efop->efo_delete(enp, spec));
97 }
98
99         __checkReturn   efx_rc_t
100 efx_filter_restore(
101         __in            efx_nic_t *enp)
102 {
103         efx_rc_t rc;
104
105         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER);
106
107         if ((rc = enp->en_efop->efo_restore(enp)) != 0)
108                 goto fail1;
109
110         return (0);
111
112 fail1:
113         EFSYS_PROBE1(fail1, efx_rc_t, rc);
114
115         return (rc);
116 }
117
118         __checkReturn   efx_rc_t
119 efx_filter_init(
120         __in            efx_nic_t *enp)
121 {
122         const efx_filter_ops_t *efop;
123         efx_rc_t rc;
124
125         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
126         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
127         EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_FILTER));
128
129         switch (enp->en_family) {
130 #if EFSYS_OPT_SIENA
131         case EFX_FAMILY_SIENA:
132                 efop = &__efx_filter_siena_ops;
133                 break;
134 #endif /* EFSYS_OPT_SIENA */
135
136 #if EFSYS_OPT_HUNTINGTON
137         case EFX_FAMILY_HUNTINGTON:
138                 efop = &__efx_filter_ef10_ops;
139                 break;
140 #endif /* EFSYS_OPT_HUNTINGTON */
141
142 #if EFSYS_OPT_MEDFORD
143         case EFX_FAMILY_MEDFORD:
144                 efop = &__efx_filter_ef10_ops;
145                 break;
146 #endif /* EFSYS_OPT_MEDFORD */
147
148 #if EFSYS_OPT_MEDFORD2
149         case EFX_FAMILY_MEDFORD2:
150                 efop = &__efx_filter_ef10_ops;
151                 break;
152 #endif /* EFSYS_OPT_MEDFORD2 */
153
154         default:
155                 EFSYS_ASSERT(0);
156                 rc = ENOTSUP;
157                 goto fail1;
158         }
159
160         if ((rc = efop->efo_init(enp)) != 0)
161                 goto fail2;
162
163         enp->en_efop = efop;
164         enp->en_mod_flags |= EFX_MOD_FILTER;
165         return (0);
166
167 fail2:
168         EFSYS_PROBE(fail2);
169 fail1:
170         EFSYS_PROBE1(fail1, efx_rc_t, rc);
171
172         enp->en_efop = NULL;
173         enp->en_mod_flags &= ~EFX_MOD_FILTER;
174         return (rc);
175 }
176
177                         void
178 efx_filter_fini(
179         __in            efx_nic_t *enp)
180 {
181         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
182         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
183         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER);
184
185         enp->en_efop->efo_fini(enp);
186
187         enp->en_efop = NULL;
188         enp->en_mod_flags &= ~EFX_MOD_FILTER;
189 }
190
191 /*
192  * Query the possible combinations of match flags which can be filtered on.
193  * These are returned as a list, of which each 32 bit element is a bitmask
194  * formed of EFX_FILTER_MATCH flags.
195  *
196  * The combinations are ordered in priority from highest to lowest.
197  *
198  * If the provided buffer is too short to hold the list, the call with fail with
199  * ENOSPC and *list_lengthp will be set to the buffer length required.
200  */
201         __checkReturn   efx_rc_t
202 efx_filter_supported_filters(
203         __in                            efx_nic_t *enp,
204         __out_ecount(buffer_length)     uint32_t *buffer,
205         __in                            size_t buffer_length,
206         __out                           size_t *list_lengthp)
207 {
208         efx_rc_t rc;
209
210         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
211         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
212         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER);
213         EFSYS_ASSERT(enp->en_efop->efo_supported_filters != NULL);
214
215         if (buffer == NULL) {
216                 rc = EINVAL;
217                 goto fail1;
218         }
219
220         rc = enp->en_efop->efo_supported_filters(enp, buffer, buffer_length,
221                                                     list_lengthp);
222         if (rc != 0)
223                 goto fail2;
224
225         return (0);
226
227 fail2:
228         EFSYS_PROBE(fail2);
229 fail1:
230         EFSYS_PROBE1(fail1, efx_rc_t, rc);
231
232         return (rc);
233 }
234
235         __checkReturn   efx_rc_t
236 efx_filter_reconfigure(
237         __in                            efx_nic_t *enp,
238         __in_ecount(6)                  uint8_t const *mac_addr,
239         __in                            boolean_t all_unicst,
240         __in                            boolean_t mulcst,
241         __in                            boolean_t all_mulcst,
242         __in                            boolean_t brdcst,
243         __in_ecount(6*count)            uint8_t const *addrs,
244         __in                            uint32_t count)
245 {
246         efx_rc_t rc;
247
248         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
249         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
250         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER);
251
252         if (enp->en_efop->efo_reconfigure != NULL) {
253                 if ((rc = enp->en_efop->efo_reconfigure(enp, mac_addr,
254                                                         all_unicst, mulcst,
255                                                         all_mulcst, brdcst,
256                                                         addrs, count)) != 0)
257                         goto fail1;
258         }
259
260         return (0);
261
262 fail1:
263         EFSYS_PROBE1(fail1, efx_rc_t, rc);
264
265         return (rc);
266 }
267
268                 void
269 efx_filter_spec_init_rx(
270         __out           efx_filter_spec_t *spec,
271         __in            efx_filter_priority_t priority,
272         __in            efx_filter_flags_t flags,
273         __in            efx_rxq_t *erp)
274 {
275         EFSYS_ASSERT3P(spec, !=, NULL);
276         EFSYS_ASSERT3P(erp, !=, NULL);
277         EFSYS_ASSERT((flags & ~(EFX_FILTER_FLAG_RX_RSS |
278                                 EFX_FILTER_FLAG_RX_SCATTER)) == 0);
279
280         memset(spec, 0, sizeof (*spec));
281         spec->efs_priority = priority;
282         spec->efs_flags = EFX_FILTER_FLAG_RX | flags;
283         spec->efs_rss_context = EFX_RSS_CONTEXT_DEFAULT;
284         spec->efs_dmaq_id = (uint16_t)erp->er_index;
285 }
286
287                 void
288 efx_filter_spec_init_tx(
289         __out           efx_filter_spec_t *spec,
290         __in            efx_txq_t *etp)
291 {
292         EFSYS_ASSERT3P(spec, !=, NULL);
293         EFSYS_ASSERT3P(etp, !=, NULL);
294
295         memset(spec, 0, sizeof (*spec));
296         spec->efs_priority = EFX_FILTER_PRI_REQUIRED;
297         spec->efs_flags = EFX_FILTER_FLAG_TX;
298         spec->efs_dmaq_id = (uint16_t)etp->et_index;
299 }
300
301
302 /*
303  *  Specify IPv4 host, transport protocol and port in a filter specification
304  */
305 __checkReturn           efx_rc_t
306 efx_filter_spec_set_ipv4_local(
307         __inout         efx_filter_spec_t *spec,
308         __in            uint8_t proto,
309         __in            uint32_t host,
310         __in            uint16_t port)
311 {
312         EFSYS_ASSERT3P(spec, !=, NULL);
313
314         spec->efs_match_flags |=
315                 EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
316                 EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT;
317         spec->efs_ether_type = EFX_ETHER_TYPE_IPV4;
318         spec->efs_ip_proto = proto;
319         spec->efs_loc_host.eo_u32[0] = host;
320         spec->efs_loc_port = port;
321         return (0);
322 }
323
324 /*
325  * Specify IPv4 hosts, transport protocol and ports in a filter specification
326  */
327 __checkReturn           efx_rc_t
328 efx_filter_spec_set_ipv4_full(
329         __inout         efx_filter_spec_t *spec,
330         __in            uint8_t proto,
331         __in            uint32_t lhost,
332         __in            uint16_t lport,
333         __in            uint32_t rhost,
334         __in            uint16_t rport)
335 {
336         EFSYS_ASSERT3P(spec, !=, NULL);
337
338         spec->efs_match_flags |=
339                 EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
340                 EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT |
341                 EFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_REM_PORT;
342         spec->efs_ether_type = EFX_ETHER_TYPE_IPV4;
343         spec->efs_ip_proto = proto;
344         spec->efs_loc_host.eo_u32[0] = lhost;
345         spec->efs_loc_port = lport;
346         spec->efs_rem_host.eo_u32[0] = rhost;
347         spec->efs_rem_port = rport;
348         return (0);
349 }
350
351 /*
352  * Specify local Ethernet address and/or VID in filter specification
353  */
354 __checkReturn           efx_rc_t
355 efx_filter_spec_set_eth_local(
356         __inout         efx_filter_spec_t *spec,
357         __in            uint16_t vid,
358         __in            const uint8_t *addr)
359 {
360         EFSYS_ASSERT3P(spec, !=, NULL);
361         EFSYS_ASSERT3P(addr, !=, NULL);
362
363         if (vid == EFX_FILTER_SPEC_VID_UNSPEC && addr == NULL)
364                 return (EINVAL);
365
366         if (vid != EFX_FILTER_SPEC_VID_UNSPEC) {
367                 spec->efs_match_flags |= EFX_FILTER_MATCH_OUTER_VID;
368                 spec->efs_outer_vid = vid;
369         }
370         if (addr != NULL) {
371                 spec->efs_match_flags |= EFX_FILTER_MATCH_LOC_MAC;
372                 memcpy(spec->efs_loc_mac, addr, EFX_MAC_ADDR_LEN);
373         }
374         return (0);
375 }
376
377                         void
378 efx_filter_spec_set_ether_type(
379         __inout         efx_filter_spec_t *spec,
380         __in            uint16_t ether_type)
381 {
382         EFSYS_ASSERT3P(spec, !=, NULL);
383
384         spec->efs_ether_type = ether_type;
385         spec->efs_match_flags |= EFX_FILTER_MATCH_ETHER_TYPE;
386 }
387
388 /*
389  * Specify matching otherwise-unmatched unicast in a filter specification
390  */
391 __checkReturn           efx_rc_t
392 efx_filter_spec_set_uc_def(
393         __inout         efx_filter_spec_t *spec)
394 {
395         EFSYS_ASSERT3P(spec, !=, NULL);
396
397         spec->efs_match_flags |= EFX_FILTER_MATCH_UNKNOWN_UCAST_DST;
398         return (0);
399 }
400
401 /*
402  * Specify matching otherwise-unmatched multicast in a filter specification
403  */
404 __checkReturn           efx_rc_t
405 efx_filter_spec_set_mc_def(
406         __inout         efx_filter_spec_t *spec)
407 {
408         EFSYS_ASSERT3P(spec, !=, NULL);
409
410         spec->efs_match_flags |= EFX_FILTER_MATCH_UNKNOWN_MCAST_DST;
411         return (0);
412 }
413
414
415 __checkReturn           efx_rc_t
416 efx_filter_spec_set_encap_type(
417         __inout         efx_filter_spec_t *spec,
418         __in            efx_tunnel_protocol_t encap_type,
419         __in            efx_filter_inner_frame_match_t inner_frame_match)
420 {
421         uint32_t match_flags = 0;
422         uint8_t ip_proto;
423         efx_rc_t rc;
424
425         EFSYS_ASSERT3P(spec, !=, NULL);
426
427         switch (encap_type) {
428         case EFX_TUNNEL_PROTOCOL_VXLAN:
429         case EFX_TUNNEL_PROTOCOL_GENEVE:
430                 ip_proto = EFX_IPPROTO_UDP;
431                 break;
432         case EFX_TUNNEL_PROTOCOL_NVGRE:
433                 ip_proto = EFX_IPPROTO_GRE;
434                 break;
435         default:
436                 EFSYS_ASSERT(0);
437                 rc = EINVAL;
438                 goto fail1;
439         }
440
441         switch (inner_frame_match) {
442         case EFX_FILTER_INNER_FRAME_MATCH_UNKNOWN_MCAST_DST:
443                 match_flags |= EFX_FILTER_MATCH_IFRM_UNKNOWN_MCAST_DST;
444                 break;
445         case EFX_FILTER_INNER_FRAME_MATCH_UNKNOWN_UCAST_DST:
446                 match_flags |= EFX_FILTER_MATCH_IFRM_UNKNOWN_UCAST_DST;
447                 break;
448         case EFX_FILTER_INNER_FRAME_MATCH_OTHER:
449                 /* This is for when specific inner frames are to be matched. */
450                 break;
451         default:
452                 EFSYS_ASSERT(0);
453                 rc = EINVAL;
454                 goto fail2;
455         }
456
457         spec->efs_encap_type = encap_type;
458         spec->efs_ip_proto = ip_proto;
459         spec->efs_match_flags |= (match_flags | EFX_FILTER_MATCH_IP_PROTO);
460
461         return (0);
462
463 fail2:
464         EFSYS_PROBE(fail2);
465 fail1:
466         EFSYS_PROBE1(fail1, efx_rc_t, rc);
467
468         return (rc);
469 }
470
471 #if EFSYS_OPT_RX_SCALE
472         __checkReturn   efx_rc_t
473 efx_filter_spec_set_rss_context(
474         __inout         efx_filter_spec_t *spec,
475         __in            uint32_t rss_context)
476 {
477         efx_rc_t rc;
478
479         EFSYS_ASSERT3P(spec, !=, NULL);
480
481         /* The filter must have been created with EFX_FILTER_FLAG_RX_RSS. */
482         if ((spec->efs_flags & EFX_FILTER_FLAG_RX_RSS) == 0) {
483                 rc = EINVAL;
484                 goto fail1;
485         }
486
487         spec->efs_rss_context = rss_context;
488
489         return (0);
490
491 fail1:
492         EFSYS_PROBE1(fail1, efx_rc_t, rc);
493
494         return (rc);
495 }
496 #endif
497
498 #if EFSYS_OPT_SIENA
499
500 /*
501  * "Fudge factors" - difference between programmed value and actual depth.
502  * Due to pipelined implementation we need to program H/W with a value that
503  * is larger than the hop limit we want.
504  */
505 #define FILTER_CTL_SRCH_FUDGE_WILD 3
506 #define FILTER_CTL_SRCH_FUDGE_FULL 1
507
508 /*
509  * Hard maximum hop limit.  Hardware will time-out beyond 200-something.
510  * We also need to avoid infinite loops in efx_filter_search() when the
511  * table is full.
512  */
513 #define FILTER_CTL_SRCH_MAX 200
514
515 static  __checkReturn   efx_rc_t
516 siena_filter_spec_from_gen_spec(
517         __out           siena_filter_spec_t *sf_spec,
518         __in            efx_filter_spec_t *gen_spec)
519 {
520         efx_rc_t rc;
521         boolean_t is_full = B_FALSE;
522
523         if (gen_spec->efs_flags & EFX_FILTER_FLAG_TX)
524                 EFSYS_ASSERT3U(gen_spec->efs_flags, ==, EFX_FILTER_FLAG_TX);
525         else
526                 EFSYS_ASSERT3U(gen_spec->efs_flags, &, EFX_FILTER_FLAG_RX);
527
528         /* Siena only has one RSS context */
529         if ((gen_spec->efs_flags & EFX_FILTER_FLAG_RX_RSS) &&
530             gen_spec->efs_rss_context != EFX_RSS_CONTEXT_DEFAULT) {
531                 rc = EINVAL;
532                 goto fail1;
533         }
534
535         sf_spec->sfs_flags = gen_spec->efs_flags;
536         sf_spec->sfs_dmaq_id = gen_spec->efs_dmaq_id;
537
538         switch (gen_spec->efs_match_flags) {
539         case EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
540             EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT |
541             EFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_REM_PORT:
542                 is_full = B_TRUE;
543                 /* Fall through */
544         case EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
545             EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT: {
546                 uint32_t rhost, host1, host2;
547                 uint16_t rport, port1, port2;
548
549                 if (gen_spec->efs_ether_type != EFX_ETHER_TYPE_IPV4) {
550                         rc = ENOTSUP;
551                         goto fail2;
552                 }
553                 if (gen_spec->efs_loc_port == 0 ||
554                     (is_full && gen_spec->efs_rem_port == 0)) {
555                         rc = EINVAL;
556                         goto fail3;
557                 }
558                 switch (gen_spec->efs_ip_proto) {
559                 case EFX_IPPROTO_TCP:
560                         if (gen_spec->efs_flags & EFX_FILTER_FLAG_TX) {
561                                 sf_spec->sfs_type = (is_full ?
562                                     EFX_SIENA_FILTER_TX_TCP_FULL :
563                                     EFX_SIENA_FILTER_TX_TCP_WILD);
564                         } else {
565                                 sf_spec->sfs_type = (is_full ?
566                                     EFX_SIENA_FILTER_RX_TCP_FULL :
567                                     EFX_SIENA_FILTER_RX_TCP_WILD);
568                         }
569                         break;
570                 case EFX_IPPROTO_UDP:
571                         if (gen_spec->efs_flags & EFX_FILTER_FLAG_TX) {
572                                 sf_spec->sfs_type = (is_full ?
573                                     EFX_SIENA_FILTER_TX_UDP_FULL :
574                                     EFX_SIENA_FILTER_TX_UDP_WILD);
575                         } else {
576                                 sf_spec->sfs_type = (is_full ?
577                                     EFX_SIENA_FILTER_RX_UDP_FULL :
578                                     EFX_SIENA_FILTER_RX_UDP_WILD);
579                         }
580                         break;
581                 default:
582                         rc = ENOTSUP;
583                         goto fail4;
584                 }
585                 /*
586                  * The filter is constructed in terms of source and destination,
587                  * with the odd wrinkle that the ports are swapped in a UDP
588                  * wildcard filter. We need to convert from local and remote
589                  * addresses (zero for a wildcard).
590                  */
591                 rhost = is_full ? gen_spec->efs_rem_host.eo_u32[0] : 0;
592                 rport = is_full ? gen_spec->efs_rem_port : 0;
593                 if (gen_spec->efs_flags & EFX_FILTER_FLAG_TX) {
594                         host1 = gen_spec->efs_loc_host.eo_u32[0];
595                         host2 = rhost;
596                 } else {
597                         host1 = rhost;
598                         host2 = gen_spec->efs_loc_host.eo_u32[0];
599                 }
600                 if (gen_spec->efs_flags & EFX_FILTER_FLAG_TX) {
601                         if (sf_spec->sfs_type ==
602                             EFX_SIENA_FILTER_TX_UDP_WILD) {
603                                 port1 = rport;
604                                 port2 = gen_spec->efs_loc_port;
605                         } else {
606                                 port1 = gen_spec->efs_loc_port;
607                                 port2 = rport;
608                         }
609                 } else {
610                         if (sf_spec->sfs_type ==
611                             EFX_SIENA_FILTER_RX_UDP_WILD) {
612                                 port1 = gen_spec->efs_loc_port;
613                                 port2 = rport;
614                         } else {
615                                 port1 = rport;
616                                 port2 = gen_spec->efs_loc_port;
617                         }
618                 }
619                 sf_spec->sfs_dword[0] = (host1 << 16) | port1;
620                 sf_spec->sfs_dword[1] = (port2 << 16) | (host1 >> 16);
621                 sf_spec->sfs_dword[2] = host2;
622                 break;
623         }
624
625         case EFX_FILTER_MATCH_LOC_MAC | EFX_FILTER_MATCH_OUTER_VID:
626                 is_full = B_TRUE;
627                 /* Fall through */
628         case EFX_FILTER_MATCH_LOC_MAC:
629                 if (gen_spec->efs_flags & EFX_FILTER_FLAG_TX) {
630                         sf_spec->sfs_type = (is_full ?
631                             EFX_SIENA_FILTER_TX_MAC_FULL :
632                             EFX_SIENA_FILTER_TX_MAC_WILD);
633                 } else {
634                         sf_spec->sfs_type = (is_full ?
635                             EFX_SIENA_FILTER_RX_MAC_FULL :
636                             EFX_SIENA_FILTER_RX_MAC_WILD);
637                 }
638                 sf_spec->sfs_dword[0] = is_full ? gen_spec->efs_outer_vid : 0;
639                 sf_spec->sfs_dword[1] =
640                     gen_spec->efs_loc_mac[2] << 24 |
641                     gen_spec->efs_loc_mac[3] << 16 |
642                     gen_spec->efs_loc_mac[4] <<  8 |
643                     gen_spec->efs_loc_mac[5];
644                 sf_spec->sfs_dword[2] =
645                     gen_spec->efs_loc_mac[0] << 8 |
646                     gen_spec->efs_loc_mac[1];
647                 break;
648
649         default:
650                 EFSYS_ASSERT(B_FALSE);
651                 rc = ENOTSUP;
652                 goto fail5;
653         }
654
655         return (0);
656
657 fail5:
658         EFSYS_PROBE(fail5);
659 fail4:
660         EFSYS_PROBE(fail4);
661 fail3:
662         EFSYS_PROBE(fail3);
663 fail2:
664         EFSYS_PROBE(fail2);
665 fail1:
666         EFSYS_PROBE1(fail1, efx_rc_t, rc);
667
668         return (rc);
669 }
670
671 /*
672  * The filter hash function is LFSR polynomial x^16 + x^3 + 1 of a 32-bit
673  * key derived from the n-tuple.
674  */
675 static                  uint16_t
676 siena_filter_tbl_hash(
677         __in            uint32_t key)
678 {
679         uint16_t tmp;
680
681         /* First 16 rounds */
682         tmp = 0x1fff ^ (uint16_t)(key >> 16);
683         tmp = tmp ^ tmp >> 3 ^ tmp >> 6;
684         tmp = tmp ^ tmp >> 9;
685
686         /* Last 16 rounds */
687         tmp = tmp ^ tmp << 13 ^ (uint16_t)(key & 0xffff);
688         tmp = tmp ^ tmp >> 3 ^ tmp >> 6;
689         tmp = tmp ^ tmp >> 9;
690
691         return (tmp);
692 }
693
694 /*
695  * To allow for hash collisions, filter search continues at these
696  * increments from the first possible entry selected by the hash.
697  */
698 static                  uint16_t
699 siena_filter_tbl_increment(
700         __in            uint32_t key)
701 {
702         return ((uint16_t)(key * 2 - 1));
703 }
704
705 static  __checkReturn   boolean_t
706 siena_filter_test_used(
707         __in            siena_filter_tbl_t *sftp,
708         __in            unsigned int index)
709 {
710         EFSYS_ASSERT3P(sftp->sft_bitmap, !=, NULL);
711         return ((sftp->sft_bitmap[index / 32] & (1 << (index % 32))) != 0);
712 }
713
714 static                  void
715 siena_filter_set_used(
716         __in            siena_filter_tbl_t *sftp,
717         __in            unsigned int index)
718 {
719         EFSYS_ASSERT3P(sftp->sft_bitmap, !=, NULL);
720         sftp->sft_bitmap[index / 32] |= (1 << (index % 32));
721         ++sftp->sft_used;
722 }
723
724 static                  void
725 siena_filter_clear_used(
726         __in            siena_filter_tbl_t *sftp,
727         __in            unsigned int index)
728 {
729         EFSYS_ASSERT3P(sftp->sft_bitmap, !=, NULL);
730         sftp->sft_bitmap[index / 32] &= ~(1 << (index % 32));
731
732         --sftp->sft_used;
733         EFSYS_ASSERT3U(sftp->sft_used, >=, 0);
734 }
735
736
737 static                  siena_filter_tbl_id_t
738 siena_filter_tbl_id(
739         __in            siena_filter_type_t type)
740 {
741         siena_filter_tbl_id_t tbl_id;
742
743         switch (type) {
744         case EFX_SIENA_FILTER_RX_TCP_FULL:
745         case EFX_SIENA_FILTER_RX_TCP_WILD:
746         case EFX_SIENA_FILTER_RX_UDP_FULL:
747         case EFX_SIENA_FILTER_RX_UDP_WILD:
748                 tbl_id = EFX_SIENA_FILTER_TBL_RX_IP;
749                 break;
750
751         case EFX_SIENA_FILTER_RX_MAC_FULL:
752         case EFX_SIENA_FILTER_RX_MAC_WILD:
753                 tbl_id = EFX_SIENA_FILTER_TBL_RX_MAC;
754                 break;
755
756         case EFX_SIENA_FILTER_TX_TCP_FULL:
757         case EFX_SIENA_FILTER_TX_TCP_WILD:
758         case EFX_SIENA_FILTER_TX_UDP_FULL:
759         case EFX_SIENA_FILTER_TX_UDP_WILD:
760                 tbl_id = EFX_SIENA_FILTER_TBL_TX_IP;
761                 break;
762
763         case EFX_SIENA_FILTER_TX_MAC_FULL:
764         case EFX_SIENA_FILTER_TX_MAC_WILD:
765                 tbl_id = EFX_SIENA_FILTER_TBL_TX_MAC;
766                 break;
767
768         default:
769                 EFSYS_ASSERT(B_FALSE);
770                 tbl_id = EFX_SIENA_FILTER_NTBLS;
771                 break;
772         }
773         return (tbl_id);
774 }
775
776 static                  void
777 siena_filter_reset_search_depth(
778         __inout         siena_filter_t *sfp,
779         __in            siena_filter_tbl_id_t tbl_id)
780 {
781         switch (tbl_id) {
782         case EFX_SIENA_FILTER_TBL_RX_IP:
783                 sfp->sf_depth[EFX_SIENA_FILTER_RX_TCP_FULL] = 0;
784                 sfp->sf_depth[EFX_SIENA_FILTER_RX_TCP_WILD] = 0;
785                 sfp->sf_depth[EFX_SIENA_FILTER_RX_UDP_FULL] = 0;
786                 sfp->sf_depth[EFX_SIENA_FILTER_RX_UDP_WILD] = 0;
787                 break;
788
789         case EFX_SIENA_FILTER_TBL_RX_MAC:
790                 sfp->sf_depth[EFX_SIENA_FILTER_RX_MAC_FULL] = 0;
791                 sfp->sf_depth[EFX_SIENA_FILTER_RX_MAC_WILD] = 0;
792                 break;
793
794         case EFX_SIENA_FILTER_TBL_TX_IP:
795                 sfp->sf_depth[EFX_SIENA_FILTER_TX_TCP_FULL] = 0;
796                 sfp->sf_depth[EFX_SIENA_FILTER_TX_TCP_WILD] = 0;
797                 sfp->sf_depth[EFX_SIENA_FILTER_TX_UDP_FULL] = 0;
798                 sfp->sf_depth[EFX_SIENA_FILTER_TX_UDP_WILD] = 0;
799                 break;
800
801         case EFX_SIENA_FILTER_TBL_TX_MAC:
802                 sfp->sf_depth[EFX_SIENA_FILTER_TX_MAC_FULL] = 0;
803                 sfp->sf_depth[EFX_SIENA_FILTER_TX_MAC_WILD] = 0;
804                 break;
805
806         default:
807                 EFSYS_ASSERT(B_FALSE);
808                 break;
809         }
810 }
811
812 static                  void
813 siena_filter_push_rx_limits(
814         __in            efx_nic_t *enp)
815 {
816         siena_filter_t *sfp = enp->en_filter.ef_siena_filter;
817         efx_oword_t oword;
818
819         EFX_BAR_READO(enp, FR_AZ_RX_FILTER_CTL_REG, &oword);
820
821         EFX_SET_OWORD_FIELD(oword, FRF_AZ_TCP_FULL_SRCH_LIMIT,
822             sfp->sf_depth[EFX_SIENA_FILTER_RX_TCP_FULL] +
823             FILTER_CTL_SRCH_FUDGE_FULL);
824         EFX_SET_OWORD_FIELD(oword, FRF_AZ_TCP_WILD_SRCH_LIMIT,
825             sfp->sf_depth[EFX_SIENA_FILTER_RX_TCP_WILD] +
826             FILTER_CTL_SRCH_FUDGE_WILD);
827         EFX_SET_OWORD_FIELD(oword, FRF_AZ_UDP_FULL_SRCH_LIMIT,
828             sfp->sf_depth[EFX_SIENA_FILTER_RX_UDP_FULL] +
829             FILTER_CTL_SRCH_FUDGE_FULL);
830         EFX_SET_OWORD_FIELD(oword, FRF_AZ_UDP_WILD_SRCH_LIMIT,
831             sfp->sf_depth[EFX_SIENA_FILTER_RX_UDP_WILD] +
832             FILTER_CTL_SRCH_FUDGE_WILD);
833
834         if (sfp->sf_tbl[EFX_SIENA_FILTER_TBL_RX_MAC].sft_size) {
835                 EFX_SET_OWORD_FIELD(oword,
836                     FRF_CZ_ETHERNET_FULL_SEARCH_LIMIT,
837                     sfp->sf_depth[EFX_SIENA_FILTER_RX_MAC_FULL] +
838                     FILTER_CTL_SRCH_FUDGE_FULL);
839                 EFX_SET_OWORD_FIELD(oword,
840                     FRF_CZ_ETHERNET_WILDCARD_SEARCH_LIMIT,
841                     sfp->sf_depth[EFX_SIENA_FILTER_RX_MAC_WILD] +
842                     FILTER_CTL_SRCH_FUDGE_WILD);
843         }
844
845         EFX_BAR_WRITEO(enp, FR_AZ_RX_FILTER_CTL_REG, &oword);
846 }
847
848 static                  void
849 siena_filter_push_tx_limits(
850         __in            efx_nic_t *enp)
851 {
852         siena_filter_t *sfp = enp->en_filter.ef_siena_filter;
853         efx_oword_t oword;
854
855         EFX_BAR_READO(enp, FR_AZ_TX_CFG_REG, &oword);
856
857         if (sfp->sf_tbl[EFX_SIENA_FILTER_TBL_TX_IP].sft_size != 0) {
858                 EFX_SET_OWORD_FIELD(oword,
859                     FRF_CZ_TX_TCPIP_FILTER_FULL_SEARCH_RANGE,
860                     sfp->sf_depth[EFX_SIENA_FILTER_TX_TCP_FULL] +
861                     FILTER_CTL_SRCH_FUDGE_FULL);
862                 EFX_SET_OWORD_FIELD(oword,
863                     FRF_CZ_TX_TCPIP_FILTER_WILD_SEARCH_RANGE,
864                     sfp->sf_depth[EFX_SIENA_FILTER_TX_TCP_WILD] +
865                     FILTER_CTL_SRCH_FUDGE_WILD);
866                 EFX_SET_OWORD_FIELD(oword,
867                     FRF_CZ_TX_UDPIP_FILTER_FULL_SEARCH_RANGE,
868                     sfp->sf_depth[EFX_SIENA_FILTER_TX_UDP_FULL] +
869                     FILTER_CTL_SRCH_FUDGE_FULL);
870                 EFX_SET_OWORD_FIELD(oword,
871                     FRF_CZ_TX_UDPIP_FILTER_WILD_SEARCH_RANGE,
872                     sfp->sf_depth[EFX_SIENA_FILTER_TX_UDP_WILD] +
873                     FILTER_CTL_SRCH_FUDGE_WILD);
874         }
875
876         if (sfp->sf_tbl[EFX_SIENA_FILTER_TBL_TX_MAC].sft_size != 0) {
877                 EFX_SET_OWORD_FIELD(
878                         oword, FRF_CZ_TX_ETH_FILTER_FULL_SEARCH_RANGE,
879                         sfp->sf_depth[EFX_SIENA_FILTER_TX_MAC_FULL] +
880                         FILTER_CTL_SRCH_FUDGE_FULL);
881                 EFX_SET_OWORD_FIELD(
882                         oword, FRF_CZ_TX_ETH_FILTER_WILD_SEARCH_RANGE,
883                         sfp->sf_depth[EFX_SIENA_FILTER_TX_MAC_WILD] +
884                         FILTER_CTL_SRCH_FUDGE_WILD);
885         }
886
887         EFX_BAR_WRITEO(enp, FR_AZ_TX_CFG_REG, &oword);
888 }
889
890 /* Build a filter entry and return its n-tuple key. */
891 static  __checkReturn   uint32_t
892 siena_filter_build(
893         __out           efx_oword_t *filter,
894         __in            siena_filter_spec_t *spec)
895 {
896         uint32_t dword3;
897         uint32_t key;
898         uint8_t  type  = spec->sfs_type;
899         uint32_t flags = spec->sfs_flags;
900
901         switch (siena_filter_tbl_id(type)) {
902         case EFX_SIENA_FILTER_TBL_RX_IP: {
903                 boolean_t is_udp = (type == EFX_SIENA_FILTER_RX_UDP_FULL ||
904                     type == EFX_SIENA_FILTER_RX_UDP_WILD);
905                 EFX_POPULATE_OWORD_7(*filter,
906                     FRF_BZ_RSS_EN,
907                     (flags & EFX_FILTER_FLAG_RX_RSS) ? 1 : 0,
908                     FRF_BZ_SCATTER_EN,
909                     (flags & EFX_FILTER_FLAG_RX_SCATTER) ? 1 : 0,
910                     FRF_AZ_TCP_UDP, is_udp,
911                     FRF_AZ_RXQ_ID, spec->sfs_dmaq_id,
912                     EFX_DWORD_2, spec->sfs_dword[2],
913                     EFX_DWORD_1, spec->sfs_dword[1],
914                     EFX_DWORD_0, spec->sfs_dword[0]);
915                 dword3 = is_udp;
916                 break;
917         }
918
919         case EFX_SIENA_FILTER_TBL_RX_MAC: {
920                 boolean_t is_wild = (type == EFX_SIENA_FILTER_RX_MAC_WILD);
921                 EFX_POPULATE_OWORD_7(*filter,
922                     FRF_CZ_RMFT_RSS_EN,
923                     (flags & EFX_FILTER_FLAG_RX_RSS) ? 1 : 0,
924                     FRF_CZ_RMFT_SCATTER_EN,
925                     (flags & EFX_FILTER_FLAG_RX_SCATTER) ? 1 : 0,
926                     FRF_CZ_RMFT_RXQ_ID, spec->sfs_dmaq_id,
927                     FRF_CZ_RMFT_WILDCARD_MATCH, is_wild,
928                     FRF_CZ_RMFT_DEST_MAC_DW1, spec->sfs_dword[2],
929                     FRF_CZ_RMFT_DEST_MAC_DW0, spec->sfs_dword[1],
930                     FRF_CZ_RMFT_VLAN_ID, spec->sfs_dword[0]);
931                 dword3 = is_wild;
932                 break;
933         }
934
935         case EFX_SIENA_FILTER_TBL_TX_IP: {
936                 boolean_t is_udp = (type == EFX_SIENA_FILTER_TX_UDP_FULL ||
937                     type == EFX_SIENA_FILTER_TX_UDP_WILD);
938                 EFX_POPULATE_OWORD_5(*filter,
939                     FRF_CZ_TIFT_TCP_UDP, is_udp,
940                     FRF_CZ_TIFT_TXQ_ID, spec->sfs_dmaq_id,
941                     EFX_DWORD_2, spec->sfs_dword[2],
942                     EFX_DWORD_1, spec->sfs_dword[1],
943                     EFX_DWORD_0, spec->sfs_dword[0]);
944                 dword3 = is_udp | spec->sfs_dmaq_id << 1;
945                 break;
946         }
947
948         case EFX_SIENA_FILTER_TBL_TX_MAC: {
949                 boolean_t is_wild = (type == EFX_SIENA_FILTER_TX_MAC_WILD);
950                 EFX_POPULATE_OWORD_5(*filter,
951                     FRF_CZ_TMFT_TXQ_ID, spec->sfs_dmaq_id,
952                     FRF_CZ_TMFT_WILDCARD_MATCH, is_wild,
953                     FRF_CZ_TMFT_SRC_MAC_DW1, spec->sfs_dword[2],
954                     FRF_CZ_TMFT_SRC_MAC_DW0, spec->sfs_dword[1],
955                     FRF_CZ_TMFT_VLAN_ID, spec->sfs_dword[0]);
956                 dword3 = is_wild | spec->sfs_dmaq_id << 1;
957                 break;
958         }
959
960         default:
961                 EFSYS_ASSERT(B_FALSE);
962                 EFX_ZERO_OWORD(*filter);
963                 return (0);
964         }
965
966         key =
967             spec->sfs_dword[0] ^
968             spec->sfs_dword[1] ^
969             spec->sfs_dword[2] ^
970             dword3;
971
972         return (key);
973 }
974
975 static  __checkReturn           efx_rc_t
976 siena_filter_push_entry(
977         __inout                 efx_nic_t *enp,
978         __in                    siena_filter_type_t type,
979         __in                    int index,
980         __in                    efx_oword_t *eop)
981 {
982         efx_rc_t rc;
983
984         switch (type) {
985         case EFX_SIENA_FILTER_RX_TCP_FULL:
986         case EFX_SIENA_FILTER_RX_TCP_WILD:
987         case EFX_SIENA_FILTER_RX_UDP_FULL:
988         case EFX_SIENA_FILTER_RX_UDP_WILD:
989                 EFX_BAR_TBL_WRITEO(enp, FR_AZ_RX_FILTER_TBL0, index,
990                     eop, B_TRUE);
991                 break;
992
993         case EFX_SIENA_FILTER_RX_MAC_FULL:
994         case EFX_SIENA_FILTER_RX_MAC_WILD:
995                 EFX_BAR_TBL_WRITEO(enp, FR_CZ_RX_MAC_FILTER_TBL0, index,
996                     eop, B_TRUE);
997                 break;
998
999         case EFX_SIENA_FILTER_TX_TCP_FULL:
1000         case EFX_SIENA_FILTER_TX_TCP_WILD:
1001         case EFX_SIENA_FILTER_TX_UDP_FULL:
1002         case EFX_SIENA_FILTER_TX_UDP_WILD:
1003                 EFX_BAR_TBL_WRITEO(enp, FR_CZ_TX_FILTER_TBL0, index,
1004                     eop, B_TRUE);
1005                 break;
1006
1007         case EFX_SIENA_FILTER_TX_MAC_FULL:
1008         case EFX_SIENA_FILTER_TX_MAC_WILD:
1009                 EFX_BAR_TBL_WRITEO(enp, FR_CZ_TX_MAC_FILTER_TBL0, index,
1010                     eop, B_TRUE);
1011                 break;
1012
1013         default:
1014                 EFSYS_ASSERT(B_FALSE);
1015                 rc = ENOTSUP;
1016                 goto fail1;
1017         }
1018         return (0);
1019
1020 fail1:
1021         return (rc);
1022 }
1023
1024
1025 static  __checkReturn   boolean_t
1026 siena_filter_equal(
1027         __in            const siena_filter_spec_t *left,
1028         __in            const siena_filter_spec_t *right)
1029 {
1030         siena_filter_tbl_id_t tbl_id;
1031
1032         tbl_id = siena_filter_tbl_id(left->sfs_type);
1033
1034
1035         if (left->sfs_type != right->sfs_type)
1036                 return (B_FALSE);
1037
1038         if (memcmp(left->sfs_dword, right->sfs_dword,
1039                 sizeof (left->sfs_dword)))
1040                 return (B_FALSE);
1041
1042         if ((tbl_id == EFX_SIENA_FILTER_TBL_TX_IP ||
1043                 tbl_id == EFX_SIENA_FILTER_TBL_TX_MAC) &&
1044             left->sfs_dmaq_id != right->sfs_dmaq_id)
1045                 return (B_FALSE);
1046
1047         return (B_TRUE);
1048 }
1049
1050 static  __checkReturn   efx_rc_t
1051 siena_filter_search(
1052         __in            siena_filter_tbl_t *sftp,
1053         __in            siena_filter_spec_t *spec,
1054         __in            uint32_t key,
1055         __in            boolean_t for_insert,
1056         __out           int *filter_index,
1057         __out           unsigned int *depth_required)
1058 {
1059         unsigned int hash, incr, filter_idx, depth;
1060
1061         hash = siena_filter_tbl_hash(key);
1062         incr = siena_filter_tbl_increment(key);
1063
1064         filter_idx = hash & (sftp->sft_size - 1);
1065         depth = 1;
1066
1067         for (;;) {
1068                 /*
1069                  * Return success if entry is used and matches this spec
1070                  * or entry is unused and we are trying to insert.
1071                  */
1072                 if (siena_filter_test_used(sftp, filter_idx) ?
1073                     siena_filter_equal(spec,
1074                     &sftp->sft_spec[filter_idx]) :
1075                     for_insert) {
1076                         *filter_index = filter_idx;
1077                         *depth_required = depth;
1078                         return (0);
1079                 }
1080
1081                 /* Return failure if we reached the maximum search depth */
1082                 if (depth == FILTER_CTL_SRCH_MAX)
1083                         return (for_insert ? EBUSY : ENOENT);
1084
1085                 filter_idx = (filter_idx + incr) & (sftp->sft_size - 1);
1086                 ++depth;
1087         }
1088 }
1089
1090 static                  void
1091 siena_filter_clear_entry(
1092         __in            efx_nic_t *enp,
1093         __in            siena_filter_tbl_t *sftp,
1094         __in            int index)
1095 {
1096         efx_oword_t filter;
1097
1098         if (siena_filter_test_used(sftp, index)) {
1099                 siena_filter_clear_used(sftp, index);
1100
1101                 EFX_ZERO_OWORD(filter);
1102                 siena_filter_push_entry(enp,
1103                     sftp->sft_spec[index].sfs_type,
1104                     index, &filter);
1105
1106                 memset(&sftp->sft_spec[index],
1107                     0, sizeof (sftp->sft_spec[0]));
1108         }
1109 }
1110
1111                         void
1112 siena_filter_tbl_clear(
1113         __in            efx_nic_t *enp,
1114         __in            siena_filter_tbl_id_t tbl_id)
1115 {
1116         siena_filter_t *sfp = enp->en_filter.ef_siena_filter;
1117         siena_filter_tbl_t *sftp = &sfp->sf_tbl[tbl_id];
1118         int index;
1119         efsys_lock_state_t state;
1120
1121         EFSYS_LOCK(enp->en_eslp, state);
1122
1123         for (index = 0; index < sftp->sft_size; ++index) {
1124                 siena_filter_clear_entry(enp, sftp, index);
1125         }
1126
1127         if (sftp->sft_used == 0)
1128                 siena_filter_reset_search_depth(sfp, tbl_id);
1129
1130         EFSYS_UNLOCK(enp->en_eslp, state);
1131 }
1132
1133 static  __checkReturn   efx_rc_t
1134 siena_filter_init(
1135         __in            efx_nic_t *enp)
1136 {
1137         siena_filter_t *sfp;
1138         siena_filter_tbl_t *sftp;
1139         int tbl_id;
1140         efx_rc_t rc;
1141
1142         EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (siena_filter_t), sfp);
1143
1144         if (!sfp) {
1145                 rc = ENOMEM;
1146                 goto fail1;
1147         }
1148
1149         enp->en_filter.ef_siena_filter = sfp;
1150
1151         switch (enp->en_family) {
1152         case EFX_FAMILY_SIENA:
1153                 sftp = &sfp->sf_tbl[EFX_SIENA_FILTER_TBL_RX_IP];
1154                 sftp->sft_size = FR_AZ_RX_FILTER_TBL0_ROWS;
1155
1156                 sftp = &sfp->sf_tbl[EFX_SIENA_FILTER_TBL_RX_MAC];
1157                 sftp->sft_size = FR_CZ_RX_MAC_FILTER_TBL0_ROWS;
1158
1159                 sftp = &sfp->sf_tbl[EFX_SIENA_FILTER_TBL_TX_IP];
1160                 sftp->sft_size = FR_CZ_TX_FILTER_TBL0_ROWS;
1161
1162                 sftp = &sfp->sf_tbl[EFX_SIENA_FILTER_TBL_TX_MAC];
1163                 sftp->sft_size = FR_CZ_TX_MAC_FILTER_TBL0_ROWS;
1164                 break;
1165
1166         default:
1167                 rc = ENOTSUP;
1168                 goto fail2;
1169         }
1170
1171         for (tbl_id = 0; tbl_id < EFX_SIENA_FILTER_NTBLS; tbl_id++) {
1172                 unsigned int bitmap_size;
1173
1174                 sftp = &sfp->sf_tbl[tbl_id];
1175                 if (sftp->sft_size == 0)
1176                         continue;
1177
1178                 EFX_STATIC_ASSERT(sizeof (sftp->sft_bitmap[0]) ==
1179                     sizeof (uint32_t));
1180                 bitmap_size =
1181                     (sftp->sft_size + (sizeof (uint32_t) * 8) - 1) / 8;
1182
1183                 EFSYS_KMEM_ALLOC(enp->en_esip, bitmap_size, sftp->sft_bitmap);
1184                 if (!sftp->sft_bitmap) {
1185                         rc = ENOMEM;
1186                         goto fail3;
1187                 }
1188
1189                 EFSYS_KMEM_ALLOC(enp->en_esip,
1190                     sftp->sft_size * sizeof (*sftp->sft_spec),
1191                     sftp->sft_spec);
1192                 if (!sftp->sft_spec) {
1193                         rc = ENOMEM;
1194                         goto fail4;
1195                 }
1196                 memset(sftp->sft_spec, 0,
1197                     sftp->sft_size * sizeof (*sftp->sft_spec));
1198         }
1199
1200         return (0);
1201
1202 fail4:
1203         EFSYS_PROBE(fail4);
1204
1205 fail3:
1206         EFSYS_PROBE(fail3);
1207
1208 fail2:
1209         EFSYS_PROBE(fail2);
1210         siena_filter_fini(enp);
1211
1212 fail1:
1213         EFSYS_PROBE1(fail1, efx_rc_t, rc);
1214         return (rc);
1215 }
1216
1217 static                  void
1218 siena_filter_fini(
1219         __in            efx_nic_t *enp)
1220 {
1221         siena_filter_t *sfp = enp->en_filter.ef_siena_filter;
1222         siena_filter_tbl_id_t tbl_id;
1223
1224         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
1225         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
1226
1227         if (sfp == NULL)
1228                 return;
1229
1230         for (tbl_id = 0; tbl_id < EFX_SIENA_FILTER_NTBLS; tbl_id++) {
1231                 siena_filter_tbl_t *sftp = &sfp->sf_tbl[tbl_id];
1232                 unsigned int bitmap_size;
1233
1234                 EFX_STATIC_ASSERT(sizeof (sftp->sft_bitmap[0]) ==
1235                     sizeof (uint32_t));
1236                 bitmap_size =
1237                     (sftp->sft_size + (sizeof (uint32_t) * 8) - 1) / 8;
1238
1239                 if (sftp->sft_bitmap != NULL) {
1240                         EFSYS_KMEM_FREE(enp->en_esip, bitmap_size,
1241                             sftp->sft_bitmap);
1242                         sftp->sft_bitmap = NULL;
1243                 }
1244
1245                 if (sftp->sft_spec != NULL) {
1246                         EFSYS_KMEM_FREE(enp->en_esip, sftp->sft_size *
1247                             sizeof (*sftp->sft_spec), sftp->sft_spec);
1248                         sftp->sft_spec = NULL;
1249                 }
1250         }
1251
1252         EFSYS_KMEM_FREE(enp->en_esip, sizeof (siena_filter_t),
1253             enp->en_filter.ef_siena_filter);
1254 }
1255
1256 /* Restore filter state after a reset */
1257 static  __checkReturn   efx_rc_t
1258 siena_filter_restore(
1259         __in            efx_nic_t *enp)
1260 {
1261         siena_filter_t *sfp = enp->en_filter.ef_siena_filter;
1262         siena_filter_tbl_id_t tbl_id;
1263         siena_filter_tbl_t *sftp;
1264         siena_filter_spec_t *spec;
1265         efx_oword_t filter;
1266         int filter_idx;
1267         efsys_lock_state_t state;
1268         uint32_t key;
1269         efx_rc_t rc;
1270
1271         EFSYS_LOCK(enp->en_eslp, state);
1272
1273         for (tbl_id = 0; tbl_id < EFX_SIENA_FILTER_NTBLS; tbl_id++) {
1274                 sftp = &sfp->sf_tbl[tbl_id];
1275                 for (filter_idx = 0;
1276                         filter_idx < sftp->sft_size;
1277                         filter_idx++) {
1278                         if (!siena_filter_test_used(sftp, filter_idx))
1279                                 continue;
1280
1281                         spec = &sftp->sft_spec[filter_idx];
1282                         if ((key = siena_filter_build(&filter, spec)) == 0) {
1283                                 rc = EINVAL;
1284                                 goto fail1;
1285                         }
1286                         if ((rc = siena_filter_push_entry(enp,
1287                                     spec->sfs_type, filter_idx, &filter)) != 0)
1288                                 goto fail2;
1289                 }
1290         }
1291
1292         siena_filter_push_rx_limits(enp);
1293         siena_filter_push_tx_limits(enp);
1294
1295         EFSYS_UNLOCK(enp->en_eslp, state);
1296
1297         return (0);
1298
1299 fail2:
1300         EFSYS_PROBE(fail2);
1301
1302 fail1:
1303         EFSYS_PROBE1(fail1, efx_rc_t, rc);
1304
1305         EFSYS_UNLOCK(enp->en_eslp, state);
1306
1307         return (rc);
1308 }
1309
1310 static   __checkReturn  efx_rc_t
1311 siena_filter_add(
1312         __in            efx_nic_t *enp,
1313         __inout         efx_filter_spec_t *spec,
1314         __in            boolean_t may_replace)
1315 {
1316         efx_rc_t rc;
1317         siena_filter_spec_t sf_spec;
1318         siena_filter_t *sfp = enp->en_filter.ef_siena_filter;
1319         siena_filter_tbl_id_t tbl_id;
1320         siena_filter_tbl_t *sftp;
1321         siena_filter_spec_t *saved_sf_spec;
1322         efx_oword_t filter;
1323         int filter_idx;
1324         unsigned int depth;
1325         efsys_lock_state_t state;
1326         uint32_t key;
1327
1328
1329         EFSYS_ASSERT3P(spec, !=, NULL);
1330
1331         if ((rc = siena_filter_spec_from_gen_spec(&sf_spec, spec)) != 0)
1332                 goto fail1;
1333
1334         tbl_id = siena_filter_tbl_id(sf_spec.sfs_type);
1335         sftp = &sfp->sf_tbl[tbl_id];
1336
1337         if (sftp->sft_size == 0) {
1338                 rc = EINVAL;
1339                 goto fail2;
1340         }
1341
1342         key = siena_filter_build(&filter, &sf_spec);
1343
1344         EFSYS_LOCK(enp->en_eslp, state);
1345
1346         rc = siena_filter_search(sftp, &sf_spec, key, B_TRUE,
1347             &filter_idx, &depth);
1348         if (rc != 0)
1349                 goto fail3;
1350
1351         EFSYS_ASSERT3U(filter_idx, <, sftp->sft_size);
1352         saved_sf_spec = &sftp->sft_spec[filter_idx];
1353
1354         if (siena_filter_test_used(sftp, filter_idx)) {
1355                 if (may_replace == B_FALSE) {
1356                         rc = EEXIST;
1357                         goto fail4;
1358                 }
1359         }
1360         siena_filter_set_used(sftp, filter_idx);
1361         *saved_sf_spec = sf_spec;
1362
1363         if (sfp->sf_depth[sf_spec.sfs_type] < depth) {
1364                 sfp->sf_depth[sf_spec.sfs_type] = depth;
1365                 if (tbl_id == EFX_SIENA_FILTER_TBL_TX_IP ||
1366                     tbl_id == EFX_SIENA_FILTER_TBL_TX_MAC)
1367                         siena_filter_push_tx_limits(enp);
1368                 else
1369                         siena_filter_push_rx_limits(enp);
1370         }
1371
1372         siena_filter_push_entry(enp, sf_spec.sfs_type,
1373             filter_idx, &filter);
1374
1375         EFSYS_UNLOCK(enp->en_eslp, state);
1376         return (0);
1377
1378 fail4:
1379         EFSYS_PROBE(fail4);
1380
1381 fail3:
1382         EFSYS_UNLOCK(enp->en_eslp, state);
1383         EFSYS_PROBE(fail3);
1384
1385 fail2:
1386         EFSYS_PROBE(fail2);
1387
1388 fail1:
1389         EFSYS_PROBE1(fail1, efx_rc_t, rc);
1390         return (rc);
1391 }
1392
1393 static   __checkReturn  efx_rc_t
1394 siena_filter_delete(
1395         __in            efx_nic_t *enp,
1396         __inout         efx_filter_spec_t *spec)
1397 {
1398         efx_rc_t rc;
1399         siena_filter_spec_t sf_spec;
1400         siena_filter_t *sfp = enp->en_filter.ef_siena_filter;
1401         siena_filter_tbl_id_t tbl_id;
1402         siena_filter_tbl_t *sftp;
1403         efx_oword_t filter;
1404         int filter_idx;
1405         unsigned int depth;
1406         efsys_lock_state_t state;
1407         uint32_t key;
1408
1409         EFSYS_ASSERT3P(spec, !=, NULL);
1410
1411         if ((rc = siena_filter_spec_from_gen_spec(&sf_spec, spec)) != 0)
1412                 goto fail1;
1413
1414         tbl_id = siena_filter_tbl_id(sf_spec.sfs_type);
1415         sftp = &sfp->sf_tbl[tbl_id];
1416
1417         key = siena_filter_build(&filter, &sf_spec);
1418
1419         EFSYS_LOCK(enp->en_eslp, state);
1420
1421         rc = siena_filter_search(sftp, &sf_spec, key, B_FALSE,
1422             &filter_idx, &depth);
1423         if (rc != 0)
1424                 goto fail2;
1425
1426         siena_filter_clear_entry(enp, sftp, filter_idx);
1427         if (sftp->sft_used == 0)
1428                 siena_filter_reset_search_depth(sfp, tbl_id);
1429
1430         EFSYS_UNLOCK(enp->en_eslp, state);
1431         return (0);
1432
1433 fail2:
1434         EFSYS_UNLOCK(enp->en_eslp, state);
1435         EFSYS_PROBE(fail2);
1436
1437 fail1:
1438         EFSYS_PROBE1(fail1, efx_rc_t, rc);
1439         return (rc);
1440 }
1441
1442 #define SIENA_MAX_SUPPORTED_MATCHES 4
1443
1444 static  __checkReturn   efx_rc_t
1445 siena_filter_supported_filters(
1446         __in                            efx_nic_t *enp,
1447         __out_ecount(buffer_length)     uint32_t *buffer,
1448         __in                            size_t buffer_length,
1449         __out                           size_t *list_lengthp)
1450 {
1451         uint32_t index = 0;
1452         uint32_t rx_matches[SIENA_MAX_SUPPORTED_MATCHES];
1453         size_t list_length;
1454         efx_rc_t rc;
1455
1456         rx_matches[index++] =
1457             EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
1458             EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT |
1459             EFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_REM_PORT;
1460
1461         rx_matches[index++] =
1462             EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
1463             EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT;
1464
1465         if (enp->en_features & EFX_FEATURE_MAC_HEADER_FILTERS) {
1466                 rx_matches[index++] =
1467                     EFX_FILTER_MATCH_OUTER_VID | EFX_FILTER_MATCH_LOC_MAC;
1468
1469                 rx_matches[index++] = EFX_FILTER_MATCH_LOC_MAC;
1470         }
1471
1472         EFSYS_ASSERT3U(index, <=, SIENA_MAX_SUPPORTED_MATCHES);
1473         list_length = index;
1474
1475         *list_lengthp = list_length;
1476
1477         if (buffer_length < list_length) {
1478                 rc = ENOSPC;
1479                 goto fail1;
1480         }
1481
1482         memcpy(buffer, rx_matches, list_length * sizeof (rx_matches[0]));
1483
1484         return (0);
1485
1486 fail1:
1487         EFSYS_PROBE1(fail1, efx_rc_t, rc);
1488
1489         return (rc);
1490 }
1491
1492 #undef MAX_SUPPORTED
1493
1494 #endif /* EFSYS_OPT_SIENA */
1495
1496 #endif /* EFSYS_OPT_FILTER */