2 * Copyright (c) 2008-2016 Solarflare Communications Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * The views and conclusions contained in the software and documentation are
27 * those of the authors and should not be interpreted as representing official
28 * policies, either expressed or implied, of the FreeBSD Project.
37 * There are three versions of the MCDI interface:
38 * - MCDIv0: Siena BootROM. Transport uses MCDIv1 headers.
39 * - MCDIv1: Siena firmware and Huntington BootROM.
40 * - MCDIv2: EF10 firmware (Huntington/Medford) and Medford BootROM.
41 * Transport uses MCDIv2 headers.
43 * MCDIv2 Header NOT_EPOCH flag
44 * ----------------------------
45 * A new epoch begins at initial startup or after an MC reboot, and defines when
46 * the MC should reject stale MCDI requests.
48 * The first MCDI request sent by the host should contain NOT_EPOCH=0, and all
49 * subsequent requests (until the next MC reboot) should contain NOT_EPOCH=1.
51 * After rebooting the MC will fail all requests with NOT_EPOCH=1 by writing a
52 * response with ERROR=1 and DATALEN=0 until a request is seen with NOT_EPOCH=0.
59 static const efx_mcdi_ops_t __efx_mcdi_siena_ops = {
60 siena_mcdi_init, /* emco_init */
61 siena_mcdi_send_request, /* emco_send_request */
62 siena_mcdi_poll_reboot, /* emco_poll_reboot */
63 siena_mcdi_poll_response, /* emco_poll_response */
64 siena_mcdi_read_response, /* emco_read_response */
65 siena_mcdi_fini, /* emco_fini */
66 siena_mcdi_feature_supported, /* emco_feature_supported */
67 siena_mcdi_get_timeout, /* emco_get_timeout */
70 #endif /* EFSYS_OPT_SIENA */
72 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
74 static const efx_mcdi_ops_t __efx_mcdi_ef10_ops = {
75 ef10_mcdi_init, /* emco_init */
76 ef10_mcdi_send_request, /* emco_send_request */
77 ef10_mcdi_poll_reboot, /* emco_poll_reboot */
78 ef10_mcdi_poll_response, /* emco_poll_response */
79 ef10_mcdi_read_response, /* emco_read_response */
80 ef10_mcdi_fini, /* emco_fini */
81 ef10_mcdi_feature_supported, /* emco_feature_supported */
82 ef10_mcdi_get_timeout, /* emco_get_timeout */
85 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */
89 __checkReturn efx_rc_t
92 __in const efx_mcdi_transport_t *emtp)
94 const efx_mcdi_ops_t *emcop;
97 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
98 EFSYS_ASSERT3U(enp->en_mod_flags, ==, 0);
100 switch (enp->en_family) {
102 case EFX_FAMILY_SIENA:
103 emcop = &__efx_mcdi_siena_ops;
105 #endif /* EFSYS_OPT_SIENA */
107 #if EFSYS_OPT_HUNTINGTON
108 case EFX_FAMILY_HUNTINGTON:
109 emcop = &__efx_mcdi_ef10_ops;
111 #endif /* EFSYS_OPT_HUNTINGTON */
113 #if EFSYS_OPT_MEDFORD
114 case EFX_FAMILY_MEDFORD:
115 emcop = &__efx_mcdi_ef10_ops;
117 #endif /* EFSYS_OPT_MEDFORD */
125 if (enp->en_features & EFX_FEATURE_MCDI_DMA) {
126 /* MCDI requires a DMA buffer in host memory */
127 if ((emtp == NULL) || (emtp->emt_dma_mem) == NULL) {
132 enp->en_mcdi.em_emtp = emtp;
134 if (emcop != NULL && emcop->emco_init != NULL) {
135 if ((rc = emcop->emco_init(enp, emtp)) != 0)
139 enp->en_mcdi.em_emcop = emcop;
140 enp->en_mod_flags |= EFX_MOD_MCDI;
149 EFSYS_PROBE1(fail1, efx_rc_t, rc);
151 enp->en_mcdi.em_emcop = NULL;
152 enp->en_mcdi.em_emtp = NULL;
153 enp->en_mod_flags &= ~EFX_MOD_MCDI;
162 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
163 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
165 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
166 EFSYS_ASSERT3U(enp->en_mod_flags, ==, EFX_MOD_MCDI);
168 if (emcop != NULL && emcop->emco_fini != NULL)
169 emcop->emco_fini(enp);
172 emip->emi_aborted = 0;
174 enp->en_mcdi.em_emcop = NULL;
175 enp->en_mod_flags &= ~EFX_MOD_MCDI;
182 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
183 efsys_lock_state_t state;
185 /* Start a new epoch (allow fresh MCDI requests to succeed) */
186 EFSYS_LOCK(enp->en_eslp, state);
187 emip->emi_new_epoch = B_TRUE;
188 EFSYS_UNLOCK(enp->en_eslp, state);
192 efx_mcdi_send_request(
199 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
201 emcop->emco_send_request(enp, hdrp, hdr_len, sdup, sdu_len);
205 efx_mcdi_poll_reboot(
208 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
211 rc = emcop->emco_poll_reboot(enp);
216 efx_mcdi_poll_response(
219 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
222 available = emcop->emco_poll_response(enp);
227 efx_mcdi_read_response(
233 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
235 emcop->emco_read_response(enp, bufferp, offset, length);
239 efx_mcdi_request_start(
241 __in efx_mcdi_req_t *emrp,
242 __in boolean_t ev_cpl)
244 #if EFSYS_OPT_MCDI_LOGGING
245 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
247 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
250 unsigned int max_version;
254 efsys_lock_state_t state;
256 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
257 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
258 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
261 * efx_mcdi_request_start() is naturally serialised against both
262 * efx_mcdi_request_poll() and efx_mcdi_ev_cpl()/efx_mcdi_ev_death(),
263 * by virtue of there only being one outstanding MCDI request.
264 * Unfortunately, upper layers may also call efx_mcdi_request_abort()
265 * at any time, to timeout a pending mcdi request, That request may
266 * then subsequently complete, meaning efx_mcdi_ev_cpl() or
267 * efx_mcdi_ev_death() may end up running in parallel with
268 * efx_mcdi_request_start(). This race is handled by ensuring that
269 * %emi_pending_req, %emi_ev_cpl and %emi_seq are protected by the
272 EFSYS_LOCK(enp->en_eslp, state);
273 EFSYS_ASSERT(emip->emi_pending_req == NULL);
274 emip->emi_pending_req = emrp;
275 emip->emi_ev_cpl = ev_cpl;
276 emip->emi_poll_cnt = 0;
277 seq = emip->emi_seq++ & EFX_MASK32(MCDI_HEADER_SEQ);
278 new_epoch = emip->emi_new_epoch;
279 max_version = emip->emi_max_version;
280 EFSYS_UNLOCK(enp->en_eslp, state);
284 xflags |= MCDI_HEADER_XFLAGS_EVREQ;
287 * Huntington firmware supports MCDIv2, but the Huntington BootROM only
288 * supports MCDIv1. Use MCDIv1 headers for MCDIv1 commands where
289 * possible to support this.
291 if ((max_version >= 2) &&
292 ((emrp->emr_cmd > MC_CMD_CMD_SPACE_ESCAPE_7) ||
293 (emrp->emr_in_length > MCDI_CTL_SDU_LEN_MAX_V1) ||
294 (emrp->emr_out_length > MCDI_CTL_SDU_LEN_MAX_V1))) {
295 /* Construct MCDI v2 header */
296 hdr_len = sizeof (hdr);
297 EFX_POPULATE_DWORD_8(hdr[0],
298 MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
299 MCDI_HEADER_RESYNC, 1,
300 MCDI_HEADER_DATALEN, 0,
301 MCDI_HEADER_SEQ, seq,
302 MCDI_HEADER_NOT_EPOCH, new_epoch ? 0 : 1,
303 MCDI_HEADER_ERROR, 0,
304 MCDI_HEADER_RESPONSE, 0,
305 MCDI_HEADER_XFLAGS, xflags);
307 EFX_POPULATE_DWORD_2(hdr[1],
308 MC_CMD_V2_EXTN_IN_EXTENDED_CMD, emrp->emr_cmd,
309 MC_CMD_V2_EXTN_IN_ACTUAL_LEN, emrp->emr_in_length);
311 /* Construct MCDI v1 header */
312 hdr_len = sizeof (hdr[0]);
313 EFX_POPULATE_DWORD_8(hdr[0],
314 MCDI_HEADER_CODE, emrp->emr_cmd,
315 MCDI_HEADER_RESYNC, 1,
316 MCDI_HEADER_DATALEN, emrp->emr_in_length,
317 MCDI_HEADER_SEQ, seq,
318 MCDI_HEADER_NOT_EPOCH, new_epoch ? 0 : 1,
319 MCDI_HEADER_ERROR, 0,
320 MCDI_HEADER_RESPONSE, 0,
321 MCDI_HEADER_XFLAGS, xflags);
324 #if EFSYS_OPT_MCDI_LOGGING
325 if (emtp->emt_logger != NULL) {
326 emtp->emt_logger(emtp->emt_context, EFX_LOG_MCDI_REQUEST,
328 emrp->emr_in_buf, emrp->emr_in_length);
330 #endif /* EFSYS_OPT_MCDI_LOGGING */
332 efx_mcdi_send_request(enp, &hdr[0], hdr_len,
333 emrp->emr_in_buf, emrp->emr_in_length);
338 efx_mcdi_read_response_header(
340 __inout efx_mcdi_req_t *emrp)
342 #if EFSYS_OPT_MCDI_LOGGING
343 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
344 #endif /* EFSYS_OPT_MCDI_LOGGING */
345 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
347 unsigned int hdr_len;
348 unsigned int data_len;
354 EFSYS_ASSERT(emrp != NULL);
356 efx_mcdi_read_response(enp, &hdr[0], 0, sizeof (hdr[0]));
357 hdr_len = sizeof (hdr[0]);
359 cmd = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_CODE);
360 seq = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_SEQ);
361 error = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_ERROR);
363 if (cmd != MC_CMD_V2_EXTN) {
364 data_len = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_DATALEN);
366 efx_mcdi_read_response(enp, &hdr[1], hdr_len, sizeof (hdr[1]));
367 hdr_len += sizeof (hdr[1]);
369 cmd = EFX_DWORD_FIELD(hdr[1], MC_CMD_V2_EXTN_IN_EXTENDED_CMD);
371 EFX_DWORD_FIELD(hdr[1], MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
374 if (error && (data_len == 0)) {
375 /* The MC has rebooted since the request was sent. */
376 EFSYS_SPIN(EFX_MCDI_STATUS_SLEEP_US);
377 efx_mcdi_poll_reboot(enp);
381 if ((cmd != emrp->emr_cmd) ||
382 (seq != ((emip->emi_seq - 1) & EFX_MASK32(MCDI_HEADER_SEQ)))) {
383 /* Response is for a different request */
389 unsigned int err_len = MIN(data_len, sizeof (err));
390 int err_code = MC_CMD_ERR_EPROTO;
393 /* Read error code (and arg num for MCDI v2 commands) */
394 efx_mcdi_read_response(enp, &err, hdr_len, err_len);
396 if (err_len >= (MC_CMD_ERR_CODE_OFST + sizeof (efx_dword_t)))
397 err_code = EFX_DWORD_FIELD(err[0], EFX_DWORD_0);
399 if (err_len >= (MC_CMD_ERR_ARG_OFST + sizeof (efx_dword_t)))
400 err_arg = EFX_DWORD_FIELD(err[1], EFX_DWORD_0);
402 emrp->emr_err_code = err_code;
403 emrp->emr_err_arg = err_arg;
405 #if EFSYS_OPT_MCDI_PROXY_AUTH
406 if ((err_code == MC_CMD_ERR_PROXY_PENDING) &&
407 (err_len == sizeof (err))) {
409 * The MCDI request would normally fail with EPERM, but
410 * firmware has forwarded it to an authorization agent
411 * attached to a privileged PF.
413 * Save the authorization request handle. The client
414 * must wait for a PROXY_RESPONSE event, or timeout.
416 emrp->emr_proxy_handle = err_arg;
418 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH */
420 #if EFSYS_OPT_MCDI_LOGGING
421 if (emtp->emt_logger != NULL) {
422 emtp->emt_logger(emtp->emt_context,
423 EFX_LOG_MCDI_RESPONSE,
427 #endif /* EFSYS_OPT_MCDI_LOGGING */
429 if (!emrp->emr_quiet) {
430 EFSYS_PROBE3(mcdi_err_arg, int, emrp->emr_cmd,
431 int, err_code, int, err_arg);
434 rc = efx_mcdi_request_errcode(err_code);
439 emrp->emr_out_length_used = data_len;
440 #if EFSYS_OPT_MCDI_PROXY_AUTH
441 emrp->emr_proxy_handle = 0;
442 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH */
449 emrp->emr_out_length_used = 0;
453 efx_mcdi_finish_response(
455 __in efx_mcdi_req_t *emrp)
457 #if EFSYS_OPT_MCDI_LOGGING
458 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
459 #endif /* EFSYS_OPT_MCDI_LOGGING */
461 unsigned int hdr_len;
464 if (emrp->emr_out_buf == NULL)
467 /* Read the command header to detect MCDI response format */
468 hdr_len = sizeof (hdr[0]);
469 efx_mcdi_read_response(enp, &hdr[0], 0, hdr_len);
470 if (EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_CODE) == MC_CMD_V2_EXTN) {
472 * Read the actual payload length. The length given in the event
473 * is only correct for responses with the V1 format.
475 efx_mcdi_read_response(enp, &hdr[1], hdr_len, sizeof (hdr[1]));
476 hdr_len += sizeof (hdr[1]);
478 emrp->emr_out_length_used = EFX_DWORD_FIELD(hdr[1],
479 MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
482 /* Copy payload out into caller supplied buffer */
483 bytes = MIN(emrp->emr_out_length_used, emrp->emr_out_length);
484 efx_mcdi_read_response(enp, emrp->emr_out_buf, hdr_len, bytes);
486 #if EFSYS_OPT_MCDI_LOGGING
487 if (emtp->emt_logger != NULL) {
488 emtp->emt_logger(emtp->emt_context,
489 EFX_LOG_MCDI_RESPONSE,
491 emrp->emr_out_buf, bytes);
493 #endif /* EFSYS_OPT_MCDI_LOGGING */
497 __checkReturn boolean_t
498 efx_mcdi_request_poll(
501 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
502 efx_mcdi_req_t *emrp;
503 efsys_lock_state_t state;
506 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
507 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
508 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
510 /* Serialise against post-watchdog efx_mcdi_ev* */
511 EFSYS_LOCK(enp->en_eslp, state);
513 EFSYS_ASSERT(emip->emi_pending_req != NULL);
514 EFSYS_ASSERT(!emip->emi_ev_cpl);
515 emrp = emip->emi_pending_req;
517 /* Check for reboot atomically w.r.t efx_mcdi_request_start */
518 if (emip->emi_poll_cnt++ == 0) {
519 if ((rc = efx_mcdi_poll_reboot(enp)) != 0) {
520 emip->emi_pending_req = NULL;
521 EFSYS_UNLOCK(enp->en_eslp, state);
523 /* Reboot/Assertion */
524 if (rc == EIO || rc == EINTR)
525 efx_mcdi_raise_exception(enp, emrp, rc);
531 /* Check if a response is available */
532 if (efx_mcdi_poll_response(enp) == B_FALSE) {
533 EFSYS_UNLOCK(enp->en_eslp, state);
537 /* Read the response header */
538 efx_mcdi_read_response_header(enp, emrp);
540 /* Request complete */
541 emip->emi_pending_req = NULL;
543 /* Ensure stale MCDI requests fail after an MC reboot. */
544 emip->emi_new_epoch = B_FALSE;
546 EFSYS_UNLOCK(enp->en_eslp, state);
548 if ((rc = emrp->emr_rc) != 0)
551 efx_mcdi_finish_response(enp, emrp);
555 if (!emrp->emr_quiet)
558 if (!emrp->emr_quiet)
559 EFSYS_PROBE1(fail1, efx_rc_t, rc);
564 __checkReturn boolean_t
565 efx_mcdi_request_abort(
568 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
569 efx_mcdi_req_t *emrp;
571 efsys_lock_state_t state;
573 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
574 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
575 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
578 * efx_mcdi_ev_* may have already completed this event, and be
579 * spinning/blocked on the upper layer lock. So it *is* legitimate
580 * to for emi_pending_req to be NULL. If there is a pending event
581 * completed request, then provide a "credit" to allow
582 * efx_mcdi_ev_cpl() to accept a single spurious completion.
584 EFSYS_LOCK(enp->en_eslp, state);
585 emrp = emip->emi_pending_req;
586 aborted = (emrp != NULL);
588 emip->emi_pending_req = NULL;
590 /* Error the request */
591 emrp->emr_out_length_used = 0;
592 emrp->emr_rc = ETIMEDOUT;
594 /* Provide a credit for seqno/emr_pending_req mismatches */
595 if (emip->emi_ev_cpl)
599 * The upper layer has called us, so we don't
600 * need to complete the request.
603 EFSYS_UNLOCK(enp->en_eslp, state);
609 efx_mcdi_get_timeout(
611 __in efx_mcdi_req_t *emrp,
612 __out uint32_t *timeoutp)
614 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
616 emcop->emco_get_timeout(enp, emrp, timeoutp);
619 __checkReturn efx_rc_t
620 efx_mcdi_request_errcode(
621 __in unsigned int err)
626 case MC_CMD_ERR_EPERM:
628 case MC_CMD_ERR_ENOENT:
630 case MC_CMD_ERR_EINTR:
632 case MC_CMD_ERR_EACCES:
634 case MC_CMD_ERR_EBUSY:
636 case MC_CMD_ERR_EINVAL:
638 case MC_CMD_ERR_EDEADLK:
640 case MC_CMD_ERR_ENOSYS:
642 case MC_CMD_ERR_ETIME:
644 case MC_CMD_ERR_ENOTSUP:
646 case MC_CMD_ERR_EALREADY:
650 case MC_CMD_ERR_EEXIST:
652 #ifdef MC_CMD_ERR_EAGAIN
653 case MC_CMD_ERR_EAGAIN:
656 #ifdef MC_CMD_ERR_ENOSPC
657 case MC_CMD_ERR_ENOSPC:
660 case MC_CMD_ERR_ERANGE:
663 case MC_CMD_ERR_ALLOC_FAIL:
665 case MC_CMD_ERR_NO_VADAPTOR:
667 case MC_CMD_ERR_NO_EVB_PORT:
669 case MC_CMD_ERR_NO_VSWITCH:
671 case MC_CMD_ERR_VLAN_LIMIT:
673 case MC_CMD_ERR_BAD_PCI_FUNC:
675 case MC_CMD_ERR_BAD_VLAN_MODE:
677 case MC_CMD_ERR_BAD_VSWITCH_TYPE:
679 case MC_CMD_ERR_BAD_VPORT_TYPE:
681 case MC_CMD_ERR_MAC_EXIST:
684 case MC_CMD_ERR_PROXY_PENDING:
688 EFSYS_PROBE1(mc_pcol_error, int, err);
694 efx_mcdi_raise_exception(
696 __in_opt efx_mcdi_req_t *emrp,
699 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
700 efx_mcdi_exception_t exception;
702 /* Reboot or Assertion failure only */
703 EFSYS_ASSERT(rc == EIO || rc == EINTR);
706 * If MC_CMD_REBOOT causes a reboot (dependent on parameters),
707 * then the EIO is not worthy of an exception.
709 if (emrp != NULL && emrp->emr_cmd == MC_CMD_REBOOT && rc == EIO)
712 exception = (rc == EIO)
713 ? EFX_MCDI_EXCEPTION_MC_REBOOT
714 : EFX_MCDI_EXCEPTION_MC_BADASSERT;
716 emtp->emt_exception(emtp->emt_context, exception);
722 __inout efx_mcdi_req_t *emrp)
724 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
726 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
727 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
729 emrp->emr_quiet = B_FALSE;
730 emtp->emt_execute(emtp->emt_context, emrp);
734 efx_mcdi_execute_quiet(
736 __inout efx_mcdi_req_t *emrp)
738 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
740 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
741 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
743 emrp->emr_quiet = B_TRUE;
744 emtp->emt_execute(emtp->emt_context, emrp);
750 __in unsigned int seq,
751 __in unsigned int outlen,
754 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
755 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
756 efx_mcdi_req_t *emrp;
757 efsys_lock_state_t state;
759 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
760 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
763 * Serialise against efx_mcdi_request_poll()/efx_mcdi_request_start()
764 * when we're completing an aborted request.
766 EFSYS_LOCK(enp->en_eslp, state);
767 if (emip->emi_pending_req == NULL || !emip->emi_ev_cpl ||
768 (seq != ((emip->emi_seq - 1) & EFX_MASK32(MCDI_HEADER_SEQ)))) {
769 EFSYS_ASSERT(emip->emi_aborted > 0);
770 if (emip->emi_aborted > 0)
772 EFSYS_UNLOCK(enp->en_eslp, state);
776 emrp = emip->emi_pending_req;
777 emip->emi_pending_req = NULL;
778 EFSYS_UNLOCK(enp->en_eslp, state);
780 if (emip->emi_max_version >= 2) {
781 /* MCDIv2 response details do not fit into an event. */
782 efx_mcdi_read_response_header(enp, emrp);
785 if (!emrp->emr_quiet) {
786 EFSYS_PROBE2(mcdi_err, int, emrp->emr_cmd,
789 emrp->emr_out_length_used = 0;
790 emrp->emr_rc = efx_mcdi_request_errcode(errcode);
792 emrp->emr_out_length_used = outlen;
796 if (emrp->emr_rc == 0)
797 efx_mcdi_finish_response(enp, emrp);
799 emtp->emt_ev_cpl(emtp->emt_context);
802 #if EFSYS_OPT_MCDI_PROXY_AUTH
804 __checkReturn efx_rc_t
805 efx_mcdi_get_proxy_handle(
807 __in efx_mcdi_req_t *emrp,
808 __out uint32_t *handlep)
812 _NOTE(ARGUNUSED(enp))
815 * Return proxy handle from MCDI request that returned with error
816 * MC_MCD_ERR_PROXY_PENDING. This handle is used to wait for a matching
817 * PROXY_RESPONSE event.
819 if ((emrp == NULL) || (handlep == NULL)) {
823 if ((emrp->emr_rc != 0) &&
824 (emrp->emr_err_code == MC_CMD_ERR_PROXY_PENDING)) {
825 *handlep = emrp->emr_proxy_handle;
834 EFSYS_PROBE1(fail1, efx_rc_t, rc);
839 efx_mcdi_ev_proxy_response(
841 __in unsigned int handle,
842 __in unsigned int status)
844 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
848 * Handle results of an authorization request for a privileged MCDI
849 * command. If authorization was granted then we must re-issue the
850 * original MCDI request. If authorization failed or timed out,
851 * then the original MCDI request should be completed with the
852 * result code from this event.
854 rc = (status == 0) ? 0 : efx_mcdi_request_errcode(status);
856 emtp->emt_ev_proxy_response(emtp->emt_context, handle, rc);
858 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH */
865 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
866 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
867 efx_mcdi_req_t *emrp = NULL;
869 efsys_lock_state_t state;
872 * The MCDI request (if there is one) has been terminated, either
873 * by a BADASSERT or REBOOT event.
875 * If there is an outstanding event-completed MCDI operation, then we
876 * will never receive the completion event (because both MCDI
877 * completions and BADASSERT events are sent to the same evq). So
878 * complete this MCDI op.
880 * This function might run in parallel with efx_mcdi_request_poll()
881 * for poll completed mcdi requests, and also with
882 * efx_mcdi_request_start() for post-watchdog completions.
884 EFSYS_LOCK(enp->en_eslp, state);
885 emrp = emip->emi_pending_req;
886 ev_cpl = emip->emi_ev_cpl;
887 if (emrp != NULL && emip->emi_ev_cpl) {
888 emip->emi_pending_req = NULL;
890 emrp->emr_out_length_used = 0;
896 * Since we're running in parallel with a request, consume the
897 * status word before dropping the lock.
899 if (rc == EIO || rc == EINTR) {
900 EFSYS_SPIN(EFX_MCDI_STATUS_SLEEP_US);
901 (void) efx_mcdi_poll_reboot(enp);
902 emip->emi_new_epoch = B_TRUE;
905 EFSYS_UNLOCK(enp->en_eslp, state);
907 efx_mcdi_raise_exception(enp, emrp, rc);
909 if (emrp != NULL && ev_cpl)
910 emtp->emt_ev_cpl(emtp->emt_context);
913 __checkReturn efx_rc_t
916 __out_ecount_opt(4) uint16_t versionp[4],
917 __out_opt uint32_t *buildp,
918 __out_opt efx_mcdi_boot_t *statusp)
921 uint8_t payload[MAX(MAX(MC_CMD_GET_VERSION_IN_LEN,
922 MC_CMD_GET_VERSION_OUT_LEN),
923 MAX(MC_CMD_GET_BOOT_STATUS_IN_LEN,
924 MC_CMD_GET_BOOT_STATUS_OUT_LEN))];
925 efx_word_t *ver_words;
928 efx_mcdi_boot_t status;
931 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
933 (void) memset(payload, 0, sizeof (payload));
934 req.emr_cmd = MC_CMD_GET_VERSION;
935 req.emr_in_buf = payload;
936 req.emr_in_length = MC_CMD_GET_VERSION_IN_LEN;
937 req.emr_out_buf = payload;
938 req.emr_out_length = MC_CMD_GET_VERSION_OUT_LEN;
940 efx_mcdi_execute(enp, &req);
942 if (req.emr_rc != 0) {
947 /* bootrom support */
948 if (req.emr_out_length_used == MC_CMD_GET_VERSION_V0_OUT_LEN) {
949 version[0] = version[1] = version[2] = version[3] = 0;
950 build = MCDI_OUT_DWORD(req, GET_VERSION_OUT_FIRMWARE);
955 if (req.emr_out_length_used < MC_CMD_GET_VERSION_OUT_LEN) {
960 ver_words = MCDI_OUT2(req, efx_word_t, GET_VERSION_OUT_VERSION);
961 version[0] = EFX_WORD_FIELD(ver_words[0], EFX_WORD_0);
962 version[1] = EFX_WORD_FIELD(ver_words[1], EFX_WORD_0);
963 version[2] = EFX_WORD_FIELD(ver_words[2], EFX_WORD_0);
964 version[3] = EFX_WORD_FIELD(ver_words[3], EFX_WORD_0);
965 build = MCDI_OUT_DWORD(req, GET_VERSION_OUT_FIRMWARE);
968 /* The bootrom doesn't understand BOOT_STATUS */
969 if (MC_FW_VERSION_IS_BOOTLOADER(build)) {
970 status = EFX_MCDI_BOOT_ROM;
974 (void) memset(payload, 0, sizeof (payload));
975 req.emr_cmd = MC_CMD_GET_BOOT_STATUS;
976 req.emr_in_buf = payload;
977 req.emr_in_length = MC_CMD_GET_BOOT_STATUS_IN_LEN;
978 req.emr_out_buf = payload;
979 req.emr_out_length = MC_CMD_GET_BOOT_STATUS_OUT_LEN;
981 efx_mcdi_execute_quiet(enp, &req);
983 if (req.emr_rc == EACCES) {
984 /* Unprivileged functions cannot access BOOT_STATUS */
985 status = EFX_MCDI_BOOT_PRIMARY;
986 version[0] = version[1] = version[2] = version[3] = 0;
991 if (req.emr_rc != 0) {
996 if (req.emr_out_length_used < MC_CMD_GET_BOOT_STATUS_OUT_LEN) {
1001 if (MCDI_OUT_DWORD_FIELD(req, GET_BOOT_STATUS_OUT_FLAGS,
1002 GET_BOOT_STATUS_OUT_FLAGS_PRIMARY))
1003 status = EFX_MCDI_BOOT_PRIMARY;
1005 status = EFX_MCDI_BOOT_SECONDARY;
1008 if (versionp != NULL)
1009 memcpy(versionp, version, sizeof (version));
1012 if (statusp != NULL)
1024 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1029 __checkReturn efx_rc_t
1030 efx_mcdi_get_capabilities(
1031 __in efx_nic_t *enp,
1032 __out_opt uint32_t *flagsp,
1033 __out_opt uint16_t *rx_dpcpu_fw_idp,
1034 __out_opt uint16_t *tx_dpcpu_fw_idp,
1035 __out_opt uint32_t *flags2p,
1036 __out_opt uint32_t *tso2ncp)
1039 uint8_t payload[MAX(MC_CMD_GET_CAPABILITIES_IN_LEN,
1040 MC_CMD_GET_CAPABILITIES_V2_OUT_LEN)];
1041 boolean_t v2_capable;
1044 (void) memset(payload, 0, sizeof (payload));
1045 req.emr_cmd = MC_CMD_GET_CAPABILITIES;
1046 req.emr_in_buf = payload;
1047 req.emr_in_length = MC_CMD_GET_CAPABILITIES_IN_LEN;
1048 req.emr_out_buf = payload;
1049 req.emr_out_length = MC_CMD_GET_CAPABILITIES_V2_OUT_LEN;
1051 efx_mcdi_execute_quiet(enp, &req);
1053 if (req.emr_rc != 0) {
1058 if (req.emr_out_length_used < MC_CMD_GET_CAPABILITIES_OUT_LEN) {
1064 *flagsp = MCDI_OUT_DWORD(req, GET_CAPABILITIES_OUT_FLAGS1);
1066 if (rx_dpcpu_fw_idp != NULL)
1067 *rx_dpcpu_fw_idp = MCDI_OUT_WORD(req,
1068 GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID);
1070 if (tx_dpcpu_fw_idp != NULL)
1071 *tx_dpcpu_fw_idp = MCDI_OUT_WORD(req,
1072 GET_CAPABILITIES_OUT_TX_DPCPU_FW_ID);
1074 if (req.emr_out_length_used < MC_CMD_GET_CAPABILITIES_V2_OUT_LEN)
1075 v2_capable = B_FALSE;
1077 v2_capable = B_TRUE;
1079 if (flags2p != NULL) {
1080 *flags2p = (v2_capable) ?
1081 MCDI_OUT_DWORD(req, GET_CAPABILITIES_V2_OUT_FLAGS2) :
1085 if (tso2ncp != NULL) {
1086 *tso2ncp = (v2_capable) ?
1088 GET_CAPABILITIES_V2_OUT_TX_TSO_V2_N_CONTEXTS) :
1097 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1102 static __checkReturn efx_rc_t
1104 __in efx_nic_t *enp,
1105 __in boolean_t after_assertion)
1107 uint8_t payload[MAX(MC_CMD_REBOOT_IN_LEN, MC_CMD_REBOOT_OUT_LEN)];
1112 * We could require the caller to have caused en_mod_flags=0 to
1113 * call this function. This doesn't help the other port though,
1114 * who's about to get the MC ripped out from underneath them.
1115 * Since they have to cope with the subsequent fallout of MCDI
1116 * failures, we should as well.
1118 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
1120 (void) memset(payload, 0, sizeof (payload));
1121 req.emr_cmd = MC_CMD_REBOOT;
1122 req.emr_in_buf = payload;
1123 req.emr_in_length = MC_CMD_REBOOT_IN_LEN;
1124 req.emr_out_buf = payload;
1125 req.emr_out_length = MC_CMD_REBOOT_OUT_LEN;
1127 MCDI_IN_SET_DWORD(req, REBOOT_IN_FLAGS,
1128 (after_assertion ? MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION : 0));
1130 efx_mcdi_execute_quiet(enp, &req);
1132 if (req.emr_rc == EACCES) {
1133 /* Unprivileged functions cannot reboot the MC. */
1137 /* A successful reboot request returns EIO. */
1138 if (req.emr_rc != 0 && req.emr_rc != EIO) {
1147 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1152 __checkReturn efx_rc_t
1154 __in efx_nic_t *enp)
1156 return (efx_mcdi_do_reboot(enp, B_FALSE));
1159 __checkReturn efx_rc_t
1160 efx_mcdi_exit_assertion_handler(
1161 __in efx_nic_t *enp)
1163 return (efx_mcdi_do_reboot(enp, B_TRUE));
1166 __checkReturn efx_rc_t
1167 efx_mcdi_read_assertion(
1168 __in efx_nic_t *enp)
1171 uint8_t payload[MAX(MC_CMD_GET_ASSERTS_IN_LEN,
1172 MC_CMD_GET_ASSERTS_OUT_LEN)];
1181 * Before we attempt to chat to the MC, we should verify that the MC
1182 * isn't in it's assertion handler, either due to a previous reboot,
1183 * or because we're reinitializing due to an eec_exception().
1185 * Use GET_ASSERTS to read any assertion state that may be present.
1186 * Retry this command twice. Once because a boot-time assertion failure
1187 * might cause the 1st MCDI request to fail. And once again because
1188 * we might race with efx_mcdi_exit_assertion_handler() running on
1189 * partner port(s) on the same NIC.
1193 (void) memset(payload, 0, sizeof (payload));
1194 req.emr_cmd = MC_CMD_GET_ASSERTS;
1195 req.emr_in_buf = payload;
1196 req.emr_in_length = MC_CMD_GET_ASSERTS_IN_LEN;
1197 req.emr_out_buf = payload;
1198 req.emr_out_length = MC_CMD_GET_ASSERTS_OUT_LEN;
1200 MCDI_IN_SET_DWORD(req, GET_ASSERTS_IN_CLEAR, 1);
1201 efx_mcdi_execute_quiet(enp, &req);
1203 } while ((req.emr_rc == EINTR || req.emr_rc == EIO) && retry-- > 0);
1205 if (req.emr_rc != 0) {
1206 if (req.emr_rc == EACCES) {
1207 /* Unprivileged functions cannot clear assertions. */
1214 if (req.emr_out_length_used < MC_CMD_GET_ASSERTS_OUT_LEN) {
1219 /* Print out any assertion state recorded */
1220 flags = MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_GLOBAL_FLAGS);
1221 if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
1224 reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
1225 ? "system-level assertion"
1226 : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
1227 ? "thread-level assertion"
1228 : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
1230 : (flags == MC_CMD_GET_ASSERTS_FLAGS_ADDR_TRAP)
1231 ? "illegal address trap"
1232 : "unknown assertion";
1233 EFSYS_PROBE3(mcpu_assertion,
1234 const char *, reason, unsigned int,
1235 MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_SAVED_PC_OFFS),
1237 MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_THREAD_OFFS));
1239 /* Print out the registers (r1 ... r31) */
1240 ofst = MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_OFST;
1242 index < 1 + MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
1244 EFSYS_PROBE2(mcpu_register, unsigned int, index, unsigned int,
1245 EFX_DWORD_FIELD(*MCDI_OUT(req, efx_dword_t, ofst),
1247 ofst += sizeof (efx_dword_t);
1249 EFSYS_ASSERT(ofst <= MC_CMD_GET_ASSERTS_OUT_LEN);
1257 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1264 * Internal routines for for specific MCDI requests.
1267 __checkReturn efx_rc_t
1268 efx_mcdi_drv_attach(
1269 __in efx_nic_t *enp,
1270 __in boolean_t attach)
1273 uint8_t payload[MAX(MC_CMD_DRV_ATTACH_IN_LEN,
1274 MC_CMD_DRV_ATTACH_EXT_OUT_LEN)];
1277 (void) memset(payload, 0, sizeof (payload));
1278 req.emr_cmd = MC_CMD_DRV_ATTACH;
1279 req.emr_in_buf = payload;
1280 req.emr_in_length = MC_CMD_DRV_ATTACH_IN_LEN;
1281 req.emr_out_buf = payload;
1282 req.emr_out_length = MC_CMD_DRV_ATTACH_EXT_OUT_LEN;
1285 * Use DONT_CARE for the datapath firmware type to ensure that the
1286 * driver can attach to an unprivileged function. The datapath firmware
1287 * type to use is controlled by the 'sfboot' utility.
1289 MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_NEW_STATE, attach ? 1 : 0);
1290 MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_UPDATE, 1);
1291 MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_DONT_CARE);
1293 efx_mcdi_execute(enp, &req);
1295 if (req.emr_rc != 0) {
1300 if (req.emr_out_length_used < MC_CMD_DRV_ATTACH_OUT_LEN) {
1310 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1315 __checkReturn efx_rc_t
1316 efx_mcdi_get_board_cfg(
1317 __in efx_nic_t *enp,
1318 __out_opt uint32_t *board_typep,
1319 __out_opt efx_dword_t *capabilitiesp,
1320 __out_ecount_opt(6) uint8_t mac_addrp[6])
1322 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
1324 uint8_t payload[MAX(MC_CMD_GET_BOARD_CFG_IN_LEN,
1325 MC_CMD_GET_BOARD_CFG_OUT_LENMIN)];
1328 (void) memset(payload, 0, sizeof (payload));
1329 req.emr_cmd = MC_CMD_GET_BOARD_CFG;
1330 req.emr_in_buf = payload;
1331 req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN;
1332 req.emr_out_buf = payload;
1333 req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMIN;
1335 efx_mcdi_execute(enp, &req);
1337 if (req.emr_rc != 0) {
1342 if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
1347 if (mac_addrp != NULL) {
1350 if (emip->emi_port == 1) {
1351 addrp = MCDI_OUT2(req, uint8_t,
1352 GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0);
1353 } else if (emip->emi_port == 2) {
1354 addrp = MCDI_OUT2(req, uint8_t,
1355 GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1);
1361 EFX_MAC_ADDR_COPY(mac_addrp, addrp);
1364 if (capabilitiesp != NULL) {
1365 if (emip->emi_port == 1) {
1366 *capabilitiesp = *MCDI_OUT2(req, efx_dword_t,
1367 GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
1368 } else if (emip->emi_port == 2) {
1369 *capabilitiesp = *MCDI_OUT2(req, efx_dword_t,
1370 GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
1377 if (board_typep != NULL) {
1378 *board_typep = MCDI_OUT_DWORD(req,
1379 GET_BOARD_CFG_OUT_BOARD_TYPE);
1391 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1396 __checkReturn efx_rc_t
1397 efx_mcdi_get_resource_limits(
1398 __in efx_nic_t *enp,
1399 __out_opt uint32_t *nevqp,
1400 __out_opt uint32_t *nrxqp,
1401 __out_opt uint32_t *ntxqp)
1404 uint8_t payload[MAX(MC_CMD_GET_RESOURCE_LIMITS_IN_LEN,
1405 MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN)];
1408 (void) memset(payload, 0, sizeof (payload));
1409 req.emr_cmd = MC_CMD_GET_RESOURCE_LIMITS;
1410 req.emr_in_buf = payload;
1411 req.emr_in_length = MC_CMD_GET_RESOURCE_LIMITS_IN_LEN;
1412 req.emr_out_buf = payload;
1413 req.emr_out_length = MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN;
1415 efx_mcdi_execute(enp, &req);
1417 if (req.emr_rc != 0) {
1422 if (req.emr_out_length_used < MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN) {
1428 *nevqp = MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_EVQ);
1430 *nrxqp = MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_RXQ);
1432 *ntxqp = MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_TXQ);
1439 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1444 __checkReturn efx_rc_t
1445 efx_mcdi_get_phy_cfg(
1446 __in efx_nic_t *enp)
1448 efx_port_t *epp = &(enp->en_port);
1449 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1451 uint8_t payload[MAX(MC_CMD_GET_PHY_CFG_IN_LEN,
1452 MC_CMD_GET_PHY_CFG_OUT_LEN)];
1455 (void) memset(payload, 0, sizeof (payload));
1456 req.emr_cmd = MC_CMD_GET_PHY_CFG;
1457 req.emr_in_buf = payload;
1458 req.emr_in_length = MC_CMD_GET_PHY_CFG_IN_LEN;
1459 req.emr_out_buf = payload;
1460 req.emr_out_length = MC_CMD_GET_PHY_CFG_OUT_LEN;
1462 efx_mcdi_execute(enp, &req);
1464 if (req.emr_rc != 0) {
1469 if (req.emr_out_length_used < MC_CMD_GET_PHY_CFG_OUT_LEN) {
1474 encp->enc_phy_type = MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_TYPE);
1476 (void) strncpy(encp->enc_phy_name,
1477 MCDI_OUT2(req, char, GET_PHY_CFG_OUT_NAME),
1478 MIN(sizeof (encp->enc_phy_name) - 1,
1479 MC_CMD_GET_PHY_CFG_OUT_NAME_LEN));
1480 #endif /* EFSYS_OPT_NAMES */
1481 (void) memset(encp->enc_phy_revision, 0,
1482 sizeof (encp->enc_phy_revision));
1483 memcpy(encp->enc_phy_revision,
1484 MCDI_OUT2(req, char, GET_PHY_CFG_OUT_REVISION),
1485 MIN(sizeof (encp->enc_phy_revision) - 1,
1486 MC_CMD_GET_PHY_CFG_OUT_REVISION_LEN));
1487 #if EFSYS_OPT_PHY_LED_CONTROL
1488 encp->enc_led_mask = ((1 << EFX_PHY_LED_DEFAULT) |
1489 (1 << EFX_PHY_LED_OFF) |
1490 (1 << EFX_PHY_LED_ON));
1491 #endif /* EFSYS_OPT_PHY_LED_CONTROL */
1493 /* Get the media type of the fixed port, if recognised. */
1494 EFX_STATIC_ASSERT(MC_CMD_MEDIA_XAUI == EFX_PHY_MEDIA_XAUI);
1495 EFX_STATIC_ASSERT(MC_CMD_MEDIA_CX4 == EFX_PHY_MEDIA_CX4);
1496 EFX_STATIC_ASSERT(MC_CMD_MEDIA_KX4 == EFX_PHY_MEDIA_KX4);
1497 EFX_STATIC_ASSERT(MC_CMD_MEDIA_XFP == EFX_PHY_MEDIA_XFP);
1498 EFX_STATIC_ASSERT(MC_CMD_MEDIA_SFP_PLUS == EFX_PHY_MEDIA_SFP_PLUS);
1499 EFX_STATIC_ASSERT(MC_CMD_MEDIA_BASE_T == EFX_PHY_MEDIA_BASE_T);
1500 EFX_STATIC_ASSERT(MC_CMD_MEDIA_QSFP_PLUS == EFX_PHY_MEDIA_QSFP_PLUS);
1501 epp->ep_fixed_port_type =
1502 (efx_phy_media_type_t) MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_MEDIA_TYPE);
1503 if (epp->ep_fixed_port_type >= EFX_PHY_MEDIA_NTYPES)
1504 epp->ep_fixed_port_type = EFX_PHY_MEDIA_INVALID;
1506 epp->ep_phy_cap_mask =
1507 MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_SUPPORTED_CAP);
1508 #if EFSYS_OPT_PHY_FLAGS
1509 encp->enc_phy_flags_mask = MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_FLAGS);
1510 #endif /* EFSYS_OPT_PHY_FLAGS */
1512 encp->enc_port = (uint8_t)MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_PRT);
1514 /* Populate internal state */
1515 encp->enc_mcdi_mdio_channel =
1516 (uint8_t)MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_CHANNEL);
1518 #if EFSYS_OPT_PHY_STATS
1519 encp->enc_mcdi_phy_stat_mask =
1520 MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_STATS_MASK);
1521 #endif /* EFSYS_OPT_PHY_STATS */
1524 encp->enc_bist_mask = 0;
1525 if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS,
1526 GET_PHY_CFG_OUT_BIST_CABLE_SHORT))
1527 encp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_CABLE_SHORT);
1528 if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS,
1529 GET_PHY_CFG_OUT_BIST_CABLE_LONG))
1530 encp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_CABLE_LONG);
1531 if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS,
1532 GET_PHY_CFG_OUT_BIST))
1533 encp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_NORMAL);
1534 #endif /* EFSYS_OPT_BIST */
1541 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1546 __checkReturn efx_rc_t
1547 efx_mcdi_firmware_update_supported(
1548 __in efx_nic_t *enp,
1549 __out boolean_t *supportedp)
1551 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
1554 if (emcop != NULL) {
1555 if ((rc = emcop->emco_feature_supported(enp,
1556 EFX_MCDI_FEATURE_FW_UPDATE, supportedp)) != 0)
1559 /* Earlier devices always supported updates */
1560 *supportedp = B_TRUE;
1566 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1571 __checkReturn efx_rc_t
1572 efx_mcdi_macaddr_change_supported(
1573 __in efx_nic_t *enp,
1574 __out boolean_t *supportedp)
1576 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
1579 if (emcop != NULL) {
1580 if ((rc = emcop->emco_feature_supported(enp,
1581 EFX_MCDI_FEATURE_MACADDR_CHANGE, supportedp)) != 0)
1584 /* Earlier devices always supported MAC changes */
1585 *supportedp = B_TRUE;
1591 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1596 __checkReturn efx_rc_t
1597 efx_mcdi_link_control_supported(
1598 __in efx_nic_t *enp,
1599 __out boolean_t *supportedp)
1601 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
1604 if (emcop != NULL) {
1605 if ((rc = emcop->emco_feature_supported(enp,
1606 EFX_MCDI_FEATURE_LINK_CONTROL, supportedp)) != 0)
1609 /* Earlier devices always supported link control */
1610 *supportedp = B_TRUE;
1616 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1621 __checkReturn efx_rc_t
1622 efx_mcdi_mac_spoofing_supported(
1623 __in efx_nic_t *enp,
1624 __out boolean_t *supportedp)
1626 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
1629 if (emcop != NULL) {
1630 if ((rc = emcop->emco_feature_supported(enp,
1631 EFX_MCDI_FEATURE_MAC_SPOOFING, supportedp)) != 0)
1634 /* Earlier devices always supported MAC spoofing */
1635 *supportedp = B_TRUE;
1641 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1648 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
1650 * Enter bist offline mode. This is a fw mode which puts the NIC into a state
1651 * where memory BIST tests can be run and not much else can interfere or happen.
1652 * A reboot is required to exit this mode.
1654 __checkReturn efx_rc_t
1655 efx_mcdi_bist_enable_offline(
1656 __in efx_nic_t *enp)
1661 EFX_STATIC_ASSERT(MC_CMD_ENABLE_OFFLINE_BIST_IN_LEN == 0);
1662 EFX_STATIC_ASSERT(MC_CMD_ENABLE_OFFLINE_BIST_OUT_LEN == 0);
1664 req.emr_cmd = MC_CMD_ENABLE_OFFLINE_BIST;
1665 req.emr_in_buf = NULL;
1666 req.emr_in_length = 0;
1667 req.emr_out_buf = NULL;
1668 req.emr_out_length = 0;
1670 efx_mcdi_execute(enp, &req);
1672 if (req.emr_rc != 0) {
1680 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1684 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */
1686 __checkReturn efx_rc_t
1687 efx_mcdi_bist_start(
1688 __in efx_nic_t *enp,
1689 __in efx_bist_type_t type)
1692 uint8_t payload[MAX(MC_CMD_START_BIST_IN_LEN,
1693 MC_CMD_START_BIST_OUT_LEN)];
1696 (void) memset(payload, 0, sizeof (payload));
1697 req.emr_cmd = MC_CMD_START_BIST;
1698 req.emr_in_buf = payload;
1699 req.emr_in_length = MC_CMD_START_BIST_IN_LEN;
1700 req.emr_out_buf = payload;
1701 req.emr_out_length = MC_CMD_START_BIST_OUT_LEN;
1704 case EFX_BIST_TYPE_PHY_NORMAL:
1705 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE, MC_CMD_PHY_BIST);
1707 case EFX_BIST_TYPE_PHY_CABLE_SHORT:
1708 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1709 MC_CMD_PHY_BIST_CABLE_SHORT);
1711 case EFX_BIST_TYPE_PHY_CABLE_LONG:
1712 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1713 MC_CMD_PHY_BIST_CABLE_LONG);
1715 case EFX_BIST_TYPE_MC_MEM:
1716 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1717 MC_CMD_MC_MEM_BIST);
1719 case EFX_BIST_TYPE_SAT_MEM:
1720 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1721 MC_CMD_PORT_MEM_BIST);
1723 case EFX_BIST_TYPE_REG:
1724 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1731 efx_mcdi_execute(enp, &req);
1733 if (req.emr_rc != 0) {
1741 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1746 #endif /* EFSYS_OPT_BIST */
1749 /* Enable logging of some events (e.g. link state changes) */
1750 __checkReturn efx_rc_t
1752 __in efx_nic_t *enp)
1755 uint8_t payload[MAX(MC_CMD_LOG_CTRL_IN_LEN,
1756 MC_CMD_LOG_CTRL_OUT_LEN)];
1759 (void) memset(payload, 0, sizeof (payload));
1760 req.emr_cmd = MC_CMD_LOG_CTRL;
1761 req.emr_in_buf = payload;
1762 req.emr_in_length = MC_CMD_LOG_CTRL_IN_LEN;
1763 req.emr_out_buf = payload;
1764 req.emr_out_length = MC_CMD_LOG_CTRL_OUT_LEN;
1766 MCDI_IN_SET_DWORD(req, LOG_CTRL_IN_LOG_DEST,
1767 MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ);
1768 MCDI_IN_SET_DWORD(req, LOG_CTRL_IN_LOG_DEST_EVQ, 0);
1770 efx_mcdi_execute(enp, &req);
1772 if (req.emr_rc != 0) {
1780 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1786 #if EFSYS_OPT_MAC_STATS
1788 typedef enum efx_stats_action_e {
1791 EFX_STATS_ENABLE_NOEVENTS,
1792 EFX_STATS_ENABLE_EVENTS,
1794 } efx_stats_action_t;
1796 static __checkReturn efx_rc_t
1798 __in efx_nic_t *enp,
1799 __in_opt efsys_mem_t *esmp,
1800 __in efx_stats_action_t action,
1801 __in uint16_t period_ms)
1804 uint8_t payload[MAX(MC_CMD_MAC_STATS_IN_LEN,
1805 MC_CMD_MAC_STATS_OUT_DMA_LEN)];
1806 int clear = (action == EFX_STATS_CLEAR);
1807 int upload = (action == EFX_STATS_UPLOAD);
1808 int enable = (action == EFX_STATS_ENABLE_NOEVENTS);
1809 int events = (action == EFX_STATS_ENABLE_EVENTS);
1810 int disable = (action == EFX_STATS_DISABLE);
1813 (void) memset(payload, 0, sizeof (payload));
1814 req.emr_cmd = MC_CMD_MAC_STATS;
1815 req.emr_in_buf = payload;
1816 req.emr_in_length = MC_CMD_MAC_STATS_IN_LEN;
1817 req.emr_out_buf = payload;
1818 req.emr_out_length = MC_CMD_MAC_STATS_OUT_DMA_LEN;
1820 MCDI_IN_POPULATE_DWORD_6(req, MAC_STATS_IN_CMD,
1821 MAC_STATS_IN_DMA, upload,
1822 MAC_STATS_IN_CLEAR, clear,
1823 MAC_STATS_IN_PERIODIC_CHANGE, enable | events | disable,
1824 MAC_STATS_IN_PERIODIC_ENABLE, enable | events,
1825 MAC_STATS_IN_PERIODIC_NOEVENT, !events,
1826 MAC_STATS_IN_PERIOD_MS, (enable | events) ? period_ms : 0);
1829 int bytes = MC_CMD_MAC_NSTATS * sizeof (uint64_t);
1831 EFX_STATIC_ASSERT(MC_CMD_MAC_NSTATS * sizeof (uint64_t) <=
1832 EFX_MAC_STATS_SIZE);
1834 MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_LO,
1835 EFSYS_MEM_ADDR(esmp) & 0xffffffff);
1836 MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_HI,
1837 EFSYS_MEM_ADDR(esmp) >> 32);
1838 MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_LEN, bytes);
1840 EFSYS_ASSERT(!upload && !enable && !events);
1844 * NOTE: Do not use EVB_PORT_ID_ASSIGNED when disabling periodic stats,
1845 * as this may fail (and leave periodic DMA enabled) if the
1846 * vadapter has already been deleted.
1848 MCDI_IN_SET_DWORD(req, MAC_STATS_IN_PORT_ID,
1849 (disable ? EVB_PORT_ID_NULL : enp->en_vport_id));
1851 efx_mcdi_execute(enp, &req);
1853 if (req.emr_rc != 0) {
1854 /* EF10: Expect ENOENT if no DMA queues are initialised */
1855 if ((req.emr_rc != ENOENT) ||
1856 (enp->en_rx_qcount + enp->en_tx_qcount != 0)) {
1865 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1870 __checkReturn efx_rc_t
1871 efx_mcdi_mac_stats_clear(
1872 __in efx_nic_t *enp)
1876 if ((rc = efx_mcdi_mac_stats(enp, NULL, EFX_STATS_CLEAR, 0)) != 0)
1882 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1887 __checkReturn efx_rc_t
1888 efx_mcdi_mac_stats_upload(
1889 __in efx_nic_t *enp,
1890 __in efsys_mem_t *esmp)
1895 * The MC DMAs aggregate statistics for our convenience, so we can
1896 * avoid having to pull the statistics buffer into the cache to
1897 * maintain cumulative statistics.
1899 if ((rc = efx_mcdi_mac_stats(enp, esmp, EFX_STATS_UPLOAD, 0)) != 0)
1905 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1910 __checkReturn efx_rc_t
1911 efx_mcdi_mac_stats_periodic(
1912 __in efx_nic_t *enp,
1913 __in efsys_mem_t *esmp,
1914 __in uint16_t period_ms,
1915 __in boolean_t events)
1920 * The MC DMAs aggregate statistics for our convenience, so we can
1921 * avoid having to pull the statistics buffer into the cache to
1922 * maintain cumulative statistics.
1923 * Huntington uses a fixed 1sec period.
1924 * Medford uses a fixed 1sec period before v6.2.1.1033 firmware.
1927 rc = efx_mcdi_mac_stats(enp, NULL, EFX_STATS_DISABLE, 0);
1929 rc = efx_mcdi_mac_stats(enp, esmp, EFX_STATS_ENABLE_EVENTS,
1932 rc = efx_mcdi_mac_stats(enp, esmp, EFX_STATS_ENABLE_NOEVENTS,
1941 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1946 #endif /* EFSYS_OPT_MAC_STATS */
1948 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
1951 * This function returns the pf and vf number of a function. If it is a pf the
1952 * vf number is 0xffff. The vf number is the index of the vf on that
1953 * function. So if you have 3 vfs on pf 0 the 3 vfs will return (pf=0,vf=0),
1954 * (pf=0,vf=1), (pf=0,vf=2) aand the pf will return (pf=0, vf=0xffff).
1956 __checkReturn efx_rc_t
1957 efx_mcdi_get_function_info(
1958 __in efx_nic_t *enp,
1959 __out uint32_t *pfp,
1960 __out_opt uint32_t *vfp)
1963 uint8_t payload[MAX(MC_CMD_GET_FUNCTION_INFO_IN_LEN,
1964 MC_CMD_GET_FUNCTION_INFO_OUT_LEN)];
1967 (void) memset(payload, 0, sizeof (payload));
1968 req.emr_cmd = MC_CMD_GET_FUNCTION_INFO;
1969 req.emr_in_buf = payload;
1970 req.emr_in_length = MC_CMD_GET_FUNCTION_INFO_IN_LEN;
1971 req.emr_out_buf = payload;
1972 req.emr_out_length = MC_CMD_GET_FUNCTION_INFO_OUT_LEN;
1974 efx_mcdi_execute(enp, &req);
1976 if (req.emr_rc != 0) {
1981 if (req.emr_out_length_used < MC_CMD_GET_FUNCTION_INFO_OUT_LEN) {
1986 *pfp = MCDI_OUT_DWORD(req, GET_FUNCTION_INFO_OUT_PF);
1988 *vfp = MCDI_OUT_DWORD(req, GET_FUNCTION_INFO_OUT_VF);
1995 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2000 __checkReturn efx_rc_t
2001 efx_mcdi_privilege_mask(
2002 __in efx_nic_t *enp,
2005 __out uint32_t *maskp)
2008 uint8_t payload[MAX(MC_CMD_PRIVILEGE_MASK_IN_LEN,
2009 MC_CMD_PRIVILEGE_MASK_OUT_LEN)];
2012 (void) memset(payload, 0, sizeof (payload));
2013 req.emr_cmd = MC_CMD_PRIVILEGE_MASK;
2014 req.emr_in_buf = payload;
2015 req.emr_in_length = MC_CMD_PRIVILEGE_MASK_IN_LEN;
2016 req.emr_out_buf = payload;
2017 req.emr_out_length = MC_CMD_PRIVILEGE_MASK_OUT_LEN;
2019 MCDI_IN_POPULATE_DWORD_2(req, PRIVILEGE_MASK_IN_FUNCTION,
2020 PRIVILEGE_MASK_IN_FUNCTION_PF, pf,
2021 PRIVILEGE_MASK_IN_FUNCTION_VF, vf);
2023 efx_mcdi_execute(enp, &req);
2025 if (req.emr_rc != 0) {
2030 if (req.emr_out_length_used < MC_CMD_PRIVILEGE_MASK_OUT_LEN) {
2035 *maskp = MCDI_OUT_DWORD(req, PRIVILEGE_MASK_OUT_OLD_MASK);
2042 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2047 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */
2049 __checkReturn efx_rc_t
2050 efx_mcdi_set_workaround(
2051 __in efx_nic_t *enp,
2053 __in boolean_t enabled,
2054 __out_opt uint32_t *flagsp)
2057 uint8_t payload[MAX(MC_CMD_WORKAROUND_IN_LEN,
2058 MC_CMD_WORKAROUND_EXT_OUT_LEN)];
2061 (void) memset(payload, 0, sizeof (payload));
2062 req.emr_cmd = MC_CMD_WORKAROUND;
2063 req.emr_in_buf = payload;
2064 req.emr_in_length = MC_CMD_WORKAROUND_IN_LEN;
2065 req.emr_out_buf = payload;
2066 req.emr_out_length = MC_CMD_WORKAROUND_OUT_LEN;
2068 MCDI_IN_SET_DWORD(req, WORKAROUND_IN_TYPE, type);
2069 MCDI_IN_SET_DWORD(req, WORKAROUND_IN_ENABLED, enabled ? 1 : 0);
2071 efx_mcdi_execute_quiet(enp, &req);
2073 if (req.emr_rc != 0) {
2078 if (flagsp != NULL) {
2079 if (req.emr_out_length_used >= MC_CMD_WORKAROUND_EXT_OUT_LEN)
2080 *flagsp = MCDI_OUT_DWORD(req, WORKAROUND_EXT_OUT_FLAGS);
2088 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2094 __checkReturn efx_rc_t
2095 efx_mcdi_get_workarounds(
2096 __in efx_nic_t *enp,
2097 __out_opt uint32_t *implementedp,
2098 __out_opt uint32_t *enabledp)
2101 uint8_t payload[MC_CMD_GET_WORKAROUNDS_OUT_LEN];
2104 (void) memset(payload, 0, sizeof (payload));
2105 req.emr_cmd = MC_CMD_GET_WORKAROUNDS;
2106 req.emr_in_buf = NULL;
2107 req.emr_in_length = 0;
2108 req.emr_out_buf = payload;
2109 req.emr_out_length = MC_CMD_GET_WORKAROUNDS_OUT_LEN;
2111 efx_mcdi_execute(enp, &req);
2113 if (req.emr_rc != 0) {
2118 if (implementedp != NULL) {
2120 MCDI_OUT_DWORD(req, GET_WORKAROUNDS_OUT_IMPLEMENTED);
2123 if (enabledp != NULL) {
2124 *enabledp = MCDI_OUT_DWORD(req, GET_WORKAROUNDS_OUT_ENABLED);
2130 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2136 * Size of media information page in accordance with SFF-8472 and SFF-8436.
2137 * It is used in MCDI interface as well.
2139 #define EFX_PHY_MEDIA_INFO_PAGE_SIZE 0x80
2141 static __checkReturn efx_rc_t
2142 efx_mcdi_get_phy_media_info(
2143 __in efx_nic_t *enp,
2144 __in uint32_t mcdi_page,
2145 __in uint8_t offset,
2147 __out_bcount(len) uint8_t *data)
2150 uint8_t payload[MAX(MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN,
2151 MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(
2152 EFX_PHY_MEDIA_INFO_PAGE_SIZE))];
2155 EFSYS_ASSERT((uint32_t)offset + len <= EFX_PHY_MEDIA_INFO_PAGE_SIZE);
2157 (void) memset(payload, 0, sizeof (payload));
2158 req.emr_cmd = MC_CMD_GET_PHY_MEDIA_INFO;
2159 req.emr_in_buf = payload;
2160 req.emr_in_length = MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN;
2161 req.emr_out_buf = payload;
2162 req.emr_out_length =
2163 MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(EFX_PHY_MEDIA_INFO_PAGE_SIZE);
2165 MCDI_IN_SET_DWORD(req, GET_PHY_MEDIA_INFO_IN_PAGE, mcdi_page);
2167 efx_mcdi_execute(enp, &req);
2169 if (req.emr_rc != 0) {
2174 if (req.emr_out_length_used !=
2175 MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(EFX_PHY_MEDIA_INFO_PAGE_SIZE)) {
2180 if (MCDI_OUT_DWORD(req, GET_PHY_MEDIA_INFO_OUT_DATALEN) !=
2181 EFX_PHY_MEDIA_INFO_PAGE_SIZE) {
2187 MCDI_OUT2(req, uint8_t, GET_PHY_MEDIA_INFO_OUT_DATA) + offset,
2197 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2203 * 2-wire device address of the base information in accordance with SFF-8472
2204 * Diagnostic Monitoring Interface for Optical Transceivers section
2205 * 4 Memory Organization.
2207 #define EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_BASE 0xA0
2210 * 2-wire device address of the digital diagnostics monitoring interface
2211 * in accordance with SFF-8472 Diagnostic Monitoring Interface for Optical
2212 * Transceivers section 4 Memory Organization.
2214 #define EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_DDM 0xA2
2217 * Hard wired 2-wire device address for QSFP+ in accordance with SFF-8436
2218 * QSFP+ 10 Gbs 4X PLUGGABLE TRANSCEIVER section 7.4 Device Addressing and
2221 #define EFX_PHY_MEDIA_INFO_DEV_ADDR_QSFP 0xA0
2223 __checkReturn efx_rc_t
2224 efx_mcdi_phy_module_get_info(
2225 __in efx_nic_t *enp,
2226 __in uint8_t dev_addr,
2227 __in uint8_t offset,
2229 __out_bcount(len) uint8_t *data)
2231 efx_port_t *epp = &(enp->en_port);
2233 uint32_t mcdi_lower_page;
2234 uint32_t mcdi_upper_page;
2236 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
2239 * Map device address to MC_CMD_GET_PHY_MEDIA_INFO pages.
2240 * Offset plus length interface allows to access page 0 only.
2241 * I.e. non-zero upper pages are not accessible.
2242 * See SFF-8472 section 4 Memory Organization and SFF-8436 section 7.6
2243 * QSFP+ Memory Map for details on how information is structured
2246 switch (epp->ep_fixed_port_type) {
2247 case EFX_PHY_MEDIA_SFP_PLUS:
2249 * In accordance with SFF-8472 Diagnostic Monitoring
2250 * Interface for Optical Transceivers section 4 Memory
2251 * Organization two 2-wire addresses are defined.
2254 /* Base information */
2255 case EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_BASE:
2257 * MCDI page 0 should be used to access lower
2258 * page 0 (0x00 - 0x7f) at the device address 0xA0.
2260 mcdi_lower_page = 0;
2262 * MCDI page 1 should be used to access upper
2263 * page 0 (0x80 - 0xff) at the device address 0xA0.
2265 mcdi_upper_page = 1;
2268 case EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_DDM:
2270 * MCDI page 2 should be used to access lower
2271 * page 0 (0x00 - 0x7f) at the device address 0xA2.
2273 mcdi_lower_page = 2;
2275 * MCDI page 3 should be used to access upper
2276 * page 0 (0x80 - 0xff) at the device address 0xA2.
2278 mcdi_upper_page = 3;
2285 case EFX_PHY_MEDIA_QSFP_PLUS:
2287 case EFX_PHY_MEDIA_INFO_DEV_ADDR_QSFP:
2289 * MCDI page -1 should be used to access lower page 0
2292 mcdi_lower_page = (uint32_t)-1;
2294 * MCDI page 0 should be used to access upper page 0
2297 mcdi_upper_page = 0;
2309 if (offset < EFX_PHY_MEDIA_INFO_PAGE_SIZE) {
2311 MIN(len, EFX_PHY_MEDIA_INFO_PAGE_SIZE - offset);
2313 rc = efx_mcdi_get_phy_media_info(enp,
2314 mcdi_lower_page, offset, read_len, data);
2323 offset -= EFX_PHY_MEDIA_INFO_PAGE_SIZE;
2327 EFSYS_ASSERT3U(len, <=, EFX_PHY_MEDIA_INFO_PAGE_SIZE);
2328 EFSYS_ASSERT3U(offset, <, EFX_PHY_MEDIA_INFO_PAGE_SIZE);
2330 rc = efx_mcdi_get_phy_media_info(enp,
2331 mcdi_upper_page, offset, len, data);
2343 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2348 #endif /* EFSYS_OPT_MCDI */