2 * Copyright (c) 2008-2016 Solarflare Communications Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * The views and conclusions contained in the software and documentation are
27 * those of the authors and should not be interpreted as representing official
28 * policies, either expressed or implied, of the FreeBSD Project.
37 * There are three versions of the MCDI interface:
38 * - MCDIv0: Siena BootROM. Transport uses MCDIv1 headers.
39 * - MCDIv1: Siena firmware and Huntington BootROM.
40 * - MCDIv2: EF10 firmware (Huntington/Medford) and Medford BootROM.
41 * Transport uses MCDIv2 headers.
43 * MCDIv2 Header NOT_EPOCH flag
44 * ----------------------------
45 * A new epoch begins at initial startup or after an MC reboot, and defines when
46 * the MC should reject stale MCDI requests.
48 * The first MCDI request sent by the host should contain NOT_EPOCH=0, and all
49 * subsequent requests (until the next MC reboot) should contain NOT_EPOCH=1.
51 * After rebooting the MC will fail all requests with NOT_EPOCH=1 by writing a
52 * response with ERROR=1 and DATALEN=0 until a request is seen with NOT_EPOCH=0.
59 static const efx_mcdi_ops_t __efx_mcdi_siena_ops = {
60 siena_mcdi_init, /* emco_init */
61 siena_mcdi_send_request, /* emco_send_request */
62 siena_mcdi_poll_reboot, /* emco_poll_reboot */
63 siena_mcdi_poll_response, /* emco_poll_response */
64 siena_mcdi_read_response, /* emco_read_response */
65 siena_mcdi_fini, /* emco_fini */
66 siena_mcdi_feature_supported, /* emco_feature_supported */
67 siena_mcdi_get_timeout, /* emco_get_timeout */
70 #endif /* EFSYS_OPT_SIENA */
72 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
74 static const efx_mcdi_ops_t __efx_mcdi_ef10_ops = {
75 ef10_mcdi_init, /* emco_init */
76 ef10_mcdi_send_request, /* emco_send_request */
77 ef10_mcdi_poll_reboot, /* emco_poll_reboot */
78 ef10_mcdi_poll_response, /* emco_poll_response */
79 ef10_mcdi_read_response, /* emco_read_response */
80 ef10_mcdi_fini, /* emco_fini */
81 ef10_mcdi_feature_supported, /* emco_feature_supported */
82 ef10_mcdi_get_timeout, /* emco_get_timeout */
85 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */
89 __checkReturn efx_rc_t
92 __in const efx_mcdi_transport_t *emtp)
94 const efx_mcdi_ops_t *emcop;
97 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
98 EFSYS_ASSERT3U(enp->en_mod_flags, ==, 0);
100 switch (enp->en_family) {
102 case EFX_FAMILY_SIENA:
103 emcop = &__efx_mcdi_siena_ops;
105 #endif /* EFSYS_OPT_SIENA */
107 #if EFSYS_OPT_HUNTINGTON
108 case EFX_FAMILY_HUNTINGTON:
109 emcop = &__efx_mcdi_ef10_ops;
111 #endif /* EFSYS_OPT_HUNTINGTON */
113 #if EFSYS_OPT_MEDFORD
114 case EFX_FAMILY_MEDFORD:
115 emcop = &__efx_mcdi_ef10_ops;
117 #endif /* EFSYS_OPT_MEDFORD */
125 if (enp->en_features & EFX_FEATURE_MCDI_DMA) {
126 /* MCDI requires a DMA buffer in host memory */
127 if ((emtp == NULL) || (emtp->emt_dma_mem) == NULL) {
132 enp->en_mcdi.em_emtp = emtp;
134 if (emcop != NULL && emcop->emco_init != NULL) {
135 if ((rc = emcop->emco_init(enp, emtp)) != 0)
139 enp->en_mcdi.em_emcop = emcop;
140 enp->en_mod_flags |= EFX_MOD_MCDI;
149 EFSYS_PROBE1(fail1, efx_rc_t, rc);
151 enp->en_mcdi.em_emcop = NULL;
152 enp->en_mcdi.em_emtp = NULL;
153 enp->en_mod_flags &= ~EFX_MOD_MCDI;
162 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
163 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
165 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
166 EFSYS_ASSERT3U(enp->en_mod_flags, ==, EFX_MOD_MCDI);
168 if (emcop != NULL && emcop->emco_fini != NULL)
169 emcop->emco_fini(enp);
172 emip->emi_aborted = 0;
174 enp->en_mcdi.em_emcop = NULL;
175 enp->en_mod_flags &= ~EFX_MOD_MCDI;
182 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
183 efsys_lock_state_t state;
185 /* Start a new epoch (allow fresh MCDI requests to succeed) */
186 EFSYS_LOCK(enp->en_eslp, state);
187 emip->emi_new_epoch = B_TRUE;
188 EFSYS_UNLOCK(enp->en_eslp, state);
192 efx_mcdi_send_request(
199 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
201 emcop->emco_send_request(enp, hdrp, hdr_len, sdup, sdu_len);
205 efx_mcdi_poll_reboot(
208 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
211 rc = emcop->emco_poll_reboot(enp);
216 efx_mcdi_poll_response(
219 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
222 available = emcop->emco_poll_response(enp);
227 efx_mcdi_read_response(
233 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
235 emcop->emco_read_response(enp, bufferp, offset, length);
239 efx_mcdi_request_start(
241 __in efx_mcdi_req_t *emrp,
242 __in boolean_t ev_cpl)
244 #if EFSYS_OPT_MCDI_LOGGING
245 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
247 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
250 unsigned int max_version;
254 efsys_lock_state_t state;
256 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
257 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
258 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
261 * efx_mcdi_request_start() is naturally serialised against both
262 * efx_mcdi_request_poll() and efx_mcdi_ev_cpl()/efx_mcdi_ev_death(),
263 * by virtue of there only being one outstanding MCDI request.
264 * Unfortunately, upper layers may also call efx_mcdi_request_abort()
265 * at any time, to timeout a pending mcdi request, That request may
266 * then subsequently complete, meaning efx_mcdi_ev_cpl() or
267 * efx_mcdi_ev_death() may end up running in parallel with
268 * efx_mcdi_request_start(). This race is handled by ensuring that
269 * %emi_pending_req, %emi_ev_cpl and %emi_seq are protected by the
272 EFSYS_LOCK(enp->en_eslp, state);
273 EFSYS_ASSERT(emip->emi_pending_req == NULL);
274 emip->emi_pending_req = emrp;
275 emip->emi_ev_cpl = ev_cpl;
276 emip->emi_poll_cnt = 0;
277 seq = emip->emi_seq++ & EFX_MASK32(MCDI_HEADER_SEQ);
278 new_epoch = emip->emi_new_epoch;
279 max_version = emip->emi_max_version;
280 EFSYS_UNLOCK(enp->en_eslp, state);
284 xflags |= MCDI_HEADER_XFLAGS_EVREQ;
287 * Huntington firmware supports MCDIv2, but the Huntington BootROM only
288 * supports MCDIv1. Use MCDIv1 headers for MCDIv1 commands where
289 * possible to support this.
291 if ((max_version >= 2) &&
292 ((emrp->emr_cmd > MC_CMD_CMD_SPACE_ESCAPE_7) ||
293 (emrp->emr_in_length > MCDI_CTL_SDU_LEN_MAX_V1))) {
294 /* Construct MCDI v2 header */
295 hdr_len = sizeof (hdr);
296 EFX_POPULATE_DWORD_8(hdr[0],
297 MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
298 MCDI_HEADER_RESYNC, 1,
299 MCDI_HEADER_DATALEN, 0,
300 MCDI_HEADER_SEQ, seq,
301 MCDI_HEADER_NOT_EPOCH, new_epoch ? 0 : 1,
302 MCDI_HEADER_ERROR, 0,
303 MCDI_HEADER_RESPONSE, 0,
304 MCDI_HEADER_XFLAGS, xflags);
306 EFX_POPULATE_DWORD_2(hdr[1],
307 MC_CMD_V2_EXTN_IN_EXTENDED_CMD, emrp->emr_cmd,
308 MC_CMD_V2_EXTN_IN_ACTUAL_LEN, emrp->emr_in_length);
310 /* Construct MCDI v1 header */
311 hdr_len = sizeof (hdr[0]);
312 EFX_POPULATE_DWORD_8(hdr[0],
313 MCDI_HEADER_CODE, emrp->emr_cmd,
314 MCDI_HEADER_RESYNC, 1,
315 MCDI_HEADER_DATALEN, emrp->emr_in_length,
316 MCDI_HEADER_SEQ, seq,
317 MCDI_HEADER_NOT_EPOCH, new_epoch ? 0 : 1,
318 MCDI_HEADER_ERROR, 0,
319 MCDI_HEADER_RESPONSE, 0,
320 MCDI_HEADER_XFLAGS, xflags);
323 #if EFSYS_OPT_MCDI_LOGGING
324 if (emtp->emt_logger != NULL) {
325 emtp->emt_logger(emtp->emt_context, EFX_LOG_MCDI_REQUEST,
327 emrp->emr_in_buf, emrp->emr_in_length);
329 #endif /* EFSYS_OPT_MCDI_LOGGING */
331 efx_mcdi_send_request(enp, &hdr[0], hdr_len,
332 emrp->emr_in_buf, emrp->emr_in_length);
337 efx_mcdi_read_response_header(
339 __inout efx_mcdi_req_t *emrp)
341 #if EFSYS_OPT_MCDI_LOGGING
342 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
343 #endif /* EFSYS_OPT_MCDI_LOGGING */
344 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
346 unsigned int hdr_len;
347 unsigned int data_len;
353 EFSYS_ASSERT(emrp != NULL);
355 efx_mcdi_read_response(enp, &hdr[0], 0, sizeof (hdr[0]));
356 hdr_len = sizeof (hdr[0]);
358 cmd = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_CODE);
359 seq = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_SEQ);
360 error = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_ERROR);
362 if (cmd != MC_CMD_V2_EXTN) {
363 data_len = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_DATALEN);
365 efx_mcdi_read_response(enp, &hdr[1], hdr_len, sizeof (hdr[1]));
366 hdr_len += sizeof (hdr[1]);
368 cmd = EFX_DWORD_FIELD(hdr[1], MC_CMD_V2_EXTN_IN_EXTENDED_CMD);
370 EFX_DWORD_FIELD(hdr[1], MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
373 if (error && (data_len == 0)) {
374 /* The MC has rebooted since the request was sent. */
375 EFSYS_SPIN(EFX_MCDI_STATUS_SLEEP_US);
376 efx_mcdi_poll_reboot(enp);
380 if ((cmd != emrp->emr_cmd) ||
381 (seq != ((emip->emi_seq - 1) & EFX_MASK32(MCDI_HEADER_SEQ)))) {
382 /* Response is for a different request */
388 unsigned int err_len = MIN(data_len, sizeof (err));
389 int err_code = MC_CMD_ERR_EPROTO;
392 /* Read error code (and arg num for MCDI v2 commands) */
393 efx_mcdi_read_response(enp, &err, hdr_len, err_len);
395 if (err_len >= (MC_CMD_ERR_CODE_OFST + sizeof (efx_dword_t)))
396 err_code = EFX_DWORD_FIELD(err[0], EFX_DWORD_0);
398 if (err_len >= (MC_CMD_ERR_ARG_OFST + sizeof (efx_dword_t)))
399 err_arg = EFX_DWORD_FIELD(err[1], EFX_DWORD_0);
401 emrp->emr_err_code = err_code;
402 emrp->emr_err_arg = err_arg;
404 #if EFSYS_OPT_MCDI_PROXY_AUTH
405 if ((err_code == MC_CMD_ERR_PROXY_PENDING) &&
406 (err_len == sizeof (err))) {
408 * The MCDI request would normally fail with EPERM, but
409 * firmware has forwarded it to an authorization agent
410 * attached to a privileged PF.
412 * Save the authorization request handle. The client
413 * must wait for a PROXY_RESPONSE event, or timeout.
415 emrp->emr_proxy_handle = err_arg;
417 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH */
419 #if EFSYS_OPT_MCDI_LOGGING
420 if (emtp->emt_logger != NULL) {
421 emtp->emt_logger(emtp->emt_context,
422 EFX_LOG_MCDI_RESPONSE,
426 #endif /* EFSYS_OPT_MCDI_LOGGING */
428 if (!emrp->emr_quiet) {
429 EFSYS_PROBE3(mcdi_err_arg, int, emrp->emr_cmd,
430 int, err_code, int, err_arg);
433 rc = efx_mcdi_request_errcode(err_code);
438 emrp->emr_out_length_used = data_len;
439 #if EFSYS_OPT_MCDI_PROXY_AUTH
440 emrp->emr_proxy_handle = 0;
441 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH */
448 emrp->emr_out_length_used = 0;
452 efx_mcdi_finish_response(
454 __in efx_mcdi_req_t *emrp)
456 #if EFSYS_OPT_MCDI_LOGGING
457 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
458 #endif /* EFSYS_OPT_MCDI_LOGGING */
460 unsigned int hdr_len;
463 if (emrp->emr_out_buf == NULL)
466 /* Read the command header to detect MCDI response format */
467 hdr_len = sizeof (hdr[0]);
468 efx_mcdi_read_response(enp, &hdr[0], 0, hdr_len);
469 if (EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_CODE) == MC_CMD_V2_EXTN) {
471 * Read the actual payload length. The length given in the event
472 * is only correct for responses with the V1 format.
474 efx_mcdi_read_response(enp, &hdr[1], hdr_len, sizeof (hdr[1]));
475 hdr_len += sizeof (hdr[1]);
477 emrp->emr_out_length_used = EFX_DWORD_FIELD(hdr[1],
478 MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
481 /* Copy payload out into caller supplied buffer */
482 bytes = MIN(emrp->emr_out_length_used, emrp->emr_out_length);
483 efx_mcdi_read_response(enp, emrp->emr_out_buf, hdr_len, bytes);
485 #if EFSYS_OPT_MCDI_LOGGING
486 if (emtp->emt_logger != NULL) {
487 emtp->emt_logger(emtp->emt_context,
488 EFX_LOG_MCDI_RESPONSE,
490 emrp->emr_out_buf, bytes);
492 #endif /* EFSYS_OPT_MCDI_LOGGING */
496 __checkReturn boolean_t
497 efx_mcdi_request_poll(
500 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
501 efx_mcdi_req_t *emrp;
502 efsys_lock_state_t state;
505 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
506 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
507 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
509 /* Serialise against post-watchdog efx_mcdi_ev* */
510 EFSYS_LOCK(enp->en_eslp, state);
512 EFSYS_ASSERT(emip->emi_pending_req != NULL);
513 EFSYS_ASSERT(!emip->emi_ev_cpl);
514 emrp = emip->emi_pending_req;
516 /* Check for reboot atomically w.r.t efx_mcdi_request_start */
517 if (emip->emi_poll_cnt++ == 0) {
518 if ((rc = efx_mcdi_poll_reboot(enp)) != 0) {
519 emip->emi_pending_req = NULL;
520 EFSYS_UNLOCK(enp->en_eslp, state);
522 /* Reboot/Assertion */
523 if (rc == EIO || rc == EINTR)
524 efx_mcdi_raise_exception(enp, emrp, rc);
530 /* Check if a response is available */
531 if (efx_mcdi_poll_response(enp) == B_FALSE) {
532 EFSYS_UNLOCK(enp->en_eslp, state);
536 /* Read the response header */
537 efx_mcdi_read_response_header(enp, emrp);
539 /* Request complete */
540 emip->emi_pending_req = NULL;
542 /* Ensure stale MCDI requests fail after an MC reboot. */
543 emip->emi_new_epoch = B_FALSE;
545 EFSYS_UNLOCK(enp->en_eslp, state);
547 if ((rc = emrp->emr_rc) != 0)
550 efx_mcdi_finish_response(enp, emrp);
554 if (!emrp->emr_quiet)
557 if (!emrp->emr_quiet)
558 EFSYS_PROBE1(fail1, efx_rc_t, rc);
563 __checkReturn boolean_t
564 efx_mcdi_request_abort(
567 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
568 efx_mcdi_req_t *emrp;
570 efsys_lock_state_t state;
572 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
573 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
574 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
577 * efx_mcdi_ev_* may have already completed this event, and be
578 * spinning/blocked on the upper layer lock. So it *is* legitimate
579 * to for emi_pending_req to be NULL. If there is a pending event
580 * completed request, then provide a "credit" to allow
581 * efx_mcdi_ev_cpl() to accept a single spurious completion.
583 EFSYS_LOCK(enp->en_eslp, state);
584 emrp = emip->emi_pending_req;
585 aborted = (emrp != NULL);
587 emip->emi_pending_req = NULL;
589 /* Error the request */
590 emrp->emr_out_length_used = 0;
591 emrp->emr_rc = ETIMEDOUT;
593 /* Provide a credit for seqno/emr_pending_req mismatches */
594 if (emip->emi_ev_cpl)
598 * The upper layer has called us, so we don't
599 * need to complete the request.
602 EFSYS_UNLOCK(enp->en_eslp, state);
608 efx_mcdi_get_timeout(
610 __in efx_mcdi_req_t *emrp,
611 __out uint32_t *timeoutp)
613 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
615 emcop->emco_get_timeout(enp, emrp, timeoutp);
618 __checkReturn efx_rc_t
619 efx_mcdi_request_errcode(
620 __in unsigned int err)
625 case MC_CMD_ERR_EPERM:
627 case MC_CMD_ERR_ENOENT:
629 case MC_CMD_ERR_EINTR:
631 case MC_CMD_ERR_EACCES:
633 case MC_CMD_ERR_EBUSY:
635 case MC_CMD_ERR_EINVAL:
637 case MC_CMD_ERR_EDEADLK:
639 case MC_CMD_ERR_ENOSYS:
641 case MC_CMD_ERR_ETIME:
643 case MC_CMD_ERR_ENOTSUP:
645 case MC_CMD_ERR_EALREADY:
649 case MC_CMD_ERR_EEXIST:
651 #ifdef MC_CMD_ERR_EAGAIN
652 case MC_CMD_ERR_EAGAIN:
655 #ifdef MC_CMD_ERR_ENOSPC
656 case MC_CMD_ERR_ENOSPC:
659 case MC_CMD_ERR_ERANGE:
662 case MC_CMD_ERR_ALLOC_FAIL:
664 case MC_CMD_ERR_NO_VADAPTOR:
666 case MC_CMD_ERR_NO_EVB_PORT:
668 case MC_CMD_ERR_NO_VSWITCH:
670 case MC_CMD_ERR_VLAN_LIMIT:
672 case MC_CMD_ERR_BAD_PCI_FUNC:
674 case MC_CMD_ERR_BAD_VLAN_MODE:
676 case MC_CMD_ERR_BAD_VSWITCH_TYPE:
678 case MC_CMD_ERR_BAD_VPORT_TYPE:
680 case MC_CMD_ERR_MAC_EXIST:
683 case MC_CMD_ERR_PROXY_PENDING:
687 EFSYS_PROBE1(mc_pcol_error, int, err);
693 efx_mcdi_raise_exception(
695 __in_opt efx_mcdi_req_t *emrp,
698 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
699 efx_mcdi_exception_t exception;
701 /* Reboot or Assertion failure only */
702 EFSYS_ASSERT(rc == EIO || rc == EINTR);
705 * If MC_CMD_REBOOT causes a reboot (dependent on parameters),
706 * then the EIO is not worthy of an exception.
708 if (emrp != NULL && emrp->emr_cmd == MC_CMD_REBOOT && rc == EIO)
711 exception = (rc == EIO)
712 ? EFX_MCDI_EXCEPTION_MC_REBOOT
713 : EFX_MCDI_EXCEPTION_MC_BADASSERT;
715 emtp->emt_exception(emtp->emt_context, exception);
721 __inout efx_mcdi_req_t *emrp)
723 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
725 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
726 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
728 emrp->emr_quiet = B_FALSE;
729 emtp->emt_execute(emtp->emt_context, emrp);
733 efx_mcdi_execute_quiet(
735 __inout efx_mcdi_req_t *emrp)
737 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
739 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
740 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
742 emrp->emr_quiet = B_TRUE;
743 emtp->emt_execute(emtp->emt_context, emrp);
749 __in unsigned int seq,
750 __in unsigned int outlen,
753 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
754 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
755 efx_mcdi_req_t *emrp;
756 efsys_lock_state_t state;
758 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
759 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
762 * Serialise against efx_mcdi_request_poll()/efx_mcdi_request_start()
763 * when we're completing an aborted request.
765 EFSYS_LOCK(enp->en_eslp, state);
766 if (emip->emi_pending_req == NULL || !emip->emi_ev_cpl ||
767 (seq != ((emip->emi_seq - 1) & EFX_MASK32(MCDI_HEADER_SEQ)))) {
768 EFSYS_ASSERT(emip->emi_aborted > 0);
769 if (emip->emi_aborted > 0)
771 EFSYS_UNLOCK(enp->en_eslp, state);
775 emrp = emip->emi_pending_req;
776 emip->emi_pending_req = NULL;
777 EFSYS_UNLOCK(enp->en_eslp, state);
779 if (emip->emi_max_version >= 2) {
780 /* MCDIv2 response details do not fit into an event. */
781 efx_mcdi_read_response_header(enp, emrp);
784 if (!emrp->emr_quiet) {
785 EFSYS_PROBE2(mcdi_err, int, emrp->emr_cmd,
788 emrp->emr_out_length_used = 0;
789 emrp->emr_rc = efx_mcdi_request_errcode(errcode);
791 emrp->emr_out_length_used = outlen;
796 efx_mcdi_finish_response(enp, emrp);
799 emtp->emt_ev_cpl(emtp->emt_context);
802 #if EFSYS_OPT_MCDI_PROXY_AUTH
804 __checkReturn efx_rc_t
805 efx_mcdi_get_proxy_handle(
807 __in efx_mcdi_req_t *emrp,
808 __out uint32_t *handlep)
813 * Return proxy handle from MCDI request that returned with error
814 * MC_MCD_ERR_PROXY_PENDING. This handle is used to wait for a matching
815 * PROXY_RESPONSE event.
817 if ((emrp == NULL) || (handlep == NULL)) {
821 if ((emrp->emr_rc != 0) &&
822 (emrp->emr_err_code == MC_CMD_ERR_PROXY_PENDING)) {
823 *handlep = emrp->emr_proxy_handle;
832 EFSYS_PROBE1(fail1, efx_rc_t, rc);
837 efx_mcdi_ev_proxy_response(
839 __in unsigned int handle,
840 __in unsigned int status)
842 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
846 * Handle results of an authorization request for a privileged MCDI
847 * command. If authorization was granted then we must re-issue the
848 * original MCDI request. If authorization failed or timed out,
849 * then the original MCDI request should be completed with the
850 * result code from this event.
852 rc = (status == 0) ? 0 : efx_mcdi_request_errcode(status);
854 emtp->emt_ev_proxy_response(emtp->emt_context, handle, rc);
856 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH */
863 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
864 const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
865 efx_mcdi_req_t *emrp = NULL;
867 efsys_lock_state_t state;
870 * The MCDI request (if there is one) has been terminated, either
871 * by a BADASSERT or REBOOT event.
873 * If there is an outstanding event-completed MCDI operation, then we
874 * will never receive the completion event (because both MCDI
875 * completions and BADASSERT events are sent to the same evq). So
876 * complete this MCDI op.
878 * This function might run in parallel with efx_mcdi_request_poll()
879 * for poll completed mcdi requests, and also with
880 * efx_mcdi_request_start() for post-watchdog completions.
882 EFSYS_LOCK(enp->en_eslp, state);
883 emrp = emip->emi_pending_req;
884 ev_cpl = emip->emi_ev_cpl;
885 if (emrp != NULL && emip->emi_ev_cpl) {
886 emip->emi_pending_req = NULL;
888 emrp->emr_out_length_used = 0;
894 * Since we're running in parallel with a request, consume the
895 * status word before dropping the lock.
897 if (rc == EIO || rc == EINTR) {
898 EFSYS_SPIN(EFX_MCDI_STATUS_SLEEP_US);
899 (void) efx_mcdi_poll_reboot(enp);
900 emip->emi_new_epoch = B_TRUE;
903 EFSYS_UNLOCK(enp->en_eslp, state);
905 efx_mcdi_raise_exception(enp, emrp, rc);
907 if (emrp != NULL && ev_cpl)
908 emtp->emt_ev_cpl(emtp->emt_context);
911 __checkReturn efx_rc_t
914 __out_ecount_opt(4) uint16_t versionp[4],
915 __out_opt uint32_t *buildp,
916 __out_opt efx_mcdi_boot_t *statusp)
919 uint8_t payload[MAX(MAX(MC_CMD_GET_VERSION_IN_LEN,
920 MC_CMD_GET_VERSION_OUT_LEN),
921 MAX(MC_CMD_GET_BOOT_STATUS_IN_LEN,
922 MC_CMD_GET_BOOT_STATUS_OUT_LEN))];
923 efx_word_t *ver_words;
926 efx_mcdi_boot_t status;
929 EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);
931 (void) memset(payload, 0, sizeof (payload));
932 req.emr_cmd = MC_CMD_GET_VERSION;
933 req.emr_in_buf = payload;
934 req.emr_in_length = MC_CMD_GET_VERSION_IN_LEN;
935 req.emr_out_buf = payload;
936 req.emr_out_length = MC_CMD_GET_VERSION_OUT_LEN;
938 efx_mcdi_execute(enp, &req);
940 if (req.emr_rc != 0) {
945 /* bootrom support */
946 if (req.emr_out_length_used == MC_CMD_GET_VERSION_V0_OUT_LEN) {
947 version[0] = version[1] = version[2] = version[3] = 0;
948 build = MCDI_OUT_DWORD(req, GET_VERSION_OUT_FIRMWARE);
953 if (req.emr_out_length_used < MC_CMD_GET_VERSION_OUT_LEN) {
958 ver_words = MCDI_OUT2(req, efx_word_t, GET_VERSION_OUT_VERSION);
959 version[0] = EFX_WORD_FIELD(ver_words[0], EFX_WORD_0);
960 version[1] = EFX_WORD_FIELD(ver_words[1], EFX_WORD_0);
961 version[2] = EFX_WORD_FIELD(ver_words[2], EFX_WORD_0);
962 version[3] = EFX_WORD_FIELD(ver_words[3], EFX_WORD_0);
963 build = MCDI_OUT_DWORD(req, GET_VERSION_OUT_FIRMWARE);
966 /* The bootrom doesn't understand BOOT_STATUS */
967 if (MC_FW_VERSION_IS_BOOTLOADER(build)) {
968 status = EFX_MCDI_BOOT_ROM;
972 (void) memset(payload, 0, sizeof (payload));
973 req.emr_cmd = MC_CMD_GET_BOOT_STATUS;
974 req.emr_in_buf = payload;
975 req.emr_in_length = MC_CMD_GET_BOOT_STATUS_IN_LEN;
976 req.emr_out_buf = payload;
977 req.emr_out_length = MC_CMD_GET_BOOT_STATUS_OUT_LEN;
979 efx_mcdi_execute_quiet(enp, &req);
981 if (req.emr_rc == EACCES) {
982 /* Unprivileged functions cannot access BOOT_STATUS */
983 status = EFX_MCDI_BOOT_PRIMARY;
984 version[0] = version[1] = version[2] = version[3] = 0;
989 if (req.emr_rc != 0) {
994 if (req.emr_out_length_used < MC_CMD_GET_BOOT_STATUS_OUT_LEN) {
999 if (MCDI_OUT_DWORD_FIELD(req, GET_BOOT_STATUS_OUT_FLAGS,
1000 GET_BOOT_STATUS_OUT_FLAGS_PRIMARY))
1001 status = EFX_MCDI_BOOT_PRIMARY;
1003 status = EFX_MCDI_BOOT_SECONDARY;
1006 if (versionp != NULL)
1007 memcpy(versionp, version, sizeof (version));
1010 if (statusp != NULL)
1022 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1027 __checkReturn efx_rc_t
1028 efx_mcdi_get_capabilities(
1029 __in efx_nic_t *enp,
1030 __out_opt uint32_t *flagsp,
1031 __out_opt uint16_t *rx_dpcpu_fw_idp,
1032 __out_opt uint16_t *tx_dpcpu_fw_idp,
1033 __out_opt uint32_t *flags2p,
1034 __out_opt uint32_t *tso2ncp)
1037 uint8_t payload[MAX(MC_CMD_GET_CAPABILITIES_IN_LEN,
1038 MC_CMD_GET_CAPABILITIES_V2_OUT_LEN)];
1039 boolean_t v2_capable;
1042 (void) memset(payload, 0, sizeof (payload));
1043 req.emr_cmd = MC_CMD_GET_CAPABILITIES;
1044 req.emr_in_buf = payload;
1045 req.emr_in_length = MC_CMD_GET_CAPABILITIES_IN_LEN;
1046 req.emr_out_buf = payload;
1047 req.emr_out_length = MC_CMD_GET_CAPABILITIES_V2_OUT_LEN;
1049 efx_mcdi_execute_quiet(enp, &req);
1051 if (req.emr_rc != 0) {
1056 if (req.emr_out_length_used < MC_CMD_GET_CAPABILITIES_OUT_LEN) {
1062 *flagsp = MCDI_OUT_DWORD(req, GET_CAPABILITIES_OUT_FLAGS1);
1064 if (rx_dpcpu_fw_idp != NULL)
1065 *rx_dpcpu_fw_idp = MCDI_OUT_WORD(req,
1066 GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID);
1068 if (tx_dpcpu_fw_idp != NULL)
1069 *tx_dpcpu_fw_idp = MCDI_OUT_WORD(req,
1070 GET_CAPABILITIES_OUT_TX_DPCPU_FW_ID);
1072 if (req.emr_out_length_used < MC_CMD_GET_CAPABILITIES_V2_OUT_LEN)
1073 v2_capable = B_FALSE;
1075 v2_capable = B_TRUE;
1077 if (flags2p != NULL) {
1078 *flags2p = (v2_capable) ?
1079 MCDI_OUT_DWORD(req, GET_CAPABILITIES_V2_OUT_FLAGS2) :
1083 if (tso2ncp != NULL) {
1084 *tso2ncp = (v2_capable) ?
1086 GET_CAPABILITIES_V2_OUT_TX_TSO_V2_N_CONTEXTS) :
1095 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1100 static __checkReturn efx_rc_t
1102 __in efx_nic_t *enp,
1103 __in boolean_t after_assertion)
1105 uint8_t payload[MAX(MC_CMD_REBOOT_IN_LEN, MC_CMD_REBOOT_OUT_LEN)];
1110 * We could require the caller to have caused en_mod_flags=0 to
1111 * call this function. This doesn't help the other port though,
1112 * who's about to get the MC ripped out from underneath them.
1113 * Since they have to cope with the subsequent fallout of MCDI
1114 * failures, we should as well.
1116 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
1118 (void) memset(payload, 0, sizeof (payload));
1119 req.emr_cmd = MC_CMD_REBOOT;
1120 req.emr_in_buf = payload;
1121 req.emr_in_length = MC_CMD_REBOOT_IN_LEN;
1122 req.emr_out_buf = payload;
1123 req.emr_out_length = MC_CMD_REBOOT_OUT_LEN;
1125 MCDI_IN_SET_DWORD(req, REBOOT_IN_FLAGS,
1126 (after_assertion ? MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION : 0));
1128 efx_mcdi_execute_quiet(enp, &req);
1130 if (req.emr_rc == EACCES) {
1131 /* Unprivileged functions cannot reboot the MC. */
1135 /* A successful reboot request returns EIO. */
1136 if (req.emr_rc != 0 && req.emr_rc != EIO) {
1145 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1150 __checkReturn efx_rc_t
1152 __in efx_nic_t *enp)
1154 return (efx_mcdi_do_reboot(enp, B_FALSE));
1157 __checkReturn efx_rc_t
1158 efx_mcdi_exit_assertion_handler(
1159 __in efx_nic_t *enp)
1161 return (efx_mcdi_do_reboot(enp, B_TRUE));
1164 __checkReturn efx_rc_t
1165 efx_mcdi_read_assertion(
1166 __in efx_nic_t *enp)
1169 uint8_t payload[MAX(MC_CMD_GET_ASSERTS_IN_LEN,
1170 MC_CMD_GET_ASSERTS_OUT_LEN)];
1179 * Before we attempt to chat to the MC, we should verify that the MC
1180 * isn't in it's assertion handler, either due to a previous reboot,
1181 * or because we're reinitializing due to an eec_exception().
1183 * Use GET_ASSERTS to read any assertion state that may be present.
1184 * Retry this command twice. Once because a boot-time assertion failure
1185 * might cause the 1st MCDI request to fail. And once again because
1186 * we might race with efx_mcdi_exit_assertion_handler() running on
1187 * partner port(s) on the same NIC.
1191 (void) memset(payload, 0, sizeof (payload));
1192 req.emr_cmd = MC_CMD_GET_ASSERTS;
1193 req.emr_in_buf = payload;
1194 req.emr_in_length = MC_CMD_GET_ASSERTS_IN_LEN;
1195 req.emr_out_buf = payload;
1196 req.emr_out_length = MC_CMD_GET_ASSERTS_OUT_LEN;
1198 MCDI_IN_SET_DWORD(req, GET_ASSERTS_IN_CLEAR, 1);
1199 efx_mcdi_execute_quiet(enp, &req);
1201 } while ((req.emr_rc == EINTR || req.emr_rc == EIO) && retry-- > 0);
1203 if (req.emr_rc != 0) {
1204 if (req.emr_rc == EACCES) {
1205 /* Unprivileged functions cannot clear assertions. */
1212 if (req.emr_out_length_used < MC_CMD_GET_ASSERTS_OUT_LEN) {
1217 /* Print out any assertion state recorded */
1218 flags = MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_GLOBAL_FLAGS);
1219 if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
1222 reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
1223 ? "system-level assertion"
1224 : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
1225 ? "thread-level assertion"
1226 : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
1228 : (flags == MC_CMD_GET_ASSERTS_FLAGS_ADDR_TRAP)
1229 ? "illegal address trap"
1230 : "unknown assertion";
1231 EFSYS_PROBE3(mcpu_assertion,
1232 const char *, reason, unsigned int,
1233 MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_SAVED_PC_OFFS),
1235 MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_THREAD_OFFS));
1237 /* Print out the registers (r1 ... r31) */
1238 ofst = MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_OFST;
1240 index < 1 + MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
1242 EFSYS_PROBE2(mcpu_register, unsigned int, index, unsigned int,
1243 EFX_DWORD_FIELD(*MCDI_OUT(req, efx_dword_t, ofst),
1245 ofst += sizeof (efx_dword_t);
1247 EFSYS_ASSERT(ofst <= MC_CMD_GET_ASSERTS_OUT_LEN);
1255 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1262 * Internal routines for for specific MCDI requests.
1265 __checkReturn efx_rc_t
1266 efx_mcdi_drv_attach(
1267 __in efx_nic_t *enp,
1268 __in boolean_t attach)
1271 uint8_t payload[MAX(MC_CMD_DRV_ATTACH_IN_LEN,
1272 MC_CMD_DRV_ATTACH_EXT_OUT_LEN)];
1275 (void) memset(payload, 0, sizeof (payload));
1276 req.emr_cmd = MC_CMD_DRV_ATTACH;
1277 req.emr_in_buf = payload;
1278 req.emr_in_length = MC_CMD_DRV_ATTACH_IN_LEN;
1279 req.emr_out_buf = payload;
1280 req.emr_out_length = MC_CMD_DRV_ATTACH_EXT_OUT_LEN;
1283 * Use DONT_CARE for the datapath firmware type to ensure that the
1284 * driver can attach to an unprivileged function. The datapath firmware
1285 * type to use is controlled by the 'sfboot' utility.
1287 MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_NEW_STATE, attach ? 1 : 0);
1288 MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_UPDATE, 1);
1289 MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_DONT_CARE);
1291 efx_mcdi_execute(enp, &req);
1293 if (req.emr_rc != 0) {
1298 if (req.emr_out_length_used < MC_CMD_DRV_ATTACH_OUT_LEN) {
1308 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1313 __checkReturn efx_rc_t
1314 efx_mcdi_get_board_cfg(
1315 __in efx_nic_t *enp,
1316 __out_opt uint32_t *board_typep,
1317 __out_opt efx_dword_t *capabilitiesp,
1318 __out_ecount_opt(6) uint8_t mac_addrp[6])
1320 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
1322 uint8_t payload[MAX(MC_CMD_GET_BOARD_CFG_IN_LEN,
1323 MC_CMD_GET_BOARD_CFG_OUT_LENMIN)];
1326 (void) memset(payload, 0, sizeof (payload));
1327 req.emr_cmd = MC_CMD_GET_BOARD_CFG;
1328 req.emr_in_buf = payload;
1329 req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN;
1330 req.emr_out_buf = payload;
1331 req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMIN;
1333 efx_mcdi_execute(enp, &req);
1335 if (req.emr_rc != 0) {
1340 if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
1345 if (mac_addrp != NULL) {
1348 if (emip->emi_port == 1) {
1349 addrp = MCDI_OUT2(req, uint8_t,
1350 GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0);
1351 } else if (emip->emi_port == 2) {
1352 addrp = MCDI_OUT2(req, uint8_t,
1353 GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1);
1359 EFX_MAC_ADDR_COPY(mac_addrp, addrp);
1362 if (capabilitiesp != NULL) {
1363 if (emip->emi_port == 1) {
1364 *capabilitiesp = *MCDI_OUT2(req, efx_dword_t,
1365 GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
1366 } else if (emip->emi_port == 2) {
1367 *capabilitiesp = *MCDI_OUT2(req, efx_dword_t,
1368 GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
1375 if (board_typep != NULL) {
1376 *board_typep = MCDI_OUT_DWORD(req,
1377 GET_BOARD_CFG_OUT_BOARD_TYPE);
1389 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1394 __checkReturn efx_rc_t
1395 efx_mcdi_get_resource_limits(
1396 __in efx_nic_t *enp,
1397 __out_opt uint32_t *nevqp,
1398 __out_opt uint32_t *nrxqp,
1399 __out_opt uint32_t *ntxqp)
1402 uint8_t payload[MAX(MC_CMD_GET_RESOURCE_LIMITS_IN_LEN,
1403 MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN)];
1406 (void) memset(payload, 0, sizeof (payload));
1407 req.emr_cmd = MC_CMD_GET_RESOURCE_LIMITS;
1408 req.emr_in_buf = payload;
1409 req.emr_in_length = MC_CMD_GET_RESOURCE_LIMITS_IN_LEN;
1410 req.emr_out_buf = payload;
1411 req.emr_out_length = MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN;
1413 efx_mcdi_execute(enp, &req);
1415 if (req.emr_rc != 0) {
1420 if (req.emr_out_length_used < MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN) {
1426 *nevqp = MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_EVQ);
1428 *nrxqp = MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_RXQ);
1430 *ntxqp = MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_TXQ);
1437 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1442 __checkReturn efx_rc_t
1443 efx_mcdi_get_phy_cfg(
1444 __in efx_nic_t *enp)
1446 efx_port_t *epp = &(enp->en_port);
1447 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1449 uint8_t payload[MAX(MC_CMD_GET_PHY_CFG_IN_LEN,
1450 MC_CMD_GET_PHY_CFG_OUT_LEN)];
1453 (void) memset(payload, 0, sizeof (payload));
1454 req.emr_cmd = MC_CMD_GET_PHY_CFG;
1455 req.emr_in_buf = payload;
1456 req.emr_in_length = MC_CMD_GET_PHY_CFG_IN_LEN;
1457 req.emr_out_buf = payload;
1458 req.emr_out_length = MC_CMD_GET_PHY_CFG_OUT_LEN;
1460 efx_mcdi_execute(enp, &req);
1462 if (req.emr_rc != 0) {
1467 if (req.emr_out_length_used < MC_CMD_GET_PHY_CFG_OUT_LEN) {
1472 encp->enc_phy_type = MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_TYPE);
1474 (void) strncpy(encp->enc_phy_name,
1475 MCDI_OUT2(req, char, GET_PHY_CFG_OUT_NAME),
1476 MIN(sizeof (encp->enc_phy_name) - 1,
1477 MC_CMD_GET_PHY_CFG_OUT_NAME_LEN));
1478 #endif /* EFSYS_OPT_NAMES */
1479 (void) memset(encp->enc_phy_revision, 0,
1480 sizeof (encp->enc_phy_revision));
1481 memcpy(encp->enc_phy_revision,
1482 MCDI_OUT2(req, char, GET_PHY_CFG_OUT_REVISION),
1483 MIN(sizeof (encp->enc_phy_revision) - 1,
1484 MC_CMD_GET_PHY_CFG_OUT_REVISION_LEN));
1485 #if EFSYS_OPT_PHY_LED_CONTROL
1486 encp->enc_led_mask = ((1 << EFX_PHY_LED_DEFAULT) |
1487 (1 << EFX_PHY_LED_OFF) |
1488 (1 << EFX_PHY_LED_ON));
1489 #endif /* EFSYS_OPT_PHY_LED_CONTROL */
1491 /* Get the media type of the fixed port, if recognised. */
1492 EFX_STATIC_ASSERT(MC_CMD_MEDIA_XAUI == EFX_PHY_MEDIA_XAUI);
1493 EFX_STATIC_ASSERT(MC_CMD_MEDIA_CX4 == EFX_PHY_MEDIA_CX4);
1494 EFX_STATIC_ASSERT(MC_CMD_MEDIA_KX4 == EFX_PHY_MEDIA_KX4);
1495 EFX_STATIC_ASSERT(MC_CMD_MEDIA_XFP == EFX_PHY_MEDIA_XFP);
1496 EFX_STATIC_ASSERT(MC_CMD_MEDIA_SFP_PLUS == EFX_PHY_MEDIA_SFP_PLUS);
1497 EFX_STATIC_ASSERT(MC_CMD_MEDIA_BASE_T == EFX_PHY_MEDIA_BASE_T);
1498 EFX_STATIC_ASSERT(MC_CMD_MEDIA_QSFP_PLUS == EFX_PHY_MEDIA_QSFP_PLUS);
1499 epp->ep_fixed_port_type =
1500 (efx_phy_media_type_t) MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_MEDIA_TYPE);
1501 if (epp->ep_fixed_port_type >= EFX_PHY_MEDIA_NTYPES)
1502 epp->ep_fixed_port_type = EFX_PHY_MEDIA_INVALID;
1504 epp->ep_phy_cap_mask =
1505 MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_SUPPORTED_CAP);
1506 #if EFSYS_OPT_PHY_FLAGS
1507 encp->enc_phy_flags_mask = MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_FLAGS);
1508 #endif /* EFSYS_OPT_PHY_FLAGS */
1510 encp->enc_port = (uint8_t)MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_PRT);
1512 /* Populate internal state */
1513 encp->enc_mcdi_mdio_channel =
1514 (uint8_t)MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_CHANNEL);
1516 #if EFSYS_OPT_PHY_STATS
1517 encp->enc_mcdi_phy_stat_mask =
1518 MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_STATS_MASK);
1519 #endif /* EFSYS_OPT_PHY_STATS */
1522 encp->enc_bist_mask = 0;
1523 if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS,
1524 GET_PHY_CFG_OUT_BIST_CABLE_SHORT))
1525 encp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_CABLE_SHORT);
1526 if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS,
1527 GET_PHY_CFG_OUT_BIST_CABLE_LONG))
1528 encp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_CABLE_LONG);
1529 if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS,
1530 GET_PHY_CFG_OUT_BIST))
1531 encp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_NORMAL);
1532 #endif /* EFSYS_OPT_BIST */
1539 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1544 __checkReturn efx_rc_t
1545 efx_mcdi_firmware_update_supported(
1546 __in efx_nic_t *enp,
1547 __out boolean_t *supportedp)
1549 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
1552 if (emcop != NULL) {
1553 if ((rc = emcop->emco_feature_supported(enp,
1554 EFX_MCDI_FEATURE_FW_UPDATE, supportedp)) != 0)
1557 /* Earlier devices always supported updates */
1558 *supportedp = B_TRUE;
1564 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1569 __checkReturn efx_rc_t
1570 efx_mcdi_macaddr_change_supported(
1571 __in efx_nic_t *enp,
1572 __out boolean_t *supportedp)
1574 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
1577 if (emcop != NULL) {
1578 if ((rc = emcop->emco_feature_supported(enp,
1579 EFX_MCDI_FEATURE_MACADDR_CHANGE, supportedp)) != 0)
1582 /* Earlier devices always supported MAC changes */
1583 *supportedp = B_TRUE;
1589 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1594 __checkReturn efx_rc_t
1595 efx_mcdi_link_control_supported(
1596 __in efx_nic_t *enp,
1597 __out boolean_t *supportedp)
1599 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
1602 if (emcop != NULL) {
1603 if ((rc = emcop->emco_feature_supported(enp,
1604 EFX_MCDI_FEATURE_LINK_CONTROL, supportedp)) != 0)
1607 /* Earlier devices always supported link control */
1608 *supportedp = B_TRUE;
1614 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1619 __checkReturn efx_rc_t
1620 efx_mcdi_mac_spoofing_supported(
1621 __in efx_nic_t *enp,
1622 __out boolean_t *supportedp)
1624 const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
1627 if (emcop != NULL) {
1628 if ((rc = emcop->emco_feature_supported(enp,
1629 EFX_MCDI_FEATURE_MAC_SPOOFING, supportedp)) != 0)
1632 /* Earlier devices always supported MAC spoofing */
1633 *supportedp = B_TRUE;
1639 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1646 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
1648 * Enter bist offline mode. This is a fw mode which puts the NIC into a state
1649 * where memory BIST tests can be run and not much else can interfere or happen.
1650 * A reboot is required to exit this mode.
1652 __checkReturn efx_rc_t
1653 efx_mcdi_bist_enable_offline(
1654 __in efx_nic_t *enp)
1659 EFX_STATIC_ASSERT(MC_CMD_ENABLE_OFFLINE_BIST_IN_LEN == 0);
1660 EFX_STATIC_ASSERT(MC_CMD_ENABLE_OFFLINE_BIST_OUT_LEN == 0);
1662 req.emr_cmd = MC_CMD_ENABLE_OFFLINE_BIST;
1663 req.emr_in_buf = NULL;
1664 req.emr_in_length = 0;
1665 req.emr_out_buf = NULL;
1666 req.emr_out_length = 0;
1668 efx_mcdi_execute(enp, &req);
1670 if (req.emr_rc != 0) {
1678 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1682 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */
1684 __checkReturn efx_rc_t
1685 efx_mcdi_bist_start(
1686 __in efx_nic_t *enp,
1687 __in efx_bist_type_t type)
1690 uint8_t payload[MAX(MC_CMD_START_BIST_IN_LEN,
1691 MC_CMD_START_BIST_OUT_LEN)];
1694 (void) memset(payload, 0, sizeof (payload));
1695 req.emr_cmd = MC_CMD_START_BIST;
1696 req.emr_in_buf = payload;
1697 req.emr_in_length = MC_CMD_START_BIST_IN_LEN;
1698 req.emr_out_buf = payload;
1699 req.emr_out_length = MC_CMD_START_BIST_OUT_LEN;
1702 case EFX_BIST_TYPE_PHY_NORMAL:
1703 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE, MC_CMD_PHY_BIST);
1705 case EFX_BIST_TYPE_PHY_CABLE_SHORT:
1706 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1707 MC_CMD_PHY_BIST_CABLE_SHORT);
1709 case EFX_BIST_TYPE_PHY_CABLE_LONG:
1710 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1711 MC_CMD_PHY_BIST_CABLE_LONG);
1713 case EFX_BIST_TYPE_MC_MEM:
1714 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1715 MC_CMD_MC_MEM_BIST);
1717 case EFX_BIST_TYPE_SAT_MEM:
1718 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1719 MC_CMD_PORT_MEM_BIST);
1721 case EFX_BIST_TYPE_REG:
1722 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
1729 efx_mcdi_execute(enp, &req);
1731 if (req.emr_rc != 0) {
1739 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1744 #endif /* EFSYS_OPT_BIST */
1747 /* Enable logging of some events (e.g. link state changes) */
1748 __checkReturn efx_rc_t
1750 __in efx_nic_t *enp)
1753 uint8_t payload[MAX(MC_CMD_LOG_CTRL_IN_LEN,
1754 MC_CMD_LOG_CTRL_OUT_LEN)];
1757 (void) memset(payload, 0, sizeof (payload));
1758 req.emr_cmd = MC_CMD_LOG_CTRL;
1759 req.emr_in_buf = payload;
1760 req.emr_in_length = MC_CMD_LOG_CTRL_IN_LEN;
1761 req.emr_out_buf = payload;
1762 req.emr_out_length = MC_CMD_LOG_CTRL_OUT_LEN;
1764 MCDI_IN_SET_DWORD(req, LOG_CTRL_IN_LOG_DEST,
1765 MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ);
1766 MCDI_IN_SET_DWORD(req, LOG_CTRL_IN_LOG_DEST_EVQ, 0);
1768 efx_mcdi_execute(enp, &req);
1770 if (req.emr_rc != 0) {
1778 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1784 #if EFSYS_OPT_MAC_STATS
1786 typedef enum efx_stats_action_e {
1789 EFX_STATS_ENABLE_NOEVENTS,
1790 EFX_STATS_ENABLE_EVENTS,
1792 } efx_stats_action_t;
1794 static __checkReturn efx_rc_t
1796 __in efx_nic_t *enp,
1797 __in_opt efsys_mem_t *esmp,
1798 __in efx_stats_action_t action,
1799 __in uint16_t period_ms)
1802 uint8_t payload[MAX(MC_CMD_MAC_STATS_IN_LEN,
1803 MC_CMD_MAC_STATS_OUT_DMA_LEN)];
1804 int clear = (action == EFX_STATS_CLEAR);
1805 int upload = (action == EFX_STATS_UPLOAD);
1806 int enable = (action == EFX_STATS_ENABLE_NOEVENTS);
1807 int events = (action == EFX_STATS_ENABLE_EVENTS);
1808 int disable = (action == EFX_STATS_DISABLE);
1811 (void) memset(payload, 0, sizeof (payload));
1812 req.emr_cmd = MC_CMD_MAC_STATS;
1813 req.emr_in_buf = payload;
1814 req.emr_in_length = MC_CMD_MAC_STATS_IN_LEN;
1815 req.emr_out_buf = payload;
1816 req.emr_out_length = MC_CMD_MAC_STATS_OUT_DMA_LEN;
1818 MCDI_IN_POPULATE_DWORD_6(req, MAC_STATS_IN_CMD,
1819 MAC_STATS_IN_DMA, upload,
1820 MAC_STATS_IN_CLEAR, clear,
1821 MAC_STATS_IN_PERIODIC_CHANGE, enable | events | disable,
1822 MAC_STATS_IN_PERIODIC_ENABLE, enable | events,
1823 MAC_STATS_IN_PERIODIC_NOEVENT, !events,
1824 MAC_STATS_IN_PERIOD_MS, (enable | events) ? period_ms : 0);
1827 int bytes = MC_CMD_MAC_NSTATS * sizeof (uint64_t);
1829 EFX_STATIC_ASSERT(MC_CMD_MAC_NSTATS * sizeof (uint64_t) <=
1830 EFX_MAC_STATS_SIZE);
1832 MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_LO,
1833 EFSYS_MEM_ADDR(esmp) & 0xffffffff);
1834 MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_HI,
1835 EFSYS_MEM_ADDR(esmp) >> 32);
1836 MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_LEN, bytes);
1838 EFSYS_ASSERT(!upload && !enable && !events);
1842 * NOTE: Do not use EVB_PORT_ID_ASSIGNED when disabling periodic stats,
1843 * as this may fail (and leave periodic DMA enabled) if the
1844 * vadapter has already been deleted.
1846 MCDI_IN_SET_DWORD(req, MAC_STATS_IN_PORT_ID,
1847 (disable ? EVB_PORT_ID_NULL : enp->en_vport_id));
1849 efx_mcdi_execute(enp, &req);
1851 if (req.emr_rc != 0) {
1852 /* EF10: Expect ENOENT if no DMA queues are initialised */
1853 if ((req.emr_rc != ENOENT) ||
1854 (enp->en_rx_qcount + enp->en_tx_qcount != 0)) {
1863 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1868 __checkReturn efx_rc_t
1869 efx_mcdi_mac_stats_clear(
1870 __in efx_nic_t *enp)
1874 if ((rc = efx_mcdi_mac_stats(enp, NULL, EFX_STATS_CLEAR, 0)) != 0)
1880 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1885 __checkReturn efx_rc_t
1886 efx_mcdi_mac_stats_upload(
1887 __in efx_nic_t *enp,
1888 __in efsys_mem_t *esmp)
1893 * The MC DMAs aggregate statistics for our convenience, so we can
1894 * avoid having to pull the statistics buffer into the cache to
1895 * maintain cumulative statistics.
1897 if ((rc = efx_mcdi_mac_stats(enp, esmp, EFX_STATS_UPLOAD, 0)) != 0)
1903 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1908 __checkReturn efx_rc_t
1909 efx_mcdi_mac_stats_periodic(
1910 __in efx_nic_t *enp,
1911 __in efsys_mem_t *esmp,
1912 __in uint16_t period_ms,
1913 __in boolean_t events)
1918 * The MC DMAs aggregate statistics for our convenience, so we can
1919 * avoid having to pull the statistics buffer into the cache to
1920 * maintain cumulative statistics.
1921 * Huntington uses a fixed 1sec period.
1922 * Medford uses a fixed 1sec period before v6.2.1.1033 firmware.
1925 rc = efx_mcdi_mac_stats(enp, NULL, EFX_STATS_DISABLE, 0);
1927 rc = efx_mcdi_mac_stats(enp, esmp, EFX_STATS_ENABLE_EVENTS,
1930 rc = efx_mcdi_mac_stats(enp, esmp, EFX_STATS_ENABLE_NOEVENTS,
1939 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1944 #endif /* EFSYS_OPT_MAC_STATS */
1946 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
1949 * This function returns the pf and vf number of a function. If it is a pf the
1950 * vf number is 0xffff. The vf number is the index of the vf on that
1951 * function. So if you have 3 vfs on pf 0 the 3 vfs will return (pf=0,vf=0),
1952 * (pf=0,vf=1), (pf=0,vf=2) aand the pf will return (pf=0, vf=0xffff).
1954 __checkReturn efx_rc_t
1955 efx_mcdi_get_function_info(
1956 __in efx_nic_t *enp,
1957 __out uint32_t *pfp,
1958 __out_opt uint32_t *vfp)
1961 uint8_t payload[MAX(MC_CMD_GET_FUNCTION_INFO_IN_LEN,
1962 MC_CMD_GET_FUNCTION_INFO_OUT_LEN)];
1965 (void) memset(payload, 0, sizeof (payload));
1966 req.emr_cmd = MC_CMD_GET_FUNCTION_INFO;
1967 req.emr_in_buf = payload;
1968 req.emr_in_length = MC_CMD_GET_FUNCTION_INFO_IN_LEN;
1969 req.emr_out_buf = payload;
1970 req.emr_out_length = MC_CMD_GET_FUNCTION_INFO_OUT_LEN;
1972 efx_mcdi_execute(enp, &req);
1974 if (req.emr_rc != 0) {
1979 if (req.emr_out_length_used < MC_CMD_GET_FUNCTION_INFO_OUT_LEN) {
1984 *pfp = MCDI_OUT_DWORD(req, GET_FUNCTION_INFO_OUT_PF);
1986 *vfp = MCDI_OUT_DWORD(req, GET_FUNCTION_INFO_OUT_VF);
1993 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1998 __checkReturn efx_rc_t
1999 efx_mcdi_privilege_mask(
2000 __in efx_nic_t *enp,
2003 __out uint32_t *maskp)
2006 uint8_t payload[MAX(MC_CMD_PRIVILEGE_MASK_IN_LEN,
2007 MC_CMD_PRIVILEGE_MASK_OUT_LEN)];
2010 (void) memset(payload, 0, sizeof (payload));
2011 req.emr_cmd = MC_CMD_PRIVILEGE_MASK;
2012 req.emr_in_buf = payload;
2013 req.emr_in_length = MC_CMD_PRIVILEGE_MASK_IN_LEN;
2014 req.emr_out_buf = payload;
2015 req.emr_out_length = MC_CMD_PRIVILEGE_MASK_OUT_LEN;
2017 MCDI_IN_POPULATE_DWORD_2(req, PRIVILEGE_MASK_IN_FUNCTION,
2018 PRIVILEGE_MASK_IN_FUNCTION_PF, pf,
2019 PRIVILEGE_MASK_IN_FUNCTION_VF, vf);
2021 efx_mcdi_execute(enp, &req);
2023 if (req.emr_rc != 0) {
2028 if (req.emr_out_length_used < MC_CMD_PRIVILEGE_MASK_OUT_LEN) {
2033 *maskp = MCDI_OUT_DWORD(req, PRIVILEGE_MASK_OUT_OLD_MASK);
2040 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2045 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */
2047 __checkReturn efx_rc_t
2048 efx_mcdi_set_workaround(
2049 __in efx_nic_t *enp,
2051 __in boolean_t enabled,
2052 __out_opt uint32_t *flagsp)
2055 uint8_t payload[MAX(MC_CMD_WORKAROUND_IN_LEN,
2056 MC_CMD_WORKAROUND_EXT_OUT_LEN)];
2059 (void) memset(payload, 0, sizeof (payload));
2060 req.emr_cmd = MC_CMD_WORKAROUND;
2061 req.emr_in_buf = payload;
2062 req.emr_in_length = MC_CMD_WORKAROUND_IN_LEN;
2063 req.emr_out_buf = payload;
2064 req.emr_out_length = MC_CMD_WORKAROUND_OUT_LEN;
2066 MCDI_IN_SET_DWORD(req, WORKAROUND_IN_TYPE, type);
2067 MCDI_IN_SET_DWORD(req, WORKAROUND_IN_ENABLED, enabled ? 1 : 0);
2069 efx_mcdi_execute_quiet(enp, &req);
2071 if (req.emr_rc != 0) {
2076 if (flagsp != NULL) {
2077 if (req.emr_out_length_used >= MC_CMD_WORKAROUND_EXT_OUT_LEN)
2078 *flagsp = MCDI_OUT_DWORD(req, WORKAROUND_EXT_OUT_FLAGS);
2086 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2092 __checkReturn efx_rc_t
2093 efx_mcdi_get_workarounds(
2094 __in efx_nic_t *enp,
2095 __out_opt uint32_t *implementedp,
2096 __out_opt uint32_t *enabledp)
2099 uint8_t payload[MC_CMD_GET_WORKAROUNDS_OUT_LEN];
2102 (void) memset(payload, 0, sizeof (payload));
2103 req.emr_cmd = MC_CMD_GET_WORKAROUNDS;
2104 req.emr_in_buf = NULL;
2105 req.emr_in_length = 0;
2106 req.emr_out_buf = payload;
2107 req.emr_out_length = MC_CMD_GET_WORKAROUNDS_OUT_LEN;
2109 efx_mcdi_execute(enp, &req);
2111 if (req.emr_rc != 0) {
2116 if (implementedp != NULL) {
2118 MCDI_OUT_DWORD(req, GET_WORKAROUNDS_OUT_IMPLEMENTED);
2121 if (enabledp != NULL) {
2122 *enabledp = MCDI_OUT_DWORD(req, GET_WORKAROUNDS_OUT_ENABLED);
2128 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2134 * Size of media information page in accordance with SFF-8472 and SFF-8436.
2135 * It is used in MCDI interface as well.
2137 #define EFX_PHY_MEDIA_INFO_PAGE_SIZE 0x80
2139 static __checkReturn efx_rc_t
2140 efx_mcdi_get_phy_media_info(
2141 __in efx_nic_t *enp,
2142 __in uint32_t mcdi_page,
2143 __in uint8_t offset,
2145 __out_bcount(len) uint8_t *data)
2148 uint8_t payload[MAX(MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN,
2149 MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(
2150 EFX_PHY_MEDIA_INFO_PAGE_SIZE))];
2153 EFSYS_ASSERT((uint32_t)offset + len <= EFX_PHY_MEDIA_INFO_PAGE_SIZE);
2155 (void) memset(payload, 0, sizeof (payload));
2156 req.emr_cmd = MC_CMD_GET_PHY_MEDIA_INFO;
2157 req.emr_in_buf = payload;
2158 req.emr_in_length = MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN;
2159 req.emr_out_buf = payload;
2160 req.emr_out_length =
2161 MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(EFX_PHY_MEDIA_INFO_PAGE_SIZE);
2163 MCDI_IN_SET_DWORD(req, GET_PHY_MEDIA_INFO_IN_PAGE, mcdi_page);
2165 efx_mcdi_execute(enp, &req);
2167 if (req.emr_rc != 0) {
2172 if (req.emr_out_length_used !=
2173 MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(EFX_PHY_MEDIA_INFO_PAGE_SIZE)) {
2178 if (MCDI_OUT_DWORD(req, GET_PHY_MEDIA_INFO_OUT_DATALEN) !=
2179 EFX_PHY_MEDIA_INFO_PAGE_SIZE) {
2185 MCDI_OUT2(req, uint8_t, GET_PHY_MEDIA_INFO_OUT_DATA) + offset,
2195 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2201 * 2-wire device address of the base information in accordance with SFF-8472
2202 * Diagnostic Monitoring Interface for Optical Transceivers section
2203 * 4 Memory Organization.
2205 #define EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_BASE 0xA0
2208 * 2-wire device address of the digital diagnostics monitoring interface
2209 * in accordance with SFF-8472 Diagnostic Monitoring Interface for Optical
2210 * Transceivers section 4 Memory Organization.
2212 #define EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_DDM 0xA2
2215 * Hard wired 2-wire device address for QSFP+ in accordance with SFF-8436
2216 * QSFP+ 10 Gbs 4X PLUGGABLE TRANSCEIVER section 7.4 Device Addressing and
2219 #define EFX_PHY_MEDIA_INFO_DEV_ADDR_QSFP 0xA0
2221 __checkReturn efx_rc_t
2222 efx_mcdi_phy_module_get_info(
2223 __in efx_nic_t *enp,
2224 __in uint8_t dev_addr,
2225 __in uint8_t offset,
2227 __out_bcount(len) uint8_t *data)
2229 efx_port_t *epp = &(enp->en_port);
2231 uint32_t mcdi_lower_page;
2232 uint32_t mcdi_upper_page;
2234 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
2237 * Map device address to MC_CMD_GET_PHY_MEDIA_INFO pages.
2238 * Offset plus length interface allows to access page 0 only.
2239 * I.e. non-zero upper pages are not accessible.
2240 * See SFF-8472 section 4 Memory Organization and SFF-8436 section 7.6
2241 * QSFP+ Memory Map for details on how information is structured
2244 switch (epp->ep_fixed_port_type) {
2245 case EFX_PHY_MEDIA_SFP_PLUS:
2247 * In accordance with SFF-8472 Diagnostic Monitoring
2248 * Interface for Optical Transceivers section 4 Memory
2249 * Organization two 2-wire addresses are defined.
2252 /* Base information */
2253 case EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_BASE:
2255 * MCDI page 0 should be used to access lower
2256 * page 0 (0x00 - 0x7f) at the device address 0xA0.
2258 mcdi_lower_page = 0;
2260 * MCDI page 1 should be used to access upper
2261 * page 0 (0x80 - 0xff) at the device address 0xA0.
2263 mcdi_upper_page = 1;
2266 case EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_DDM:
2268 * MCDI page 2 should be used to access lower
2269 * page 0 (0x00 - 0x7f) at the device address 0xA2.
2271 mcdi_lower_page = 2;
2273 * MCDI page 3 should be used to access upper
2274 * page 0 (0x80 - 0xff) at the device address 0xA2.
2276 mcdi_upper_page = 3;
2283 case EFX_PHY_MEDIA_QSFP_PLUS:
2285 case EFX_PHY_MEDIA_INFO_DEV_ADDR_QSFP:
2287 * MCDI page -1 should be used to access lower page 0
2290 mcdi_lower_page = (uint32_t)-1;
2292 * MCDI page 0 should be used to access upper page 0
2295 mcdi_upper_page = 0;
2307 if (offset < EFX_PHY_MEDIA_INFO_PAGE_SIZE) {
2309 MIN(len, EFX_PHY_MEDIA_INFO_PAGE_SIZE - offset);
2311 rc = efx_mcdi_get_phy_media_info(enp,
2312 mcdi_lower_page, offset, read_len, data);
2321 offset -= EFX_PHY_MEDIA_INFO_PAGE_SIZE;
2325 EFSYS_ASSERT3U(len, <=, EFX_PHY_MEDIA_INFO_PAGE_SIZE);
2326 EFSYS_ASSERT3U(offset, <, EFX_PHY_MEDIA_INFO_PAGE_SIZE);
2328 rc = efx_mcdi_get_phy_media_info(enp,
2329 mcdi_upper_page, offset, len, data);
2341 EFSYS_PROBE1(fail1, efx_rc_t, rc);
2346 #endif /* EFSYS_OPT_MCDI */