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34 __checkReturn efx_rc_t
38 __in efsys_mem_t *esmp,
43 uint32_t stop = start + n;
44 efsys_dma_addr_t addr;
49 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
50 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
52 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
53 if (enp->en_family == EFX_FAMILY_HUNTINGTON ||
54 enp->en_family == EFX_FAMILY_MEDFORD) {
56 * FIXME: the efx_sram_buf_tbl_*() functionality needs to be
57 * pulled inside the Falcon/Siena queue create/destroy code,
58 * and then the original functions can be removed (see bug30834
59 * comment #1). But, for now, we just ensure that they are
60 * no-ops for EF10, to allow bringing up existing drivers
61 * without modification.
66 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */
68 if (stop >= EFX_BUF_TBL_SIZE) {
73 /* Add the entries into the buffer table */
74 addr = EFSYS_MEM_ADDR(esmp);
75 for (id = start; id != stop; id++) {
76 EFX_POPULATE_QWORD_5(qword,
77 FRF_AZ_IP_DAT_BUF_SIZE, 0, FRF_AZ_BUF_ADR_REGION, 0,
78 FRF_AZ_BUF_ADR_FBUF_DW0,
79 (uint32_t)((addr >> 12) & 0xffffffff),
80 FRF_AZ_BUF_ADR_FBUF_DW1,
81 (uint32_t)((addr >> 12) >> 32),
82 FRF_AZ_BUF_OWNER_ID_FBUF, 0);
84 EFX_BAR_TBL_WRITEQ(enp, FR_AZ_BUF_FULL_TBL,
90 EFSYS_PROBE2(buf, uint32_t, start, uint32_t, stop - 1);
92 /* Flush the write buffer */
93 EFX_POPULATE_OWORD_2(oword, FRF_AZ_BUF_UPD_CMD, 1,
94 FRF_AZ_BUF_CLR_CMD, 0);
95 EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword);
97 /* Poll for the last entry being written to the buffer table */
98 EFSYS_ASSERT3U(id, ==, stop);
103 EFSYS_PROBE1(wait, unsigned int, count);
108 EFX_BAR_TBL_READQ(enp, FR_AZ_BUF_FULL_TBL,
111 if (EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW0) ==
112 (uint32_t)((addr >> 12) & 0xffffffff) &&
113 EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW1) ==
114 (uint32_t)((addr >> 12) >> 32))
117 } while (++count < 100);
123 /* Verify the rest of the entries in the buffer table */
124 while (--id != start) {
125 addr -= EFX_BUF_SIZE;
127 /* Read the buffer table entry */
128 EFX_BAR_TBL_READQ(enp, FR_AZ_BUF_FULL_TBL,
131 if (EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW0) !=
132 (uint32_t)((addr >> 12) & 0xffffffff) ||
133 EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW1) !=
134 (uint32_t)((addr >> 12) >> 32)) {
150 EFX_POPULATE_OWORD_4(oword, FRF_AZ_BUF_UPD_CMD, 0,
151 FRF_AZ_BUF_CLR_CMD, 1, FRF_AZ_BUF_CLR_END_ID, id - 1,
152 FRF_AZ_BUF_CLR_START_ID, start);
153 EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword);
156 EFSYS_PROBE1(fail1, efx_rc_t, rc);
162 efx_sram_buf_tbl_clear(
169 uint32_t stop = start + n;
171 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
172 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
174 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
175 if (enp->en_family == EFX_FAMILY_HUNTINGTON ||
176 enp->en_family == EFX_FAMILY_MEDFORD) {
178 * FIXME: the efx_sram_buf_tbl_*() functionality needs to be
179 * pulled inside the Falcon/Siena queue create/destroy code,
180 * and then the original functions can be removed (see bug30834
181 * comment #1). But, for now, we just ensure that they are
182 * no-ops for EF10, to allow bringing up existing drivers
183 * without modification.
188 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */
190 EFSYS_ASSERT3U(stop, <, EFX_BUF_TBL_SIZE);
192 EFSYS_PROBE2(buf, uint32_t, start, uint32_t, stop - 1);
194 EFX_POPULATE_OWORD_4(oword, FRF_AZ_BUF_UPD_CMD, 0,
195 FRF_AZ_BUF_CLR_CMD, 1, FRF_AZ_BUF_CLR_END_ID, stop - 1,
196 FRF_AZ_BUF_CLR_START_ID, start);
197 EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword);
204 efx_sram_byte_increment_set(
206 __in boolean_t negate,
207 __out efx_qword_t *eqp)
209 size_t offset = row * FR_AZ_SRM_DBG_REG_STEP;
212 _NOTE(ARGUNUSED(negate))
214 for (index = 0; index < sizeof (efx_qword_t); index++)
215 eqp->eq_u8[index] = offset + index;
219 efx_sram_all_the_same_set(
221 __in boolean_t negate,
222 __out efx_qword_t *eqp)
224 _NOTE(ARGUNUSED(row))
229 EFX_ZERO_QWORD(*eqp);
233 efx_sram_bit_alternate_set(
235 __in boolean_t negate,
236 __out efx_qword_t *eqp)
238 _NOTE(ARGUNUSED(row))
240 EFX_POPULATE_QWORD_2(*eqp,
241 EFX_DWORD_0, (negate) ? 0x55555555 : 0xaaaaaaaa,
242 EFX_DWORD_1, (negate) ? 0x55555555 : 0xaaaaaaaa);
246 efx_sram_byte_alternate_set(
248 __in boolean_t negate,
249 __out efx_qword_t *eqp)
251 _NOTE(ARGUNUSED(row))
253 EFX_POPULATE_QWORD_2(*eqp,
254 EFX_DWORD_0, (negate) ? 0x00ff00ff : 0xff00ff00,
255 EFX_DWORD_1, (negate) ? 0x00ff00ff : 0xff00ff00);
259 efx_sram_byte_changing_set(
261 __in boolean_t negate,
262 __out efx_qword_t *eqp)
264 size_t offset = row * FR_AZ_SRM_DBG_REG_STEP;
267 for (index = 0; index < sizeof (efx_qword_t); index++) {
270 if (offset / 256 == 0)
271 byte = (uint8_t)((offset % 257) % 256);
273 byte = (uint8_t)(~((offset - 8) % 257) % 256);
275 eqp->eq_u8[index] = (negate) ? ~byte : byte;
280 efx_sram_bit_sweep_set(
282 __in boolean_t negate,
283 __out efx_qword_t *eqp)
285 size_t offset = row * FR_AZ_SRM_DBG_REG_STEP;
289 EFX_CLEAR_QWORD_BIT(*eqp, (offset / sizeof (efx_qword_t)) % 64);
291 EFX_ZERO_QWORD(*eqp);
292 EFX_SET_QWORD_BIT(*eqp, (offset / sizeof (efx_qword_t)) % 64);
296 efx_sram_pattern_fn_t __efx_sram_pattern_fns[] = {
297 efx_sram_byte_increment_set,
298 efx_sram_all_the_same_set,
299 efx_sram_bit_alternate_set,
300 efx_sram_byte_alternate_set,
301 efx_sram_byte_changing_set,
302 efx_sram_bit_sweep_set
305 __checkReturn efx_rc_t
308 __in efx_pattern_type_t type)
310 efx_sram_pattern_fn_t func;
312 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
314 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
316 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_RX));
317 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_TX));
318 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_EV));
320 /* SRAM testing is only available on Siena. */
321 if (enp->en_family != EFX_FAMILY_SIENA)
324 /* Select pattern generator */
325 EFSYS_ASSERT3U(type, <, EFX_PATTERN_NTYPES);
326 func = __efx_sram_pattern_fns[type];
328 return (siena_sram_test(enp, func));
331 #endif /* EFSYS_OPT_DIAG */