2 * Copyright (c) 2009-2016 Solarflare Communications Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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31 #ifndef _SYS_SIENA_IMPL_H
32 #define _SYS_SIENA_IMPL_H
37 #include "siena_flash.h"
43 #ifndef EFX_TXQ_DC_SIZE
44 #define EFX_TXQ_DC_SIZE 1 /* 16 descriptors */
46 #ifndef EFX_RXQ_DC_SIZE
47 #define EFX_RXQ_DC_SIZE 3 /* 64 descriptors */
49 #define EFX_TXQ_DC_NDESCS(_dcsize) (8 << (_dcsize))
51 #define SIENA_NVRAM_CHUNK 0x80
54 extern __checkReturn efx_rc_t
58 extern __checkReturn efx_rc_t
62 extern __checkReturn efx_rc_t
68 extern efx_sram_pattern_fn_t __efx_sram_pattern_fns[];
70 typedef struct siena_register_set_s {
75 } siena_register_set_t;
77 extern __checkReturn efx_rc_t
78 siena_nic_register_test(
81 #endif /* EFSYS_OPT_DIAG */
91 #define SIENA_SRAM_ROWS 0x12000
99 extern __checkReturn efx_rc_t
102 __in efx_sram_pattern_fn_t func);
104 #endif /* EFSYS_OPT_DIAG */
108 extern __checkReturn efx_rc_t
111 __in const efx_mcdi_transport_t *mtp);
114 siena_mcdi_send_request(
116 __in_bcount(hdr_len) void *hdrp,
118 __in_bcount(sdu_len) void *sdup,
119 __in size_t sdu_len);
121 extern __checkReturn boolean_t
122 siena_mcdi_poll_response(
123 __in efx_nic_t *enp);
126 siena_mcdi_read_response(
128 __out_bcount(length) void *bufferp,
133 siena_mcdi_poll_reboot(
134 __in efx_nic_t *enp);
138 __in efx_nic_t *enp);
140 extern __checkReturn efx_rc_t
141 siena_mcdi_feature_supported(
143 __in efx_mcdi_feature_id_t id,
144 __out boolean_t *supportedp);
147 siena_mcdi_get_timeout(
149 __in efx_mcdi_req_t *emrp,
150 __out uint32_t *timeoutp);
152 #endif /* EFSYS_OPT_MCDI */
154 #if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD
156 extern __checkReturn efx_rc_t
157 siena_nvram_partn_lock(
159 __in uint32_t partn);
161 extern __checkReturn efx_rc_t
162 siena_nvram_partn_unlock(
165 __out_opt uint32_t *verify_resultp);
167 extern __checkReturn efx_rc_t
168 siena_nvram_get_dynamic_cfg(
172 __out siena_mc_dynamic_config_hdr_t **dcfgp,
173 __out size_t *sizep);
175 #endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
181 extern __checkReturn efx_rc_t
183 __in efx_nic_t *enp);
185 #endif /* EFSYS_OPT_DIAG */
187 extern __checkReturn efx_rc_t
188 siena_nvram_get_subtype(
191 __out uint32_t *subtypep);
193 extern __checkReturn efx_rc_t
194 siena_nvram_type_to_partn(
196 __in efx_nvram_type_t type,
197 __out uint32_t *partnp);
199 extern __checkReturn efx_rc_t
200 siena_nvram_partn_size(
203 __out size_t *sizep);
205 extern __checkReturn efx_rc_t
206 siena_nvram_partn_rw_start(
209 __out size_t *chunk_sizep);
211 extern __checkReturn efx_rc_t
212 siena_nvram_partn_read(
215 __in unsigned int offset,
216 __out_bcount(size) caddr_t data,
219 extern __checkReturn efx_rc_t
220 siena_nvram_partn_erase(
223 __in unsigned int offset,
226 extern __checkReturn efx_rc_t
227 siena_nvram_partn_write(
230 __in unsigned int offset,
231 __out_bcount(size) caddr_t data,
234 extern __checkReturn efx_rc_t
235 siena_nvram_partn_rw_finish(
238 __out_opt uint32_t *verify_resultp);
240 extern __checkReturn efx_rc_t
241 siena_nvram_partn_get_version(
244 __out uint32_t *subtypep,
245 __out_ecount(4) uint16_t version[4]);
247 extern __checkReturn efx_rc_t
248 siena_nvram_partn_set_version(
251 __in_ecount(4) uint16_t version[4]);
253 #endif /* EFSYS_OPT_NVRAM */
257 extern __checkReturn efx_rc_t
259 __in efx_nic_t *enp);
261 extern __checkReturn efx_rc_t
264 __out size_t *sizep);
266 extern __checkReturn efx_rc_t
269 __out_bcount(size) caddr_t data,
272 extern __checkReturn efx_rc_t
275 __in_bcount(size) caddr_t data,
278 extern __checkReturn efx_rc_t
281 __in_bcount(size) caddr_t data,
284 extern __checkReturn efx_rc_t
287 __in_bcount(size) caddr_t data,
289 __inout efx_vpd_value_t *evvp);
291 extern __checkReturn efx_rc_t
294 __in_bcount(size) caddr_t data,
296 __in efx_vpd_value_t *evvp);
298 extern __checkReturn efx_rc_t
301 __in_bcount(size) caddr_t data,
303 __out efx_vpd_value_t *evvp,
304 __inout unsigned int *contp);
306 extern __checkReturn efx_rc_t
309 __in_bcount(size) caddr_t data,
314 __in efx_nic_t *enp);
316 #endif /* EFSYS_OPT_VPD */
318 typedef struct siena_link_state_s {
319 uint32_t sls_adv_cap_mask;
320 uint32_t sls_lp_cap_mask;
321 unsigned int sls_fcntl;
322 efx_link_mode_t sls_link_mode;
323 #if EFSYS_OPT_LOOPBACK
324 efx_loopback_type_t sls_loopback;
326 boolean_t sls_mac_up;
327 } siena_link_state_t;
332 __in efx_qword_t *eqp,
333 __out efx_link_mode_t *link_modep);
335 extern __checkReturn efx_rc_t
338 __out siena_link_state_t *slsp);
340 extern __checkReturn efx_rc_t
345 extern __checkReturn efx_rc_t
346 siena_phy_reconfigure(
347 __in efx_nic_t *enp);
349 extern __checkReturn efx_rc_t
351 __in efx_nic_t *enp);
353 extern __checkReturn efx_rc_t
356 __out uint32_t *ouip);
358 #if EFSYS_OPT_PHY_STATS
361 siena_phy_decode_stats(
364 __in_opt efsys_mem_t *esmp,
365 __out_opt uint64_t *smaskp,
366 __inout_ecount_opt(EFX_PHY_NSTATS) uint32_t *stat);
368 extern __checkReturn efx_rc_t
369 siena_phy_stats_update(
371 __in efsys_mem_t *esmp,
372 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat);
374 #endif /* EFSYS_OPT_PHY_STATS */
378 extern __checkReturn efx_rc_t
379 siena_phy_bist_start(
381 __in efx_bist_type_t type);
383 extern __checkReturn efx_rc_t
386 __in efx_bist_type_t type,
387 __out efx_bist_result_t *resultp,
388 __out_opt __drv_when(count > 0, __notnull)
389 uint32_t *value_maskp,
390 __out_ecount_opt(count) __drv_when(count > 0, __notnull)
391 unsigned long *valuesp,
397 __in efx_bist_type_t type);
399 #endif /* EFSYS_OPT_BIST */
401 extern __checkReturn efx_rc_t
404 __out efx_link_mode_t *link_modep);
406 extern __checkReturn efx_rc_t
409 __out boolean_t *mac_upp);
411 extern __checkReturn efx_rc_t
412 siena_mac_reconfigure(
413 __in efx_nic_t *enp);
415 extern __checkReturn efx_rc_t
420 #if EFSYS_OPT_LOOPBACK
422 extern __checkReturn efx_rc_t
423 siena_mac_loopback_set(
425 __in efx_link_mode_t link_mode,
426 __in efx_loopback_type_t loopback_type);
428 #endif /* EFSYS_OPT_LOOPBACK */
430 #if EFSYS_OPT_MAC_STATS
432 extern __checkReturn efx_rc_t
433 siena_mac_stats_get_mask(
435 __inout_bcount(mask_size) uint32_t *maskp,
436 __in size_t mask_size);
438 extern __checkReturn efx_rc_t
439 siena_mac_stats_update(
441 __in efsys_mem_t *esmp,
442 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
443 __inout_opt uint32_t *generationp);
445 #endif /* EFSYS_OPT_MAC_STATS */
451 #endif /* _SYS_SIENA_IMPL_H */