drivers/net/sfc/base/siena_nvram.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  * Copyright (c) 2009-2018 Solarflare Communications Inc.
   4  * All rights reserved.
   5  */
   6
   7 #include "efx.h"
   8 #include "efx_impl.h"
   9
  10 #if EFSYS_OPT_SIENA
  11
  12 #if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM
  13
  14         __checkReturn           efx_rc_t
  15 siena_nvram_partn_size(
  16         __in                    efx_nic_t *enp,
  17         __in                    uint32_t partn,
  18         __out                   size_t *sizep)
  19 {
  20         efx_rc_t rc;
  21
  22         if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) {
  23                 rc = ENOTSUP;
  24                 goto fail1;
  25         }
  26
  27         if ((rc = efx_mcdi_nvram_info(enp, partn, sizep,
  28             NULL, NULL, NULL)) != 0) {
  29                 goto fail2;
  30         }
  31
  32         return (0);
  33
  34 fail2:
  35         EFSYS_PROBE(fail2);
  36 fail1:
  37         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  38
  39         return (rc);
  40 }
  41
  42         __checkReturn           efx_rc_t
  43 siena_nvram_partn_info(
  44         __in                    efx_nic_t *enp,
  45         __in                    uint32_t partn,
  46         __out                   efx_nvram_info_t * enip)
  47 {
  48         efx_rc_t rc;
  49
  50         if ((rc = efx_mcdi_nvram_info_ex(enp, partn, enip)) != 0)
  51                 goto fail1;
  52
  53         if (enip->eni_write_size == 0)
  54                 enip->eni_write_size = SIENA_NVRAM_CHUNK;
  55
  56         return (0);
  57
  58 fail1:
  59         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  60
  61         return (rc);
  62 }
  63
  64
  65         __checkReturn           efx_rc_t
  66 siena_nvram_partn_lock(
  67         __in                    efx_nic_t *enp,
  68         __in                    uint32_t partn)
  69 {
  70         efx_rc_t rc;
  71
  72         if ((rc = efx_mcdi_nvram_update_start(enp, partn)) != 0) {
  73                 goto fail1;
  74         }
  75
  76         return (0);
  77
  78 fail1:
  79         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  80
  81         return (rc);
  82 }
  83
  84         __checkReturn           efx_rc_t
  85 siena_nvram_partn_read(
  86         __in                    efx_nic_t *enp,
  87         __in                    uint32_t partn,
  88         __in                    unsigned int offset,
  89         __out_bcount(size)      caddr_t data,
  90         __in                    size_t size)
  91 {
  92         size_t chunk;
  93         efx_rc_t rc;
  94
  95         while (size > 0) {
  96                 chunk = MIN(size, SIENA_NVRAM_CHUNK);
  97
  98                 if ((rc = efx_mcdi_nvram_read(enp, partn, offset, data, chunk,
  99                             MC_CMD_NVRAM_READ_IN_V2_DEFAULT)) != 0) {
 100                         goto fail1;
 101                 }
 102
 103                 size -= chunk;
 104                 data += chunk;
 105                 offset += chunk;
 106         }
 107
 108         return (0);
 109
 110 fail1:
 111         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 112
 113         return (rc);
 114 }
 115
 116         __checkReturn           efx_rc_t
 117 siena_nvram_partn_erase(
 118         __in                    efx_nic_t *enp,
 119         __in                    uint32_t partn,
 120         __in                    unsigned int offset,
 121         __in                    size_t size)
 122 {
 123         efx_rc_t rc;
 124
 125         if ((rc = efx_mcdi_nvram_erase(enp, partn, offset, size)) != 0) {
 126                 goto fail1;
 127         }
 128
 129         return (0);
 130
 131 fail1:
 132         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 133
 134         return (rc);
 135 }
 136
 137         __checkReturn           efx_rc_t
 138 siena_nvram_partn_write(
 139         __in                    efx_nic_t *enp,
 140         __in                    uint32_t partn,
 141         __in                    unsigned int offset,
 142         __out_bcount(size)      caddr_t data,
 143         __in                    size_t size)
 144 {
 145         size_t chunk;
 146         efx_rc_t rc;
 147
 148         while (size > 0) {
 149                 chunk = MIN(size, SIENA_NVRAM_CHUNK);
 150
 151                 if ((rc = efx_mcdi_nvram_write(enp, partn, offset,
 152                             data, chunk)) != 0) {
 153                         goto fail1;
 154                 }
 155
 156                 size -= chunk;
 157                 data += chunk;
 158                 offset += chunk;
 159         }
 160
 161         return (0);
 162
 163 fail1:
 164         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 165
 166         return (rc);
 167 }
 168
 169         __checkReturn           efx_rc_t
 170 siena_nvram_partn_unlock(
 171         __in                    efx_nic_t *enp,
 172         __in                    uint32_t partn,
 173         __out_opt               uint32_t *verify_resultp)
 174 {
 175         boolean_t reboot;
 176         efx_rc_t rc;
 177
 178         /*
 179          * Reboot into the new image only for PHYs. The driver has to
 180          * explicitly cope with an MC reboot after a firmware update.
 181          */
 182         reboot = (partn == MC_CMD_NVRAM_TYPE_PHY_PORT0 ||
 183                     partn == MC_CMD_NVRAM_TYPE_PHY_PORT1 ||
 184                     partn == MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO);
 185
 186         rc = efx_mcdi_nvram_update_finish(enp, partn, reboot, verify_resultp);
 187         if (rc != 0)
 188                 goto fail1;
 189
 190         return (0);
 191
 192 fail1:
 193         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 194
 195         return (rc);
 196 }
 197
 198 #endif  /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
 199
 200 #if EFSYS_OPT_NVRAM
 201
 202 typedef struct siena_parttbl_entry_s {
 203         unsigned int            partn;
 204         unsigned int            port;
 205         efx_nvram_type_t        nvtype;
 206 } siena_parttbl_entry_t;
 207
 208 static siena_parttbl_entry_t siena_parttbl[] = {
 209         {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO,   1, EFX_NVRAM_NULLPHY},
 210         {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO,   2, EFX_NVRAM_NULLPHY},
 211         {MC_CMD_NVRAM_TYPE_MC_FW,               1, EFX_NVRAM_MC_FIRMWARE},
 212         {MC_CMD_NVRAM_TYPE_MC_FW,               2, EFX_NVRAM_MC_FIRMWARE},
 213         {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP,        1, EFX_NVRAM_MC_GOLDEN},
 214         {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP,        2, EFX_NVRAM_MC_GOLDEN},
 215         {MC_CMD_NVRAM_TYPE_EXP_ROM,             1, EFX_NVRAM_BOOTROM},
 216         {MC_CMD_NVRAM_TYPE_EXP_ROM,             2, EFX_NVRAM_BOOTROM},
 217         {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0,   1, EFX_NVRAM_BOOTROM_CFG},
 218         {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1,   2, EFX_NVRAM_BOOTROM_CFG},
 219         {MC_CMD_NVRAM_TYPE_PHY_PORT0,           1, EFX_NVRAM_PHY},
 220         {MC_CMD_NVRAM_TYPE_PHY_PORT1,           2, EFX_NVRAM_PHY},
 221         {MC_CMD_NVRAM_TYPE_FPGA,                1, EFX_NVRAM_FPGA},
 222         {MC_CMD_NVRAM_TYPE_FPGA,                2, EFX_NVRAM_FPGA},
 223         {MC_CMD_NVRAM_TYPE_FPGA_BACKUP,         1, EFX_NVRAM_FPGA_BACKUP},
 224         {MC_CMD_NVRAM_TYPE_FPGA_BACKUP,         2, EFX_NVRAM_FPGA_BACKUP},
 225         {MC_CMD_NVRAM_TYPE_FC_FW,               1, EFX_NVRAM_FCFW},
 226         {MC_CMD_NVRAM_TYPE_FC_FW,               2, EFX_NVRAM_FCFW},
 227         {MC_CMD_NVRAM_TYPE_CPLD,                1, EFX_NVRAM_CPLD},
 228         {MC_CMD_NVRAM_TYPE_CPLD,                2, EFX_NVRAM_CPLD},
 229         {MC_CMD_NVRAM_TYPE_LICENSE,             1, EFX_NVRAM_LICENSE},
 230         {MC_CMD_NVRAM_TYPE_LICENSE,             2, EFX_NVRAM_LICENSE}
 231 };
 232
 233         __checkReturn           efx_rc_t
 234 siena_nvram_type_to_partn(
 235         __in                    efx_nic_t *enp,
 236         __in                    efx_nvram_type_t type,
 237         __out                   uint32_t *partnp)
 238 {
 239         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 240         unsigned int i;
 241
 242         EFSYS_ASSERT3U(type, !=, EFX_NVRAM_INVALID);
 243         EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
 244         EFSYS_ASSERT(partnp != NULL);
 245
 246         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 247                 siena_parttbl_entry_t *entry = &siena_parttbl[i];
 248
 249                 if (entry->port == emip->emi_port && entry->nvtype == type) {
 250                         *partnp = entry->partn;
 251                         return (0);
 252                 }
 253         }
 254
 255         return (ENOTSUP);
 256 }
 257
 258
 259 #if EFSYS_OPT_DIAG
 260
 261         __checkReturn           efx_rc_t
 262 siena_nvram_test(
 263         __in                    efx_nic_t *enp)
 264 {
 265         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 266         siena_parttbl_entry_t *entry;
 267         unsigned int i;
 268         efx_rc_t rc;
 269
 270         /*
 271          * Iterate over the list of supported partition types
 272          * applicable to *this* port
 273          */
 274         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 275                 entry = &siena_parttbl[i];
 276
 277                 if (entry->port != emip->emi_port ||
 278                     !(enp->en_u.siena.enu_partn_mask & (1 << entry->partn)))
 279                         continue;
 280
 281                 if ((rc = efx_mcdi_nvram_test(enp, entry->partn)) != 0) {
 282                         goto fail1;
 283                 }
 284         }
 285
 286         return (0);
 287
 288 fail1:
 289         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 290
 291         return (rc);
 292 }
 293
 294 #endif  /* EFSYS_OPT_DIAG */
 295
 296
 297 #define SIENA_DYNAMIC_CFG_SIZE(_nitems)                                 \
 298         (sizeof (siena_mc_dynamic_config_hdr_t) + ((_nitems) *          \
 299         sizeof (((siena_mc_dynamic_config_hdr_t *)NULL)->fw_version[0])))
 300
 301         __checkReturn           efx_rc_t
 302 siena_nvram_get_dynamic_cfg(
 303         __in                    efx_nic_t *enp,
 304         __in                    uint32_t partn,
 305         __in                    boolean_t vpd,
 306         __out                   siena_mc_dynamic_config_hdr_t **dcfgp,
 307         __out                   size_t *sizep)
 308 {
 309         siena_mc_dynamic_config_hdr_t *dcfg = NULL;
 310         size_t size;
 311         uint8_t cksum;
 312         unsigned int vpd_offset;
 313         unsigned int vpd_length;
 314         unsigned int hdr_length;
 315         unsigned int nversions;
 316         unsigned int pos;
 317         unsigned int region;
 318         efx_rc_t rc;
 319
 320         EFSYS_ASSERT(partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 ||
 321                     partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1);
 322
 323         /*
 324          * Allocate sufficient memory for the entire dynamiccfg area, even
 325          * if we're not actually going to read in the VPD.
 326          */
 327         if ((rc = siena_nvram_partn_size(enp, partn, &size)) != 0)
 328                 goto fail1;
 329
 330         if (size < SIENA_NVRAM_CHUNK) {
 331                 rc = EINVAL;
 332                 goto fail2;
 333         }
 334
 335         EFSYS_KMEM_ALLOC(enp->en_esip, size, dcfg);
 336         if (dcfg == NULL) {
 337                 rc = ENOMEM;
 338                 goto fail3;
 339         }
 340
 341         if ((rc = siena_nvram_partn_read(enp, partn, 0,
 342             (caddr_t)dcfg, SIENA_NVRAM_CHUNK)) != 0)
 343                 goto fail4;
 344
 345         /* Verify the magic */
 346         if (EFX_DWORD_FIELD(dcfg->magic, EFX_DWORD_0)
 347             != SIENA_MC_DYNAMIC_CONFIG_MAGIC)
 348                 goto invalid1;
 349
 350         /* All future versions of the structure must be backwards compatible */
 351         EFX_STATIC_ASSERT(SIENA_MC_DYNAMIC_CONFIG_VERSION == 0);
 352
 353         hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0);
 354         nversions = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0);
 355         vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0);
 356         vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0);
 357
 358         /* Verify the hdr doesn't overflow the partn size */
 359         if (hdr_length > size || vpd_offset > size || vpd_length > size ||
 360             vpd_length + vpd_offset > size)
 361                 goto invalid2;
 362
 363         /* Verify the header has room for all it's versions */
 364         if (hdr_length < SIENA_DYNAMIC_CFG_SIZE(0) ||
 365             hdr_length < SIENA_DYNAMIC_CFG_SIZE(nversions))
 366                 goto invalid3;
 367
 368         /*
 369          * Read the remaining portion of the dcfg, either including
 370          * the whole of VPD (there is no vpd length in this structure,
 371          * so we have to parse each tag), or just the dcfg header itself
 372          */
 373         region = vpd ? vpd_offset + vpd_length : hdr_length;
 374         if (region > SIENA_NVRAM_CHUNK) {
 375                 if ((rc = siena_nvram_partn_read(enp, partn, SIENA_NVRAM_CHUNK,
 376                     (caddr_t)dcfg + SIENA_NVRAM_CHUNK,
 377                     region - SIENA_NVRAM_CHUNK)) != 0)
 378                         goto fail5;
 379         }
 380
 381         /* Verify checksum */
 382         cksum = 0;
 383         for (pos = 0; pos < hdr_length; pos++)
 384                 cksum += ((uint8_t *)dcfg)[pos];
 385         if (cksum != 0)
 386                 goto invalid4;
 387
 388         goto done;
 389
 390 invalid4:
 391         EFSYS_PROBE(invalid4);
 392 invalid3:
 393         EFSYS_PROBE(invalid3);
 394 invalid2:
 395         EFSYS_PROBE(invalid2);
 396 invalid1:
 397         EFSYS_PROBE(invalid1);
 398
 399         /*
 400          * Construct a new "null" dcfg, with an empty version vector,
 401          * and an empty VPD chunk trailing. This has the neat side effect
 402          * of testing the exception paths in the write path.
 403          */
 404         EFX_POPULATE_DWORD_1(dcfg->magic,
 405                             EFX_DWORD_0, SIENA_MC_DYNAMIC_CONFIG_MAGIC);
 406         EFX_POPULATE_WORD_1(dcfg->length, EFX_WORD_0, sizeof (*dcfg));
 407         EFX_POPULATE_BYTE_1(dcfg->version, EFX_BYTE_0,
 408                             SIENA_MC_DYNAMIC_CONFIG_VERSION);
 409         EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset,
 410                             EFX_DWORD_0, sizeof (*dcfg));
 411         EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_length, EFX_DWORD_0, 0);
 412         EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items, EFX_DWORD_0, 0);
 413
 414 done:
 415         *dcfgp = dcfg;
 416         *sizep = size;
 417
 418         return (0);
 419
 420 fail5:
 421         EFSYS_PROBE(fail5);
 422 fail4:
 423         EFSYS_PROBE(fail4);
 424
 425         EFSYS_KMEM_FREE(enp->en_esip, size, dcfg);
 426
 427 fail3:
 428         EFSYS_PROBE(fail3);
 429 fail2:
 430         EFSYS_PROBE(fail2);
 431 fail1:
 432         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 433
 434         return (rc);
 435 }
 436
 437         __checkReturn           efx_rc_t
 438 siena_nvram_get_subtype(
 439         __in                    efx_nic_t *enp,
 440         __in                    uint32_t partn,
 441         __out                   uint32_t *subtypep)
 442 {
 443         efx_mcdi_req_t req;
 444         EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_BOARD_CFG_IN_LEN,
 445                 MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
 446         efx_word_t *fw_list;
 447         efx_rc_t rc;
 448
 449         req.emr_cmd = MC_CMD_GET_BOARD_CFG;
 450         req.emr_in_buf = payload;
 451         req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN;
 452         req.emr_out_buf = payload;
 453         req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMAX;
 454
 455         efx_mcdi_execute(enp, &req);
 456
 457         if (req.emr_rc != 0) {
 458                 rc = req.emr_rc;
 459                 goto fail1;
 460         }
 461
 462         if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
 463                 rc = EMSGSIZE;
 464                 goto fail2;
 465         }
 466
 467         if (req.emr_out_length_used <
 468             MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST +
 469             (partn + 1) * sizeof (efx_word_t)) {
 470                 rc = ENOENT;
 471                 goto fail3;
 472         }
 473
 474         fw_list = MCDI_OUT2(req, efx_word_t,
 475                             GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
 476         *subtypep = EFX_WORD_FIELD(fw_list[partn], EFX_WORD_0);
 477
 478         return (0);
 479
 480 fail3:
 481         EFSYS_PROBE(fail3);
 482 fail2:
 483         EFSYS_PROBE(fail2);
 484 fail1:
 485         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 486
 487         return (rc);
 488 }
 489
 490         __checkReturn           efx_rc_t
 491 siena_nvram_partn_get_version(
 492         __in                    efx_nic_t *enp,
 493         __in                    uint32_t partn,
 494         __out                   uint32_t *subtypep,
 495         __out_ecount(4)         uint16_t version[4])
 496 {
 497         siena_mc_dynamic_config_hdr_t *dcfg;
 498         siena_parttbl_entry_t *entry;
 499         uint32_t dcfg_partn;
 500         unsigned int i;
 501         efx_rc_t rc;
 502
 503         if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) {
 504                 rc = ENOTSUP;
 505                 goto fail1;
 506         }
 507
 508         if ((rc = siena_nvram_get_subtype(enp, partn, subtypep)) != 0)
 509                 goto fail2;
 510
 511         /*
 512          * Some partitions are accessible from both ports (for instance BOOTROM)
 513          * Find the highest version reported by all dcfg structures on ports
 514          * that have access to this partition.
 515          */
 516         version[0] = version[1] = version[2] = version[3] = 0;
 517         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 518                 siena_mc_fw_version_t *verp;
 519                 unsigned int nitems;
 520                 uint16_t temp[4];
 521                 size_t length;
 522
 523                 entry = &siena_parttbl[i];
 524                 if (entry->partn != partn)
 525                         continue;
 526
 527                 dcfg_partn = (entry->port == 1)
 528                         ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0
 529                         : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1;
 530                 /*
 531                  * Ingore missing partitions on port 2, assuming they're due
 532                  * to to running on a single port part.
 533                  */
 534                 if ((1 << dcfg_partn) &  ~enp->en_u.siena.enu_partn_mask) {
 535                         if (entry->port == 2)
 536                                 continue;
 537                 }
 538
 539                 if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn,
 540                     B_FALSE, &dcfg, &length)) != 0)
 541                         goto fail3;
 542
 543                 nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items,
 544                             EFX_DWORD_0);
 545                 if (nitems < entry->partn)
 546                         goto done;
 547
 548                 verp = &dcfg->fw_version[partn];
 549                 temp[0] = EFX_WORD_FIELD(verp->version_w, EFX_WORD_0);
 550                 temp[1] = EFX_WORD_FIELD(verp->version_x, EFX_WORD_0);
 551                 temp[2] = EFX_WORD_FIELD(verp->version_y, EFX_WORD_0);
 552                 temp[3] = EFX_WORD_FIELD(verp->version_z, EFX_WORD_0);
 553                 if (memcmp(version, temp, sizeof (temp)) < 0)
 554                         memcpy(version, temp, sizeof (temp));
 555
 556 done:
 557                 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 558         }
 559
 560         return (0);
 561
 562 fail3:
 563         EFSYS_PROBE(fail3);
 564 fail2:
 565         EFSYS_PROBE(fail2);
 566 fail1:
 567         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 568
 569         return (rc);
 570 }
 571
 572         __checkReturn           efx_rc_t
 573 siena_nvram_partn_rw_start(
 574         __in                    efx_nic_t *enp,
 575         __in                    uint32_t partn,
 576         __out                   size_t *chunk_sizep)
 577 {
 578         efx_rc_t rc;
 579
 580         if ((rc = siena_nvram_partn_lock(enp, partn)) != 0)
 581                 goto fail1;
 582
 583         if (chunk_sizep != NULL)
 584                 *chunk_sizep = SIENA_NVRAM_CHUNK;
 585
 586         return (0);
 587
 588 fail1:
 589         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 590
 591         return (rc);
 592 }
 593
 594         __checkReturn           efx_rc_t
 595 siena_nvram_partn_rw_finish(
 596         __in                    efx_nic_t *enp,
 597         __in                    uint32_t partn,
 598         __out_opt               uint32_t *verify_resultp)
 599 {
 600         efx_rc_t rc;
 601
 602         if ((rc = siena_nvram_partn_unlock(enp, partn, verify_resultp)) != 0)
 603                 goto fail1;
 604
 605         return (0);
 606
 607 fail1:
 608         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 609
 610         return (rc);
 611 }
 612
 613         __checkReturn           efx_rc_t
 614 siena_nvram_partn_set_version(
 615         __in                    efx_nic_t *enp,
 616         __in                    uint32_t partn,
 617         __in_ecount(4)          uint16_t version[4])
 618 {
 619         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 620         siena_mc_dynamic_config_hdr_t *dcfg = NULL;
 621         siena_mc_fw_version_t *fwverp;
 622         uint32_t dcfg_partn;
 623         size_t dcfg_size;
 624         unsigned int hdr_length;
 625         unsigned int vpd_length;
 626         unsigned int vpd_offset;
 627         unsigned int nitems;
 628         unsigned int required_hdr_length;
 629         unsigned int pos;
 630         uint8_t cksum;
 631         uint32_t subtype;
 632         size_t length;
 633         efx_rc_t rc;
 634
 635         dcfg_partn = (emip->emi_port == 1)
 636                 ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0
 637                 : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1;
 638
 639         if ((rc = siena_nvram_partn_size(enp, dcfg_partn, &dcfg_size)) != 0)
 640                 goto fail1;
 641
 642         if ((rc = siena_nvram_partn_lock(enp, dcfg_partn)) != 0)
 643                 goto fail2;
 644
 645         if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn,
 646             B_TRUE, &dcfg, &length)) != 0)
 647                 goto fail3;
 648
 649         hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0);
 650         nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0);
 651         vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0);
 652         vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0);
 653
 654         /*
 655          * NOTE: This function will blatt any fields trailing the version
 656          * vector, or the VPD chunk.
 657          */
 658         required_hdr_length = SIENA_DYNAMIC_CFG_SIZE(partn + 1);
 659         if (required_hdr_length + vpd_length > length) {
 660                 rc = ENOSPC;
 661                 goto fail4;
 662         }
 663
 664         if (vpd_offset < required_hdr_length) {
 665                 (void) memmove((caddr_t)dcfg + required_hdr_length,
 666                         (caddr_t)dcfg + vpd_offset, vpd_length);
 667                 vpd_offset = required_hdr_length;
 668                 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset,
 669                                     EFX_DWORD_0, vpd_offset);
 670         }
 671
 672         if (hdr_length < required_hdr_length) {
 673                 (void) memset((caddr_t)dcfg + hdr_length, 0,
 674                         required_hdr_length - hdr_length);
 675                 hdr_length = required_hdr_length;
 676                 EFX_POPULATE_WORD_1(dcfg->length,
 677                                     EFX_WORD_0, hdr_length);
 678         }
 679
 680         /* Get the subtype to insert into the fw_subtype array */
 681         if ((rc = siena_nvram_get_subtype(enp, partn, &subtype)) != 0)
 682                 goto fail5;
 683
 684         /* Fill out the new version */
 685         fwverp = &dcfg->fw_version[partn];
 686         EFX_POPULATE_DWORD_1(fwverp->fw_subtype, EFX_DWORD_0, subtype);
 687         EFX_POPULATE_WORD_1(fwverp->version_w, EFX_WORD_0, version[0]);
 688         EFX_POPULATE_WORD_1(fwverp->version_x, EFX_WORD_0, version[1]);
 689         EFX_POPULATE_WORD_1(fwverp->version_y, EFX_WORD_0, version[2]);
 690         EFX_POPULATE_WORD_1(fwverp->version_z, EFX_WORD_0, version[3]);
 691
 692         /* Update the version count */
 693         if (nitems < partn + 1) {
 694                 nitems = partn + 1;
 695                 EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items,
 696                                     EFX_DWORD_0, nitems);
 697         }
 698
 699         /* Update the checksum */
 700         cksum = 0;
 701         for (pos = 0; pos < hdr_length; pos++)
 702                 cksum += ((uint8_t *)dcfg)[pos];
 703         dcfg->csum.eb_u8[0] -= cksum;
 704
 705         /* Erase and write the new partition */
 706         if ((rc = siena_nvram_partn_erase(enp, dcfg_partn, 0, dcfg_size)) != 0)
 707                 goto fail6;
 708
 709         /* Write out the new structure to nvram */
 710         if ((rc = siena_nvram_partn_write(enp, dcfg_partn, 0,
 711             (caddr_t)dcfg, vpd_offset + vpd_length)) != 0)
 712                 goto fail7;
 713
 714         EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 715
 716         siena_nvram_partn_unlock(enp, dcfg_partn, NULL);
 717
 718         return (0);
 719
 720 fail7:
 721         EFSYS_PROBE(fail7);
 722 fail6:
 723         EFSYS_PROBE(fail6);
 724 fail5:
 725         EFSYS_PROBE(fail5);
 726 fail4:
 727         EFSYS_PROBE(fail4);
 728
 729         EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 730 fail3:
 731         EFSYS_PROBE(fail3);
 732 fail2:
 733         EFSYS_PROBE(fail2);
 734 fail1:
 735         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 736
 737         return (rc);
 738 }
 739
 740 #endif  /* EFSYS_OPT_NVRAM */
 741
 742 #endif  /* EFSYS_OPT_SIENA */