1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2009-2018 Solarflare Communications Inc.
12 #if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM
14 __checkReturn efx_rc_t
15 siena_nvram_partn_size(
22 if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) {
27 if ((rc = efx_mcdi_nvram_info(enp, partn, sizep,
28 NULL, NULL, NULL)) != 0) {
37 EFSYS_PROBE1(fail1, efx_rc_t, rc);
42 __checkReturn efx_rc_t
43 siena_nvram_partn_lock(
49 if ((rc = efx_mcdi_nvram_update_start(enp, partn)) != 0) {
56 EFSYS_PROBE1(fail1, efx_rc_t, rc);
61 __checkReturn efx_rc_t
62 siena_nvram_partn_read(
65 __in unsigned int offset,
66 __out_bcount(size) caddr_t data,
73 chunk = MIN(size, SIENA_NVRAM_CHUNK);
75 if ((rc = efx_mcdi_nvram_read(enp, partn, offset, data, chunk,
76 MC_CMD_NVRAM_READ_IN_V2_DEFAULT)) != 0) {
88 EFSYS_PROBE1(fail1, efx_rc_t, rc);
93 __checkReturn efx_rc_t
94 siena_nvram_partn_erase(
97 __in unsigned int offset,
102 if ((rc = efx_mcdi_nvram_erase(enp, partn, offset, size)) != 0) {
109 EFSYS_PROBE1(fail1, efx_rc_t, rc);
114 __checkReturn efx_rc_t
115 siena_nvram_partn_write(
118 __in unsigned int offset,
119 __out_bcount(size) caddr_t data,
126 chunk = MIN(size, SIENA_NVRAM_CHUNK);
128 if ((rc = efx_mcdi_nvram_write(enp, partn, offset,
129 data, chunk)) != 0) {
141 EFSYS_PROBE1(fail1, efx_rc_t, rc);
146 __checkReturn efx_rc_t
147 siena_nvram_partn_unlock(
150 __out_opt uint32_t *verify_resultp)
156 * Reboot into the new image only for PHYs. The driver has to
157 * explicitly cope with an MC reboot after a firmware update.
159 reboot = (partn == MC_CMD_NVRAM_TYPE_PHY_PORT0 ||
160 partn == MC_CMD_NVRAM_TYPE_PHY_PORT1 ||
161 partn == MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO);
163 rc = efx_mcdi_nvram_update_finish(enp, partn, reboot, verify_resultp);
170 EFSYS_PROBE1(fail1, efx_rc_t, rc);
175 #endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
179 typedef struct siena_parttbl_entry_s {
182 efx_nvram_type_t nvtype;
183 } siena_parttbl_entry_t;
185 static siena_parttbl_entry_t siena_parttbl[] = {
186 {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO, 1, EFX_NVRAM_NULLPHY},
187 {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO, 2, EFX_NVRAM_NULLPHY},
188 {MC_CMD_NVRAM_TYPE_MC_FW, 1, EFX_NVRAM_MC_FIRMWARE},
189 {MC_CMD_NVRAM_TYPE_MC_FW, 2, EFX_NVRAM_MC_FIRMWARE},
190 {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP, 1, EFX_NVRAM_MC_GOLDEN},
191 {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP, 2, EFX_NVRAM_MC_GOLDEN},
192 {MC_CMD_NVRAM_TYPE_EXP_ROM, 1, EFX_NVRAM_BOOTROM},
193 {MC_CMD_NVRAM_TYPE_EXP_ROM, 2, EFX_NVRAM_BOOTROM},
194 {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0, 1, EFX_NVRAM_BOOTROM_CFG},
195 {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1, 2, EFX_NVRAM_BOOTROM_CFG},
196 {MC_CMD_NVRAM_TYPE_PHY_PORT0, 1, EFX_NVRAM_PHY},
197 {MC_CMD_NVRAM_TYPE_PHY_PORT1, 2, EFX_NVRAM_PHY},
198 {MC_CMD_NVRAM_TYPE_FPGA, 1, EFX_NVRAM_FPGA},
199 {MC_CMD_NVRAM_TYPE_FPGA, 2, EFX_NVRAM_FPGA},
200 {MC_CMD_NVRAM_TYPE_FPGA_BACKUP, 1, EFX_NVRAM_FPGA_BACKUP},
201 {MC_CMD_NVRAM_TYPE_FPGA_BACKUP, 2, EFX_NVRAM_FPGA_BACKUP},
202 {MC_CMD_NVRAM_TYPE_FC_FW, 1, EFX_NVRAM_FCFW},
203 {MC_CMD_NVRAM_TYPE_FC_FW, 2, EFX_NVRAM_FCFW},
204 {MC_CMD_NVRAM_TYPE_CPLD, 1, EFX_NVRAM_CPLD},
205 {MC_CMD_NVRAM_TYPE_CPLD, 2, EFX_NVRAM_CPLD},
206 {MC_CMD_NVRAM_TYPE_LICENSE, 1, EFX_NVRAM_LICENSE},
207 {MC_CMD_NVRAM_TYPE_LICENSE, 2, EFX_NVRAM_LICENSE}
210 __checkReturn efx_rc_t
211 siena_nvram_type_to_partn(
213 __in efx_nvram_type_t type,
214 __out uint32_t *partnp)
216 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
219 EFSYS_ASSERT3U(type, !=, EFX_NVRAM_INVALID);
220 EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
221 EFSYS_ASSERT(partnp != NULL);
223 for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
224 siena_parttbl_entry_t *entry = &siena_parttbl[i];
226 if (entry->port == emip->emi_port && entry->nvtype == type) {
227 *partnp = entry->partn;
238 __checkReturn efx_rc_t
242 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
243 siena_parttbl_entry_t *entry;
248 * Iterate over the list of supported partition types
249 * applicable to *this* port
251 for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
252 entry = &siena_parttbl[i];
254 if (entry->port != emip->emi_port ||
255 !(enp->en_u.siena.enu_partn_mask & (1 << entry->partn)))
258 if ((rc = efx_mcdi_nvram_test(enp, entry->partn)) != 0) {
266 EFSYS_PROBE1(fail1, efx_rc_t, rc);
271 #endif /* EFSYS_OPT_DIAG */
274 #define SIENA_DYNAMIC_CFG_SIZE(_nitems) \
275 (sizeof (siena_mc_dynamic_config_hdr_t) + ((_nitems) * \
276 sizeof (((siena_mc_dynamic_config_hdr_t *)NULL)->fw_version[0])))
278 __checkReturn efx_rc_t
279 siena_nvram_get_dynamic_cfg(
283 __out siena_mc_dynamic_config_hdr_t **dcfgp,
286 siena_mc_dynamic_config_hdr_t *dcfg = NULL;
289 unsigned int vpd_offset;
290 unsigned int vpd_length;
291 unsigned int hdr_length;
292 unsigned int nversions;
297 EFSYS_ASSERT(partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 ||
298 partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1);
301 * Allocate sufficient memory for the entire dynamiccfg area, even
302 * if we're not actually going to read in the VPD.
304 if ((rc = siena_nvram_partn_size(enp, partn, &size)) != 0)
307 if (size < SIENA_NVRAM_CHUNK) {
312 EFSYS_KMEM_ALLOC(enp->en_esip, size, dcfg);
318 if ((rc = siena_nvram_partn_read(enp, partn, 0,
319 (caddr_t)dcfg, SIENA_NVRAM_CHUNK)) != 0)
322 /* Verify the magic */
323 if (EFX_DWORD_FIELD(dcfg->magic, EFX_DWORD_0)
324 != SIENA_MC_DYNAMIC_CONFIG_MAGIC)
327 /* All future versions of the structure must be backwards compatible */
328 EFX_STATIC_ASSERT(SIENA_MC_DYNAMIC_CONFIG_VERSION == 0);
330 hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0);
331 nversions = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0);
332 vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0);
333 vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0);
335 /* Verify the hdr doesn't overflow the partn size */
336 if (hdr_length > size || vpd_offset > size || vpd_length > size ||
337 vpd_length + vpd_offset > size)
340 /* Verify the header has room for all it's versions */
341 if (hdr_length < SIENA_DYNAMIC_CFG_SIZE(0) ||
342 hdr_length < SIENA_DYNAMIC_CFG_SIZE(nversions))
346 * Read the remaining portion of the dcfg, either including
347 * the whole of VPD (there is no vpd length in this structure,
348 * so we have to parse each tag), or just the dcfg header itself
350 region = vpd ? vpd_offset + vpd_length : hdr_length;
351 if (region > SIENA_NVRAM_CHUNK) {
352 if ((rc = siena_nvram_partn_read(enp, partn, SIENA_NVRAM_CHUNK,
353 (caddr_t)dcfg + SIENA_NVRAM_CHUNK,
354 region - SIENA_NVRAM_CHUNK)) != 0)
358 /* Verify checksum */
360 for (pos = 0; pos < hdr_length; pos++)
361 cksum += ((uint8_t *)dcfg)[pos];
368 EFSYS_PROBE(invalid4);
370 EFSYS_PROBE(invalid3);
372 EFSYS_PROBE(invalid2);
374 EFSYS_PROBE(invalid1);
377 * Construct a new "null" dcfg, with an empty version vector,
378 * and an empty VPD chunk trailing. This has the neat side effect
379 * of testing the exception paths in the write path.
381 EFX_POPULATE_DWORD_1(dcfg->magic,
382 EFX_DWORD_0, SIENA_MC_DYNAMIC_CONFIG_MAGIC);
383 EFX_POPULATE_WORD_1(dcfg->length, EFX_WORD_0, sizeof (*dcfg));
384 EFX_POPULATE_BYTE_1(dcfg->version, EFX_BYTE_0,
385 SIENA_MC_DYNAMIC_CONFIG_VERSION);
386 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset,
387 EFX_DWORD_0, sizeof (*dcfg));
388 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_length, EFX_DWORD_0, 0);
389 EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items, EFX_DWORD_0, 0);
402 EFSYS_KMEM_FREE(enp->en_esip, size, dcfg);
409 EFSYS_PROBE1(fail1, efx_rc_t, rc);
414 __checkReturn efx_rc_t
415 siena_nvram_get_subtype(
418 __out uint32_t *subtypep)
421 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_BOARD_CFG_IN_LEN,
422 MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
426 req.emr_cmd = MC_CMD_GET_BOARD_CFG;
427 req.emr_in_buf = payload;
428 req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN;
429 req.emr_out_buf = payload;
430 req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMAX;
432 efx_mcdi_execute(enp, &req);
434 if (req.emr_rc != 0) {
439 if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
444 if (req.emr_out_length_used <
445 MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST +
446 (partn + 1) * sizeof (efx_word_t)) {
451 fw_list = MCDI_OUT2(req, efx_word_t,
452 GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
453 *subtypep = EFX_WORD_FIELD(fw_list[partn], EFX_WORD_0);
462 EFSYS_PROBE1(fail1, efx_rc_t, rc);
467 __checkReturn efx_rc_t
468 siena_nvram_partn_get_version(
471 __out uint32_t *subtypep,
472 __out_ecount(4) uint16_t version[4])
474 siena_mc_dynamic_config_hdr_t *dcfg;
475 siena_parttbl_entry_t *entry;
480 if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) {
485 if ((rc = siena_nvram_get_subtype(enp, partn, subtypep)) != 0)
489 * Some partitions are accessible from both ports (for instance BOOTROM)
490 * Find the highest version reported by all dcfg structures on ports
491 * that have access to this partition.
493 version[0] = version[1] = version[2] = version[3] = 0;
494 for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
495 siena_mc_fw_version_t *verp;
500 entry = &siena_parttbl[i];
501 if (entry->partn != partn)
504 dcfg_partn = (entry->port == 1)
505 ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0
506 : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1;
508 * Ingore missing partitions on port 2, assuming they're due
509 * to to running on a single port part.
511 if ((1 << dcfg_partn) & ~enp->en_u.siena.enu_partn_mask) {
512 if (entry->port == 2)
516 if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn,
517 B_FALSE, &dcfg, &length)) != 0)
520 nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items,
522 if (nitems < entry->partn)
525 verp = &dcfg->fw_version[partn];
526 temp[0] = EFX_WORD_FIELD(verp->version_w, EFX_WORD_0);
527 temp[1] = EFX_WORD_FIELD(verp->version_x, EFX_WORD_0);
528 temp[2] = EFX_WORD_FIELD(verp->version_y, EFX_WORD_0);
529 temp[3] = EFX_WORD_FIELD(verp->version_z, EFX_WORD_0);
530 if (memcmp(version, temp, sizeof (temp)) < 0)
531 memcpy(version, temp, sizeof (temp));
534 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
544 EFSYS_PROBE1(fail1, efx_rc_t, rc);
549 __checkReturn efx_rc_t
550 siena_nvram_partn_rw_start(
553 __out size_t *chunk_sizep)
557 if ((rc = siena_nvram_partn_lock(enp, partn)) != 0)
560 if (chunk_sizep != NULL)
561 *chunk_sizep = SIENA_NVRAM_CHUNK;
566 EFSYS_PROBE1(fail1, efx_rc_t, rc);
571 __checkReturn efx_rc_t
572 siena_nvram_partn_rw_finish(
575 __out_opt uint32_t *verify_resultp)
579 if ((rc = siena_nvram_partn_unlock(enp, partn, verify_resultp)) != 0)
585 EFSYS_PROBE1(fail1, efx_rc_t, rc);
590 __checkReturn efx_rc_t
591 siena_nvram_partn_set_version(
594 __in_ecount(4) uint16_t version[4])
596 efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
597 siena_mc_dynamic_config_hdr_t *dcfg = NULL;
598 siena_mc_fw_version_t *fwverp;
601 unsigned int hdr_length;
602 unsigned int vpd_length;
603 unsigned int vpd_offset;
605 unsigned int required_hdr_length;
612 dcfg_partn = (emip->emi_port == 1)
613 ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0
614 : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1;
616 if ((rc = siena_nvram_partn_size(enp, dcfg_partn, &dcfg_size)) != 0)
619 if ((rc = siena_nvram_partn_lock(enp, dcfg_partn)) != 0)
622 if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn,
623 B_TRUE, &dcfg, &length)) != 0)
626 hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0);
627 nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0);
628 vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0);
629 vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0);
632 * NOTE: This function will blatt any fields trailing the version
633 * vector, or the VPD chunk.
635 required_hdr_length = SIENA_DYNAMIC_CFG_SIZE(partn + 1);
636 if (required_hdr_length + vpd_length > length) {
641 if (vpd_offset < required_hdr_length) {
642 (void) memmove((caddr_t)dcfg + required_hdr_length,
643 (caddr_t)dcfg + vpd_offset, vpd_length);
644 vpd_offset = required_hdr_length;
645 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset,
646 EFX_DWORD_0, vpd_offset);
649 if (hdr_length < required_hdr_length) {
650 (void) memset((caddr_t)dcfg + hdr_length, 0,
651 required_hdr_length - hdr_length);
652 hdr_length = required_hdr_length;
653 EFX_POPULATE_WORD_1(dcfg->length,
654 EFX_WORD_0, hdr_length);
657 /* Get the subtype to insert into the fw_subtype array */
658 if ((rc = siena_nvram_get_subtype(enp, partn, &subtype)) != 0)
661 /* Fill out the new version */
662 fwverp = &dcfg->fw_version[partn];
663 EFX_POPULATE_DWORD_1(fwverp->fw_subtype, EFX_DWORD_0, subtype);
664 EFX_POPULATE_WORD_1(fwverp->version_w, EFX_WORD_0, version[0]);
665 EFX_POPULATE_WORD_1(fwverp->version_x, EFX_WORD_0, version[1]);
666 EFX_POPULATE_WORD_1(fwverp->version_y, EFX_WORD_0, version[2]);
667 EFX_POPULATE_WORD_1(fwverp->version_z, EFX_WORD_0, version[3]);
669 /* Update the version count */
670 if (nitems < partn + 1) {
672 EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items,
673 EFX_DWORD_0, nitems);
676 /* Update the checksum */
678 for (pos = 0; pos < hdr_length; pos++)
679 cksum += ((uint8_t *)dcfg)[pos];
680 dcfg->csum.eb_u8[0] -= cksum;
682 /* Erase and write the new partition */
683 if ((rc = siena_nvram_partn_erase(enp, dcfg_partn, 0, dcfg_size)) != 0)
686 /* Write out the new structure to nvram */
687 if ((rc = siena_nvram_partn_write(enp, dcfg_partn, 0,
688 (caddr_t)dcfg, vpd_offset + vpd_length)) != 0)
691 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
693 siena_nvram_partn_unlock(enp, dcfg_partn, NULL);
706 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
712 EFSYS_PROBE1(fail1, efx_rc_t, rc);
717 #endif /* EFSYS_OPT_NVRAM */
719 #endif /* EFSYS_OPT_SIENA */