drivers/net/sfc/base/siena_nvram.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  * Copyright (c) 2009-2018 Solarflare Communications Inc.
   4  * All rights reserved.
   5  */
   6
   7 #include "efx.h"
   8 #include "efx_impl.h"
   9
  10 #if EFSYS_OPT_SIENA
  11
  12 #if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM
  13
  14         __checkReturn           efx_rc_t
  15 siena_nvram_partn_size(
  16         __in                    efx_nic_t *enp,
  17         __in                    uint32_t partn,
  18         __out                   size_t *sizep)
  19 {
  20         efx_rc_t rc;
  21         efx_nvram_info_t eni = { 0 };
  22
  23         if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) {
  24                 rc = ENOTSUP;
  25                 goto fail1;
  26         }
  27
  28         if ((rc = efx_mcdi_nvram_info(enp, partn, &eni)) != 0)
  29                 goto fail2;
  30
  31         *sizep = eni.eni_partn_size;
  32
  33         return (0);
  34
  35 fail2:
  36         EFSYS_PROBE(fail2);
  37 fail1:
  38         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  39
  40         return (rc);
  41 }
  42
  43         __checkReturn           efx_rc_t
  44 siena_nvram_partn_info(
  45         __in                    efx_nic_t *enp,
  46         __in                    uint32_t partn,
  47         __out                   efx_nvram_info_t * enip)
  48 {
  49         efx_rc_t rc;
  50
  51         if ((rc = efx_mcdi_nvram_info(enp, partn, enip)) != 0)
  52                 goto fail1;
  53
  54         if (enip->eni_write_size == 0)
  55                 enip->eni_write_size = SIENA_NVRAM_CHUNK;
  56
  57         return (0);
  58
  59 fail1:
  60         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  61
  62         return (rc);
  63 }
  64
  65
  66         __checkReturn           efx_rc_t
  67 siena_nvram_partn_lock(
  68         __in                    efx_nic_t *enp,
  69         __in                    uint32_t partn)
  70 {
  71         efx_rc_t rc;
  72
  73         if ((rc = efx_mcdi_nvram_update_start(enp, partn)) != 0) {
  74                 goto fail1;
  75         }
  76
  77         return (0);
  78
  79 fail1:
  80         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  81
  82         return (rc);
  83 }
  84
  85         __checkReturn           efx_rc_t
  86 siena_nvram_partn_read(
  87         __in                    efx_nic_t *enp,
  88         __in                    uint32_t partn,
  89         __in                    unsigned int offset,
  90         __out_bcount(size)      caddr_t data,
  91         __in                    size_t size)
  92 {
  93         size_t chunk;
  94         efx_rc_t rc;
  95
  96         while (size > 0) {
  97                 chunk = MIN(size, SIENA_NVRAM_CHUNK);
  98
  99                 if ((rc = efx_mcdi_nvram_read(enp, partn, offset, data, chunk,
 100                             MC_CMD_NVRAM_READ_IN_V2_DEFAULT)) != 0) {
 101                         goto fail1;
 102                 }
 103
 104                 size -= chunk;
 105                 data += chunk;
 106                 offset += chunk;
 107         }
 108
 109         return (0);
 110
 111 fail1:
 112         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 113
 114         return (rc);
 115 }
 116
 117         __checkReturn           efx_rc_t
 118 siena_nvram_partn_erase(
 119         __in                    efx_nic_t *enp,
 120         __in                    uint32_t partn,
 121         __in                    unsigned int offset,
 122         __in                    size_t size)
 123 {
 124         efx_rc_t rc;
 125
 126         if ((rc = efx_mcdi_nvram_erase(enp, partn, offset, size)) != 0) {
 127                 goto fail1;
 128         }
 129
 130         return (0);
 131
 132 fail1:
 133         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 134
 135         return (rc);
 136 }
 137
 138         __checkReturn           efx_rc_t
 139 siena_nvram_partn_write(
 140         __in                    efx_nic_t *enp,
 141         __in                    uint32_t partn,
 142         __in                    unsigned int offset,
 143         __out_bcount(size)      caddr_t data,
 144         __in                    size_t size)
 145 {
 146         size_t chunk;
 147         efx_rc_t rc;
 148
 149         while (size > 0) {
 150                 chunk = MIN(size, SIENA_NVRAM_CHUNK);
 151
 152                 if ((rc = efx_mcdi_nvram_write(enp, partn, offset,
 153                             data, chunk)) != 0) {
 154                         goto fail1;
 155                 }
 156
 157                 size -= chunk;
 158                 data += chunk;
 159                 offset += chunk;
 160         }
 161
 162         return (0);
 163
 164 fail1:
 165         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 166
 167         return (rc);
 168 }
 169
 170         __checkReturn           efx_rc_t
 171 siena_nvram_partn_unlock(
 172         __in                    efx_nic_t *enp,
 173         __in                    uint32_t partn,
 174         __out_opt               uint32_t *verify_resultp)
 175 {
 176         boolean_t reboot;
 177         efx_rc_t rc;
 178
 179         /*
 180          * Reboot into the new image only for PHYs. The driver has to
 181          * explicitly cope with an MC reboot after a firmware update.
 182          */
 183         reboot = (partn == MC_CMD_NVRAM_TYPE_PHY_PORT0 ||
 184                     partn == MC_CMD_NVRAM_TYPE_PHY_PORT1 ||
 185                     partn == MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO);
 186
 187         rc = efx_mcdi_nvram_update_finish(enp, partn, reboot, verify_resultp);
 188         if (rc != 0)
 189                 goto fail1;
 190
 191         return (0);
 192
 193 fail1:
 194         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 195
 196         return (rc);
 197 }
 198
 199 #endif  /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
 200
 201 #if EFSYS_OPT_NVRAM
 202
 203 typedef struct siena_parttbl_entry_s {
 204         unsigned int            partn;
 205         unsigned int            port;
 206         efx_nvram_type_t        nvtype;
 207 } siena_parttbl_entry_t;
 208
 209 static siena_parttbl_entry_t siena_parttbl[] = {
 210         {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO,   1, EFX_NVRAM_NULLPHY},
 211         {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO,   2, EFX_NVRAM_NULLPHY},
 212         {MC_CMD_NVRAM_TYPE_MC_FW,               1, EFX_NVRAM_MC_FIRMWARE},
 213         {MC_CMD_NVRAM_TYPE_MC_FW,               2, EFX_NVRAM_MC_FIRMWARE},
 214         {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP,        1, EFX_NVRAM_MC_GOLDEN},
 215         {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP,        2, EFX_NVRAM_MC_GOLDEN},
 216         {MC_CMD_NVRAM_TYPE_EXP_ROM,             1, EFX_NVRAM_BOOTROM},
 217         {MC_CMD_NVRAM_TYPE_EXP_ROM,             2, EFX_NVRAM_BOOTROM},
 218         {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0,   1, EFX_NVRAM_BOOTROM_CFG},
 219         {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1,   2, EFX_NVRAM_BOOTROM_CFG},
 220         {MC_CMD_NVRAM_TYPE_PHY_PORT0,           1, EFX_NVRAM_PHY},
 221         {MC_CMD_NVRAM_TYPE_PHY_PORT1,           2, EFX_NVRAM_PHY},
 222         {MC_CMD_NVRAM_TYPE_FPGA,                1, EFX_NVRAM_FPGA},
 223         {MC_CMD_NVRAM_TYPE_FPGA,                2, EFX_NVRAM_FPGA},
 224         {MC_CMD_NVRAM_TYPE_FPGA_BACKUP,         1, EFX_NVRAM_FPGA_BACKUP},
 225         {MC_CMD_NVRAM_TYPE_FPGA_BACKUP,         2, EFX_NVRAM_FPGA_BACKUP},
 226         {MC_CMD_NVRAM_TYPE_FC_FW,               1, EFX_NVRAM_FCFW},
 227         {MC_CMD_NVRAM_TYPE_FC_FW,               2, EFX_NVRAM_FCFW},
 228         {MC_CMD_NVRAM_TYPE_CPLD,                1, EFX_NVRAM_CPLD},
 229         {MC_CMD_NVRAM_TYPE_CPLD,                2, EFX_NVRAM_CPLD},
 230         {MC_CMD_NVRAM_TYPE_LICENSE,             1, EFX_NVRAM_LICENSE},
 231         {MC_CMD_NVRAM_TYPE_LICENSE,             2, EFX_NVRAM_LICENSE}
 232 };
 233
 234         __checkReturn           efx_rc_t
 235 siena_nvram_type_to_partn(
 236         __in                    efx_nic_t *enp,
 237         __in                    efx_nvram_type_t type,
 238         __out                   uint32_t *partnp)
 239 {
 240         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 241         unsigned int i;
 242
 243         EFSYS_ASSERT3U(type, !=, EFX_NVRAM_INVALID);
 244         EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
 245         EFSYS_ASSERT(partnp != NULL);
 246
 247         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 248                 siena_parttbl_entry_t *entry = &siena_parttbl[i];
 249
 250                 if (entry->port == emip->emi_port && entry->nvtype == type) {
 251                         *partnp = entry->partn;
 252                         return (0);
 253                 }
 254         }
 255
 256         return (ENOTSUP);
 257 }
 258
 259
 260 #if EFSYS_OPT_DIAG
 261
 262         __checkReturn           efx_rc_t
 263 siena_nvram_test(
 264         __in                    efx_nic_t *enp)
 265 {
 266         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 267         siena_parttbl_entry_t *entry;
 268         unsigned int i;
 269         efx_rc_t rc;
 270
 271         /*
 272          * Iterate over the list of supported partition types
 273          * applicable to *this* port
 274          */
 275         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 276                 entry = &siena_parttbl[i];
 277
 278                 if (entry->port != emip->emi_port ||
 279                     !(enp->en_u.siena.enu_partn_mask & (1 << entry->partn)))
 280                         continue;
 281
 282                 if ((rc = efx_mcdi_nvram_test(enp, entry->partn)) != 0) {
 283                         goto fail1;
 284                 }
 285         }
 286
 287         return (0);
 288
 289 fail1:
 290         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 291
 292         return (rc);
 293 }
 294
 295 #endif  /* EFSYS_OPT_DIAG */
 296
 297
 298 #define SIENA_DYNAMIC_CFG_SIZE(_nitems)                                 \
 299         (sizeof (siena_mc_dynamic_config_hdr_t) + ((_nitems) *          \
 300         sizeof (((siena_mc_dynamic_config_hdr_t *)NULL)->fw_version[0])))
 301
 302         __checkReturn           efx_rc_t
 303 siena_nvram_get_dynamic_cfg(
 304         __in                    efx_nic_t *enp,
 305         __in                    uint32_t partn,
 306         __in                    boolean_t vpd,
 307         __out                   siena_mc_dynamic_config_hdr_t **dcfgp,
 308         __out                   size_t *sizep)
 309 {
 310         siena_mc_dynamic_config_hdr_t *dcfg = NULL;
 311         size_t size;
 312         uint8_t cksum;
 313         unsigned int vpd_offset;
 314         unsigned int vpd_length;
 315         unsigned int hdr_length;
 316         unsigned int nversions;
 317         unsigned int pos;
 318         unsigned int region;
 319         efx_rc_t rc;
 320
 321         EFSYS_ASSERT(partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 ||
 322                     partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1);
 323
 324         /*
 325          * Allocate sufficient memory for the entire dynamiccfg area, even
 326          * if we're not actually going to read in the VPD.
 327          */
 328         if ((rc = siena_nvram_partn_size(enp, partn, &size)) != 0)
 329                 goto fail1;
 330
 331         if (size < SIENA_NVRAM_CHUNK) {
 332                 rc = EINVAL;
 333                 goto fail2;
 334         }
 335
 336         EFSYS_KMEM_ALLOC(enp->en_esip, size, dcfg);
 337         if (dcfg == NULL) {
 338                 rc = ENOMEM;
 339                 goto fail3;
 340         }
 341
 342         if ((rc = siena_nvram_partn_read(enp, partn, 0,
 343             (caddr_t)dcfg, SIENA_NVRAM_CHUNK)) != 0)
 344                 goto fail4;
 345
 346         /* Verify the magic */
 347         if (EFX_DWORD_FIELD(dcfg->magic, EFX_DWORD_0)
 348             != SIENA_MC_DYNAMIC_CONFIG_MAGIC)
 349                 goto invalid1;
 350
 351         /* All future versions of the structure must be backwards compatible */
 352         EFX_STATIC_ASSERT(SIENA_MC_DYNAMIC_CONFIG_VERSION == 0);
 353
 354         hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0);
 355         nversions = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0);
 356         vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0);
 357         vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0);
 358
 359         /* Verify the hdr doesn't overflow the partn size */
 360         if (hdr_length > size || vpd_offset > size || vpd_length > size ||
 361             vpd_length + vpd_offset > size)
 362                 goto invalid2;
 363
 364         /* Verify the header has room for all it's versions */
 365         if (hdr_length < SIENA_DYNAMIC_CFG_SIZE(0) ||
 366             hdr_length < SIENA_DYNAMIC_CFG_SIZE(nversions))
 367                 goto invalid3;
 368
 369         /*
 370          * Read the remaining portion of the dcfg, either including
 371          * the whole of VPD (there is no vpd length in this structure,
 372          * so we have to parse each tag), or just the dcfg header itself
 373          */
 374         region = vpd ? vpd_offset + vpd_length : hdr_length;
 375         if (region > SIENA_NVRAM_CHUNK) {
 376                 if ((rc = siena_nvram_partn_read(enp, partn, SIENA_NVRAM_CHUNK,
 377                     (caddr_t)dcfg + SIENA_NVRAM_CHUNK,
 378                     region - SIENA_NVRAM_CHUNK)) != 0)
 379                         goto fail5;
 380         }
 381
 382         /* Verify checksum */
 383         cksum = 0;
 384         for (pos = 0; pos < hdr_length; pos++)
 385                 cksum += ((uint8_t *)dcfg)[pos];
 386         if (cksum != 0)
 387                 goto invalid4;
 388
 389         goto done;
 390
 391 invalid4:
 392         EFSYS_PROBE(invalid4);
 393 invalid3:
 394         EFSYS_PROBE(invalid3);
 395 invalid2:
 396         EFSYS_PROBE(invalid2);
 397 invalid1:
 398         EFSYS_PROBE(invalid1);
 399
 400         /*
 401          * Construct a new "null" dcfg, with an empty version vector,
 402          * and an empty VPD chunk trailing. This has the neat side effect
 403          * of testing the exception paths in the write path.
 404          */
 405         EFX_POPULATE_DWORD_1(dcfg->magic,
 406                             EFX_DWORD_0, SIENA_MC_DYNAMIC_CONFIG_MAGIC);
 407         EFX_POPULATE_WORD_1(dcfg->length, EFX_WORD_0, sizeof (*dcfg));
 408         EFX_POPULATE_BYTE_1(dcfg->version, EFX_BYTE_0,
 409                             SIENA_MC_DYNAMIC_CONFIG_VERSION);
 410         EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset,
 411                             EFX_DWORD_0, sizeof (*dcfg));
 412         EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_length, EFX_DWORD_0, 0);
 413         EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items, EFX_DWORD_0, 0);
 414
 415 done:
 416         *dcfgp = dcfg;
 417         *sizep = size;
 418
 419         return (0);
 420
 421 fail5:
 422         EFSYS_PROBE(fail5);
 423 fail4:
 424         EFSYS_PROBE(fail4);
 425
 426         EFSYS_KMEM_FREE(enp->en_esip, size, dcfg);
 427
 428 fail3:
 429         EFSYS_PROBE(fail3);
 430 fail2:
 431         EFSYS_PROBE(fail2);
 432 fail1:
 433         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 434
 435         return (rc);
 436 }
 437
 438         __checkReturn           efx_rc_t
 439 siena_nvram_get_subtype(
 440         __in                    efx_nic_t *enp,
 441         __in                    uint32_t partn,
 442         __out                   uint32_t *subtypep)
 443 {
 444         efx_mcdi_req_t req;
 445         EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_BOARD_CFG_IN_LEN,
 446                 MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
 447         efx_word_t *fw_list;
 448         efx_rc_t rc;
 449
 450         req.emr_cmd = MC_CMD_GET_BOARD_CFG;
 451         req.emr_in_buf = payload;
 452         req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN;
 453         req.emr_out_buf = payload;
 454         req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMAX;
 455
 456         efx_mcdi_execute(enp, &req);
 457
 458         if (req.emr_rc != 0) {
 459                 rc = req.emr_rc;
 460                 goto fail1;
 461         }
 462
 463         if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
 464                 rc = EMSGSIZE;
 465                 goto fail2;
 466         }
 467
 468         if (req.emr_out_length_used <
 469             MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST +
 470             (partn + 1) * sizeof (efx_word_t)) {
 471                 rc = ENOENT;
 472                 goto fail3;
 473         }
 474
 475         fw_list = MCDI_OUT2(req, efx_word_t,
 476                             GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
 477         *subtypep = EFX_WORD_FIELD(fw_list[partn], EFX_WORD_0);
 478
 479         return (0);
 480
 481 fail3:
 482         EFSYS_PROBE(fail3);
 483 fail2:
 484         EFSYS_PROBE(fail2);
 485 fail1:
 486         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 487
 488         return (rc);
 489 }
 490
 491         __checkReturn           efx_rc_t
 492 siena_nvram_partn_get_version(
 493         __in                    efx_nic_t *enp,
 494         __in                    uint32_t partn,
 495         __out                   uint32_t *subtypep,
 496         __out_ecount(4)         uint16_t version[4])
 497 {
 498         siena_mc_dynamic_config_hdr_t *dcfg;
 499         siena_parttbl_entry_t *entry;
 500         uint32_t dcfg_partn;
 501         unsigned int i;
 502         efx_rc_t rc;
 503
 504         if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) {
 505                 rc = ENOTSUP;
 506                 goto fail1;
 507         }
 508
 509         if ((rc = siena_nvram_get_subtype(enp, partn, subtypep)) != 0)
 510                 goto fail2;
 511
 512         /*
 513          * Some partitions are accessible from both ports (for instance BOOTROM)
 514          * Find the highest version reported by all dcfg structures on ports
 515          * that have access to this partition.
 516          */
 517         version[0] = version[1] = version[2] = version[3] = 0;
 518         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 519                 siena_mc_fw_version_t *verp;
 520                 unsigned int nitems;
 521                 uint16_t temp[4];
 522                 size_t length;
 523
 524                 entry = &siena_parttbl[i];
 525                 if (entry->partn != partn)
 526                         continue;
 527
 528                 dcfg_partn = (entry->port == 1)
 529                         ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0
 530                         : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1;
 531                 /*
 532                  * Ingore missing partitions on port 2, assuming they're due
 533                  * to to running on a single port part.
 534                  */
 535                 if ((1 << dcfg_partn) &  ~enp->en_u.siena.enu_partn_mask) {
 536                         if (entry->port == 2)
 537                                 continue;
 538                 }
 539
 540                 if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn,
 541                     B_FALSE, &dcfg, &length)) != 0)
 542                         goto fail3;
 543
 544                 nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items,
 545                             EFX_DWORD_0);
 546                 if (nitems < entry->partn)
 547                         goto done;
 548
 549                 verp = &dcfg->fw_version[partn];
 550                 temp[0] = EFX_WORD_FIELD(verp->version_w, EFX_WORD_0);
 551                 temp[1] = EFX_WORD_FIELD(verp->version_x, EFX_WORD_0);
 552                 temp[2] = EFX_WORD_FIELD(verp->version_y, EFX_WORD_0);
 553                 temp[3] = EFX_WORD_FIELD(verp->version_z, EFX_WORD_0);
 554                 if (memcmp(version, temp, sizeof (temp)) < 0)
 555                         memcpy(version, temp, sizeof (temp));
 556
 557 done:
 558                 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 559         }
 560
 561         return (0);
 562
 563 fail3:
 564         EFSYS_PROBE(fail3);
 565 fail2:
 566         EFSYS_PROBE(fail2);
 567 fail1:
 568         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 569
 570         return (rc);
 571 }
 572
 573         __checkReturn           efx_rc_t
 574 siena_nvram_partn_rw_start(
 575         __in                    efx_nic_t *enp,
 576         __in                    uint32_t partn,
 577         __out                   size_t *chunk_sizep)
 578 {
 579         efx_rc_t rc;
 580
 581         if ((rc = siena_nvram_partn_lock(enp, partn)) != 0)
 582                 goto fail1;
 583
 584         if (chunk_sizep != NULL)
 585                 *chunk_sizep = SIENA_NVRAM_CHUNK;
 586
 587         return (0);
 588
 589 fail1:
 590         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 591
 592         return (rc);
 593 }
 594
 595         __checkReturn           efx_rc_t
 596 siena_nvram_partn_rw_finish(
 597         __in                    efx_nic_t *enp,
 598         __in                    uint32_t partn,
 599         __out_opt               uint32_t *verify_resultp)
 600 {
 601         efx_rc_t rc;
 602
 603         if ((rc = siena_nvram_partn_unlock(enp, partn, verify_resultp)) != 0)
 604                 goto fail1;
 605
 606         return (0);
 607
 608 fail1:
 609         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 610
 611         return (rc);
 612 }
 613
 614         __checkReturn           efx_rc_t
 615 siena_nvram_partn_set_version(
 616         __in                    efx_nic_t *enp,
 617         __in                    uint32_t partn,
 618         __in_ecount(4)          uint16_t version[4])
 619 {
 620         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 621         siena_mc_dynamic_config_hdr_t *dcfg = NULL;
 622         siena_mc_fw_version_t *fwverp;
 623         uint32_t dcfg_partn;
 624         size_t dcfg_size;
 625         unsigned int hdr_length;
 626         unsigned int vpd_length;
 627         unsigned int vpd_offset;
 628         unsigned int nitems;
 629         unsigned int required_hdr_length;
 630         unsigned int pos;
 631         uint8_t cksum;
 632         uint32_t subtype;
 633         size_t length;
 634         efx_rc_t rc;
 635
 636         dcfg_partn = (emip->emi_port == 1)
 637                 ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0
 638                 : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1;
 639
 640         if ((rc = siena_nvram_partn_size(enp, dcfg_partn, &dcfg_size)) != 0)
 641                 goto fail1;
 642
 643         if ((rc = siena_nvram_partn_lock(enp, dcfg_partn)) != 0)
 644                 goto fail2;
 645
 646         if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn,
 647             B_TRUE, &dcfg, &length)) != 0)
 648                 goto fail3;
 649
 650         hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0);
 651         nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0);
 652         vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0);
 653         vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0);
 654
 655         /*
 656          * NOTE: This function will blatt any fields trailing the version
 657          * vector, or the VPD chunk.
 658          */
 659         required_hdr_length = SIENA_DYNAMIC_CFG_SIZE(partn + 1);
 660         if (required_hdr_length + vpd_length > length) {
 661                 rc = ENOSPC;
 662                 goto fail4;
 663         }
 664
 665         if (vpd_offset < required_hdr_length) {
 666                 (void) memmove((caddr_t)dcfg + required_hdr_length,
 667                         (caddr_t)dcfg + vpd_offset, vpd_length);
 668                 vpd_offset = required_hdr_length;
 669                 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset,
 670                                     EFX_DWORD_0, vpd_offset);
 671         }
 672
 673         if (hdr_length < required_hdr_length) {
 674                 (void) memset((caddr_t)dcfg + hdr_length, 0,
 675                         required_hdr_length - hdr_length);
 676                 hdr_length = required_hdr_length;
 677                 EFX_POPULATE_WORD_1(dcfg->length,
 678                                     EFX_WORD_0, hdr_length);
 679         }
 680
 681         /* Get the subtype to insert into the fw_subtype array */
 682         if ((rc = siena_nvram_get_subtype(enp, partn, &subtype)) != 0)
 683                 goto fail5;
 684
 685         /* Fill out the new version */
 686         fwverp = &dcfg->fw_version[partn];
 687         EFX_POPULATE_DWORD_1(fwverp->fw_subtype, EFX_DWORD_0, subtype);
 688         EFX_POPULATE_WORD_1(fwverp->version_w, EFX_WORD_0, version[0]);
 689         EFX_POPULATE_WORD_1(fwverp->version_x, EFX_WORD_0, version[1]);
 690         EFX_POPULATE_WORD_1(fwverp->version_y, EFX_WORD_0, version[2]);
 691         EFX_POPULATE_WORD_1(fwverp->version_z, EFX_WORD_0, version[3]);
 692
 693         /* Update the version count */
 694         if (nitems < partn + 1) {
 695                 nitems = partn + 1;
 696                 EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items,
 697                                     EFX_DWORD_0, nitems);
 698         }
 699
 700         /* Update the checksum */
 701         cksum = 0;
 702         for (pos = 0; pos < hdr_length; pos++)
 703                 cksum += ((uint8_t *)dcfg)[pos];
 704         dcfg->csum.eb_u8[0] -= cksum;
 705
 706         /* Erase and write the new partition */
 707         if ((rc = siena_nvram_partn_erase(enp, dcfg_partn, 0, dcfg_size)) != 0)
 708                 goto fail6;
 709
 710         /* Write out the new structure to nvram */
 711         if ((rc = siena_nvram_partn_write(enp, dcfg_partn, 0,
 712             (caddr_t)dcfg, vpd_offset + vpd_length)) != 0)
 713                 goto fail7;
 714
 715         EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 716
 717         siena_nvram_partn_unlock(enp, dcfg_partn, NULL);
 718
 719         return (0);
 720
 721 fail7:
 722         EFSYS_PROBE(fail7);
 723 fail6:
 724         EFSYS_PROBE(fail6);
 725 fail5:
 726         EFSYS_PROBE(fail5);
 727 fail4:
 728         EFSYS_PROBE(fail4);
 729
 730         EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 731 fail3:
 732         EFSYS_PROBE(fail3);
 733 fail2:
 734         EFSYS_PROBE(fail2);
 735 fail1:
 736         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 737
 738         return (rc);
 739 }
 740
 741 #endif  /* EFSYS_OPT_NVRAM */
 742
 743 #endif  /* EFSYS_OPT_SIENA */