net/ixgbe/base: remove X550em SFP iXFI setup
[dpdk.git] / drivers / net / sfc / efsys.h
1 /*-
2  * Copyright (c) 2016 Solarflare Communications Inc.
3  * All rights reserved.
4  *
5  * This software was jointly developed between OKTET Labs (under contract
6  * for Solarflare) and Solarflare Communications, Inc.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions are met:
10  *
11  * 1. Redistributions of source code must retain the above copyright notice,
12  *    this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright notice,
14  *    this list of conditions and the following disclaimer in the documentation
15  *    and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
19  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
21  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
22  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
23  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
24  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
26  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
27  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28  */
29
30 #ifndef _SFC_COMMON_EFSYS_H
31 #define _SFC_COMMON_EFSYS_H
32
33 #include <stdbool.h>
34
35 #include <rte_spinlock.h>
36 #include <rte_byteorder.h>
37 #include <rte_debug.h>
38 #include <rte_memzone.h>
39 #include <rte_memory.h>
40 #include <rte_memcpy.h>
41 #include <rte_cycles.h>
42 #include <rte_prefetch.h>
43 #include <rte_common.h>
44 #include <rte_malloc.h>
45 #include <rte_log.h>
46 #include <rte_io.h>
47
48 #include "sfc_debug.h"
49
50 #ifdef __cplusplus
51 extern "C" {
52 #endif
53
54 #define EFSYS_HAS_UINT64 1
55 #define EFSYS_USE_UINT64 1
56 #define EFSYS_HAS_SSE2_M128 1
57
58 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
59 #define EFSYS_IS_BIG_ENDIAN 1
60 #define EFSYS_IS_LITTLE_ENDIAN 0
61 #elif RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
62 #define EFSYS_IS_BIG_ENDIAN 0
63 #define EFSYS_IS_LITTLE_ENDIAN 1
64 #else
65 #error "Cannot determine system endianness"
66 #endif
67 #include "efx_types.h"
68
69
70 #ifndef _NOTE
71 #define _NOTE(s)
72 #endif
73
74 typedef bool boolean_t;
75
76 #ifndef B_FALSE
77 #define B_FALSE false
78 #endif
79 #ifndef B_TRUE
80 #define B_TRUE  true
81 #endif
82
83 /*
84  * RTE_MAX() and RTE_MIN() cannot be used since braced-group within
85  * expression allowed only inside a function, but MAX() is used as
86  * a number of elements in array.
87  */
88 #ifndef MAX
89 #define MAX(v1, v2)     ((v1) > (v2) ? (v1) : (v2))
90 #endif
91 #ifndef MIN
92 #define MIN(v1, v2)     ((v1) < (v2) ? (v1) : (v2))
93 #endif
94
95 /* There are macros for alignment in DPDK, but we need to make a proper
96  * correspondence here, if we want to re-use them at all
97  */
98 #ifndef IS_P2ALIGNED
99 #define IS_P2ALIGNED(v, a)      ((((uintptr_t)(v)) & ((uintptr_t)(a) - 1)) == 0)
100 #endif
101
102 #ifndef P2ROUNDUP
103 #define P2ROUNDUP(x, align)     (-(-(x) & -(align)))
104 #endif
105
106 #ifndef P2ALIGN
107 #define P2ALIGN(_x, _a)         ((_x) & -(_a))
108 #endif
109
110 #ifndef IS2P
111 #define ISP2(x)                 rte_is_power_of_2(x)
112 #endif
113
114 #define ENOTACTIVE      ENOTCONN
115
116 static inline void
117 prefetch_read_many(const volatile void *addr)
118 {
119         rte_prefetch0(addr);
120 }
121
122 static inline void
123 prefetch_read_once(const volatile void *addr)
124 {
125         rte_prefetch_non_temporal(addr);
126 }
127
128 /* Modifiers used for Windows builds */
129 #define __in
130 #define __in_opt
131 #define __in_ecount(_n)
132 #define __in_ecount_opt(_n)
133 #define __in_bcount(_n)
134 #define __in_bcount_opt(_n)
135
136 #define __out
137 #define __out_opt
138 #define __out_ecount(_n)
139 #define __out_ecount_opt(_n)
140 #define __out_bcount(_n)
141 #define __out_bcount_opt(_n)
142
143 #define __deref_out
144
145 #define __inout
146 #define __inout_opt
147 #define __inout_ecount(_n)
148 #define __inout_ecount_opt(_n)
149 #define __inout_bcount(_n)
150 #define __inout_bcount_opt(_n)
151 #define __inout_bcount_full_opt(_n)
152
153 #define __deref_out_bcount_opt(n)
154
155 #define __checkReturn
156 #define __success(_x)
157
158 #define __drv_when(_p, _c)
159
160 /* Code inclusion options */
161
162
163 #define EFSYS_OPT_NAMES 1
164
165 /* Disable SFN5xxx/SFN6xxx since it requires specific support in the PMD */
166 #define EFSYS_OPT_SIENA 0
167 /* Enable SFN7xxx support */
168 #define EFSYS_OPT_HUNTINGTON 1
169 /* Enable SFN8xxx support */
170 #define EFSYS_OPT_MEDFORD 1
171 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
172 #define EFSYS_OPT_CHECK_REG 1
173 #else
174 #define EFSYS_OPT_CHECK_REG 0
175 #endif
176
177 /* MCDI is required for SFN7xxx and SFN8xx */
178 #define EFSYS_OPT_MCDI 1
179 #define EFSYS_OPT_MCDI_LOGGING 1
180 #define EFSYS_OPT_MCDI_PROXY_AUTH 0
181
182 #define EFSYS_OPT_MAC_STATS 1
183
184 #define EFSYS_OPT_LOOPBACK 0
185
186 #define EFSYS_OPT_MON_MCDI 0
187 #define EFSYS_OPT_MON_STATS 0
188
189 #define EFSYS_OPT_PHY_STATS 0
190 #define EFSYS_OPT_BIST 0
191 #define EFSYS_OPT_PHY_LED_CONTROL 0
192 #define EFSYS_OPT_PHY_FLAGS 0
193
194 #define EFSYS_OPT_VPD 0
195 #define EFSYS_OPT_NVRAM 0
196 #define EFSYS_OPT_BOOTCFG 0
197
198 #define EFSYS_OPT_DIAG 0
199 #define EFSYS_OPT_RX_SCALE 1
200 #define EFSYS_OPT_QSTATS 0
201 /* Filters support is required for SFN7xxx and SFN8xx */
202 #define EFSYS_OPT_FILTER 1
203 #define EFSYS_OPT_RX_SCATTER 0
204
205 #define EFSYS_OPT_EV_PREFETCH 0
206
207 #define EFSYS_OPT_DECODE_INTR_FATAL 0
208
209 #define EFSYS_OPT_LICENSING 0
210
211 #define EFSYS_OPT_ALLOW_UNCONFIGURED_NIC 0
212
213 #define EFSYS_OPT_RX_PACKED_STREAM 0
214
215 /* ID */
216
217 typedef struct __efsys_identifier_s efsys_identifier_t;
218
219
220 #define EFSYS_PROBE(_name)                                              \
221         do { } while (0)
222
223 #define EFSYS_PROBE1(_name, _type1, _arg1)                              \
224         do { } while (0)
225
226 #define EFSYS_PROBE2(_name, _type1, _arg1, _type2, _arg2)               \
227         do { } while (0)
228
229 #define EFSYS_PROBE3(_name, _type1, _arg1, _type2, _arg2,               \
230                      _type3, _arg3)                                     \
231         do { } while (0)
232
233 #define EFSYS_PROBE4(_name, _type1, _arg1, _type2, _arg2,               \
234                      _type3, _arg3, _type4, _arg4)                      \
235         do { } while (0)
236
237 #define EFSYS_PROBE5(_name, _type1, _arg1, _type2, _arg2,               \
238                      _type3, _arg3, _type4, _arg4, _type5, _arg5)       \
239         do { } while (0)
240
241 #define EFSYS_PROBE6(_name, _type1, _arg1, _type2, _arg2,               \
242                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
243                      _type6, _arg6)                                     \
244         do { } while (0)
245
246 #define EFSYS_PROBE7(_name, _type1, _arg1, _type2, _arg2,               \
247                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
248                      _type6, _arg6, _type7, _arg7)                      \
249         do { } while (0)
250
251
252 /* DMA */
253
254 typedef phys_addr_t efsys_dma_addr_t;
255
256 typedef struct efsys_mem_s {
257         const struct rte_memzone        *esm_mz;
258         /*
259          * Ideally it should have volatile qualifier to denote that
260          * the memory may be updated by someone else. However, it adds
261          * qualifier discard warnings when the pointer or its derivative
262          * is passed to memset() or rte_mov16().
263          * So, skip the qualifier here, but make sure that it is added
264          * below in access macros.
265          */
266         void                            *esm_base;
267         efsys_dma_addr_t                esm_addr;
268 } efsys_mem_t;
269
270
271 #define EFSYS_MEM_ZERO(_esmp, _size)                                    \
272         do {                                                            \
273                 (void)memset((void *)(_esmp)->esm_base, 0, (_size));    \
274                                                                         \
275                 _NOTE(CONSTANTCONDITION);                               \
276         } while (B_FALSE)
277
278 #define EFSYS_MEM_READD(_esmp, _offset, _edp)                           \
279         do {                                                            \
280                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
281                 volatile uint32_t *_addr;                               \
282                                                                         \
283                 _NOTE(CONSTANTCONDITION);                               \
284                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
285                                                                         \
286                 _addr = (volatile uint32_t *)(_base + (_offset));       \
287                 (_edp)->ed_u32[0] = _addr[0];                           \
288                                                                         \
289                 EFSYS_PROBE2(mem_readl, unsigned int, (_offset),        \
290                                          uint32_t, (_edp)->ed_u32[0]);  \
291                                                                         \
292                 _NOTE(CONSTANTCONDITION);                               \
293         } while (B_FALSE)
294
295 #define EFSYS_MEM_READQ(_esmp, _offset, _eqp)                           \
296         do {                                                            \
297                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
298                 volatile uint64_t *_addr;                               \
299                                                                         \
300                 _NOTE(CONSTANTCONDITION);                               \
301                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
302                                                                         \
303                 _addr = (volatile uint64_t *)(_base + (_offset));       \
304                 (_eqp)->eq_u64[0] = _addr[0];                           \
305                                                                         \
306                 EFSYS_PROBE3(mem_readq, unsigned int, (_offset),        \
307                                          uint32_t, (_eqp)->eq_u32[1],   \
308                                          uint32_t, (_eqp)->eq_u32[0]);  \
309                                                                         \
310                 _NOTE(CONSTANTCONDITION);                               \
311         } while (B_FALSE)
312
313 #define EFSYS_MEM_READO(_esmp, _offset, _eop)                           \
314         do {                                                            \
315                 volatile uint8_t *_base = (_esmp)->esm_base;            \
316                 volatile __m128i *_addr;                                \
317                                                                         \
318                 _NOTE(CONSTANTCONDITION);                               \
319                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
320                                                                         \
321                 _addr = (volatile __m128i *)(_base + (_offset));        \
322                 (_eop)->eo_u128[0] = _addr[0];                          \
323                                                                         \
324                 EFSYS_PROBE5(mem_reado, unsigned int, (_offset),        \
325                                          uint32_t, (_eop)->eo_u32[3],   \
326                                          uint32_t, (_eop)->eo_u32[2],   \
327                                          uint32_t, (_eop)->eo_u32[1],   \
328                                          uint32_t, (_eop)->eo_u32[0]);  \
329                                                                         \
330                 _NOTE(CONSTANTCONDITION);                               \
331         } while (B_FALSE)
332
333
334 #define EFSYS_MEM_WRITED(_esmp, _offset, _edp)                          \
335         do {                                                            \
336                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
337                 volatile uint32_t *_addr;                               \
338                                                                         \
339                 _NOTE(CONSTANTCONDITION);                               \
340                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
341                                                                         \
342                 EFSYS_PROBE2(mem_writed, unsigned int, (_offset),       \
343                                          uint32_t, (_edp)->ed_u32[0]);  \
344                                                                         \
345                 _addr = (volatile uint32_t *)(_base + (_offset));       \
346                 _addr[0] = (_edp)->ed_u32[0];                           \
347                                                                         \
348                 _NOTE(CONSTANTCONDITION);                               \
349         } while (B_FALSE)
350
351 #define EFSYS_MEM_WRITEQ(_esmp, _offset, _eqp)                          \
352         do {                                                            \
353                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
354                 volatile uint64_t *_addr;                               \
355                                                                         \
356                 _NOTE(CONSTANTCONDITION);                               \
357                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
358                                                                         \
359                 EFSYS_PROBE3(mem_writeq, unsigned int, (_offset),       \
360                                          uint32_t, (_eqp)->eq_u32[1],   \
361                                          uint32_t, (_eqp)->eq_u32[0]);  \
362                                                                         \
363                 _addr = (volatile uint64_t *)(_base + (_offset));       \
364                 _addr[0] = (_eqp)->eq_u64[0];                           \
365                                                                         \
366                 _NOTE(CONSTANTCONDITION);                               \
367         } while (B_FALSE)
368
369 #define EFSYS_MEM_WRITEO(_esmp, _offset, _eop)                          \
370         do {                                                            \
371                 volatile uint8_t *_base = (_esmp)->esm_base;            \
372                 volatile __m128i *_addr;                                \
373                                                                         \
374                 _NOTE(CONSTANTCONDITION);                               \
375                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
376                                                                         \
377                                                                         \
378                 EFSYS_PROBE5(mem_writeo, unsigned int, (_offset),       \
379                                          uint32_t, (_eop)->eo_u32[3],   \
380                                          uint32_t, (_eop)->eo_u32[2],   \
381                                          uint32_t, (_eop)->eo_u32[1],   \
382                                          uint32_t, (_eop)->eo_u32[0]);  \
383                                                                         \
384                 _addr = (volatile __m128i *)(_base + (_offset));        \
385                 _addr[0] = (_eop)->eo_u128[0];                          \
386                                                                         \
387                 _NOTE(CONSTANTCONDITION);                               \
388         } while (B_FALSE)
389
390
391 #define EFSYS_MEM_ADDR(_esmp)                                           \
392         ((_esmp)->esm_addr)
393
394 #define EFSYS_MEM_IS_NULL(_esmp)                                        \
395         ((_esmp)->esm_base == NULL)
396
397 #define EFSYS_MEM_PREFETCH(_esmp, _offset)                              \
398         do {                                                            \
399                 volatile uint8_t *_base = (_esmp)->esm_base;            \
400                                                                         \
401                 rte_prefetch0(_base + (_offset));                       \
402         } while (0)
403
404
405 /* BAR */
406
407 typedef struct efsys_bar_s {
408         rte_spinlock_t          esb_lock;
409         int                     esb_rid;
410         struct rte_pci_device   *esb_dev;
411         /*
412          * Ideally it should have volatile qualifier to denote that
413          * the memory may be updated by someone else. However, it adds
414          * qualifier discard warnings when the pointer or its derivative
415          * is passed to memset() or rte_mov16().
416          * So, skip the qualifier here, but make sure that it is added
417          * below in access macros.
418          */
419         void                    *esb_base;
420 } efsys_bar_t;
421
422 #define SFC_BAR_LOCK_INIT(_esbp, _ifname)                               \
423         do {                                                            \
424                 rte_spinlock_init(&(_esbp)->esb_lock);                  \
425                 _NOTE(CONSTANTCONDITION);                               \
426         } while (B_FALSE)
427 #define SFC_BAR_LOCK_DESTROY(_esbp)     ((void)0)
428 #define SFC_BAR_LOCK(_esbp)             rte_spinlock_lock(&(_esbp)->esb_lock)
429 #define SFC_BAR_UNLOCK(_esbp)           rte_spinlock_unlock(&(_esbp)->esb_lock)
430
431 #define EFSYS_BAR_READD(_esbp, _offset, _edp, _lock)                    \
432         do {                                                            \
433                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
434                 volatile uint32_t *_addr;                               \
435                                                                         \
436                 _NOTE(CONSTANTCONDITION);                               \
437                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
438                 _NOTE(CONSTANTCONDITION);                               \
439                 if (_lock)                                              \
440                         SFC_BAR_LOCK(_esbp);                            \
441                                                                         \
442                 _addr = (volatile uint32_t *)(_base + (_offset));       \
443                 rte_rmb();                                              \
444                 (_edp)->ed_u32[0] = rte_read32_relaxed(_addr);          \
445                                                                         \
446                 EFSYS_PROBE2(bar_readd, unsigned int, (_offset),        \
447                                          uint32_t, (_edp)->ed_u32[0]);  \
448                                                                         \
449                 _NOTE(CONSTANTCONDITION);                               \
450                 if (_lock)                                              \
451                         SFC_BAR_UNLOCK(_esbp);                          \
452                 _NOTE(CONSTANTCONDITION);                               \
453         } while (B_FALSE)
454
455 #define EFSYS_BAR_READQ(_esbp, _offset, _eqp)                           \
456         do {                                                            \
457                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
458                 volatile uint64_t *_addr;                               \
459                                                                         \
460                 _NOTE(CONSTANTCONDITION);                               \
461                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
462                                                                         \
463                 SFC_BAR_LOCK(_esbp);                                    \
464                                                                         \
465                 _addr = (volatile uint64_t *)(_base + (_offset));       \
466                 rte_rmb();                                              \
467                 (_eqp)->eq_u64[0] = rte_read64_relaxed(_addr);          \
468                                                                         \
469                 EFSYS_PROBE3(bar_readq, unsigned int, (_offset),        \
470                                          uint32_t, (_eqp)->eq_u32[1],   \
471                                          uint32_t, (_eqp)->eq_u32[0]);  \
472                                                                         \
473                 SFC_BAR_UNLOCK(_esbp);                                  \
474                 _NOTE(CONSTANTCONDITION);                               \
475         } while (B_FALSE)
476
477 #define EFSYS_BAR_READO(_esbp, _offset, _eop, _lock)                    \
478         do {                                                            \
479                 volatile uint8_t *_base = (_esbp)->esb_base;            \
480                 volatile __m128i *_addr;                                \
481                                                                         \
482                 _NOTE(CONSTANTCONDITION);                               \
483                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
484                                                                         \
485                 _NOTE(CONSTANTCONDITION);                               \
486                 if (_lock)                                              \
487                         SFC_BAR_LOCK(_esbp);                            \
488                                                                         \
489                 _addr = (volatile __m128i *)(_base + (_offset));        \
490                 rte_rmb();                                              \
491                 /* There is no rte_read128_relaxed() yet */             \
492                 (_eop)->eo_u128[0] = _addr[0];                          \
493                                                                         \
494                 EFSYS_PROBE5(bar_reado, unsigned int, (_offset),        \
495                                          uint32_t, (_eop)->eo_u32[3],   \
496                                          uint32_t, (_eop)->eo_u32[2],   \
497                                          uint32_t, (_eop)->eo_u32[1],   \
498                                          uint32_t, (_eop)->eo_u32[0]);  \
499                                                                         \
500                 _NOTE(CONSTANTCONDITION);                               \
501                 if (_lock)                                              \
502                         SFC_BAR_UNLOCK(_esbp);                          \
503                 _NOTE(CONSTANTCONDITION);                               \
504         } while (B_FALSE)
505
506
507 #define EFSYS_BAR_WRITED(_esbp, _offset, _edp, _lock)                   \
508         do {                                                            \
509                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
510                 volatile uint32_t *_addr;                               \
511                                                                         \
512                 _NOTE(CONSTANTCONDITION);                               \
513                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
514                                                                         \
515                 _NOTE(CONSTANTCONDITION);                               \
516                 if (_lock)                                              \
517                         SFC_BAR_LOCK(_esbp);                            \
518                                                                         \
519                 EFSYS_PROBE2(bar_writed, unsigned int, (_offset),       \
520                                          uint32_t, (_edp)->ed_u32[0]);  \
521                                                                         \
522                 _addr = (volatile uint32_t *)(_base + (_offset));       \
523                 rte_write32_relaxed((_edp)->ed_u32[0], _addr);          \
524                 rte_wmb();                                              \
525                                                                         \
526                 _NOTE(CONSTANTCONDITION);                               \
527                 if (_lock)                                              \
528                         SFC_BAR_UNLOCK(_esbp);                          \
529                 _NOTE(CONSTANTCONDITION);                               \
530         } while (B_FALSE)
531
532 #define EFSYS_BAR_WRITEQ(_esbp, _offset, _eqp)                          \
533         do {                                                            \
534                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
535                 volatile uint64_t *_addr;                               \
536                                                                         \
537                 _NOTE(CONSTANTCONDITION);                               \
538                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
539                                                                         \
540                 SFC_BAR_LOCK(_esbp);                                    \
541                                                                         \
542                 EFSYS_PROBE3(bar_writeq, unsigned int, (_offset),       \
543                                          uint32_t, (_eqp)->eq_u32[1],   \
544                                          uint32_t, (_eqp)->eq_u32[0]);  \
545                                                                         \
546                 _addr = (volatile uint64_t *)(_base + (_offset));       \
547                 rte_write64_relaxed((_eqp)->eq_u64[0], _addr);          \
548                 rte_wmb();                                              \
549                                                                         \
550                 SFC_BAR_UNLOCK(_esbp);                                  \
551                 _NOTE(CONSTANTCONDITION);                               \
552         } while (B_FALSE)
553
554 /*
555  * Guarantees 64bit aligned 64bit writes to write combined BAR mapping
556  * (required by PIO hardware).
557  *
558  * Neither VFIO, nor UIO, nor NIC UIO (on FreeBSD) support
559  * write-combined memory mapped to user-land, so just abort if used.
560  */
561 #define EFSYS_BAR_WC_WRITEQ(_esbp, _offset, _eqp)                       \
562         do {                                                            \
563                 rte_panic("Write-combined BAR access not supported");   \
564         } while (B_FALSE)
565
566 #define EFSYS_BAR_WRITEO(_esbp, _offset, _eop, _lock)                   \
567         do {                                                            \
568                 volatile uint8_t *_base = (_esbp)->esb_base;            \
569                 volatile __m128i *_addr;                                \
570                                                                         \
571                 _NOTE(CONSTANTCONDITION);                               \
572                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
573                                                                         \
574                 _NOTE(CONSTANTCONDITION);                               \
575                 if (_lock)                                              \
576                         SFC_BAR_LOCK(_esbp);                            \
577                                                                         \
578                 EFSYS_PROBE5(bar_writeo, unsigned int, (_offset),       \
579                                          uint32_t, (_eop)->eo_u32[3],   \
580                                          uint32_t, (_eop)->eo_u32[2],   \
581                                          uint32_t, (_eop)->eo_u32[1],   \
582                                          uint32_t, (_eop)->eo_u32[0]);  \
583                                                                         \
584                 _addr = (volatile __m128i *)(_base + (_offset));        \
585                 /* There is no rte_write128_relaxed() yet */            \
586                 _addr[0] = (_eop)->eo_u128[0];                          \
587                 rte_wmb();                                              \
588                                                                         \
589                 _NOTE(CONSTANTCONDITION);                               \
590                 if (_lock)                                              \
591                         SFC_BAR_UNLOCK(_esbp);                          \
592                 _NOTE(CONSTANTCONDITION);                               \
593         } while (B_FALSE)
594
595 /* Use the standard octo-word write for doorbell writes */
596 #define EFSYS_BAR_DOORBELL_WRITEO(_esbp, _offset, _eop)                 \
597         do {                                                            \
598                 EFSYS_BAR_WRITEO((_esbp), (_offset), (_eop), B_FALSE);  \
599                 _NOTE(CONSTANTCONDITION);                               \
600         } while (B_FALSE)
601
602 /* SPIN */
603
604 #define EFSYS_SPIN(_us)                                                 \
605         do {                                                            \
606                 rte_delay_us(_us);                                      \
607                 _NOTE(CONSTANTCONDITION);                               \
608         } while (B_FALSE)
609
610 #define EFSYS_SLEEP EFSYS_SPIN
611
612 /* BARRIERS */
613
614 #define EFSYS_MEM_READ_BARRIER()        rte_rmb()
615 #define EFSYS_PIO_WRITE_BARRIER()       rte_io_wmb()
616
617 /* DMA SYNC */
618
619 /*
620  * DPDK does not provide any DMA syncing API, and no PMD drivers
621  * have any traces of explicit DMA syncing.
622  * DMA mapping is assumed to be coherent.
623  */
624
625 #define EFSYS_DMA_SYNC_FOR_KERNEL(_esmp, _offset, _size)        ((void)0)
626
627 /* Just avoid store and compiler (impliciltly) reordering */
628 #define EFSYS_DMA_SYNC_FOR_DEVICE(_esmp, _offset, _size)        rte_wmb()
629
630 /* TIMESTAMP */
631
632 typedef uint64_t efsys_timestamp_t;
633
634 #define EFSYS_TIMESTAMP(_usp)                                           \
635         do {                                                            \
636                 *(_usp) = rte_get_timer_cycles() * 1000000 /            \
637                         rte_get_timer_hz();                             \
638                 _NOTE(CONSTANTCONDITION);                               \
639         } while (B_FALSE)
640
641 /* KMEM */
642
643 #define EFSYS_KMEM_ALLOC(_esip, _size, _p)                              \
644         do {                                                            \
645                 (_esip) = (_esip);                                      \
646                 (_p) = rte_zmalloc("sfc", (_size), 0);                  \
647                 _NOTE(CONSTANTCONDITION);                               \
648         } while (B_FALSE)
649
650 #define EFSYS_KMEM_FREE(_esip, _size, _p)                               \
651         do {                                                            \
652                 (void)(_esip);                                          \
653                 (void)(_size);                                          \
654                 rte_free((_p));                                         \
655                 _NOTE(CONSTANTCONDITION);                               \
656         } while (B_FALSE)
657
658 /* LOCK */
659
660 typedef rte_spinlock_t efsys_lock_t;
661
662 #define SFC_EFSYS_LOCK_INIT(_eslp, _ifname, _label)     \
663         rte_spinlock_init((_eslp))
664 #define SFC_EFSYS_LOCK_DESTROY(_eslp) ((void)0)
665 #define SFC_EFSYS_LOCK(_eslp)                           \
666         rte_spinlock_lock((_eslp))
667 #define SFC_EFSYS_UNLOCK(_eslp)                         \
668         rte_spinlock_unlock((_eslp))
669 #define SFC_EFSYS_LOCK_ASSERT_OWNED(_eslp)              \
670         SFC_ASSERT(rte_spinlock_is_locked((_eslp)))
671
672 typedef int efsys_lock_state_t;
673
674 #define EFSYS_LOCK_MAGIC        0x000010c4
675
676 #define EFSYS_LOCK(_lockp, _state)                              \
677         do {                                                    \
678                 SFC_EFSYS_LOCK(_lockp);                         \
679                 (_state) = EFSYS_LOCK_MAGIC;                    \
680                 _NOTE(CONSTANTCONDITION);                       \
681         } while (B_FALSE)
682
683 #define EFSYS_UNLOCK(_lockp, _state)                            \
684         do {                                                    \
685                 SFC_ASSERT((_state) == EFSYS_LOCK_MAGIC);       \
686                 SFC_EFSYS_UNLOCK(_lockp);                       \
687                 _NOTE(CONSTANTCONDITION);                       \
688         } while (B_FALSE)
689
690 /* STAT */
691
692 typedef uint64_t        efsys_stat_t;
693
694 #define EFSYS_STAT_INCR(_knp, _delta)                           \
695         do {                                                    \
696                 *(_knp) += (_delta);                            \
697                 _NOTE(CONSTANTCONDITION);                       \
698         } while (B_FALSE)
699
700 #define EFSYS_STAT_DECR(_knp, _delta)                           \
701         do {                                                    \
702                 *(_knp) -= (_delta);                            \
703                 _NOTE(CONSTANTCONDITION);                       \
704         } while (B_FALSE)
705
706 #define EFSYS_STAT_SET(_knp, _val)                              \
707         do {                                                    \
708                 *(_knp) = (_val);                               \
709                 _NOTE(CONSTANTCONDITION);                       \
710         } while (B_FALSE)
711
712 #define EFSYS_STAT_SET_QWORD(_knp, _valp)                       \
713         do {                                                    \
714                 *(_knp) = rte_le_to_cpu_64((_valp)->eq_u64[0]); \
715                 _NOTE(CONSTANTCONDITION);                       \
716         } while (B_FALSE)
717
718 #define EFSYS_STAT_SET_DWORD(_knp, _valp)                       \
719         do {                                                    \
720                 *(_knp) = rte_le_to_cpu_32((_valp)->ed_u32[0]); \
721                 _NOTE(CONSTANTCONDITION);                       \
722         } while (B_FALSE)
723
724 #define EFSYS_STAT_INCR_QWORD(_knp, _valp)                              \
725         do {                                                            \
726                 *(_knp) += rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
727                 _NOTE(CONSTANTCONDITION);                               \
728         } while (B_FALSE)
729
730 #define EFSYS_STAT_SUBR_QWORD(_knp, _valp)                              \
731         do {                                                            \
732                 *(_knp) -= rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
733                 _NOTE(CONSTANTCONDITION);                               \
734         } while (B_FALSE)
735
736 /* ERR */
737
738 #if EFSYS_OPT_DECODE_INTR_FATAL
739 #define EFSYS_ERR(_esip, _code, _dword0, _dword1)                       \
740         do {                                                            \
741                 (void)(_esip);                                          \
742                 RTE_LOG(ERR, PMD, "FATAL ERROR #%u (0x%08x%08x)\n",     \
743                         (_code), (_dword0), (_dword1));                 \
744                 _NOTE(CONSTANTCONDITION);                               \
745         } while (B_FALSE)
746 #endif
747
748 /* ASSERT */
749
750 /* RTE_VERIFY from DPDK treats expressions with % operator incorrectly,
751  * so we re-implement it here
752  */
753 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
754 #define EFSYS_ASSERT(_exp)                                              \
755         do {                                                            \
756                 if (unlikely(!(_exp)))                                  \
757                         rte_panic("line %d\tassert \"%s\" failed\n",    \
758                                   __LINE__, (#_exp));                   \
759         } while (0)
760 #else
761 #define EFSYS_ASSERT(_exp)              (void)(_exp)
762 #endif
763
764 #define EFSYS_ASSERT3(_x, _op, _y, _t)  EFSYS_ASSERT((_t)(_x) _op (_t)(_y))
765
766 #define EFSYS_ASSERT3U(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uint64_t)
767 #define EFSYS_ASSERT3S(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, int64_t)
768 #define EFSYS_ASSERT3P(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uintptr_t)
769
770 /* ROTATE */
771
772 #define EFSYS_HAS_ROTL_DWORD    0
773
774 #ifdef __cplusplus
775 }
776 #endif
777
778 #endif  /* _SFC_COMMON_EFSYS_H */