drivers/net/sfc/efsys.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  * Copyright (c) 2016-2018 Solarflare Communications Inc.
   4  * All rights reserved.
   5  *
   6  * This software was jointly developed between OKTET Labs (under contract
   7  * for Solarflare) and Solarflare Communications, Inc.
   8  */
   9
  10 #ifndef _SFC_COMMON_EFSYS_H
  11 #define _SFC_COMMON_EFSYS_H
  12
  13 #include <stdbool.h>
  14
  15 #include <rte_spinlock.h>
  16 #include <rte_byteorder.h>
  17 #include <rte_debug.h>
  18 #include <rte_memzone.h>
  19 #include <rte_memory.h>
  20 #include <rte_memcpy.h>
  21 #include <rte_cycles.h>
  22 #include <rte_prefetch.h>
  23 #include <rte_common.h>
  24 #include <rte_malloc.h>
  25 #include <rte_log.h>
  26 #include <rte_io.h>
  27
  28 #include "sfc_debug.h"
  29 #include "sfc_log.h"
  30
  31 #ifdef __cplusplus
  32 extern "C" {
  33 #endif
  34
  35 #define EFSYS_HAS_UINT64 1
  36 #define EFSYS_USE_UINT64 1
  37 #define EFSYS_HAS_SSE2_M128 1
  38
  39 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
  40 #define EFSYS_IS_BIG_ENDIAN 1
  41 #define EFSYS_IS_LITTLE_ENDIAN 0
  42 #elif RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
  43 #define EFSYS_IS_BIG_ENDIAN 0
  44 #define EFSYS_IS_LITTLE_ENDIAN 1
  45 #else
  46 #error "Cannot determine system endianness"
  47 #endif
  48 #include "efx_types.h"
  49
  50
  51 typedef bool boolean_t;
  52
  53 #ifndef B_FALSE
  54 #define B_FALSE false
  55 #endif
  56 #ifndef B_TRUE
  57 #define B_TRUE  true
  58 #endif
  59
  60 /*
  61  * RTE_MAX() and RTE_MIN() cannot be used since braced-group within
  62  * expression allowed only inside a function, but MAX() is used as
  63  * a number of elements in array.
  64  */
  65 #ifndef MAX
  66 #define MAX(v1, v2)     ((v1) > (v2) ? (v1) : (v2))
  67 #endif
  68 #ifndef MIN
  69 #define MIN(v1, v2)     ((v1) < (v2) ? (v1) : (v2))
  70 #endif
  71
  72 /* There are macros for alignment in DPDK, but we need to make a proper
  73  * correspondence here, if we want to re-use them at all
  74  */
  75 #ifndef IS_P2ALIGNED
  76 #define IS_P2ALIGNED(v, a)      ((((uintptr_t)(v)) & ((uintptr_t)(a) - 1)) == 0)
  77 #endif
  78
  79 #ifndef P2ROUNDUP
  80 #define P2ROUNDUP(x, align)     (-(-(x) & -(align)))
  81 #endif
  82
  83 #ifndef P2ALIGN
  84 #define P2ALIGN(_x, _a)         ((_x) & -(_a))
  85 #endif
  86
  87 #ifndef ISP2
  88 #define ISP2(x)                 rte_is_power_of_2(x)
  89 #endif
  90
  91 #define ENOTACTIVE      ENOTCONN
  92
  93 static inline void
  94 prefetch_read_many(const volatile void *addr)
  95 {
  96         rte_prefetch0(addr);
  97 }
  98
  99 static inline void
 100 prefetch_read_once(const volatile void *addr)
 101 {
 102         rte_prefetch_non_temporal(addr);
 103 }
 104
 105 /* Code inclusion options */
 106
 107
 108 #define EFSYS_OPT_NAMES 1
 109
 110 /* Disable SFN5xxx/SFN6xxx since it requires specific support in the PMD */
 111 #define EFSYS_OPT_SIENA 0
 112 /* Enable SFN7xxx support */
 113 #define EFSYS_OPT_HUNTINGTON 1
 114 /* Enable SFN8xxx support */
 115 #define EFSYS_OPT_MEDFORD 1
 116 /* Enable SFN2xxx support */
 117 #define EFSYS_OPT_MEDFORD2 1
 118 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
 119 #define EFSYS_OPT_CHECK_REG 1
 120 #else
 121 #define EFSYS_OPT_CHECK_REG 0
 122 #endif
 123
 124 /* MCDI is required for SFN7xxx and SFN8xx */
 125 #define EFSYS_OPT_MCDI 1
 126 #define EFSYS_OPT_MCDI_LOGGING 1
 127 #define EFSYS_OPT_MCDI_PROXY_AUTH 1
 128
 129 #define EFSYS_OPT_MAC_STATS 1
 130
 131 #define EFSYS_OPT_LOOPBACK 1
 132
 133 #define EFSYS_OPT_MON_MCDI 0
 134 #define EFSYS_OPT_MON_STATS 0
 135
 136 #define EFSYS_OPT_PHY_STATS 0
 137 #define EFSYS_OPT_BIST 0
 138 #define EFSYS_OPT_PHY_LED_CONTROL 0
 139 #define EFSYS_OPT_PHY_FLAGS 0
 140
 141 #define EFSYS_OPT_VPD 0
 142 #define EFSYS_OPT_NVRAM 0
 143 #define EFSYS_OPT_BOOTCFG 0
 144 #define EFSYS_OPT_IMAGE_LAYOUT 0
 145
 146 #define EFSYS_OPT_DIAG 0
 147 #define EFSYS_OPT_RX_SCALE 1
 148 #define EFSYS_OPT_QSTATS 0
 149 /* Filters support is required for SFN7xxx and SFN8xx */
 150 #define EFSYS_OPT_FILTER 1
 151 #define EFSYS_OPT_RX_SCATTER 0
 152
 153 #define EFSYS_OPT_EV_PREFETCH 0
 154
 155 #define EFSYS_OPT_DECODE_INTR_FATAL 0
 156
 157 #define EFSYS_OPT_LICENSING 0
 158
 159 #define EFSYS_OPT_ALLOW_UNCONFIGURED_NIC 0
 160
 161 #define EFSYS_OPT_RX_PACKED_STREAM 0
 162
 163 #define EFSYS_OPT_RX_ES_SUPER_BUFFER 1
 164
 165 #define EFSYS_OPT_TUNNEL 1
 166
 167 #define EFSYS_OPT_FW_SUBVARIANT_AWARE 1
 168
 169 #define EFSYS_OPT_EVB 0
 170
 171 #define EFSYS_OPT_MCDI_PROXY_AUTH_SERVER 0
 172
 173 /* ID */
 174
 175 typedef struct __efsys_identifier_s efsys_identifier_t;
 176
 177
 178 #define EFSYS_PROBE(_name)                                              \
 179         do { } while (0)
 180
 181 #define EFSYS_PROBE1(_name, _type1, _arg1)                              \
 182         do { } while (0)
 183
 184 #define EFSYS_PROBE2(_name, _type1, _arg1, _type2, _arg2)               \
 185         do { } while (0)
 186
 187 #define EFSYS_PROBE3(_name, _type1, _arg1, _type2, _arg2,               \
 188                      _type3, _arg3)                                     \
 189         do { } while (0)
 190
 191 #define EFSYS_PROBE4(_name, _type1, _arg1, _type2, _arg2,               \
 192                      _type3, _arg3, _type4, _arg4)                      \
 193         do { } while (0)
 194
 195 #define EFSYS_PROBE5(_name, _type1, _arg1, _type2, _arg2,               \
 196                      _type3, _arg3, _type4, _arg4, _type5, _arg5)       \
 197         do { } while (0)
 198
 199 #define EFSYS_PROBE6(_name, _type1, _arg1, _type2, _arg2,               \
 200                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
 201                      _type6, _arg6)                                     \
 202         do { } while (0)
 203
 204 #define EFSYS_PROBE7(_name, _type1, _arg1, _type2, _arg2,               \
 205                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
 206                      _type6, _arg6, _type7, _arg7)                      \
 207         do { } while (0)
 208
 209
 210 /* DMA */
 211
 212 typedef rte_iova_t efsys_dma_addr_t;
 213
 214 typedef struct efsys_mem_s {
 215         const struct rte_memzone        *esm_mz;
 216         /*
 217          * Ideally it should have volatile qualifier to denote that
 218          * the memory may be updated by someone else. However, it adds
 219          * qualifier discard warnings when the pointer or its derivative
 220          * is passed to memset() or rte_mov16().
 221          * So, skip the qualifier here, but make sure that it is added
 222          * below in access macros.
 223          */
 224         void                            *esm_base;
 225         efsys_dma_addr_t                esm_addr;
 226 } efsys_mem_t;
 227
 228
 229 #define EFSYS_MEM_ZERO(_esmp, _size)                                    \
 230         do {                                                            \
 231                 (void)memset((void *)(_esmp)->esm_base, 0, (_size));    \
 232                                                                         \
 233                 _NOTE(CONSTANTCONDITION);                               \
 234         } while (B_FALSE)
 235
 236 #define EFSYS_MEM_READD(_esmp, _offset, _edp)                           \
 237         do {                                                            \
 238                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 239                 volatile uint32_t *_addr;                               \
 240                                                                         \
 241                 _NOTE(CONSTANTCONDITION);                               \
 242                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
 243                                                                         \
 244                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 245                 (_edp)->ed_u32[0] = _addr[0];                           \
 246                                                                         \
 247                 EFSYS_PROBE2(mem_readl, unsigned int, (_offset),        \
 248                                          uint32_t, (_edp)->ed_u32[0]);  \
 249                                                                         \
 250                 _NOTE(CONSTANTCONDITION);                               \
 251         } while (B_FALSE)
 252
 253 #define EFSYS_MEM_READQ(_esmp, _offset, _eqp)                           \
 254         do {                                                            \
 255                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 256                 volatile uint64_t *_addr;                               \
 257                                                                         \
 258                 _NOTE(CONSTANTCONDITION);                               \
 259                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
 260                                                                         \
 261                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 262                 (_eqp)->eq_u64[0] = _addr[0];                           \
 263                                                                         \
 264                 EFSYS_PROBE3(mem_readq, unsigned int, (_offset),        \
 265                                          uint32_t, (_eqp)->eq_u32[1],   \
 266                                          uint32_t, (_eqp)->eq_u32[0]);  \
 267                                                                         \
 268                 _NOTE(CONSTANTCONDITION);                               \
 269         } while (B_FALSE)
 270
 271 #define EFSYS_MEM_READO(_esmp, _offset, _eop)                           \
 272         do {                                                            \
 273                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 274                 volatile __m128i *_addr;                                \
 275                                                                         \
 276                 _NOTE(CONSTANTCONDITION);                               \
 277                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
 278                                                                         \
 279                 _addr = (volatile __m128i *)(_base + (_offset));        \
 280                 (_eop)->eo_u128[0] = _addr[0];                          \
 281                                                                         \
 282                 EFSYS_PROBE5(mem_reado, unsigned int, (_offset),        \
 283                                          uint32_t, (_eop)->eo_u32[3],   \
 284                                          uint32_t, (_eop)->eo_u32[2],   \
 285                                          uint32_t, (_eop)->eo_u32[1],   \
 286                                          uint32_t, (_eop)->eo_u32[0]);  \
 287                                                                         \
 288                 _NOTE(CONSTANTCONDITION);                               \
 289         } while (B_FALSE)
 290
 291
 292 #define EFSYS_MEM_WRITED(_esmp, _offset, _edp)                          \
 293         do {                                                            \
 294                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 295                 volatile uint32_t *_addr;                               \
 296                                                                         \
 297                 _NOTE(CONSTANTCONDITION);                               \
 298                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
 299                                                                         \
 300                 EFSYS_PROBE2(mem_writed, unsigned int, (_offset),       \
 301                                          uint32_t, (_edp)->ed_u32[0]);  \
 302                                                                         \
 303                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 304                 _addr[0] = (_edp)->ed_u32[0];                           \
 305                                                                         \
 306                 _NOTE(CONSTANTCONDITION);                               \
 307         } while (B_FALSE)
 308
 309 #define EFSYS_MEM_WRITEQ(_esmp, _offset, _eqp)                          \
 310         do {                                                            \
 311                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 312                 volatile uint64_t *_addr;                               \
 313                                                                         \
 314                 _NOTE(CONSTANTCONDITION);                               \
 315                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
 316                                                                         \
 317                 EFSYS_PROBE3(mem_writeq, unsigned int, (_offset),       \
 318                                          uint32_t, (_eqp)->eq_u32[1],   \
 319                                          uint32_t, (_eqp)->eq_u32[0]);  \
 320                                                                         \
 321                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 322                 _addr[0] = (_eqp)->eq_u64[0];                           \
 323                                                                         \
 324                 _NOTE(CONSTANTCONDITION);                               \
 325         } while (B_FALSE)
 326
 327 #define EFSYS_MEM_WRITEO(_esmp, _offset, _eop)                          \
 328         do {                                                            \
 329                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 330                 volatile __m128i *_addr;                                \
 331                                                                         \
 332                 _NOTE(CONSTANTCONDITION);                               \
 333                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
 334                                                                         \
 335                                                                         \
 336                 EFSYS_PROBE5(mem_writeo, unsigned int, (_offset),       \
 337                                          uint32_t, (_eop)->eo_u32[3],   \
 338                                          uint32_t, (_eop)->eo_u32[2],   \
 339                                          uint32_t, (_eop)->eo_u32[1],   \
 340                                          uint32_t, (_eop)->eo_u32[0]);  \
 341                                                                         \
 342                 _addr = (volatile __m128i *)(_base + (_offset));        \
 343                 _addr[0] = (_eop)->eo_u128[0];                          \
 344                                                                         \
 345                 _NOTE(CONSTANTCONDITION);                               \
 346         } while (B_FALSE)
 347
 348
 349 #define EFSYS_MEM_SIZE(_esmp)                                           \
 350         ((_esmp)->esm_mz->len)
 351
 352 #define EFSYS_MEM_ADDR(_esmp)                                           \
 353         ((_esmp)->esm_addr)
 354
 355 #define EFSYS_MEM_IS_NULL(_esmp)                                        \
 356         ((_esmp)->esm_base == NULL)
 357
 358 #define EFSYS_MEM_PREFETCH(_esmp, _offset)                              \
 359         do {                                                            \
 360                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 361                                                                         \
 362                 rte_prefetch0(_base + (_offset));                       \
 363         } while (0)
 364
 365
 366 /* BAR */
 367
 368 typedef struct efsys_bar_s {
 369         rte_spinlock_t          esb_lock;
 370         int                     esb_rid;
 371         struct rte_pci_device   *esb_dev;
 372         /*
 373          * Ideally it should have volatile qualifier to denote that
 374          * the memory may be updated by someone else. However, it adds
 375          * qualifier discard warnings when the pointer or its derivative
 376          * is passed to memset() or rte_mov16().
 377          * So, skip the qualifier here, but make sure that it is added
 378          * below in access macros.
 379          */
 380         void                    *esb_base;
 381 } efsys_bar_t;
 382
 383 #define SFC_BAR_LOCK_INIT(_esbp, _ifname)                               \
 384         do {                                                            \
 385                 rte_spinlock_init(&(_esbp)->esb_lock);                  \
 386                 _NOTE(CONSTANTCONDITION);                               \
 387         } while (B_FALSE)
 388 #define SFC_BAR_LOCK_DESTROY(_esbp)     ((void)0)
 389 #define SFC_BAR_LOCK(_esbp)             rte_spinlock_lock(&(_esbp)->esb_lock)
 390 #define SFC_BAR_UNLOCK(_esbp)           rte_spinlock_unlock(&(_esbp)->esb_lock)
 391
 392 #define EFSYS_BAR_READD(_esbp, _offset, _edp, _lock)                    \
 393         do {                                                            \
 394                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 395                 volatile uint32_t *_addr;                               \
 396                                                                         \
 397                 _NOTE(CONSTANTCONDITION);                               \
 398                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
 399                 _NOTE(CONSTANTCONDITION);                               \
 400                 if (_lock)                                              \
 401                         SFC_BAR_LOCK(_esbp);                            \
 402                                                                         \
 403                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 404                 rte_rmb();                                              \
 405                 (_edp)->ed_u32[0] = rte_read32_relaxed(_addr);          \
 406                                                                         \
 407                 EFSYS_PROBE2(bar_readd, unsigned int, (_offset),        \
 408                                          uint32_t, (_edp)->ed_u32[0]);  \
 409                                                                         \
 410                 _NOTE(CONSTANTCONDITION);                               \
 411                 if (_lock)                                              \
 412                         SFC_BAR_UNLOCK(_esbp);                          \
 413                 _NOTE(CONSTANTCONDITION);                               \
 414         } while (B_FALSE)
 415
 416 #define EFSYS_BAR_READQ(_esbp, _offset, _eqp)                           \
 417         do {                                                            \
 418                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 419                 volatile uint64_t *_addr;                               \
 420                                                                         \
 421                 _NOTE(CONSTANTCONDITION);                               \
 422                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
 423                                                                         \
 424                 SFC_BAR_LOCK(_esbp);                                    \
 425                                                                         \
 426                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 427                 rte_rmb();                                              \
 428                 (_eqp)->eq_u64[0] = rte_read64_relaxed(_addr);          \
 429                                                                         \
 430                 EFSYS_PROBE3(bar_readq, unsigned int, (_offset),        \
 431                                          uint32_t, (_eqp)->eq_u32[1],   \
 432                                          uint32_t, (_eqp)->eq_u32[0]);  \
 433                                                                         \
 434                 SFC_BAR_UNLOCK(_esbp);                                  \
 435                 _NOTE(CONSTANTCONDITION);                               \
 436         } while (B_FALSE)
 437
 438 #define EFSYS_BAR_READO(_esbp, _offset, _eop, _lock)                    \
 439         do {                                                            \
 440                 volatile uint8_t *_base = (_esbp)->esb_base;            \
 441                 volatile __m128i *_addr;                                \
 442                                                                         \
 443                 _NOTE(CONSTANTCONDITION);                               \
 444                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
 445                                                                         \
 446                 _NOTE(CONSTANTCONDITION);                               \
 447                 if (_lock)                                              \
 448                         SFC_BAR_LOCK(_esbp);                            \
 449                                                                         \
 450                 _addr = (volatile __m128i *)(_base + (_offset));        \
 451                 rte_rmb();                                              \
 452                 /* There is no rte_read128_relaxed() yet */             \
 453                 (_eop)->eo_u128[0] = _addr[0];                          \
 454                                                                         \
 455                 EFSYS_PROBE5(bar_reado, unsigned int, (_offset),        \
 456                                          uint32_t, (_eop)->eo_u32[3],   \
 457                                          uint32_t, (_eop)->eo_u32[2],   \
 458                                          uint32_t, (_eop)->eo_u32[1],   \
 459                                          uint32_t, (_eop)->eo_u32[0]);  \
 460                                                                         \
 461                 _NOTE(CONSTANTCONDITION);                               \
 462                 if (_lock)                                              \
 463                         SFC_BAR_UNLOCK(_esbp);                          \
 464                 _NOTE(CONSTANTCONDITION);                               \
 465         } while (B_FALSE)
 466
 467
 468 #define EFSYS_BAR_WRITED(_esbp, _offset, _edp, _lock)                   \
 469         do {                                                            \
 470                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 471                 volatile uint32_t *_addr;                               \
 472                                                                         \
 473                 _NOTE(CONSTANTCONDITION);                               \
 474                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
 475                                                                         \
 476                 _NOTE(CONSTANTCONDITION);                               \
 477                 if (_lock)                                              \
 478                         SFC_BAR_LOCK(_esbp);                            \
 479                                                                         \
 480                 EFSYS_PROBE2(bar_writed, unsigned int, (_offset),       \
 481                                          uint32_t, (_edp)->ed_u32[0]);  \
 482                                                                         \
 483                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 484                 rte_write32_relaxed((_edp)->ed_u32[0], _addr);          \
 485                 rte_wmb();                                              \
 486                                                                         \
 487                 _NOTE(CONSTANTCONDITION);                               \
 488                 if (_lock)                                              \
 489                         SFC_BAR_UNLOCK(_esbp);                          \
 490                 _NOTE(CONSTANTCONDITION);                               \
 491         } while (B_FALSE)
 492
 493 #define EFSYS_BAR_WRITEQ(_esbp, _offset, _eqp)                          \
 494         do {                                                            \
 495                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 496                 volatile uint64_t *_addr;                               \
 497                                                                         \
 498                 _NOTE(CONSTANTCONDITION);                               \
 499                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
 500                                                                         \
 501                 SFC_BAR_LOCK(_esbp);                                    \
 502                                                                         \
 503                 EFSYS_PROBE3(bar_writeq, unsigned int, (_offset),       \
 504                                          uint32_t, (_eqp)->eq_u32[1],   \
 505                                          uint32_t, (_eqp)->eq_u32[0]);  \
 506                                                                         \
 507                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 508                 rte_write64_relaxed((_eqp)->eq_u64[0], _addr);          \
 509                 rte_wmb();                                              \
 510                                                                         \
 511                 SFC_BAR_UNLOCK(_esbp);                                  \
 512                 _NOTE(CONSTANTCONDITION);                               \
 513         } while (B_FALSE)
 514
 515 /*
 516  * Guarantees 64bit aligned 64bit writes to write combined BAR mapping
 517  * (required by PIO hardware).
 518  *
 519  * Neither VFIO, nor UIO, nor NIC UIO (on FreeBSD) support
 520  * write-combined memory mapped to user-land, so just abort if used.
 521  */
 522 #define EFSYS_BAR_WC_WRITEQ(_esbp, _offset, _eqp)                       \
 523         do {                                                            \
 524                 rte_panic("Write-combined BAR access not supported");   \
 525         } while (B_FALSE)
 526
 527 #define EFSYS_BAR_WRITEO(_esbp, _offset, _eop, _lock)                   \
 528         do {                                                            \
 529                 volatile uint8_t *_base = (_esbp)->esb_base;            \
 530                 volatile __m128i *_addr;                                \
 531                                                                         \
 532                 _NOTE(CONSTANTCONDITION);                               \
 533                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
 534                                                                         \
 535                 _NOTE(CONSTANTCONDITION);                               \
 536                 if (_lock)                                              \
 537                         SFC_BAR_LOCK(_esbp);                            \
 538                                                                         \
 539                 EFSYS_PROBE5(bar_writeo, unsigned int, (_offset),       \
 540                                          uint32_t, (_eop)->eo_u32[3],   \
 541                                          uint32_t, (_eop)->eo_u32[2],   \
 542                                          uint32_t, (_eop)->eo_u32[1],   \
 543                                          uint32_t, (_eop)->eo_u32[0]);  \
 544                                                                         \
 545                 _addr = (volatile __m128i *)(_base + (_offset));        \
 546                 /* There is no rte_write128_relaxed() yet */            \
 547                 _addr[0] = (_eop)->eo_u128[0];                          \
 548                 rte_wmb();                                              \
 549                                                                         \
 550                 _NOTE(CONSTANTCONDITION);                               \
 551                 if (_lock)                                              \
 552                         SFC_BAR_UNLOCK(_esbp);                          \
 553                 _NOTE(CONSTANTCONDITION);                               \
 554         } while (B_FALSE)
 555
 556 /* Use the standard octo-word write for doorbell writes */
 557 #define EFSYS_BAR_DOORBELL_WRITEO(_esbp, _offset, _eop)                 \
 558         do {                                                            \
 559                 EFSYS_BAR_WRITEO((_esbp), (_offset), (_eop), B_FALSE);  \
 560                 _NOTE(CONSTANTCONDITION);                               \
 561         } while (B_FALSE)
 562
 563 /* SPIN */
 564
 565 #define EFSYS_SPIN(_us)                                                 \
 566         do {                                                            \
 567                 rte_delay_us(_us);                                      \
 568                 _NOTE(CONSTANTCONDITION);                               \
 569         } while (B_FALSE)
 570
 571 #define EFSYS_SLEEP EFSYS_SPIN
 572
 573 /* BARRIERS */
 574
 575 #define EFSYS_MEM_READ_BARRIER()        rte_rmb()
 576 #define EFSYS_PIO_WRITE_BARRIER()       rte_io_wmb()
 577
 578 /* DMA SYNC */
 579
 580 /*
 581  * DPDK does not provide any DMA syncing API, and no PMD drivers
 582  * have any traces of explicit DMA syncing.
 583  * DMA mapping is assumed to be coherent.
 584  */
 585
 586 #define EFSYS_DMA_SYNC_FOR_KERNEL(_esmp, _offset, _size)        ((void)0)
 587
 588 /* Just avoid store and compiler (impliciltly) reordering */
 589 #define EFSYS_DMA_SYNC_FOR_DEVICE(_esmp, _offset, _size)        rte_wmb()
 590
 591 /* TIMESTAMP */
 592
 593 typedef uint64_t efsys_timestamp_t;
 594
 595 #define EFSYS_TIMESTAMP(_usp)                                           \
 596         do {                                                            \
 597                 *(_usp) = rte_get_timer_cycles() * 1000000 /            \
 598                         rte_get_timer_hz();                             \
 599                 _NOTE(CONSTANTCONDITION);                               \
 600         } while (B_FALSE)
 601
 602 /* KMEM */
 603
 604 #define EFSYS_KMEM_ALLOC(_esip, _size, _p)                              \
 605         do {                                                            \
 606                 (_esip) = (_esip);                                      \
 607                 (_p) = rte_zmalloc("sfc", (_size), 0);                  \
 608                 _NOTE(CONSTANTCONDITION);                               \
 609         } while (B_FALSE)
 610
 611 #define EFSYS_KMEM_FREE(_esip, _size, _p)                               \
 612         do {                                                            \
 613                 (void)(_esip);                                          \
 614                 (void)(_size);                                          \
 615                 rte_free((_p));                                         \
 616                 _NOTE(CONSTANTCONDITION);                               \
 617         } while (B_FALSE)
 618
 619 /* LOCK */
 620
 621 typedef rte_spinlock_t efsys_lock_t;
 622
 623 #define SFC_EFSYS_LOCK_INIT(_eslp, _ifname, _label)     \
 624         rte_spinlock_init((_eslp))
 625 #define SFC_EFSYS_LOCK_DESTROY(_eslp) ((void)0)
 626 #define SFC_EFSYS_LOCK(_eslp)                           \
 627         rte_spinlock_lock((_eslp))
 628 #define SFC_EFSYS_UNLOCK(_eslp)                         \
 629         rte_spinlock_unlock((_eslp))
 630 #define SFC_EFSYS_LOCK_ASSERT_OWNED(_eslp)              \
 631         SFC_ASSERT(rte_spinlock_is_locked((_eslp)))
 632
 633 typedef int efsys_lock_state_t;
 634
 635 #define EFSYS_LOCK_MAGIC        0x000010c4
 636
 637 #define EFSYS_LOCK(_lockp, _state)                              \
 638         do {                                                    \
 639                 SFC_EFSYS_LOCK(_lockp);                         \
 640                 (_state) = EFSYS_LOCK_MAGIC;                    \
 641                 _NOTE(CONSTANTCONDITION);                       \
 642         } while (B_FALSE)
 643
 644 #define EFSYS_UNLOCK(_lockp, _state)                            \
 645         do {                                                    \
 646                 SFC_ASSERT((_state) == EFSYS_LOCK_MAGIC);       \
 647                 SFC_EFSYS_UNLOCK(_lockp);                       \
 648                 _NOTE(CONSTANTCONDITION);                       \
 649         } while (B_FALSE)
 650
 651 /* STAT */
 652
 653 typedef uint64_t        efsys_stat_t;
 654
 655 #define EFSYS_STAT_INCR(_knp, _delta)                           \
 656         do {                                                    \
 657                 *(_knp) += (_delta);                            \
 658                 _NOTE(CONSTANTCONDITION);                       \
 659         } while (B_FALSE)
 660
 661 #define EFSYS_STAT_DECR(_knp, _delta)                           \
 662         do {                                                    \
 663                 *(_knp) -= (_delta);                            \
 664                 _NOTE(CONSTANTCONDITION);                       \
 665         } while (B_FALSE)
 666
 667 #define EFSYS_STAT_SET(_knp, _val)                              \
 668         do {                                                    \
 669                 *(_knp) = (_val);                               \
 670                 _NOTE(CONSTANTCONDITION);                       \
 671         } while (B_FALSE)
 672
 673 #define EFSYS_STAT_SET_QWORD(_knp, _valp)                       \
 674         do {                                                    \
 675                 *(_knp) = rte_le_to_cpu_64((_valp)->eq_u64[0]); \
 676                 _NOTE(CONSTANTCONDITION);                       \
 677         } while (B_FALSE)
 678
 679 #define EFSYS_STAT_SET_DWORD(_knp, _valp)                       \
 680         do {                                                    \
 681                 *(_knp) = rte_le_to_cpu_32((_valp)->ed_u32[0]); \
 682                 _NOTE(CONSTANTCONDITION);                       \
 683         } while (B_FALSE)
 684
 685 #define EFSYS_STAT_INCR_QWORD(_knp, _valp)                              \
 686         do {                                                            \
 687                 *(_knp) += rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
 688                 _NOTE(CONSTANTCONDITION);                               \
 689         } while (B_FALSE)
 690
 691 #define EFSYS_STAT_SUBR_QWORD(_knp, _valp)                              \
 692         do {                                                            \
 693                 *(_knp) -= rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
 694                 _NOTE(CONSTANTCONDITION);                               \
 695         } while (B_FALSE)
 696
 697 /* ERR */
 698
 699 #if EFSYS_OPT_DECODE_INTR_FATAL
 700 #define EFSYS_ERR(_esip, _code, _dword0, _dword1)                       \
 701         do {                                                            \
 702                 (void)(_esip);                                          \
 703                 SFC_GENERIC_LOG(ERR, "FATAL ERROR #%u (0x%08x%08x)",    \
 704                         (_code), (_dword0), (_dword1));                 \
 705                 _NOTE(CONSTANTCONDITION);                               \
 706         } while (B_FALSE)
 707 #endif
 708
 709 /* ASSERT */
 710
 711 /* RTE_VERIFY from DPDK treats expressions with % operator incorrectly,
 712  * so we re-implement it here
 713  */
 714 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
 715 #define EFSYS_ASSERT(_exp)                                              \
 716         do {                                                            \
 717                 if (unlikely(!(_exp)))                                  \
 718                         rte_panic("line %d\tassert \"%s\" failed\n",    \
 719                                   __LINE__, (#_exp));                   \
 720         } while (0)
 721 #else
 722 #define EFSYS_ASSERT(_exp)              (void)(_exp)
 723 #endif
 724
 725 #define EFSYS_ASSERT3(_x, _op, _y, _t)  EFSYS_ASSERT((_t)(_x) _op (_t)(_y))
 726
 727 #define EFSYS_ASSERT3U(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uint64_t)
 728 #define EFSYS_ASSERT3S(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, int64_t)
 729 #define EFSYS_ASSERT3P(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uintptr_t)
 730
 731 /* ROTATE */
 732
 733 #define EFSYS_HAS_ROTL_DWORD    0
 734
 735 #ifdef __cplusplus
 736 }
 737 #endif
 738
 739 #endif  /* _SFC_COMMON_EFSYS_H */