1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016-2018 Solarflare Communications Inc.
6 * This software was jointly developed between OKTET Labs (under contract
7 * for Solarflare) and Solarflare Communications, Inc.
10 #ifndef _SFC_COMMON_EFSYS_H
11 #define _SFC_COMMON_EFSYS_H
15 #include <rte_spinlock.h>
16 #include <rte_byteorder.h>
17 #include <rte_debug.h>
18 #include <rte_memzone.h>
19 #include <rte_memory.h>
20 #include <rte_memcpy.h>
21 #include <rte_cycles.h>
22 #include <rte_prefetch.h>
23 #include <rte_common.h>
24 #include <rte_malloc.h>
28 #include "sfc_debug.h"
35 #define EFSYS_HAS_UINT64 1
36 #define EFSYS_USE_UINT64 1
37 #define EFSYS_HAS_SSE2_M128 1
39 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
40 #define EFSYS_IS_BIG_ENDIAN 1
41 #define EFSYS_IS_LITTLE_ENDIAN 0
42 #elif RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
43 #define EFSYS_IS_BIG_ENDIAN 0
44 #define EFSYS_IS_LITTLE_ENDIAN 1
46 #error "Cannot determine system endianness"
48 #include "efx_types.h"
55 typedef bool boolean_t;
65 * RTE_MAX() and RTE_MIN() cannot be used since braced-group within
66 * expression allowed only inside a function, but MAX() is used as
67 * a number of elements in array.
70 #define MAX(v1, v2) ((v1) > (v2) ? (v1) : (v2))
73 #define MIN(v1, v2) ((v1) < (v2) ? (v1) : (v2))
76 /* There are macros for alignment in DPDK, but we need to make a proper
77 * correspondence here, if we want to re-use them at all
80 #define IS_P2ALIGNED(v, a) ((((uintptr_t)(v)) & ((uintptr_t)(a) - 1)) == 0)
84 #define P2ROUNDUP(x, align) (-(-(x) & -(align)))
88 #define P2ALIGN(_x, _a) ((_x) & -(_a))
92 #define ISP2(x) rte_is_power_of_2(x)
95 #define ENOTACTIVE ENOTCONN
98 prefetch_read_many(const volatile void *addr)
104 prefetch_read_once(const volatile void *addr)
106 rte_prefetch_non_temporal(addr);
109 /* Modifiers used for Windows builds */
112 #define __in_ecount(_n)
113 #define __in_ecount_opt(_n)
114 #define __in_bcount(_n)
115 #define __in_bcount_opt(_n)
119 #define __out_ecount(_n)
120 #define __out_ecount_opt(_n)
121 #define __out_bcount(_n)
122 #define __out_bcount_opt(_n)
123 #define __out_bcount_part(_n, _l)
124 #define __out_bcount_part_opt(_n, _l)
130 #define __inout_ecount(_n)
131 #define __inout_ecount_opt(_n)
132 #define __inout_bcount(_n)
133 #define __inout_bcount_opt(_n)
134 #define __inout_bcount_full_opt(_n)
136 #define __deref_out_bcount_opt(n)
138 #define __checkReturn
139 #define __success(_x)
141 #define __drv_when(_p, _c)
143 /* Code inclusion options */
146 #define EFSYS_OPT_NAMES 1
148 /* Disable SFN5xxx/SFN6xxx since it requires specific support in the PMD */
149 #define EFSYS_OPT_SIENA 0
150 /* Enable SFN7xxx support */
151 #define EFSYS_OPT_HUNTINGTON 1
152 /* Enable SFN8xxx support */
153 #define EFSYS_OPT_MEDFORD 1
154 /* Enable SFN2xxx support */
155 #define EFSYS_OPT_MEDFORD2 1
156 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
157 #define EFSYS_OPT_CHECK_REG 1
159 #define EFSYS_OPT_CHECK_REG 0
162 /* MCDI is required for SFN7xxx and SFN8xx */
163 #define EFSYS_OPT_MCDI 1
164 #define EFSYS_OPT_MCDI_LOGGING 1
165 #define EFSYS_OPT_MCDI_PROXY_AUTH 1
167 #define EFSYS_OPT_MAC_STATS 1
169 #define EFSYS_OPT_LOOPBACK 0
171 #define EFSYS_OPT_MON_MCDI 0
172 #define EFSYS_OPT_MON_STATS 0
174 #define EFSYS_OPT_PHY_STATS 0
175 #define EFSYS_OPT_BIST 0
176 #define EFSYS_OPT_PHY_LED_CONTROL 0
177 #define EFSYS_OPT_PHY_FLAGS 0
179 #define EFSYS_OPT_VPD 0
180 #define EFSYS_OPT_NVRAM 0
181 #define EFSYS_OPT_BOOTCFG 0
182 #define EFSYS_OPT_IMAGE_LAYOUT 0
184 #define EFSYS_OPT_DIAG 0
185 #define EFSYS_OPT_RX_SCALE 1
186 #define EFSYS_OPT_QSTATS 0
187 /* Filters support is required for SFN7xxx and SFN8xx */
188 #define EFSYS_OPT_FILTER 1
189 #define EFSYS_OPT_RX_SCATTER 0
191 #define EFSYS_OPT_EV_PREFETCH 0
193 #define EFSYS_OPT_DECODE_INTR_FATAL 0
195 #define EFSYS_OPT_LICENSING 0
197 #define EFSYS_OPT_ALLOW_UNCONFIGURED_NIC 0
199 #define EFSYS_OPT_RX_PACKED_STREAM 0
201 #define EFSYS_OPT_TUNNEL 1
205 typedef struct __efsys_identifier_s efsys_identifier_t;
208 #define EFSYS_PROBE(_name) \
211 #define EFSYS_PROBE1(_name, _type1, _arg1) \
214 #define EFSYS_PROBE2(_name, _type1, _arg1, _type2, _arg2) \
217 #define EFSYS_PROBE3(_name, _type1, _arg1, _type2, _arg2, \
221 #define EFSYS_PROBE4(_name, _type1, _arg1, _type2, _arg2, \
222 _type3, _arg3, _type4, _arg4) \
225 #define EFSYS_PROBE5(_name, _type1, _arg1, _type2, _arg2, \
226 _type3, _arg3, _type4, _arg4, _type5, _arg5) \
229 #define EFSYS_PROBE6(_name, _type1, _arg1, _type2, _arg2, \
230 _type3, _arg3, _type4, _arg4, _type5, _arg5, \
234 #define EFSYS_PROBE7(_name, _type1, _arg1, _type2, _arg2, \
235 _type3, _arg3, _type4, _arg4, _type5, _arg5, \
236 _type6, _arg6, _type7, _arg7) \
242 typedef rte_iova_t efsys_dma_addr_t;
244 typedef struct efsys_mem_s {
245 const struct rte_memzone *esm_mz;
247 * Ideally it should have volatile qualifier to denote that
248 * the memory may be updated by someone else. However, it adds
249 * qualifier discard warnings when the pointer or its derivative
250 * is passed to memset() or rte_mov16().
251 * So, skip the qualifier here, but make sure that it is added
252 * below in access macros.
255 efsys_dma_addr_t esm_addr;
259 #define EFSYS_MEM_ZERO(_esmp, _size) \
261 (void)memset((void *)(_esmp)->esm_base, 0, (_size)); \
263 _NOTE(CONSTANTCONDITION); \
266 #define EFSYS_MEM_READD(_esmp, _offset, _edp) \
268 volatile uint8_t *_base = (_esmp)->esm_base; \
269 volatile uint32_t *_addr; \
271 _NOTE(CONSTANTCONDITION); \
272 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
274 _addr = (volatile uint32_t *)(_base + (_offset)); \
275 (_edp)->ed_u32[0] = _addr[0]; \
277 EFSYS_PROBE2(mem_readl, unsigned int, (_offset), \
278 uint32_t, (_edp)->ed_u32[0]); \
280 _NOTE(CONSTANTCONDITION); \
283 #define EFSYS_MEM_READQ(_esmp, _offset, _eqp) \
285 volatile uint8_t *_base = (_esmp)->esm_base; \
286 volatile uint64_t *_addr; \
288 _NOTE(CONSTANTCONDITION); \
289 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
291 _addr = (volatile uint64_t *)(_base + (_offset)); \
292 (_eqp)->eq_u64[0] = _addr[0]; \
294 EFSYS_PROBE3(mem_readq, unsigned int, (_offset), \
295 uint32_t, (_eqp)->eq_u32[1], \
296 uint32_t, (_eqp)->eq_u32[0]); \
298 _NOTE(CONSTANTCONDITION); \
301 #define EFSYS_MEM_READO(_esmp, _offset, _eop) \
303 volatile uint8_t *_base = (_esmp)->esm_base; \
304 volatile __m128i *_addr; \
306 _NOTE(CONSTANTCONDITION); \
307 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
309 _addr = (volatile __m128i *)(_base + (_offset)); \
310 (_eop)->eo_u128[0] = _addr[0]; \
312 EFSYS_PROBE5(mem_reado, unsigned int, (_offset), \
313 uint32_t, (_eop)->eo_u32[3], \
314 uint32_t, (_eop)->eo_u32[2], \
315 uint32_t, (_eop)->eo_u32[1], \
316 uint32_t, (_eop)->eo_u32[0]); \
318 _NOTE(CONSTANTCONDITION); \
322 #define EFSYS_MEM_WRITED(_esmp, _offset, _edp) \
324 volatile uint8_t *_base = (_esmp)->esm_base; \
325 volatile uint32_t *_addr; \
327 _NOTE(CONSTANTCONDITION); \
328 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
330 EFSYS_PROBE2(mem_writed, unsigned int, (_offset), \
331 uint32_t, (_edp)->ed_u32[0]); \
333 _addr = (volatile uint32_t *)(_base + (_offset)); \
334 _addr[0] = (_edp)->ed_u32[0]; \
336 _NOTE(CONSTANTCONDITION); \
339 #define EFSYS_MEM_WRITEQ(_esmp, _offset, _eqp) \
341 volatile uint8_t *_base = (_esmp)->esm_base; \
342 volatile uint64_t *_addr; \
344 _NOTE(CONSTANTCONDITION); \
345 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
347 EFSYS_PROBE3(mem_writeq, unsigned int, (_offset), \
348 uint32_t, (_eqp)->eq_u32[1], \
349 uint32_t, (_eqp)->eq_u32[0]); \
351 _addr = (volatile uint64_t *)(_base + (_offset)); \
352 _addr[0] = (_eqp)->eq_u64[0]; \
354 _NOTE(CONSTANTCONDITION); \
357 #define EFSYS_MEM_WRITEO(_esmp, _offset, _eop) \
359 volatile uint8_t *_base = (_esmp)->esm_base; \
360 volatile __m128i *_addr; \
362 _NOTE(CONSTANTCONDITION); \
363 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
366 EFSYS_PROBE5(mem_writeo, unsigned int, (_offset), \
367 uint32_t, (_eop)->eo_u32[3], \
368 uint32_t, (_eop)->eo_u32[2], \
369 uint32_t, (_eop)->eo_u32[1], \
370 uint32_t, (_eop)->eo_u32[0]); \
372 _addr = (volatile __m128i *)(_base + (_offset)); \
373 _addr[0] = (_eop)->eo_u128[0]; \
375 _NOTE(CONSTANTCONDITION); \
379 #define EFSYS_MEM_SIZE(_esmp) \
380 ((_esmp)->esm_mz->len)
382 #define EFSYS_MEM_ADDR(_esmp) \
385 #define EFSYS_MEM_IS_NULL(_esmp) \
386 ((_esmp)->esm_base == NULL)
388 #define EFSYS_MEM_PREFETCH(_esmp, _offset) \
390 volatile uint8_t *_base = (_esmp)->esm_base; \
392 rte_prefetch0(_base + (_offset)); \
398 typedef struct efsys_bar_s {
399 rte_spinlock_t esb_lock;
401 struct rte_pci_device *esb_dev;
403 * Ideally it should have volatile qualifier to denote that
404 * the memory may be updated by someone else. However, it adds
405 * qualifier discard warnings when the pointer or its derivative
406 * is passed to memset() or rte_mov16().
407 * So, skip the qualifier here, but make sure that it is added
408 * below in access macros.
413 #define SFC_BAR_LOCK_INIT(_esbp, _ifname) \
415 rte_spinlock_init(&(_esbp)->esb_lock); \
416 _NOTE(CONSTANTCONDITION); \
418 #define SFC_BAR_LOCK_DESTROY(_esbp) ((void)0)
419 #define SFC_BAR_LOCK(_esbp) rte_spinlock_lock(&(_esbp)->esb_lock)
420 #define SFC_BAR_UNLOCK(_esbp) rte_spinlock_unlock(&(_esbp)->esb_lock)
422 #define EFSYS_BAR_READD(_esbp, _offset, _edp, _lock) \
424 volatile uint8_t *_base = (_esbp)->esb_base; \
425 volatile uint32_t *_addr; \
427 _NOTE(CONSTANTCONDITION); \
428 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
429 _NOTE(CONSTANTCONDITION); \
431 SFC_BAR_LOCK(_esbp); \
433 _addr = (volatile uint32_t *)(_base + (_offset)); \
435 (_edp)->ed_u32[0] = rte_read32_relaxed(_addr); \
437 EFSYS_PROBE2(bar_readd, unsigned int, (_offset), \
438 uint32_t, (_edp)->ed_u32[0]); \
440 _NOTE(CONSTANTCONDITION); \
442 SFC_BAR_UNLOCK(_esbp); \
443 _NOTE(CONSTANTCONDITION); \
446 #define EFSYS_BAR_READQ(_esbp, _offset, _eqp) \
448 volatile uint8_t *_base = (_esbp)->esb_base; \
449 volatile uint64_t *_addr; \
451 _NOTE(CONSTANTCONDITION); \
452 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
454 SFC_BAR_LOCK(_esbp); \
456 _addr = (volatile uint64_t *)(_base + (_offset)); \
458 (_eqp)->eq_u64[0] = rte_read64_relaxed(_addr); \
460 EFSYS_PROBE3(bar_readq, unsigned int, (_offset), \
461 uint32_t, (_eqp)->eq_u32[1], \
462 uint32_t, (_eqp)->eq_u32[0]); \
464 SFC_BAR_UNLOCK(_esbp); \
465 _NOTE(CONSTANTCONDITION); \
468 #define EFSYS_BAR_READO(_esbp, _offset, _eop, _lock) \
470 volatile uint8_t *_base = (_esbp)->esb_base; \
471 volatile __m128i *_addr; \
473 _NOTE(CONSTANTCONDITION); \
474 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
476 _NOTE(CONSTANTCONDITION); \
478 SFC_BAR_LOCK(_esbp); \
480 _addr = (volatile __m128i *)(_base + (_offset)); \
482 /* There is no rte_read128_relaxed() yet */ \
483 (_eop)->eo_u128[0] = _addr[0]; \
485 EFSYS_PROBE5(bar_reado, unsigned int, (_offset), \
486 uint32_t, (_eop)->eo_u32[3], \
487 uint32_t, (_eop)->eo_u32[2], \
488 uint32_t, (_eop)->eo_u32[1], \
489 uint32_t, (_eop)->eo_u32[0]); \
491 _NOTE(CONSTANTCONDITION); \
493 SFC_BAR_UNLOCK(_esbp); \
494 _NOTE(CONSTANTCONDITION); \
498 #define EFSYS_BAR_WRITED(_esbp, _offset, _edp, _lock) \
500 volatile uint8_t *_base = (_esbp)->esb_base; \
501 volatile uint32_t *_addr; \
503 _NOTE(CONSTANTCONDITION); \
504 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
506 _NOTE(CONSTANTCONDITION); \
508 SFC_BAR_LOCK(_esbp); \
510 EFSYS_PROBE2(bar_writed, unsigned int, (_offset), \
511 uint32_t, (_edp)->ed_u32[0]); \
513 _addr = (volatile uint32_t *)(_base + (_offset)); \
514 rte_write32_relaxed((_edp)->ed_u32[0], _addr); \
517 _NOTE(CONSTANTCONDITION); \
519 SFC_BAR_UNLOCK(_esbp); \
520 _NOTE(CONSTANTCONDITION); \
523 #define EFSYS_BAR_WRITEQ(_esbp, _offset, _eqp) \
525 volatile uint8_t *_base = (_esbp)->esb_base; \
526 volatile uint64_t *_addr; \
528 _NOTE(CONSTANTCONDITION); \
529 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
531 SFC_BAR_LOCK(_esbp); \
533 EFSYS_PROBE3(bar_writeq, unsigned int, (_offset), \
534 uint32_t, (_eqp)->eq_u32[1], \
535 uint32_t, (_eqp)->eq_u32[0]); \
537 _addr = (volatile uint64_t *)(_base + (_offset)); \
538 rte_write64_relaxed((_eqp)->eq_u64[0], _addr); \
541 SFC_BAR_UNLOCK(_esbp); \
542 _NOTE(CONSTANTCONDITION); \
546 * Guarantees 64bit aligned 64bit writes to write combined BAR mapping
547 * (required by PIO hardware).
549 * Neither VFIO, nor UIO, nor NIC UIO (on FreeBSD) support
550 * write-combined memory mapped to user-land, so just abort if used.
552 #define EFSYS_BAR_WC_WRITEQ(_esbp, _offset, _eqp) \
554 rte_panic("Write-combined BAR access not supported"); \
557 #define EFSYS_BAR_WRITEO(_esbp, _offset, _eop, _lock) \
559 volatile uint8_t *_base = (_esbp)->esb_base; \
560 volatile __m128i *_addr; \
562 _NOTE(CONSTANTCONDITION); \
563 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
565 _NOTE(CONSTANTCONDITION); \
567 SFC_BAR_LOCK(_esbp); \
569 EFSYS_PROBE5(bar_writeo, unsigned int, (_offset), \
570 uint32_t, (_eop)->eo_u32[3], \
571 uint32_t, (_eop)->eo_u32[2], \
572 uint32_t, (_eop)->eo_u32[1], \
573 uint32_t, (_eop)->eo_u32[0]); \
575 _addr = (volatile __m128i *)(_base + (_offset)); \
576 /* There is no rte_write128_relaxed() yet */ \
577 _addr[0] = (_eop)->eo_u128[0]; \
580 _NOTE(CONSTANTCONDITION); \
582 SFC_BAR_UNLOCK(_esbp); \
583 _NOTE(CONSTANTCONDITION); \
586 /* Use the standard octo-word write for doorbell writes */
587 #define EFSYS_BAR_DOORBELL_WRITEO(_esbp, _offset, _eop) \
589 EFSYS_BAR_WRITEO((_esbp), (_offset), (_eop), B_FALSE); \
590 _NOTE(CONSTANTCONDITION); \
595 #define EFSYS_SPIN(_us) \
598 _NOTE(CONSTANTCONDITION); \
601 #define EFSYS_SLEEP EFSYS_SPIN
605 #define EFSYS_MEM_READ_BARRIER() rte_rmb()
606 #define EFSYS_PIO_WRITE_BARRIER() rte_io_wmb()
611 * DPDK does not provide any DMA syncing API, and no PMD drivers
612 * have any traces of explicit DMA syncing.
613 * DMA mapping is assumed to be coherent.
616 #define EFSYS_DMA_SYNC_FOR_KERNEL(_esmp, _offset, _size) ((void)0)
618 /* Just avoid store and compiler (impliciltly) reordering */
619 #define EFSYS_DMA_SYNC_FOR_DEVICE(_esmp, _offset, _size) rte_wmb()
623 typedef uint64_t efsys_timestamp_t;
625 #define EFSYS_TIMESTAMP(_usp) \
627 *(_usp) = rte_get_timer_cycles() * 1000000 / \
628 rte_get_timer_hz(); \
629 _NOTE(CONSTANTCONDITION); \
634 #define EFSYS_KMEM_ALLOC(_esip, _size, _p) \
637 (_p) = rte_zmalloc("sfc", (_size), 0); \
638 _NOTE(CONSTANTCONDITION); \
641 #define EFSYS_KMEM_FREE(_esip, _size, _p) \
646 _NOTE(CONSTANTCONDITION); \
651 typedef rte_spinlock_t efsys_lock_t;
653 #define SFC_EFSYS_LOCK_INIT(_eslp, _ifname, _label) \
654 rte_spinlock_init((_eslp))
655 #define SFC_EFSYS_LOCK_DESTROY(_eslp) ((void)0)
656 #define SFC_EFSYS_LOCK(_eslp) \
657 rte_spinlock_lock((_eslp))
658 #define SFC_EFSYS_UNLOCK(_eslp) \
659 rte_spinlock_unlock((_eslp))
660 #define SFC_EFSYS_LOCK_ASSERT_OWNED(_eslp) \
661 SFC_ASSERT(rte_spinlock_is_locked((_eslp)))
663 typedef int efsys_lock_state_t;
665 #define EFSYS_LOCK_MAGIC 0x000010c4
667 #define EFSYS_LOCK(_lockp, _state) \
669 SFC_EFSYS_LOCK(_lockp); \
670 (_state) = EFSYS_LOCK_MAGIC; \
671 _NOTE(CONSTANTCONDITION); \
674 #define EFSYS_UNLOCK(_lockp, _state) \
676 SFC_ASSERT((_state) == EFSYS_LOCK_MAGIC); \
677 SFC_EFSYS_UNLOCK(_lockp); \
678 _NOTE(CONSTANTCONDITION); \
683 typedef uint64_t efsys_stat_t;
685 #define EFSYS_STAT_INCR(_knp, _delta) \
687 *(_knp) += (_delta); \
688 _NOTE(CONSTANTCONDITION); \
691 #define EFSYS_STAT_DECR(_knp, _delta) \
693 *(_knp) -= (_delta); \
694 _NOTE(CONSTANTCONDITION); \
697 #define EFSYS_STAT_SET(_knp, _val) \
700 _NOTE(CONSTANTCONDITION); \
703 #define EFSYS_STAT_SET_QWORD(_knp, _valp) \
705 *(_knp) = rte_le_to_cpu_64((_valp)->eq_u64[0]); \
706 _NOTE(CONSTANTCONDITION); \
709 #define EFSYS_STAT_SET_DWORD(_knp, _valp) \
711 *(_knp) = rte_le_to_cpu_32((_valp)->ed_u32[0]); \
712 _NOTE(CONSTANTCONDITION); \
715 #define EFSYS_STAT_INCR_QWORD(_knp, _valp) \
717 *(_knp) += rte_le_to_cpu_64((_valp)->eq_u64[0]); \
718 _NOTE(CONSTANTCONDITION); \
721 #define EFSYS_STAT_SUBR_QWORD(_knp, _valp) \
723 *(_knp) -= rte_le_to_cpu_64((_valp)->eq_u64[0]); \
724 _NOTE(CONSTANTCONDITION); \
729 #if EFSYS_OPT_DECODE_INTR_FATAL
730 #define EFSYS_ERR(_esip, _code, _dword0, _dword1) \
733 SFC_GENERIC_LOG(ERR, "FATAL ERROR #%u (0x%08x%08x)", \
734 (_code), (_dword0), (_dword1)); \
735 _NOTE(CONSTANTCONDITION); \
741 /* RTE_VERIFY from DPDK treats expressions with % operator incorrectly,
742 * so we re-implement it here
744 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
745 #define EFSYS_ASSERT(_exp) \
747 if (unlikely(!(_exp))) \
748 rte_panic("line %d\tassert \"%s\" failed\n", \
749 __LINE__, (#_exp)); \
752 #define EFSYS_ASSERT(_exp) (void)(_exp)
755 #define EFSYS_ASSERT3(_x, _op, _y, _t) EFSYS_ASSERT((_t)(_x) _op (_t)(_y))
757 #define EFSYS_ASSERT3U(_x, _op, _y) EFSYS_ASSERT3(_x, _op, _y, uint64_t)
758 #define EFSYS_ASSERT3S(_x, _op, _y) EFSYS_ASSERT3(_x, _op, _y, int64_t)
759 #define EFSYS_ASSERT3P(_x, _op, _y) EFSYS_ASSERT3(_x, _op, _y, uintptr_t)
763 #define EFSYS_HAS_ROTL_DWORD 0
769 #endif /* _SFC_COMMON_EFSYS_H */