net/enic: use dynamic log types
[dpdk.git] / drivers / net / sfc / efsys.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2  *
3  * Copyright (c) 2016-2018 Solarflare Communications Inc.
4  * All rights reserved.
5  *
6  * This software was jointly developed between OKTET Labs (under contract
7  * for Solarflare) and Solarflare Communications, Inc.
8  */
9
10 #ifndef _SFC_COMMON_EFSYS_H
11 #define _SFC_COMMON_EFSYS_H
12
13 #include <stdbool.h>
14
15 #include <rte_spinlock.h>
16 #include <rte_byteorder.h>
17 #include <rte_debug.h>
18 #include <rte_memzone.h>
19 #include <rte_memory.h>
20 #include <rte_memcpy.h>
21 #include <rte_cycles.h>
22 #include <rte_prefetch.h>
23 #include <rte_common.h>
24 #include <rte_malloc.h>
25 #include <rte_log.h>
26 #include <rte_io.h>
27
28 #include "sfc_debug.h"
29
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33
34 #define EFSYS_HAS_UINT64 1
35 #define EFSYS_USE_UINT64 1
36 #define EFSYS_HAS_SSE2_M128 1
37
38 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
39 #define EFSYS_IS_BIG_ENDIAN 1
40 #define EFSYS_IS_LITTLE_ENDIAN 0
41 #elif RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
42 #define EFSYS_IS_BIG_ENDIAN 0
43 #define EFSYS_IS_LITTLE_ENDIAN 1
44 #else
45 #error "Cannot determine system endianness"
46 #endif
47 #include "efx_types.h"
48
49
50 #ifndef _NOTE
51 #define _NOTE(s)
52 #endif
53
54 typedef bool boolean_t;
55
56 #ifndef B_FALSE
57 #define B_FALSE false
58 #endif
59 #ifndef B_TRUE
60 #define B_TRUE  true
61 #endif
62
63 /*
64  * RTE_MAX() and RTE_MIN() cannot be used since braced-group within
65  * expression allowed only inside a function, but MAX() is used as
66  * a number of elements in array.
67  */
68 #ifndef MAX
69 #define MAX(v1, v2)     ((v1) > (v2) ? (v1) : (v2))
70 #endif
71 #ifndef MIN
72 #define MIN(v1, v2)     ((v1) < (v2) ? (v1) : (v2))
73 #endif
74
75 /* There are macros for alignment in DPDK, but we need to make a proper
76  * correspondence here, if we want to re-use them at all
77  */
78 #ifndef IS_P2ALIGNED
79 #define IS_P2ALIGNED(v, a)      ((((uintptr_t)(v)) & ((uintptr_t)(a) - 1)) == 0)
80 #endif
81
82 #ifndef P2ROUNDUP
83 #define P2ROUNDUP(x, align)     (-(-(x) & -(align)))
84 #endif
85
86 #ifndef P2ALIGN
87 #define P2ALIGN(_x, _a)         ((_x) & -(_a))
88 #endif
89
90 #ifndef IS2P
91 #define ISP2(x)                 rte_is_power_of_2(x)
92 #endif
93
94 #define ENOTACTIVE      ENOTCONN
95
96 static inline void
97 prefetch_read_many(const volatile void *addr)
98 {
99         rte_prefetch0(addr);
100 }
101
102 static inline void
103 prefetch_read_once(const volatile void *addr)
104 {
105         rte_prefetch_non_temporal(addr);
106 }
107
108 /* Modifiers used for Windows builds */
109 #define __in
110 #define __in_opt
111 #define __in_ecount(_n)
112 #define __in_ecount_opt(_n)
113 #define __in_bcount(_n)
114 #define __in_bcount_opt(_n)
115
116 #define __out
117 #define __out_opt
118 #define __out_ecount(_n)
119 #define __out_ecount_opt(_n)
120 #define __out_bcount(_n)
121 #define __out_bcount_opt(_n)
122
123 #define __deref_out
124
125 #define __inout
126 #define __inout_opt
127 #define __inout_ecount(_n)
128 #define __inout_ecount_opt(_n)
129 #define __inout_bcount(_n)
130 #define __inout_bcount_opt(_n)
131 #define __inout_bcount_full_opt(_n)
132
133 #define __deref_out_bcount_opt(n)
134
135 #define __checkReturn
136 #define __success(_x)
137
138 #define __drv_when(_p, _c)
139
140 /* Code inclusion options */
141
142
143 #define EFSYS_OPT_NAMES 1
144
145 /* Disable SFN5xxx/SFN6xxx since it requires specific support in the PMD */
146 #define EFSYS_OPT_SIENA 0
147 /* Enable SFN7xxx support */
148 #define EFSYS_OPT_HUNTINGTON 1
149 /* Enable SFN8xxx support */
150 #define EFSYS_OPT_MEDFORD 1
151 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
152 #define EFSYS_OPT_CHECK_REG 1
153 #else
154 #define EFSYS_OPT_CHECK_REG 0
155 #endif
156
157 /* MCDI is required for SFN7xxx and SFN8xx */
158 #define EFSYS_OPT_MCDI 1
159 #define EFSYS_OPT_MCDI_LOGGING 1
160 #define EFSYS_OPT_MCDI_PROXY_AUTH 1
161
162 #define EFSYS_OPT_MAC_STATS 1
163
164 #define EFSYS_OPT_LOOPBACK 0
165
166 #define EFSYS_OPT_MON_MCDI 0
167 #define EFSYS_OPT_MON_STATS 0
168
169 #define EFSYS_OPT_PHY_STATS 0
170 #define EFSYS_OPT_BIST 0
171 #define EFSYS_OPT_PHY_LED_CONTROL 0
172 #define EFSYS_OPT_PHY_FLAGS 0
173
174 #define EFSYS_OPT_VPD 0
175 #define EFSYS_OPT_NVRAM 0
176 #define EFSYS_OPT_BOOTCFG 0
177
178 #define EFSYS_OPT_DIAG 0
179 #define EFSYS_OPT_RX_SCALE 1
180 #define EFSYS_OPT_QSTATS 0
181 /* Filters support is required for SFN7xxx and SFN8xx */
182 #define EFSYS_OPT_FILTER 1
183 #define EFSYS_OPT_RX_SCATTER 0
184
185 #define EFSYS_OPT_EV_PREFETCH 0
186
187 #define EFSYS_OPT_DECODE_INTR_FATAL 0
188
189 #define EFSYS_OPT_LICENSING 0
190
191 #define EFSYS_OPT_ALLOW_UNCONFIGURED_NIC 0
192
193 #define EFSYS_OPT_RX_PACKED_STREAM 0
194
195 #define EFSYS_OPT_TUNNEL 1
196
197 /* ID */
198
199 typedef struct __efsys_identifier_s efsys_identifier_t;
200
201
202 #define EFSYS_PROBE(_name)                                              \
203         do { } while (0)
204
205 #define EFSYS_PROBE1(_name, _type1, _arg1)                              \
206         do { } while (0)
207
208 #define EFSYS_PROBE2(_name, _type1, _arg1, _type2, _arg2)               \
209         do { } while (0)
210
211 #define EFSYS_PROBE3(_name, _type1, _arg1, _type2, _arg2,               \
212                      _type3, _arg3)                                     \
213         do { } while (0)
214
215 #define EFSYS_PROBE4(_name, _type1, _arg1, _type2, _arg2,               \
216                      _type3, _arg3, _type4, _arg4)                      \
217         do { } while (0)
218
219 #define EFSYS_PROBE5(_name, _type1, _arg1, _type2, _arg2,               \
220                      _type3, _arg3, _type4, _arg4, _type5, _arg5)       \
221         do { } while (0)
222
223 #define EFSYS_PROBE6(_name, _type1, _arg1, _type2, _arg2,               \
224                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
225                      _type6, _arg6)                                     \
226         do { } while (0)
227
228 #define EFSYS_PROBE7(_name, _type1, _arg1, _type2, _arg2,               \
229                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
230                      _type6, _arg6, _type7, _arg7)                      \
231         do { } while (0)
232
233
234 /* DMA */
235
236 typedef rte_iova_t efsys_dma_addr_t;
237
238 typedef struct efsys_mem_s {
239         const struct rte_memzone        *esm_mz;
240         /*
241          * Ideally it should have volatile qualifier to denote that
242          * the memory may be updated by someone else. However, it adds
243          * qualifier discard warnings when the pointer or its derivative
244          * is passed to memset() or rte_mov16().
245          * So, skip the qualifier here, but make sure that it is added
246          * below in access macros.
247          */
248         void                            *esm_base;
249         efsys_dma_addr_t                esm_addr;
250 } efsys_mem_t;
251
252
253 #define EFSYS_MEM_ZERO(_esmp, _size)                                    \
254         do {                                                            \
255                 (void)memset((void *)(_esmp)->esm_base, 0, (_size));    \
256                                                                         \
257                 _NOTE(CONSTANTCONDITION);                               \
258         } while (B_FALSE)
259
260 #define EFSYS_MEM_READD(_esmp, _offset, _edp)                           \
261         do {                                                            \
262                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
263                 volatile uint32_t *_addr;                               \
264                                                                         \
265                 _NOTE(CONSTANTCONDITION);                               \
266                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
267                                                                         \
268                 _addr = (volatile uint32_t *)(_base + (_offset));       \
269                 (_edp)->ed_u32[0] = _addr[0];                           \
270                                                                         \
271                 EFSYS_PROBE2(mem_readl, unsigned int, (_offset),        \
272                                          uint32_t, (_edp)->ed_u32[0]);  \
273                                                                         \
274                 _NOTE(CONSTANTCONDITION);                               \
275         } while (B_FALSE)
276
277 #define EFSYS_MEM_READQ(_esmp, _offset, _eqp)                           \
278         do {                                                            \
279                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
280                 volatile uint64_t *_addr;                               \
281                                                                         \
282                 _NOTE(CONSTANTCONDITION);                               \
283                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
284                                                                         \
285                 _addr = (volatile uint64_t *)(_base + (_offset));       \
286                 (_eqp)->eq_u64[0] = _addr[0];                           \
287                                                                         \
288                 EFSYS_PROBE3(mem_readq, unsigned int, (_offset),        \
289                                          uint32_t, (_eqp)->eq_u32[1],   \
290                                          uint32_t, (_eqp)->eq_u32[0]);  \
291                                                                         \
292                 _NOTE(CONSTANTCONDITION);                               \
293         } while (B_FALSE)
294
295 #define EFSYS_MEM_READO(_esmp, _offset, _eop)                           \
296         do {                                                            \
297                 volatile uint8_t *_base = (_esmp)->esm_base;            \
298                 volatile __m128i *_addr;                                \
299                                                                         \
300                 _NOTE(CONSTANTCONDITION);                               \
301                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
302                                                                         \
303                 _addr = (volatile __m128i *)(_base + (_offset));        \
304                 (_eop)->eo_u128[0] = _addr[0];                          \
305                                                                         \
306                 EFSYS_PROBE5(mem_reado, unsigned int, (_offset),        \
307                                          uint32_t, (_eop)->eo_u32[3],   \
308                                          uint32_t, (_eop)->eo_u32[2],   \
309                                          uint32_t, (_eop)->eo_u32[1],   \
310                                          uint32_t, (_eop)->eo_u32[0]);  \
311                                                                         \
312                 _NOTE(CONSTANTCONDITION);                               \
313         } while (B_FALSE)
314
315
316 #define EFSYS_MEM_WRITED(_esmp, _offset, _edp)                          \
317         do {                                                            \
318                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
319                 volatile uint32_t *_addr;                               \
320                                                                         \
321                 _NOTE(CONSTANTCONDITION);                               \
322                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
323                                                                         \
324                 EFSYS_PROBE2(mem_writed, unsigned int, (_offset),       \
325                                          uint32_t, (_edp)->ed_u32[0]);  \
326                                                                         \
327                 _addr = (volatile uint32_t *)(_base + (_offset));       \
328                 _addr[0] = (_edp)->ed_u32[0];                           \
329                                                                         \
330                 _NOTE(CONSTANTCONDITION);                               \
331         } while (B_FALSE)
332
333 #define EFSYS_MEM_WRITEQ(_esmp, _offset, _eqp)                          \
334         do {                                                            \
335                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
336                 volatile uint64_t *_addr;                               \
337                                                                         \
338                 _NOTE(CONSTANTCONDITION);                               \
339                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
340                                                                         \
341                 EFSYS_PROBE3(mem_writeq, unsigned int, (_offset),       \
342                                          uint32_t, (_eqp)->eq_u32[1],   \
343                                          uint32_t, (_eqp)->eq_u32[0]);  \
344                                                                         \
345                 _addr = (volatile uint64_t *)(_base + (_offset));       \
346                 _addr[0] = (_eqp)->eq_u64[0];                           \
347                                                                         \
348                 _NOTE(CONSTANTCONDITION);                               \
349         } while (B_FALSE)
350
351 #define EFSYS_MEM_WRITEO(_esmp, _offset, _eop)                          \
352         do {                                                            \
353                 volatile uint8_t *_base = (_esmp)->esm_base;            \
354                 volatile __m128i *_addr;                                \
355                                                                         \
356                 _NOTE(CONSTANTCONDITION);                               \
357                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
358                                                                         \
359                                                                         \
360                 EFSYS_PROBE5(mem_writeo, unsigned int, (_offset),       \
361                                          uint32_t, (_eop)->eo_u32[3],   \
362                                          uint32_t, (_eop)->eo_u32[2],   \
363                                          uint32_t, (_eop)->eo_u32[1],   \
364                                          uint32_t, (_eop)->eo_u32[0]);  \
365                                                                         \
366                 _addr = (volatile __m128i *)(_base + (_offset));        \
367                 _addr[0] = (_eop)->eo_u128[0];                          \
368                                                                         \
369                 _NOTE(CONSTANTCONDITION);                               \
370         } while (B_FALSE)
371
372
373 #define EFSYS_MEM_ADDR(_esmp)                                           \
374         ((_esmp)->esm_addr)
375
376 #define EFSYS_MEM_IS_NULL(_esmp)                                        \
377         ((_esmp)->esm_base == NULL)
378
379 #define EFSYS_MEM_PREFETCH(_esmp, _offset)                              \
380         do {                                                            \
381                 volatile uint8_t *_base = (_esmp)->esm_base;            \
382                                                                         \
383                 rte_prefetch0(_base + (_offset));                       \
384         } while (0)
385
386
387 /* BAR */
388
389 typedef struct efsys_bar_s {
390         rte_spinlock_t          esb_lock;
391         int                     esb_rid;
392         struct rte_pci_device   *esb_dev;
393         /*
394          * Ideally it should have volatile qualifier to denote that
395          * the memory may be updated by someone else. However, it adds
396          * qualifier discard warnings when the pointer or its derivative
397          * is passed to memset() or rte_mov16().
398          * So, skip the qualifier here, but make sure that it is added
399          * below in access macros.
400          */
401         void                    *esb_base;
402 } efsys_bar_t;
403
404 #define SFC_BAR_LOCK_INIT(_esbp, _ifname)                               \
405         do {                                                            \
406                 rte_spinlock_init(&(_esbp)->esb_lock);                  \
407                 _NOTE(CONSTANTCONDITION);                               \
408         } while (B_FALSE)
409 #define SFC_BAR_LOCK_DESTROY(_esbp)     ((void)0)
410 #define SFC_BAR_LOCK(_esbp)             rte_spinlock_lock(&(_esbp)->esb_lock)
411 #define SFC_BAR_UNLOCK(_esbp)           rte_spinlock_unlock(&(_esbp)->esb_lock)
412
413 #define EFSYS_BAR_READD(_esbp, _offset, _edp, _lock)                    \
414         do {                                                            \
415                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
416                 volatile uint32_t *_addr;                               \
417                                                                         \
418                 _NOTE(CONSTANTCONDITION);                               \
419                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
420                 _NOTE(CONSTANTCONDITION);                               \
421                 if (_lock)                                              \
422                         SFC_BAR_LOCK(_esbp);                            \
423                                                                         \
424                 _addr = (volatile uint32_t *)(_base + (_offset));       \
425                 rte_rmb();                                              \
426                 (_edp)->ed_u32[0] = rte_read32_relaxed(_addr);          \
427                                                                         \
428                 EFSYS_PROBE2(bar_readd, unsigned int, (_offset),        \
429                                          uint32_t, (_edp)->ed_u32[0]);  \
430                                                                         \
431                 _NOTE(CONSTANTCONDITION);                               \
432                 if (_lock)                                              \
433                         SFC_BAR_UNLOCK(_esbp);                          \
434                 _NOTE(CONSTANTCONDITION);                               \
435         } while (B_FALSE)
436
437 #define EFSYS_BAR_READQ(_esbp, _offset, _eqp)                           \
438         do {                                                            \
439                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
440                 volatile uint64_t *_addr;                               \
441                                                                         \
442                 _NOTE(CONSTANTCONDITION);                               \
443                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
444                                                                         \
445                 SFC_BAR_LOCK(_esbp);                                    \
446                                                                         \
447                 _addr = (volatile uint64_t *)(_base + (_offset));       \
448                 rte_rmb();                                              \
449                 (_eqp)->eq_u64[0] = rte_read64_relaxed(_addr);          \
450                                                                         \
451                 EFSYS_PROBE3(bar_readq, unsigned int, (_offset),        \
452                                          uint32_t, (_eqp)->eq_u32[1],   \
453                                          uint32_t, (_eqp)->eq_u32[0]);  \
454                                                                         \
455                 SFC_BAR_UNLOCK(_esbp);                                  \
456                 _NOTE(CONSTANTCONDITION);                               \
457         } while (B_FALSE)
458
459 #define EFSYS_BAR_READO(_esbp, _offset, _eop, _lock)                    \
460         do {                                                            \
461                 volatile uint8_t *_base = (_esbp)->esb_base;            \
462                 volatile __m128i *_addr;                                \
463                                                                         \
464                 _NOTE(CONSTANTCONDITION);                               \
465                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
466                                                                         \
467                 _NOTE(CONSTANTCONDITION);                               \
468                 if (_lock)                                              \
469                         SFC_BAR_LOCK(_esbp);                            \
470                                                                         \
471                 _addr = (volatile __m128i *)(_base + (_offset));        \
472                 rte_rmb();                                              \
473                 /* There is no rte_read128_relaxed() yet */             \
474                 (_eop)->eo_u128[0] = _addr[0];                          \
475                                                                         \
476                 EFSYS_PROBE5(bar_reado, unsigned int, (_offset),        \
477                                          uint32_t, (_eop)->eo_u32[3],   \
478                                          uint32_t, (_eop)->eo_u32[2],   \
479                                          uint32_t, (_eop)->eo_u32[1],   \
480                                          uint32_t, (_eop)->eo_u32[0]);  \
481                                                                         \
482                 _NOTE(CONSTANTCONDITION);                               \
483                 if (_lock)                                              \
484                         SFC_BAR_UNLOCK(_esbp);                          \
485                 _NOTE(CONSTANTCONDITION);                               \
486         } while (B_FALSE)
487
488
489 #define EFSYS_BAR_WRITED(_esbp, _offset, _edp, _lock)                   \
490         do {                                                            \
491                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
492                 volatile uint32_t *_addr;                               \
493                                                                         \
494                 _NOTE(CONSTANTCONDITION);                               \
495                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
496                                                                         \
497                 _NOTE(CONSTANTCONDITION);                               \
498                 if (_lock)                                              \
499                         SFC_BAR_LOCK(_esbp);                            \
500                                                                         \
501                 EFSYS_PROBE2(bar_writed, unsigned int, (_offset),       \
502                                          uint32_t, (_edp)->ed_u32[0]);  \
503                                                                         \
504                 _addr = (volatile uint32_t *)(_base + (_offset));       \
505                 rte_write32_relaxed((_edp)->ed_u32[0], _addr);          \
506                 rte_wmb();                                              \
507                                                                         \
508                 _NOTE(CONSTANTCONDITION);                               \
509                 if (_lock)                                              \
510                         SFC_BAR_UNLOCK(_esbp);                          \
511                 _NOTE(CONSTANTCONDITION);                               \
512         } while (B_FALSE)
513
514 #define EFSYS_BAR_WRITEQ(_esbp, _offset, _eqp)                          \
515         do {                                                            \
516                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
517                 volatile uint64_t *_addr;                               \
518                                                                         \
519                 _NOTE(CONSTANTCONDITION);                               \
520                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
521                                                                         \
522                 SFC_BAR_LOCK(_esbp);                                    \
523                                                                         \
524                 EFSYS_PROBE3(bar_writeq, unsigned int, (_offset),       \
525                                          uint32_t, (_eqp)->eq_u32[1],   \
526                                          uint32_t, (_eqp)->eq_u32[0]);  \
527                                                                         \
528                 _addr = (volatile uint64_t *)(_base + (_offset));       \
529                 rte_write64_relaxed((_eqp)->eq_u64[0], _addr);          \
530                 rte_wmb();                                              \
531                                                                         \
532                 SFC_BAR_UNLOCK(_esbp);                                  \
533                 _NOTE(CONSTANTCONDITION);                               \
534         } while (B_FALSE)
535
536 /*
537  * Guarantees 64bit aligned 64bit writes to write combined BAR mapping
538  * (required by PIO hardware).
539  *
540  * Neither VFIO, nor UIO, nor NIC UIO (on FreeBSD) support
541  * write-combined memory mapped to user-land, so just abort if used.
542  */
543 #define EFSYS_BAR_WC_WRITEQ(_esbp, _offset, _eqp)                       \
544         do {                                                            \
545                 rte_panic("Write-combined BAR access not supported");   \
546         } while (B_FALSE)
547
548 #define EFSYS_BAR_WRITEO(_esbp, _offset, _eop, _lock)                   \
549         do {                                                            \
550                 volatile uint8_t *_base = (_esbp)->esb_base;            \
551                 volatile __m128i *_addr;                                \
552                                                                         \
553                 _NOTE(CONSTANTCONDITION);                               \
554                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
555                                                                         \
556                 _NOTE(CONSTANTCONDITION);                               \
557                 if (_lock)                                              \
558                         SFC_BAR_LOCK(_esbp);                            \
559                                                                         \
560                 EFSYS_PROBE5(bar_writeo, unsigned int, (_offset),       \
561                                          uint32_t, (_eop)->eo_u32[3],   \
562                                          uint32_t, (_eop)->eo_u32[2],   \
563                                          uint32_t, (_eop)->eo_u32[1],   \
564                                          uint32_t, (_eop)->eo_u32[0]);  \
565                                                                         \
566                 _addr = (volatile __m128i *)(_base + (_offset));        \
567                 /* There is no rte_write128_relaxed() yet */            \
568                 _addr[0] = (_eop)->eo_u128[0];                          \
569                 rte_wmb();                                              \
570                                                                         \
571                 _NOTE(CONSTANTCONDITION);                               \
572                 if (_lock)                                              \
573                         SFC_BAR_UNLOCK(_esbp);                          \
574                 _NOTE(CONSTANTCONDITION);                               \
575         } while (B_FALSE)
576
577 /* Use the standard octo-word write for doorbell writes */
578 #define EFSYS_BAR_DOORBELL_WRITEO(_esbp, _offset, _eop)                 \
579         do {                                                            \
580                 EFSYS_BAR_WRITEO((_esbp), (_offset), (_eop), B_FALSE);  \
581                 _NOTE(CONSTANTCONDITION);                               \
582         } while (B_FALSE)
583
584 /* SPIN */
585
586 #define EFSYS_SPIN(_us)                                                 \
587         do {                                                            \
588                 rte_delay_us(_us);                                      \
589                 _NOTE(CONSTANTCONDITION);                               \
590         } while (B_FALSE)
591
592 #define EFSYS_SLEEP EFSYS_SPIN
593
594 /* BARRIERS */
595
596 #define EFSYS_MEM_READ_BARRIER()        rte_rmb()
597 #define EFSYS_PIO_WRITE_BARRIER()       rte_io_wmb()
598
599 /* DMA SYNC */
600
601 /*
602  * DPDK does not provide any DMA syncing API, and no PMD drivers
603  * have any traces of explicit DMA syncing.
604  * DMA mapping is assumed to be coherent.
605  */
606
607 #define EFSYS_DMA_SYNC_FOR_KERNEL(_esmp, _offset, _size)        ((void)0)
608
609 /* Just avoid store and compiler (impliciltly) reordering */
610 #define EFSYS_DMA_SYNC_FOR_DEVICE(_esmp, _offset, _size)        rte_wmb()
611
612 /* TIMESTAMP */
613
614 typedef uint64_t efsys_timestamp_t;
615
616 #define EFSYS_TIMESTAMP(_usp)                                           \
617         do {                                                            \
618                 *(_usp) = rte_get_timer_cycles() * 1000000 /            \
619                         rte_get_timer_hz();                             \
620                 _NOTE(CONSTANTCONDITION);                               \
621         } while (B_FALSE)
622
623 /* KMEM */
624
625 #define EFSYS_KMEM_ALLOC(_esip, _size, _p)                              \
626         do {                                                            \
627                 (_esip) = (_esip);                                      \
628                 (_p) = rte_zmalloc("sfc", (_size), 0);                  \
629                 _NOTE(CONSTANTCONDITION);                               \
630         } while (B_FALSE)
631
632 #define EFSYS_KMEM_FREE(_esip, _size, _p)                               \
633         do {                                                            \
634                 (void)(_esip);                                          \
635                 (void)(_size);                                          \
636                 rte_free((_p));                                         \
637                 _NOTE(CONSTANTCONDITION);                               \
638         } while (B_FALSE)
639
640 /* LOCK */
641
642 typedef rte_spinlock_t efsys_lock_t;
643
644 #define SFC_EFSYS_LOCK_INIT(_eslp, _ifname, _label)     \
645         rte_spinlock_init((_eslp))
646 #define SFC_EFSYS_LOCK_DESTROY(_eslp) ((void)0)
647 #define SFC_EFSYS_LOCK(_eslp)                           \
648         rte_spinlock_lock((_eslp))
649 #define SFC_EFSYS_UNLOCK(_eslp)                         \
650         rte_spinlock_unlock((_eslp))
651 #define SFC_EFSYS_LOCK_ASSERT_OWNED(_eslp)              \
652         SFC_ASSERT(rte_spinlock_is_locked((_eslp)))
653
654 typedef int efsys_lock_state_t;
655
656 #define EFSYS_LOCK_MAGIC        0x000010c4
657
658 #define EFSYS_LOCK(_lockp, _state)                              \
659         do {                                                    \
660                 SFC_EFSYS_LOCK(_lockp);                         \
661                 (_state) = EFSYS_LOCK_MAGIC;                    \
662                 _NOTE(CONSTANTCONDITION);                       \
663         } while (B_FALSE)
664
665 #define EFSYS_UNLOCK(_lockp, _state)                            \
666         do {                                                    \
667                 SFC_ASSERT((_state) == EFSYS_LOCK_MAGIC);       \
668                 SFC_EFSYS_UNLOCK(_lockp);                       \
669                 _NOTE(CONSTANTCONDITION);                       \
670         } while (B_FALSE)
671
672 /* STAT */
673
674 typedef uint64_t        efsys_stat_t;
675
676 #define EFSYS_STAT_INCR(_knp, _delta)                           \
677         do {                                                    \
678                 *(_knp) += (_delta);                            \
679                 _NOTE(CONSTANTCONDITION);                       \
680         } while (B_FALSE)
681
682 #define EFSYS_STAT_DECR(_knp, _delta)                           \
683         do {                                                    \
684                 *(_knp) -= (_delta);                            \
685                 _NOTE(CONSTANTCONDITION);                       \
686         } while (B_FALSE)
687
688 #define EFSYS_STAT_SET(_knp, _val)                              \
689         do {                                                    \
690                 *(_knp) = (_val);                               \
691                 _NOTE(CONSTANTCONDITION);                       \
692         } while (B_FALSE)
693
694 #define EFSYS_STAT_SET_QWORD(_knp, _valp)                       \
695         do {                                                    \
696                 *(_knp) = rte_le_to_cpu_64((_valp)->eq_u64[0]); \
697                 _NOTE(CONSTANTCONDITION);                       \
698         } while (B_FALSE)
699
700 #define EFSYS_STAT_SET_DWORD(_knp, _valp)                       \
701         do {                                                    \
702                 *(_knp) = rte_le_to_cpu_32((_valp)->ed_u32[0]); \
703                 _NOTE(CONSTANTCONDITION);                       \
704         } while (B_FALSE)
705
706 #define EFSYS_STAT_INCR_QWORD(_knp, _valp)                              \
707         do {                                                            \
708                 *(_knp) += rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
709                 _NOTE(CONSTANTCONDITION);                               \
710         } while (B_FALSE)
711
712 #define EFSYS_STAT_SUBR_QWORD(_knp, _valp)                              \
713         do {                                                            \
714                 *(_knp) -= rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
715                 _NOTE(CONSTANTCONDITION);                               \
716         } while (B_FALSE)
717
718 /* ERR */
719
720 #if EFSYS_OPT_DECODE_INTR_FATAL
721 #define EFSYS_ERR(_esip, _code, _dword0, _dword1)                       \
722         do {                                                            \
723                 (void)(_esip);                                          \
724                 RTE_LOG(ERR, PMD, "FATAL ERROR #%u (0x%08x%08x)\n",     \
725                         (_code), (_dword0), (_dword1));                 \
726                 _NOTE(CONSTANTCONDITION);                               \
727         } while (B_FALSE)
728 #endif
729
730 /* ASSERT */
731
732 /* RTE_VERIFY from DPDK treats expressions with % operator incorrectly,
733  * so we re-implement it here
734  */
735 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
736 #define EFSYS_ASSERT(_exp)                                              \
737         do {                                                            \
738                 if (unlikely(!(_exp)))                                  \
739                         rte_panic("line %d\tassert \"%s\" failed\n",    \
740                                   __LINE__, (#_exp));                   \
741         } while (0)
742 #else
743 #define EFSYS_ASSERT(_exp)              (void)(_exp)
744 #endif
745
746 #define EFSYS_ASSERT3(_x, _op, _y, _t)  EFSYS_ASSERT((_t)(_x) _op (_t)(_y))
747
748 #define EFSYS_ASSERT3U(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uint64_t)
749 #define EFSYS_ASSERT3S(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, int64_t)
750 #define EFSYS_ASSERT3P(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uintptr_t)
751
752 /* ROTATE */
753
754 #define EFSYS_HAS_ROTL_DWORD    0
755
756 #ifdef __cplusplus
757 }
758 #endif
759
760 #endif  /* _SFC_COMMON_EFSYS_H */