drivers/net/sfc/efsys.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  * Copyright (c) 2016-2018 Solarflare Communications Inc.
   4  * All rights reserved.
   5  *
   6  * This software was jointly developed between OKTET Labs (under contract
   7  * for Solarflare) and Solarflare Communications, Inc.
   8  */
   9
  10 #ifndef _SFC_COMMON_EFSYS_H
  11 #define _SFC_COMMON_EFSYS_H
  12
  13 #include <stdbool.h>
  14
  15 #include <rte_spinlock.h>
  16 #include <rte_byteorder.h>
  17 #include <rte_debug.h>
  18 #include <rte_memzone.h>
  19 #include <rte_memory.h>
  20 #include <rte_memcpy.h>
  21 #include <rte_cycles.h>
  22 #include <rte_prefetch.h>
  23 #include <rte_common.h>
  24 #include <rte_malloc.h>
  25 #include <rte_log.h>
  26 #include <rte_io.h>
  27
  28 #include "sfc_debug.h"
  29
  30 #ifdef __cplusplus
  31 extern "C" {
  32 #endif
  33
  34 #define EFSYS_HAS_UINT64 1
  35 #define EFSYS_USE_UINT64 1
  36 #define EFSYS_HAS_SSE2_M128 1
  37
  38 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
  39 #define EFSYS_IS_BIG_ENDIAN 1
  40 #define EFSYS_IS_LITTLE_ENDIAN 0
  41 #elif RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
  42 #define EFSYS_IS_BIG_ENDIAN 0
  43 #define EFSYS_IS_LITTLE_ENDIAN 1
  44 #else
  45 #error "Cannot determine system endianness"
  46 #endif
  47 #include "efx_types.h"
  48
  49
  50 #ifndef _NOTE
  51 #define _NOTE(s)
  52 #endif
  53
  54 typedef bool boolean_t;
  55
  56 #ifndef B_FALSE
  57 #define B_FALSE false
  58 #endif
  59 #ifndef B_TRUE
  60 #define B_TRUE  true
  61 #endif
  62
  63 /*
  64  * RTE_MAX() and RTE_MIN() cannot be used since braced-group within
  65  * expression allowed only inside a function, but MAX() is used as
  66  * a number of elements in array.
  67  */
  68 #ifndef MAX
  69 #define MAX(v1, v2)     ((v1) > (v2) ? (v1) : (v2))
  70 #endif
  71 #ifndef MIN
  72 #define MIN(v1, v2)     ((v1) < (v2) ? (v1) : (v2))
  73 #endif
  74
  75 /* There are macros for alignment in DPDK, but we need to make a proper
  76  * correspondence here, if we want to re-use them at all
  77  */
  78 #ifndef IS_P2ALIGNED
  79 #define IS_P2ALIGNED(v, a)      ((((uintptr_t)(v)) & ((uintptr_t)(a) - 1)) == 0)
  80 #endif
  81
  82 #ifndef P2ROUNDUP
  83 #define P2ROUNDUP(x, align)     (-(-(x) & -(align)))
  84 #endif
  85
  86 #ifndef P2ALIGN
  87 #define P2ALIGN(_x, _a)         ((_x) & -(_a))
  88 #endif
  89
  90 #ifndef IS2P
  91 #define ISP2(x)                 rte_is_power_of_2(x)
  92 #endif
  93
  94 #define ENOTACTIVE      ENOTCONN
  95
  96 static inline void
  97 prefetch_read_many(const volatile void *addr)
  98 {
  99         rte_prefetch0(addr);
 100 }
 101
 102 static inline void
 103 prefetch_read_once(const volatile void *addr)
 104 {
 105         rte_prefetch_non_temporal(addr);
 106 }
 107
 108 /* Modifiers used for Windows builds */
 109 #define __in
 110 #define __in_opt
 111 #define __in_ecount(_n)
 112 #define __in_ecount_opt(_n)
 113 #define __in_bcount(_n)
 114 #define __in_bcount_opt(_n)
 115
 116 #define __out
 117 #define __out_opt
 118 #define __out_ecount(_n)
 119 #define __out_ecount_opt(_n)
 120 #define __out_bcount(_n)
 121 #define __out_bcount_opt(_n)
 122 #define __out_bcount_part(_n, _l)
 123 #define __out_bcount_part_opt(_n, _l)
 124
 125 #define __deref_out
 126
 127 #define __inout
 128 #define __inout_opt
 129 #define __inout_ecount(_n)
 130 #define __inout_ecount_opt(_n)
 131 #define __inout_bcount(_n)
 132 #define __inout_bcount_opt(_n)
 133 #define __inout_bcount_full_opt(_n)
 134
 135 #define __deref_out_bcount_opt(n)
 136
 137 #define __checkReturn
 138 #define __success(_x)
 139
 140 #define __drv_when(_p, _c)
 141
 142 /* Code inclusion options */
 143
 144
 145 #define EFSYS_OPT_NAMES 1
 146
 147 /* Disable SFN5xxx/SFN6xxx since it requires specific support in the PMD */
 148 #define EFSYS_OPT_SIENA 0
 149 /* Enable SFN7xxx support */
 150 #define EFSYS_OPT_HUNTINGTON 1
 151 /* Enable SFN8xxx support */
 152 #define EFSYS_OPT_MEDFORD 1
 153 /* Disable SFN2xxx support (not supported yet) */
 154 #define EFSYS_OPT_MEDFORD2 0
 155 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
 156 #define EFSYS_OPT_CHECK_REG 1
 157 #else
 158 #define EFSYS_OPT_CHECK_REG 0
 159 #endif
 160
 161 /* MCDI is required for SFN7xxx and SFN8xx */
 162 #define EFSYS_OPT_MCDI 1
 163 #define EFSYS_OPT_MCDI_LOGGING 1
 164 #define EFSYS_OPT_MCDI_PROXY_AUTH 1
 165
 166 #define EFSYS_OPT_MAC_STATS 1
 167
 168 #define EFSYS_OPT_LOOPBACK 0
 169
 170 #define EFSYS_OPT_MON_MCDI 0
 171 #define EFSYS_OPT_MON_STATS 0
 172
 173 #define EFSYS_OPT_PHY_STATS 0
 174 #define EFSYS_OPT_BIST 0
 175 #define EFSYS_OPT_PHY_LED_CONTROL 0
 176 #define EFSYS_OPT_PHY_FLAGS 0
 177
 178 #define EFSYS_OPT_VPD 0
 179 #define EFSYS_OPT_NVRAM 0
 180 #define EFSYS_OPT_BOOTCFG 0
 181 #define EFSYS_OPT_IMAGE_LAYOUT 0
 182
 183 #define EFSYS_OPT_DIAG 0
 184 #define EFSYS_OPT_RX_SCALE 1
 185 #define EFSYS_OPT_QSTATS 0
 186 /* Filters support is required for SFN7xxx and SFN8xx */
 187 #define EFSYS_OPT_FILTER 1
 188 #define EFSYS_OPT_RX_SCATTER 0
 189
 190 #define EFSYS_OPT_EV_PREFETCH 0
 191
 192 #define EFSYS_OPT_DECODE_INTR_FATAL 0
 193
 194 #define EFSYS_OPT_LICENSING 0
 195
 196 #define EFSYS_OPT_ALLOW_UNCONFIGURED_NIC 0
 197
 198 #define EFSYS_OPT_RX_PACKED_STREAM 0
 199
 200 #define EFSYS_OPT_TUNNEL 1
 201
 202 /* ID */
 203
 204 typedef struct __efsys_identifier_s efsys_identifier_t;
 205
 206
 207 #define EFSYS_PROBE(_name)                                              \
 208         do { } while (0)
 209
 210 #define EFSYS_PROBE1(_name, _type1, _arg1)                              \
 211         do { } while (0)
 212
 213 #define EFSYS_PROBE2(_name, _type1, _arg1, _type2, _arg2)               \
 214         do { } while (0)
 215
 216 #define EFSYS_PROBE3(_name, _type1, _arg1, _type2, _arg2,               \
 217                      _type3, _arg3)                                     \
 218         do { } while (0)
 219
 220 #define EFSYS_PROBE4(_name, _type1, _arg1, _type2, _arg2,               \
 221                      _type3, _arg3, _type4, _arg4)                      \
 222         do { } while (0)
 223
 224 #define EFSYS_PROBE5(_name, _type1, _arg1, _type2, _arg2,               \
 225                      _type3, _arg3, _type4, _arg4, _type5, _arg5)       \
 226         do { } while (0)
 227
 228 #define EFSYS_PROBE6(_name, _type1, _arg1, _type2, _arg2,               \
 229                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
 230                      _type6, _arg6)                                     \
 231         do { } while (0)
 232
 233 #define EFSYS_PROBE7(_name, _type1, _arg1, _type2, _arg2,               \
 234                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
 235                      _type6, _arg6, _type7, _arg7)                      \
 236         do { } while (0)
 237
 238
 239 /* DMA */
 240
 241 typedef rte_iova_t efsys_dma_addr_t;
 242
 243 typedef struct efsys_mem_s {
 244         const struct rte_memzone        *esm_mz;
 245         /*
 246          * Ideally it should have volatile qualifier to denote that
 247          * the memory may be updated by someone else. However, it adds
 248          * qualifier discard warnings when the pointer or its derivative
 249          * is passed to memset() or rte_mov16().
 250          * So, skip the qualifier here, but make sure that it is added
 251          * below in access macros.
 252          */
 253         void                            *esm_base;
 254         efsys_dma_addr_t                esm_addr;
 255 } efsys_mem_t;
 256
 257
 258 #define EFSYS_MEM_ZERO(_esmp, _size)                                    \
 259         do {                                                            \
 260                 (void)memset((void *)(_esmp)->esm_base, 0, (_size));    \
 261                                                                         \
 262                 _NOTE(CONSTANTCONDITION);                               \
 263         } while (B_FALSE)
 264
 265 #define EFSYS_MEM_READD(_esmp, _offset, _edp)                           \
 266         do {                                                            \
 267                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 268                 volatile uint32_t *_addr;                               \
 269                                                                         \
 270                 _NOTE(CONSTANTCONDITION);                               \
 271                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
 272                                                                         \
 273                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 274                 (_edp)->ed_u32[0] = _addr[0];                           \
 275                                                                         \
 276                 EFSYS_PROBE2(mem_readl, unsigned int, (_offset),        \
 277                                          uint32_t, (_edp)->ed_u32[0]);  \
 278                                                                         \
 279                 _NOTE(CONSTANTCONDITION);                               \
 280         } while (B_FALSE)
 281
 282 #define EFSYS_MEM_READQ(_esmp, _offset, _eqp)                           \
 283         do {                                                            \
 284                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 285                 volatile uint64_t *_addr;                               \
 286                                                                         \
 287                 _NOTE(CONSTANTCONDITION);                               \
 288                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
 289                                                                         \
 290                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 291                 (_eqp)->eq_u64[0] = _addr[0];                           \
 292                                                                         \
 293                 EFSYS_PROBE3(mem_readq, unsigned int, (_offset),        \
 294                                          uint32_t, (_eqp)->eq_u32[1],   \
 295                                          uint32_t, (_eqp)->eq_u32[0]);  \
 296                                                                         \
 297                 _NOTE(CONSTANTCONDITION);                               \
 298         } while (B_FALSE)
 299
 300 #define EFSYS_MEM_READO(_esmp, _offset, _eop)                           \
 301         do {                                                            \
 302                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 303                 volatile __m128i *_addr;                                \
 304                                                                         \
 305                 _NOTE(CONSTANTCONDITION);                               \
 306                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
 307                                                                         \
 308                 _addr = (volatile __m128i *)(_base + (_offset));        \
 309                 (_eop)->eo_u128[0] = _addr[0];                          \
 310                                                                         \
 311                 EFSYS_PROBE5(mem_reado, unsigned int, (_offset),        \
 312                                          uint32_t, (_eop)->eo_u32[3],   \
 313                                          uint32_t, (_eop)->eo_u32[2],   \
 314                                          uint32_t, (_eop)->eo_u32[1],   \
 315                                          uint32_t, (_eop)->eo_u32[0]);  \
 316                                                                         \
 317                 _NOTE(CONSTANTCONDITION);                               \
 318         } while (B_FALSE)
 319
 320
 321 #define EFSYS_MEM_WRITED(_esmp, _offset, _edp)                          \
 322         do {                                                            \
 323                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 324                 volatile uint32_t *_addr;                               \
 325                                                                         \
 326                 _NOTE(CONSTANTCONDITION);                               \
 327                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
 328                                                                         \
 329                 EFSYS_PROBE2(mem_writed, unsigned int, (_offset),       \
 330                                          uint32_t, (_edp)->ed_u32[0]);  \
 331                                                                         \
 332                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 333                 _addr[0] = (_edp)->ed_u32[0];                           \
 334                                                                         \
 335                 _NOTE(CONSTANTCONDITION);                               \
 336         } while (B_FALSE)
 337
 338 #define EFSYS_MEM_WRITEQ(_esmp, _offset, _eqp)                          \
 339         do {                                                            \
 340                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 341                 volatile uint64_t *_addr;                               \
 342                                                                         \
 343                 _NOTE(CONSTANTCONDITION);                               \
 344                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
 345                                                                         \
 346                 EFSYS_PROBE3(mem_writeq, unsigned int, (_offset),       \
 347                                          uint32_t, (_eqp)->eq_u32[1],   \
 348                                          uint32_t, (_eqp)->eq_u32[0]);  \
 349                                                                         \
 350                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 351                 _addr[0] = (_eqp)->eq_u64[0];                           \
 352                                                                         \
 353                 _NOTE(CONSTANTCONDITION);                               \
 354         } while (B_FALSE)
 355
 356 #define EFSYS_MEM_WRITEO(_esmp, _offset, _eop)                          \
 357         do {                                                            \
 358                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 359                 volatile __m128i *_addr;                                \
 360                                                                         \
 361                 _NOTE(CONSTANTCONDITION);                               \
 362                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
 363                                                                         \
 364                                                                         \
 365                 EFSYS_PROBE5(mem_writeo, unsigned int, (_offset),       \
 366                                          uint32_t, (_eop)->eo_u32[3],   \
 367                                          uint32_t, (_eop)->eo_u32[2],   \
 368                                          uint32_t, (_eop)->eo_u32[1],   \
 369                                          uint32_t, (_eop)->eo_u32[0]);  \
 370                                                                         \
 371                 _addr = (volatile __m128i *)(_base + (_offset));        \
 372                 _addr[0] = (_eop)->eo_u128[0];                          \
 373                                                                         \
 374                 _NOTE(CONSTANTCONDITION);                               \
 375         } while (B_FALSE)
 376
 377
 378 #define EFSYS_MEM_SIZE(_esmp)                                           \
 379         ((_esmp)->esm_mz->len)
 380
 381 #define EFSYS_MEM_ADDR(_esmp)                                           \
 382         ((_esmp)->esm_addr)
 383
 384 #define EFSYS_MEM_IS_NULL(_esmp)                                        \
 385         ((_esmp)->esm_base == NULL)
 386
 387 #define EFSYS_MEM_PREFETCH(_esmp, _offset)                              \
 388         do {                                                            \
 389                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 390                                                                         \
 391                 rte_prefetch0(_base + (_offset));                       \
 392         } while (0)
 393
 394
 395 /* BAR */
 396
 397 typedef struct efsys_bar_s {
 398         rte_spinlock_t          esb_lock;
 399         int                     esb_rid;
 400         struct rte_pci_device   *esb_dev;
 401         /*
 402          * Ideally it should have volatile qualifier to denote that
 403          * the memory may be updated by someone else. However, it adds
 404          * qualifier discard warnings when the pointer or its derivative
 405          * is passed to memset() or rte_mov16().
 406          * So, skip the qualifier here, but make sure that it is added
 407          * below in access macros.
 408          */
 409         void                    *esb_base;
 410 } efsys_bar_t;
 411
 412 #define SFC_BAR_LOCK_INIT(_esbp, _ifname)                               \
 413         do {                                                            \
 414                 rte_spinlock_init(&(_esbp)->esb_lock);                  \
 415                 _NOTE(CONSTANTCONDITION);                               \
 416         } while (B_FALSE)
 417 #define SFC_BAR_LOCK_DESTROY(_esbp)     ((void)0)
 418 #define SFC_BAR_LOCK(_esbp)             rte_spinlock_lock(&(_esbp)->esb_lock)
 419 #define SFC_BAR_UNLOCK(_esbp)           rte_spinlock_unlock(&(_esbp)->esb_lock)
 420
 421 #define EFSYS_BAR_READD(_esbp, _offset, _edp, _lock)                    \
 422         do {                                                            \
 423                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 424                 volatile uint32_t *_addr;                               \
 425                                                                         \
 426                 _NOTE(CONSTANTCONDITION);                               \
 427                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
 428                 _NOTE(CONSTANTCONDITION);                               \
 429                 if (_lock)                                              \
 430                         SFC_BAR_LOCK(_esbp);                            \
 431                                                                         \
 432                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 433                 rte_rmb();                                              \
 434                 (_edp)->ed_u32[0] = rte_read32_relaxed(_addr);          \
 435                                                                         \
 436                 EFSYS_PROBE2(bar_readd, unsigned int, (_offset),        \
 437                                          uint32_t, (_edp)->ed_u32[0]);  \
 438                                                                         \
 439                 _NOTE(CONSTANTCONDITION);                               \
 440                 if (_lock)                                              \
 441                         SFC_BAR_UNLOCK(_esbp);                          \
 442                 _NOTE(CONSTANTCONDITION);                               \
 443         } while (B_FALSE)
 444
 445 #define EFSYS_BAR_READQ(_esbp, _offset, _eqp)                           \
 446         do {                                                            \
 447                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 448                 volatile uint64_t *_addr;                               \
 449                                                                         \
 450                 _NOTE(CONSTANTCONDITION);                               \
 451                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
 452                                                                         \
 453                 SFC_BAR_LOCK(_esbp);                                    \
 454                                                                         \
 455                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 456                 rte_rmb();                                              \
 457                 (_eqp)->eq_u64[0] = rte_read64_relaxed(_addr);          \
 458                                                                         \
 459                 EFSYS_PROBE3(bar_readq, unsigned int, (_offset),        \
 460                                          uint32_t, (_eqp)->eq_u32[1],   \
 461                                          uint32_t, (_eqp)->eq_u32[0]);  \
 462                                                                         \
 463                 SFC_BAR_UNLOCK(_esbp);                                  \
 464                 _NOTE(CONSTANTCONDITION);                               \
 465         } while (B_FALSE)
 466
 467 #define EFSYS_BAR_READO(_esbp, _offset, _eop, _lock)                    \
 468         do {                                                            \
 469                 volatile uint8_t *_base = (_esbp)->esb_base;            \
 470                 volatile __m128i *_addr;                                \
 471                                                                         \
 472                 _NOTE(CONSTANTCONDITION);                               \
 473                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
 474                                                                         \
 475                 _NOTE(CONSTANTCONDITION);                               \
 476                 if (_lock)                                              \
 477                         SFC_BAR_LOCK(_esbp);                            \
 478                                                                         \
 479                 _addr = (volatile __m128i *)(_base + (_offset));        \
 480                 rte_rmb();                                              \
 481                 /* There is no rte_read128_relaxed() yet */             \
 482                 (_eop)->eo_u128[0] = _addr[0];                          \
 483                                                                         \
 484                 EFSYS_PROBE5(bar_reado, unsigned int, (_offset),        \
 485                                          uint32_t, (_eop)->eo_u32[3],   \
 486                                          uint32_t, (_eop)->eo_u32[2],   \
 487                                          uint32_t, (_eop)->eo_u32[1],   \
 488                                          uint32_t, (_eop)->eo_u32[0]);  \
 489                                                                         \
 490                 _NOTE(CONSTANTCONDITION);                               \
 491                 if (_lock)                                              \
 492                         SFC_BAR_UNLOCK(_esbp);                          \
 493                 _NOTE(CONSTANTCONDITION);                               \
 494         } while (B_FALSE)
 495
 496
 497 #define EFSYS_BAR_WRITED(_esbp, _offset, _edp, _lock)                   \
 498         do {                                                            \
 499                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 500                 volatile uint32_t *_addr;                               \
 501                                                                         \
 502                 _NOTE(CONSTANTCONDITION);                               \
 503                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
 504                                                                         \
 505                 _NOTE(CONSTANTCONDITION);                               \
 506                 if (_lock)                                              \
 507                         SFC_BAR_LOCK(_esbp);                            \
 508                                                                         \
 509                 EFSYS_PROBE2(bar_writed, unsigned int, (_offset),       \
 510                                          uint32_t, (_edp)->ed_u32[0]);  \
 511                                                                         \
 512                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 513                 rte_write32_relaxed((_edp)->ed_u32[0], _addr);          \
 514                 rte_wmb();                                              \
 515                                                                         \
 516                 _NOTE(CONSTANTCONDITION);                               \
 517                 if (_lock)                                              \
 518                         SFC_BAR_UNLOCK(_esbp);                          \
 519                 _NOTE(CONSTANTCONDITION);                               \
 520         } while (B_FALSE)
 521
 522 #define EFSYS_BAR_WRITEQ(_esbp, _offset, _eqp)                          \
 523         do {                                                            \
 524                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 525                 volatile uint64_t *_addr;                               \
 526                                                                         \
 527                 _NOTE(CONSTANTCONDITION);                               \
 528                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
 529                                                                         \
 530                 SFC_BAR_LOCK(_esbp);                                    \
 531                                                                         \
 532                 EFSYS_PROBE3(bar_writeq, unsigned int, (_offset),       \
 533                                          uint32_t, (_eqp)->eq_u32[1],   \
 534                                          uint32_t, (_eqp)->eq_u32[0]);  \
 535                                                                         \
 536                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 537                 rte_write64_relaxed((_eqp)->eq_u64[0], _addr);          \
 538                 rte_wmb();                                              \
 539                                                                         \
 540                 SFC_BAR_UNLOCK(_esbp);                                  \
 541                 _NOTE(CONSTANTCONDITION);                               \
 542         } while (B_FALSE)
 543
 544 /*
 545  * Guarantees 64bit aligned 64bit writes to write combined BAR mapping
 546  * (required by PIO hardware).
 547  *
 548  * Neither VFIO, nor UIO, nor NIC UIO (on FreeBSD) support
 549  * write-combined memory mapped to user-land, so just abort if used.
 550  */
 551 #define EFSYS_BAR_WC_WRITEQ(_esbp, _offset, _eqp)                       \
 552         do {                                                            \
 553                 rte_panic("Write-combined BAR access not supported");   \
 554         } while (B_FALSE)
 555
 556 #define EFSYS_BAR_WRITEO(_esbp, _offset, _eop, _lock)                   \
 557         do {                                                            \
 558                 volatile uint8_t *_base = (_esbp)->esb_base;            \
 559                 volatile __m128i *_addr;                                \
 560                                                                         \
 561                 _NOTE(CONSTANTCONDITION);                               \
 562                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
 563                                                                         \
 564                 _NOTE(CONSTANTCONDITION);                               \
 565                 if (_lock)                                              \
 566                         SFC_BAR_LOCK(_esbp);                            \
 567                                                                         \
 568                 EFSYS_PROBE5(bar_writeo, unsigned int, (_offset),       \
 569                                          uint32_t, (_eop)->eo_u32[3],   \
 570                                          uint32_t, (_eop)->eo_u32[2],   \
 571                                          uint32_t, (_eop)->eo_u32[1],   \
 572                                          uint32_t, (_eop)->eo_u32[0]);  \
 573                                                                         \
 574                 _addr = (volatile __m128i *)(_base + (_offset));        \
 575                 /* There is no rte_write128_relaxed() yet */            \
 576                 _addr[0] = (_eop)->eo_u128[0];                          \
 577                 rte_wmb();                                              \
 578                                                                         \
 579                 _NOTE(CONSTANTCONDITION);                               \
 580                 if (_lock)                                              \
 581                         SFC_BAR_UNLOCK(_esbp);                          \
 582                 _NOTE(CONSTANTCONDITION);                               \
 583         } while (B_FALSE)
 584
 585 /* Use the standard octo-word write for doorbell writes */
 586 #define EFSYS_BAR_DOORBELL_WRITEO(_esbp, _offset, _eop)                 \
 587         do {                                                            \
 588                 EFSYS_BAR_WRITEO((_esbp), (_offset), (_eop), B_FALSE);  \
 589                 _NOTE(CONSTANTCONDITION);                               \
 590         } while (B_FALSE)
 591
 592 /* SPIN */
 593
 594 #define EFSYS_SPIN(_us)                                                 \
 595         do {                                                            \
 596                 rte_delay_us(_us);                                      \
 597                 _NOTE(CONSTANTCONDITION);                               \
 598         } while (B_FALSE)
 599
 600 #define EFSYS_SLEEP EFSYS_SPIN
 601
 602 /* BARRIERS */
 603
 604 #define EFSYS_MEM_READ_BARRIER()        rte_rmb()
 605 #define EFSYS_PIO_WRITE_BARRIER()       rte_io_wmb()
 606
 607 /* DMA SYNC */
 608
 609 /*
 610  * DPDK does not provide any DMA syncing API, and no PMD drivers
 611  * have any traces of explicit DMA syncing.
 612  * DMA mapping is assumed to be coherent.
 613  */
 614
 615 #define EFSYS_DMA_SYNC_FOR_KERNEL(_esmp, _offset, _size)        ((void)0)
 616
 617 /* Just avoid store and compiler (impliciltly) reordering */
 618 #define EFSYS_DMA_SYNC_FOR_DEVICE(_esmp, _offset, _size)        rte_wmb()
 619
 620 /* TIMESTAMP */
 621
 622 typedef uint64_t efsys_timestamp_t;
 623
 624 #define EFSYS_TIMESTAMP(_usp)                                           \
 625         do {                                                            \
 626                 *(_usp) = rte_get_timer_cycles() * 1000000 /            \
 627                         rte_get_timer_hz();                             \
 628                 _NOTE(CONSTANTCONDITION);                               \
 629         } while (B_FALSE)
 630
 631 /* KMEM */
 632
 633 #define EFSYS_KMEM_ALLOC(_esip, _size, _p)                              \
 634         do {                                                            \
 635                 (_esip) = (_esip);                                      \
 636                 (_p) = rte_zmalloc("sfc", (_size), 0);                  \
 637                 _NOTE(CONSTANTCONDITION);                               \
 638         } while (B_FALSE)
 639
 640 #define EFSYS_KMEM_FREE(_esip, _size, _p)                               \
 641         do {                                                            \
 642                 (void)(_esip);                                          \
 643                 (void)(_size);                                          \
 644                 rte_free((_p));                                         \
 645                 _NOTE(CONSTANTCONDITION);                               \
 646         } while (B_FALSE)
 647
 648 /* LOCK */
 649
 650 typedef rte_spinlock_t efsys_lock_t;
 651
 652 #define SFC_EFSYS_LOCK_INIT(_eslp, _ifname, _label)     \
 653         rte_spinlock_init((_eslp))
 654 #define SFC_EFSYS_LOCK_DESTROY(_eslp) ((void)0)
 655 #define SFC_EFSYS_LOCK(_eslp)                           \
 656         rte_spinlock_lock((_eslp))
 657 #define SFC_EFSYS_UNLOCK(_eslp)                         \
 658         rte_spinlock_unlock((_eslp))
 659 #define SFC_EFSYS_LOCK_ASSERT_OWNED(_eslp)              \
 660         SFC_ASSERT(rte_spinlock_is_locked((_eslp)))
 661
 662 typedef int efsys_lock_state_t;
 663
 664 #define EFSYS_LOCK_MAGIC        0x000010c4
 665
 666 #define EFSYS_LOCK(_lockp, _state)                              \
 667         do {                                                    \
 668                 SFC_EFSYS_LOCK(_lockp);                         \
 669                 (_state) = EFSYS_LOCK_MAGIC;                    \
 670                 _NOTE(CONSTANTCONDITION);                       \
 671         } while (B_FALSE)
 672
 673 #define EFSYS_UNLOCK(_lockp, _state)                            \
 674         do {                                                    \
 675                 SFC_ASSERT((_state) == EFSYS_LOCK_MAGIC);       \
 676                 SFC_EFSYS_UNLOCK(_lockp);                       \
 677                 _NOTE(CONSTANTCONDITION);                       \
 678         } while (B_FALSE)
 679
 680 /* STAT */
 681
 682 typedef uint64_t        efsys_stat_t;
 683
 684 #define EFSYS_STAT_INCR(_knp, _delta)                           \
 685         do {                                                    \
 686                 *(_knp) += (_delta);                            \
 687                 _NOTE(CONSTANTCONDITION);                       \
 688         } while (B_FALSE)
 689
 690 #define EFSYS_STAT_DECR(_knp, _delta)                           \
 691         do {                                                    \
 692                 *(_knp) -= (_delta);                            \
 693                 _NOTE(CONSTANTCONDITION);                       \
 694         } while (B_FALSE)
 695
 696 #define EFSYS_STAT_SET(_knp, _val)                              \
 697         do {                                                    \
 698                 *(_knp) = (_val);                               \
 699                 _NOTE(CONSTANTCONDITION);                       \
 700         } while (B_FALSE)
 701
 702 #define EFSYS_STAT_SET_QWORD(_knp, _valp)                       \
 703         do {                                                    \
 704                 *(_knp) = rte_le_to_cpu_64((_valp)->eq_u64[0]); \
 705                 _NOTE(CONSTANTCONDITION);                       \
 706         } while (B_FALSE)
 707
 708 #define EFSYS_STAT_SET_DWORD(_knp, _valp)                       \
 709         do {                                                    \
 710                 *(_knp) = rte_le_to_cpu_32((_valp)->ed_u32[0]); \
 711                 _NOTE(CONSTANTCONDITION);                       \
 712         } while (B_FALSE)
 713
 714 #define EFSYS_STAT_INCR_QWORD(_knp, _valp)                              \
 715         do {                                                            \
 716                 *(_knp) += rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
 717                 _NOTE(CONSTANTCONDITION);                               \
 718         } while (B_FALSE)
 719
 720 #define EFSYS_STAT_SUBR_QWORD(_knp, _valp)                              \
 721         do {                                                            \
 722                 *(_knp) -= rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
 723                 _NOTE(CONSTANTCONDITION);                               \
 724         } while (B_FALSE)
 725
 726 /* ERR */
 727
 728 #if EFSYS_OPT_DECODE_INTR_FATAL
 729 #define EFSYS_ERR(_esip, _code, _dword0, _dword1)                       \
 730         do {                                                            \
 731                 (void)(_esip);                                          \
 732                 RTE_LOG(ERR, PMD, "FATAL ERROR #%u (0x%08x%08x)\n",     \
 733                         (_code), (_dword0), (_dword1));                 \
 734                 _NOTE(CONSTANTCONDITION);                               \
 735         } while (B_FALSE)
 736 #endif
 737
 738 /* ASSERT */
 739
 740 /* RTE_VERIFY from DPDK treats expressions with % operator incorrectly,
 741  * so we re-implement it here
 742  */
 743 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
 744 #define EFSYS_ASSERT(_exp)                                              \
 745         do {                                                            \
 746                 if (unlikely(!(_exp)))                                  \
 747                         rte_panic("line %d\tassert \"%s\" failed\n",    \
 748                                   __LINE__, (#_exp));                   \
 749         } while (0)
 750 #else
 751 #define EFSYS_ASSERT(_exp)              (void)(_exp)
 752 #endif
 753
 754 #define EFSYS_ASSERT3(_x, _op, _y, _t)  EFSYS_ASSERT((_t)(_x) _op (_t)(_y))
 755
 756 #define EFSYS_ASSERT3U(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uint64_t)
 757 #define EFSYS_ASSERT3S(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, int64_t)
 758 #define EFSYS_ASSERT3P(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uintptr_t)
 759
 760 /* ROTATE */
 761
 762 #define EFSYS_HAS_ROTL_DWORD    0
 763
 764 #ifdef __cplusplus
 765 }
 766 #endif
 767
 768 #endif  /* _SFC_COMMON_EFSYS_H */