1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016-2018 Solarflare Communications Inc.
6 * This software was jointly developed between OKTET Labs (under contract
7 * for Solarflare) and Solarflare Communications, Inc.
10 #ifndef _SFC_COMMON_EFSYS_H
11 #define _SFC_COMMON_EFSYS_H
15 #include <rte_spinlock.h>
16 #include <rte_byteorder.h>
17 #include <rte_debug.h>
18 #include <rte_memzone.h>
19 #include <rte_memory.h>
20 #include <rte_memcpy.h>
21 #include <rte_cycles.h>
22 #include <rte_prefetch.h>
23 #include <rte_common.h>
24 #include <rte_malloc.h>
28 #include "sfc_debug.h"
34 #define EFSYS_HAS_UINT64 1
35 #define EFSYS_USE_UINT64 1
36 #define EFSYS_HAS_SSE2_M128 1
38 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
39 #define EFSYS_IS_BIG_ENDIAN 1
40 #define EFSYS_IS_LITTLE_ENDIAN 0
41 #elif RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
42 #define EFSYS_IS_BIG_ENDIAN 0
43 #define EFSYS_IS_LITTLE_ENDIAN 1
45 #error "Cannot determine system endianness"
47 #include "efx_types.h"
54 typedef bool boolean_t;
64 * RTE_MAX() and RTE_MIN() cannot be used since braced-group within
65 * expression allowed only inside a function, but MAX() is used as
66 * a number of elements in array.
69 #define MAX(v1, v2) ((v1) > (v2) ? (v1) : (v2))
72 #define MIN(v1, v2) ((v1) < (v2) ? (v1) : (v2))
75 /* There are macros for alignment in DPDK, but we need to make a proper
76 * correspondence here, if we want to re-use them at all
79 #define IS_P2ALIGNED(v, a) ((((uintptr_t)(v)) & ((uintptr_t)(a) - 1)) == 0)
83 #define P2ROUNDUP(x, align) (-(-(x) & -(align)))
87 #define P2ALIGN(_x, _a) ((_x) & -(_a))
91 #define ISP2(x) rte_is_power_of_2(x)
94 #define ENOTACTIVE ENOTCONN
97 prefetch_read_many(const volatile void *addr)
103 prefetch_read_once(const volatile void *addr)
105 rte_prefetch_non_temporal(addr);
108 /* Modifiers used for Windows builds */
111 #define __in_ecount(_n)
112 #define __in_ecount_opt(_n)
113 #define __in_bcount(_n)
114 #define __in_bcount_opt(_n)
118 #define __out_ecount(_n)
119 #define __out_ecount_opt(_n)
120 #define __out_bcount(_n)
121 #define __out_bcount_opt(_n)
122 #define __out_bcount_part(_n, _l)
123 #define __out_bcount_part_opt(_n, _l)
129 #define __inout_ecount(_n)
130 #define __inout_ecount_opt(_n)
131 #define __inout_bcount(_n)
132 #define __inout_bcount_opt(_n)
133 #define __inout_bcount_full_opt(_n)
135 #define __deref_out_bcount_opt(n)
137 #define __checkReturn
138 #define __success(_x)
140 #define __drv_when(_p, _c)
142 /* Code inclusion options */
145 #define EFSYS_OPT_NAMES 1
147 /* Disable SFN5xxx/SFN6xxx since it requires specific support in the PMD */
148 #define EFSYS_OPT_SIENA 0
149 /* Enable SFN7xxx support */
150 #define EFSYS_OPT_HUNTINGTON 1
151 /* Enable SFN8xxx support */
152 #define EFSYS_OPT_MEDFORD 1
153 /* Disable SFN2xxx support (not supported yet) */
154 #define EFSYS_OPT_MEDFORD2 0
155 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
156 #define EFSYS_OPT_CHECK_REG 1
158 #define EFSYS_OPT_CHECK_REG 0
161 /* MCDI is required for SFN7xxx and SFN8xx */
162 #define EFSYS_OPT_MCDI 1
163 #define EFSYS_OPT_MCDI_LOGGING 1
164 #define EFSYS_OPT_MCDI_PROXY_AUTH 1
166 #define EFSYS_OPT_MAC_STATS 1
168 #define EFSYS_OPT_LOOPBACK 0
170 #define EFSYS_OPT_MON_MCDI 0
171 #define EFSYS_OPT_MON_STATS 0
173 #define EFSYS_OPT_PHY_STATS 0
174 #define EFSYS_OPT_BIST 0
175 #define EFSYS_OPT_PHY_LED_CONTROL 0
176 #define EFSYS_OPT_PHY_FLAGS 0
178 #define EFSYS_OPT_VPD 0
179 #define EFSYS_OPT_NVRAM 0
180 #define EFSYS_OPT_BOOTCFG 0
181 #define EFSYS_OPT_IMAGE_LAYOUT 0
183 #define EFSYS_OPT_DIAG 0
184 #define EFSYS_OPT_RX_SCALE 1
185 #define EFSYS_OPT_QSTATS 0
186 /* Filters support is required for SFN7xxx and SFN8xx */
187 #define EFSYS_OPT_FILTER 1
188 #define EFSYS_OPT_RX_SCATTER 0
190 #define EFSYS_OPT_EV_PREFETCH 0
192 #define EFSYS_OPT_DECODE_INTR_FATAL 0
194 #define EFSYS_OPT_LICENSING 0
196 #define EFSYS_OPT_ALLOW_UNCONFIGURED_NIC 0
198 #define EFSYS_OPT_RX_PACKED_STREAM 0
200 #define EFSYS_OPT_TUNNEL 1
204 typedef struct __efsys_identifier_s efsys_identifier_t;
207 #define EFSYS_PROBE(_name) \
210 #define EFSYS_PROBE1(_name, _type1, _arg1) \
213 #define EFSYS_PROBE2(_name, _type1, _arg1, _type2, _arg2) \
216 #define EFSYS_PROBE3(_name, _type1, _arg1, _type2, _arg2, \
220 #define EFSYS_PROBE4(_name, _type1, _arg1, _type2, _arg2, \
221 _type3, _arg3, _type4, _arg4) \
224 #define EFSYS_PROBE5(_name, _type1, _arg1, _type2, _arg2, \
225 _type3, _arg3, _type4, _arg4, _type5, _arg5) \
228 #define EFSYS_PROBE6(_name, _type1, _arg1, _type2, _arg2, \
229 _type3, _arg3, _type4, _arg4, _type5, _arg5, \
233 #define EFSYS_PROBE7(_name, _type1, _arg1, _type2, _arg2, \
234 _type3, _arg3, _type4, _arg4, _type5, _arg5, \
235 _type6, _arg6, _type7, _arg7) \
241 typedef rte_iova_t efsys_dma_addr_t;
243 typedef struct efsys_mem_s {
244 const struct rte_memzone *esm_mz;
246 * Ideally it should have volatile qualifier to denote that
247 * the memory may be updated by someone else. However, it adds
248 * qualifier discard warnings when the pointer or its derivative
249 * is passed to memset() or rte_mov16().
250 * So, skip the qualifier here, but make sure that it is added
251 * below in access macros.
254 efsys_dma_addr_t esm_addr;
258 #define EFSYS_MEM_ZERO(_esmp, _size) \
260 (void)memset((void *)(_esmp)->esm_base, 0, (_size)); \
262 _NOTE(CONSTANTCONDITION); \
265 #define EFSYS_MEM_READD(_esmp, _offset, _edp) \
267 volatile uint8_t *_base = (_esmp)->esm_base; \
268 volatile uint32_t *_addr; \
270 _NOTE(CONSTANTCONDITION); \
271 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
273 _addr = (volatile uint32_t *)(_base + (_offset)); \
274 (_edp)->ed_u32[0] = _addr[0]; \
276 EFSYS_PROBE2(mem_readl, unsigned int, (_offset), \
277 uint32_t, (_edp)->ed_u32[0]); \
279 _NOTE(CONSTANTCONDITION); \
282 #define EFSYS_MEM_READQ(_esmp, _offset, _eqp) \
284 volatile uint8_t *_base = (_esmp)->esm_base; \
285 volatile uint64_t *_addr; \
287 _NOTE(CONSTANTCONDITION); \
288 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
290 _addr = (volatile uint64_t *)(_base + (_offset)); \
291 (_eqp)->eq_u64[0] = _addr[0]; \
293 EFSYS_PROBE3(mem_readq, unsigned int, (_offset), \
294 uint32_t, (_eqp)->eq_u32[1], \
295 uint32_t, (_eqp)->eq_u32[0]); \
297 _NOTE(CONSTANTCONDITION); \
300 #define EFSYS_MEM_READO(_esmp, _offset, _eop) \
302 volatile uint8_t *_base = (_esmp)->esm_base; \
303 volatile __m128i *_addr; \
305 _NOTE(CONSTANTCONDITION); \
306 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
308 _addr = (volatile __m128i *)(_base + (_offset)); \
309 (_eop)->eo_u128[0] = _addr[0]; \
311 EFSYS_PROBE5(mem_reado, unsigned int, (_offset), \
312 uint32_t, (_eop)->eo_u32[3], \
313 uint32_t, (_eop)->eo_u32[2], \
314 uint32_t, (_eop)->eo_u32[1], \
315 uint32_t, (_eop)->eo_u32[0]); \
317 _NOTE(CONSTANTCONDITION); \
321 #define EFSYS_MEM_WRITED(_esmp, _offset, _edp) \
323 volatile uint8_t *_base = (_esmp)->esm_base; \
324 volatile uint32_t *_addr; \
326 _NOTE(CONSTANTCONDITION); \
327 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
329 EFSYS_PROBE2(mem_writed, unsigned int, (_offset), \
330 uint32_t, (_edp)->ed_u32[0]); \
332 _addr = (volatile uint32_t *)(_base + (_offset)); \
333 _addr[0] = (_edp)->ed_u32[0]; \
335 _NOTE(CONSTANTCONDITION); \
338 #define EFSYS_MEM_WRITEQ(_esmp, _offset, _eqp) \
340 volatile uint8_t *_base = (_esmp)->esm_base; \
341 volatile uint64_t *_addr; \
343 _NOTE(CONSTANTCONDITION); \
344 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
346 EFSYS_PROBE3(mem_writeq, unsigned int, (_offset), \
347 uint32_t, (_eqp)->eq_u32[1], \
348 uint32_t, (_eqp)->eq_u32[0]); \
350 _addr = (volatile uint64_t *)(_base + (_offset)); \
351 _addr[0] = (_eqp)->eq_u64[0]; \
353 _NOTE(CONSTANTCONDITION); \
356 #define EFSYS_MEM_WRITEO(_esmp, _offset, _eop) \
358 volatile uint8_t *_base = (_esmp)->esm_base; \
359 volatile __m128i *_addr; \
361 _NOTE(CONSTANTCONDITION); \
362 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
365 EFSYS_PROBE5(mem_writeo, unsigned int, (_offset), \
366 uint32_t, (_eop)->eo_u32[3], \
367 uint32_t, (_eop)->eo_u32[2], \
368 uint32_t, (_eop)->eo_u32[1], \
369 uint32_t, (_eop)->eo_u32[0]); \
371 _addr = (volatile __m128i *)(_base + (_offset)); \
372 _addr[0] = (_eop)->eo_u128[0]; \
374 _NOTE(CONSTANTCONDITION); \
378 #define EFSYS_MEM_SIZE(_esmp) \
379 ((_esmp)->esm_mz->len)
381 #define EFSYS_MEM_ADDR(_esmp) \
384 #define EFSYS_MEM_IS_NULL(_esmp) \
385 ((_esmp)->esm_base == NULL)
387 #define EFSYS_MEM_PREFETCH(_esmp, _offset) \
389 volatile uint8_t *_base = (_esmp)->esm_base; \
391 rte_prefetch0(_base + (_offset)); \
397 typedef struct efsys_bar_s {
398 rte_spinlock_t esb_lock;
400 struct rte_pci_device *esb_dev;
402 * Ideally it should have volatile qualifier to denote that
403 * the memory may be updated by someone else. However, it adds
404 * qualifier discard warnings when the pointer or its derivative
405 * is passed to memset() or rte_mov16().
406 * So, skip the qualifier here, but make sure that it is added
407 * below in access macros.
412 #define SFC_BAR_LOCK_INIT(_esbp, _ifname) \
414 rte_spinlock_init(&(_esbp)->esb_lock); \
415 _NOTE(CONSTANTCONDITION); \
417 #define SFC_BAR_LOCK_DESTROY(_esbp) ((void)0)
418 #define SFC_BAR_LOCK(_esbp) rte_spinlock_lock(&(_esbp)->esb_lock)
419 #define SFC_BAR_UNLOCK(_esbp) rte_spinlock_unlock(&(_esbp)->esb_lock)
421 #define EFSYS_BAR_READD(_esbp, _offset, _edp, _lock) \
423 volatile uint8_t *_base = (_esbp)->esb_base; \
424 volatile uint32_t *_addr; \
426 _NOTE(CONSTANTCONDITION); \
427 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
428 _NOTE(CONSTANTCONDITION); \
430 SFC_BAR_LOCK(_esbp); \
432 _addr = (volatile uint32_t *)(_base + (_offset)); \
434 (_edp)->ed_u32[0] = rte_read32_relaxed(_addr); \
436 EFSYS_PROBE2(bar_readd, unsigned int, (_offset), \
437 uint32_t, (_edp)->ed_u32[0]); \
439 _NOTE(CONSTANTCONDITION); \
441 SFC_BAR_UNLOCK(_esbp); \
442 _NOTE(CONSTANTCONDITION); \
445 #define EFSYS_BAR_READQ(_esbp, _offset, _eqp) \
447 volatile uint8_t *_base = (_esbp)->esb_base; \
448 volatile uint64_t *_addr; \
450 _NOTE(CONSTANTCONDITION); \
451 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
453 SFC_BAR_LOCK(_esbp); \
455 _addr = (volatile uint64_t *)(_base + (_offset)); \
457 (_eqp)->eq_u64[0] = rte_read64_relaxed(_addr); \
459 EFSYS_PROBE3(bar_readq, unsigned int, (_offset), \
460 uint32_t, (_eqp)->eq_u32[1], \
461 uint32_t, (_eqp)->eq_u32[0]); \
463 SFC_BAR_UNLOCK(_esbp); \
464 _NOTE(CONSTANTCONDITION); \
467 #define EFSYS_BAR_READO(_esbp, _offset, _eop, _lock) \
469 volatile uint8_t *_base = (_esbp)->esb_base; \
470 volatile __m128i *_addr; \
472 _NOTE(CONSTANTCONDITION); \
473 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
475 _NOTE(CONSTANTCONDITION); \
477 SFC_BAR_LOCK(_esbp); \
479 _addr = (volatile __m128i *)(_base + (_offset)); \
481 /* There is no rte_read128_relaxed() yet */ \
482 (_eop)->eo_u128[0] = _addr[0]; \
484 EFSYS_PROBE5(bar_reado, unsigned int, (_offset), \
485 uint32_t, (_eop)->eo_u32[3], \
486 uint32_t, (_eop)->eo_u32[2], \
487 uint32_t, (_eop)->eo_u32[1], \
488 uint32_t, (_eop)->eo_u32[0]); \
490 _NOTE(CONSTANTCONDITION); \
492 SFC_BAR_UNLOCK(_esbp); \
493 _NOTE(CONSTANTCONDITION); \
497 #define EFSYS_BAR_WRITED(_esbp, _offset, _edp, _lock) \
499 volatile uint8_t *_base = (_esbp)->esb_base; \
500 volatile uint32_t *_addr; \
502 _NOTE(CONSTANTCONDITION); \
503 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
505 _NOTE(CONSTANTCONDITION); \
507 SFC_BAR_LOCK(_esbp); \
509 EFSYS_PROBE2(bar_writed, unsigned int, (_offset), \
510 uint32_t, (_edp)->ed_u32[0]); \
512 _addr = (volatile uint32_t *)(_base + (_offset)); \
513 rte_write32_relaxed((_edp)->ed_u32[0], _addr); \
516 _NOTE(CONSTANTCONDITION); \
518 SFC_BAR_UNLOCK(_esbp); \
519 _NOTE(CONSTANTCONDITION); \
522 #define EFSYS_BAR_WRITEQ(_esbp, _offset, _eqp) \
524 volatile uint8_t *_base = (_esbp)->esb_base; \
525 volatile uint64_t *_addr; \
527 _NOTE(CONSTANTCONDITION); \
528 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
530 SFC_BAR_LOCK(_esbp); \
532 EFSYS_PROBE3(bar_writeq, unsigned int, (_offset), \
533 uint32_t, (_eqp)->eq_u32[1], \
534 uint32_t, (_eqp)->eq_u32[0]); \
536 _addr = (volatile uint64_t *)(_base + (_offset)); \
537 rte_write64_relaxed((_eqp)->eq_u64[0], _addr); \
540 SFC_BAR_UNLOCK(_esbp); \
541 _NOTE(CONSTANTCONDITION); \
545 * Guarantees 64bit aligned 64bit writes to write combined BAR mapping
546 * (required by PIO hardware).
548 * Neither VFIO, nor UIO, nor NIC UIO (on FreeBSD) support
549 * write-combined memory mapped to user-land, so just abort if used.
551 #define EFSYS_BAR_WC_WRITEQ(_esbp, _offset, _eqp) \
553 rte_panic("Write-combined BAR access not supported"); \
556 #define EFSYS_BAR_WRITEO(_esbp, _offset, _eop, _lock) \
558 volatile uint8_t *_base = (_esbp)->esb_base; \
559 volatile __m128i *_addr; \
561 _NOTE(CONSTANTCONDITION); \
562 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
564 _NOTE(CONSTANTCONDITION); \
566 SFC_BAR_LOCK(_esbp); \
568 EFSYS_PROBE5(bar_writeo, unsigned int, (_offset), \
569 uint32_t, (_eop)->eo_u32[3], \
570 uint32_t, (_eop)->eo_u32[2], \
571 uint32_t, (_eop)->eo_u32[1], \
572 uint32_t, (_eop)->eo_u32[0]); \
574 _addr = (volatile __m128i *)(_base + (_offset)); \
575 /* There is no rte_write128_relaxed() yet */ \
576 _addr[0] = (_eop)->eo_u128[0]; \
579 _NOTE(CONSTANTCONDITION); \
581 SFC_BAR_UNLOCK(_esbp); \
582 _NOTE(CONSTANTCONDITION); \
585 /* Use the standard octo-word write for doorbell writes */
586 #define EFSYS_BAR_DOORBELL_WRITEO(_esbp, _offset, _eop) \
588 EFSYS_BAR_WRITEO((_esbp), (_offset), (_eop), B_FALSE); \
589 _NOTE(CONSTANTCONDITION); \
594 #define EFSYS_SPIN(_us) \
597 _NOTE(CONSTANTCONDITION); \
600 #define EFSYS_SLEEP EFSYS_SPIN
604 #define EFSYS_MEM_READ_BARRIER() rte_rmb()
605 #define EFSYS_PIO_WRITE_BARRIER() rte_io_wmb()
610 * DPDK does not provide any DMA syncing API, and no PMD drivers
611 * have any traces of explicit DMA syncing.
612 * DMA mapping is assumed to be coherent.
615 #define EFSYS_DMA_SYNC_FOR_KERNEL(_esmp, _offset, _size) ((void)0)
617 /* Just avoid store and compiler (impliciltly) reordering */
618 #define EFSYS_DMA_SYNC_FOR_DEVICE(_esmp, _offset, _size) rte_wmb()
622 typedef uint64_t efsys_timestamp_t;
624 #define EFSYS_TIMESTAMP(_usp) \
626 *(_usp) = rte_get_timer_cycles() * 1000000 / \
627 rte_get_timer_hz(); \
628 _NOTE(CONSTANTCONDITION); \
633 #define EFSYS_KMEM_ALLOC(_esip, _size, _p) \
636 (_p) = rte_zmalloc("sfc", (_size), 0); \
637 _NOTE(CONSTANTCONDITION); \
640 #define EFSYS_KMEM_FREE(_esip, _size, _p) \
645 _NOTE(CONSTANTCONDITION); \
650 typedef rte_spinlock_t efsys_lock_t;
652 #define SFC_EFSYS_LOCK_INIT(_eslp, _ifname, _label) \
653 rte_spinlock_init((_eslp))
654 #define SFC_EFSYS_LOCK_DESTROY(_eslp) ((void)0)
655 #define SFC_EFSYS_LOCK(_eslp) \
656 rte_spinlock_lock((_eslp))
657 #define SFC_EFSYS_UNLOCK(_eslp) \
658 rte_spinlock_unlock((_eslp))
659 #define SFC_EFSYS_LOCK_ASSERT_OWNED(_eslp) \
660 SFC_ASSERT(rte_spinlock_is_locked((_eslp)))
662 typedef int efsys_lock_state_t;
664 #define EFSYS_LOCK_MAGIC 0x000010c4
666 #define EFSYS_LOCK(_lockp, _state) \
668 SFC_EFSYS_LOCK(_lockp); \
669 (_state) = EFSYS_LOCK_MAGIC; \
670 _NOTE(CONSTANTCONDITION); \
673 #define EFSYS_UNLOCK(_lockp, _state) \
675 SFC_ASSERT((_state) == EFSYS_LOCK_MAGIC); \
676 SFC_EFSYS_UNLOCK(_lockp); \
677 _NOTE(CONSTANTCONDITION); \
682 typedef uint64_t efsys_stat_t;
684 #define EFSYS_STAT_INCR(_knp, _delta) \
686 *(_knp) += (_delta); \
687 _NOTE(CONSTANTCONDITION); \
690 #define EFSYS_STAT_DECR(_knp, _delta) \
692 *(_knp) -= (_delta); \
693 _NOTE(CONSTANTCONDITION); \
696 #define EFSYS_STAT_SET(_knp, _val) \
699 _NOTE(CONSTANTCONDITION); \
702 #define EFSYS_STAT_SET_QWORD(_knp, _valp) \
704 *(_knp) = rte_le_to_cpu_64((_valp)->eq_u64[0]); \
705 _NOTE(CONSTANTCONDITION); \
708 #define EFSYS_STAT_SET_DWORD(_knp, _valp) \
710 *(_knp) = rte_le_to_cpu_32((_valp)->ed_u32[0]); \
711 _NOTE(CONSTANTCONDITION); \
714 #define EFSYS_STAT_INCR_QWORD(_knp, _valp) \
716 *(_knp) += rte_le_to_cpu_64((_valp)->eq_u64[0]); \
717 _NOTE(CONSTANTCONDITION); \
720 #define EFSYS_STAT_SUBR_QWORD(_knp, _valp) \
722 *(_knp) -= rte_le_to_cpu_64((_valp)->eq_u64[0]); \
723 _NOTE(CONSTANTCONDITION); \
728 #if EFSYS_OPT_DECODE_INTR_FATAL
729 #define EFSYS_ERR(_esip, _code, _dword0, _dword1) \
732 RTE_LOG(ERR, PMD, "FATAL ERROR #%u (0x%08x%08x)\n", \
733 (_code), (_dword0), (_dword1)); \
734 _NOTE(CONSTANTCONDITION); \
740 /* RTE_VERIFY from DPDK treats expressions with % operator incorrectly,
741 * so we re-implement it here
743 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
744 #define EFSYS_ASSERT(_exp) \
746 if (unlikely(!(_exp))) \
747 rte_panic("line %d\tassert \"%s\" failed\n", \
748 __LINE__, (#_exp)); \
751 #define EFSYS_ASSERT(_exp) (void)(_exp)
754 #define EFSYS_ASSERT3(_x, _op, _y, _t) EFSYS_ASSERT((_t)(_x) _op (_t)(_y))
756 #define EFSYS_ASSERT3U(_x, _op, _y) EFSYS_ASSERT3(_x, _op, _y, uint64_t)
757 #define EFSYS_ASSERT3S(_x, _op, _y) EFSYS_ASSERT3(_x, _op, _y, int64_t)
758 #define EFSYS_ASSERT3P(_x, _op, _y) EFSYS_ASSERT3(_x, _op, _y, uintptr_t)
762 #define EFSYS_HAS_ROTL_DWORD 0
768 #endif /* _SFC_COMMON_EFSYS_H */