net/sfc/base: introduce EVB module for SR-IOV
[dpdk.git] / drivers / net / sfc / efsys.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2  *
3  * Copyright (c) 2016-2018 Solarflare Communications Inc.
4  * All rights reserved.
5  *
6  * This software was jointly developed between OKTET Labs (under contract
7  * for Solarflare) and Solarflare Communications, Inc.
8  */
9
10 #ifndef _SFC_COMMON_EFSYS_H
11 #define _SFC_COMMON_EFSYS_H
12
13 #include <stdbool.h>
14
15 #include <rte_spinlock.h>
16 #include <rte_byteorder.h>
17 #include <rte_debug.h>
18 #include <rte_memzone.h>
19 #include <rte_memory.h>
20 #include <rte_memcpy.h>
21 #include <rte_cycles.h>
22 #include <rte_prefetch.h>
23 #include <rte_common.h>
24 #include <rte_malloc.h>
25 #include <rte_log.h>
26 #include <rte_io.h>
27
28 #include "sfc_debug.h"
29 #include "sfc_log.h"
30
31 #ifdef __cplusplus
32 extern "C" {
33 #endif
34
35 #define EFSYS_HAS_UINT64 1
36 #define EFSYS_USE_UINT64 1
37 #define EFSYS_HAS_SSE2_M128 1
38
39 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
40 #define EFSYS_IS_BIG_ENDIAN 1
41 #define EFSYS_IS_LITTLE_ENDIAN 0
42 #elif RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
43 #define EFSYS_IS_BIG_ENDIAN 0
44 #define EFSYS_IS_LITTLE_ENDIAN 1
45 #else
46 #error "Cannot determine system endianness"
47 #endif
48 #include "efx_types.h"
49
50
51 typedef bool boolean_t;
52
53 #ifndef B_FALSE
54 #define B_FALSE false
55 #endif
56 #ifndef B_TRUE
57 #define B_TRUE  true
58 #endif
59
60 /*
61  * RTE_MAX() and RTE_MIN() cannot be used since braced-group within
62  * expression allowed only inside a function, but MAX() is used as
63  * a number of elements in array.
64  */
65 #ifndef MAX
66 #define MAX(v1, v2)     ((v1) > (v2) ? (v1) : (v2))
67 #endif
68 #ifndef MIN
69 #define MIN(v1, v2)     ((v1) < (v2) ? (v1) : (v2))
70 #endif
71
72 /* There are macros for alignment in DPDK, but we need to make a proper
73  * correspondence here, if we want to re-use them at all
74  */
75 #ifndef IS_P2ALIGNED
76 #define IS_P2ALIGNED(v, a)      ((((uintptr_t)(v)) & ((uintptr_t)(a) - 1)) == 0)
77 #endif
78
79 #ifndef P2ROUNDUP
80 #define P2ROUNDUP(x, align)     (-(-(x) & -(align)))
81 #endif
82
83 #ifndef P2ALIGN
84 #define P2ALIGN(_x, _a)         ((_x) & -(_a))
85 #endif
86
87 #ifndef ISP2
88 #define ISP2(x)                 rte_is_power_of_2(x)
89 #endif
90
91 #define ENOTACTIVE      ENOTCONN
92
93 static inline void
94 prefetch_read_many(const volatile void *addr)
95 {
96         rte_prefetch0(addr);
97 }
98
99 static inline void
100 prefetch_read_once(const volatile void *addr)
101 {
102         rte_prefetch_non_temporal(addr);
103 }
104
105 /* Code inclusion options */
106
107
108 #define EFSYS_OPT_NAMES 1
109
110 /* Disable SFN5xxx/SFN6xxx since it requires specific support in the PMD */
111 #define EFSYS_OPT_SIENA 0
112 /* Enable SFN7xxx support */
113 #define EFSYS_OPT_HUNTINGTON 1
114 /* Enable SFN8xxx support */
115 #define EFSYS_OPT_MEDFORD 1
116 /* Enable SFN2xxx support */
117 #define EFSYS_OPT_MEDFORD2 1
118 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
119 #define EFSYS_OPT_CHECK_REG 1
120 #else
121 #define EFSYS_OPT_CHECK_REG 0
122 #endif
123
124 /* MCDI is required for SFN7xxx and SFN8xx */
125 #define EFSYS_OPT_MCDI 1
126 #define EFSYS_OPT_MCDI_LOGGING 1
127 #define EFSYS_OPT_MCDI_PROXY_AUTH 1
128
129 #define EFSYS_OPT_MAC_STATS 1
130
131 #define EFSYS_OPT_LOOPBACK 1
132
133 #define EFSYS_OPT_MON_MCDI 0
134 #define EFSYS_OPT_MON_STATS 0
135
136 #define EFSYS_OPT_PHY_STATS 0
137 #define EFSYS_OPT_BIST 0
138 #define EFSYS_OPT_PHY_LED_CONTROL 0
139 #define EFSYS_OPT_PHY_FLAGS 0
140
141 #define EFSYS_OPT_VPD 0
142 #define EFSYS_OPT_NVRAM 0
143 #define EFSYS_OPT_BOOTCFG 0
144 #define EFSYS_OPT_IMAGE_LAYOUT 0
145
146 #define EFSYS_OPT_DIAG 0
147 #define EFSYS_OPT_RX_SCALE 1
148 #define EFSYS_OPT_QSTATS 0
149 /* Filters support is required for SFN7xxx and SFN8xx */
150 #define EFSYS_OPT_FILTER 1
151 #define EFSYS_OPT_RX_SCATTER 0
152
153 #define EFSYS_OPT_EV_PREFETCH 0
154
155 #define EFSYS_OPT_DECODE_INTR_FATAL 0
156
157 #define EFSYS_OPT_LICENSING 0
158
159 #define EFSYS_OPT_ALLOW_UNCONFIGURED_NIC 0
160
161 #define EFSYS_OPT_RX_PACKED_STREAM 0
162
163 #define EFSYS_OPT_RX_ES_SUPER_BUFFER 1
164
165 #define EFSYS_OPT_TUNNEL 1
166
167 #define EFSYS_OPT_FW_SUBVARIANT_AWARE 1
168
169 #define EFSYS_OPT_EVB 0
170
171 /* ID */
172
173 typedef struct __efsys_identifier_s efsys_identifier_t;
174
175
176 #define EFSYS_PROBE(_name)                                              \
177         do { } while (0)
178
179 #define EFSYS_PROBE1(_name, _type1, _arg1)                              \
180         do { } while (0)
181
182 #define EFSYS_PROBE2(_name, _type1, _arg1, _type2, _arg2)               \
183         do { } while (0)
184
185 #define EFSYS_PROBE3(_name, _type1, _arg1, _type2, _arg2,               \
186                      _type3, _arg3)                                     \
187         do { } while (0)
188
189 #define EFSYS_PROBE4(_name, _type1, _arg1, _type2, _arg2,               \
190                      _type3, _arg3, _type4, _arg4)                      \
191         do { } while (0)
192
193 #define EFSYS_PROBE5(_name, _type1, _arg1, _type2, _arg2,               \
194                      _type3, _arg3, _type4, _arg4, _type5, _arg5)       \
195         do { } while (0)
196
197 #define EFSYS_PROBE6(_name, _type1, _arg1, _type2, _arg2,               \
198                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
199                      _type6, _arg6)                                     \
200         do { } while (0)
201
202 #define EFSYS_PROBE7(_name, _type1, _arg1, _type2, _arg2,               \
203                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
204                      _type6, _arg6, _type7, _arg7)                      \
205         do { } while (0)
206
207
208 /* DMA */
209
210 typedef rte_iova_t efsys_dma_addr_t;
211
212 typedef struct efsys_mem_s {
213         const struct rte_memzone        *esm_mz;
214         /*
215          * Ideally it should have volatile qualifier to denote that
216          * the memory may be updated by someone else. However, it adds
217          * qualifier discard warnings when the pointer or its derivative
218          * is passed to memset() or rte_mov16().
219          * So, skip the qualifier here, but make sure that it is added
220          * below in access macros.
221          */
222         void                            *esm_base;
223         efsys_dma_addr_t                esm_addr;
224 } efsys_mem_t;
225
226
227 #define EFSYS_MEM_ZERO(_esmp, _size)                                    \
228         do {                                                            \
229                 (void)memset((void *)(_esmp)->esm_base, 0, (_size));    \
230                                                                         \
231                 _NOTE(CONSTANTCONDITION);                               \
232         } while (B_FALSE)
233
234 #define EFSYS_MEM_READD(_esmp, _offset, _edp)                           \
235         do {                                                            \
236                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
237                 volatile uint32_t *_addr;                               \
238                                                                         \
239                 _NOTE(CONSTANTCONDITION);                               \
240                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
241                                                                         \
242                 _addr = (volatile uint32_t *)(_base + (_offset));       \
243                 (_edp)->ed_u32[0] = _addr[0];                           \
244                                                                         \
245                 EFSYS_PROBE2(mem_readl, unsigned int, (_offset),        \
246                                          uint32_t, (_edp)->ed_u32[0]);  \
247                                                                         \
248                 _NOTE(CONSTANTCONDITION);                               \
249         } while (B_FALSE)
250
251 #define EFSYS_MEM_READQ(_esmp, _offset, _eqp)                           \
252         do {                                                            \
253                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
254                 volatile uint64_t *_addr;                               \
255                                                                         \
256                 _NOTE(CONSTANTCONDITION);                               \
257                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
258                                                                         \
259                 _addr = (volatile uint64_t *)(_base + (_offset));       \
260                 (_eqp)->eq_u64[0] = _addr[0];                           \
261                                                                         \
262                 EFSYS_PROBE3(mem_readq, unsigned int, (_offset),        \
263                                          uint32_t, (_eqp)->eq_u32[1],   \
264                                          uint32_t, (_eqp)->eq_u32[0]);  \
265                                                                         \
266                 _NOTE(CONSTANTCONDITION);                               \
267         } while (B_FALSE)
268
269 #define EFSYS_MEM_READO(_esmp, _offset, _eop)                           \
270         do {                                                            \
271                 volatile uint8_t *_base = (_esmp)->esm_base;            \
272                 volatile __m128i *_addr;                                \
273                                                                         \
274                 _NOTE(CONSTANTCONDITION);                               \
275                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
276                                                                         \
277                 _addr = (volatile __m128i *)(_base + (_offset));        \
278                 (_eop)->eo_u128[0] = _addr[0];                          \
279                                                                         \
280                 EFSYS_PROBE5(mem_reado, unsigned int, (_offset),        \
281                                          uint32_t, (_eop)->eo_u32[3],   \
282                                          uint32_t, (_eop)->eo_u32[2],   \
283                                          uint32_t, (_eop)->eo_u32[1],   \
284                                          uint32_t, (_eop)->eo_u32[0]);  \
285                                                                         \
286                 _NOTE(CONSTANTCONDITION);                               \
287         } while (B_FALSE)
288
289
290 #define EFSYS_MEM_WRITED(_esmp, _offset, _edp)                          \
291         do {                                                            \
292                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
293                 volatile uint32_t *_addr;                               \
294                                                                         \
295                 _NOTE(CONSTANTCONDITION);                               \
296                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
297                                                                         \
298                 EFSYS_PROBE2(mem_writed, unsigned int, (_offset),       \
299                                          uint32_t, (_edp)->ed_u32[0]);  \
300                                                                         \
301                 _addr = (volatile uint32_t *)(_base + (_offset));       \
302                 _addr[0] = (_edp)->ed_u32[0];                           \
303                                                                         \
304                 _NOTE(CONSTANTCONDITION);                               \
305         } while (B_FALSE)
306
307 #define EFSYS_MEM_WRITEQ(_esmp, _offset, _eqp)                          \
308         do {                                                            \
309                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
310                 volatile uint64_t *_addr;                               \
311                                                                         \
312                 _NOTE(CONSTANTCONDITION);                               \
313                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
314                                                                         \
315                 EFSYS_PROBE3(mem_writeq, unsigned int, (_offset),       \
316                                          uint32_t, (_eqp)->eq_u32[1],   \
317                                          uint32_t, (_eqp)->eq_u32[0]);  \
318                                                                         \
319                 _addr = (volatile uint64_t *)(_base + (_offset));       \
320                 _addr[0] = (_eqp)->eq_u64[0];                           \
321                                                                         \
322                 _NOTE(CONSTANTCONDITION);                               \
323         } while (B_FALSE)
324
325 #define EFSYS_MEM_WRITEO(_esmp, _offset, _eop)                          \
326         do {                                                            \
327                 volatile uint8_t *_base = (_esmp)->esm_base;            \
328                 volatile __m128i *_addr;                                \
329                                                                         \
330                 _NOTE(CONSTANTCONDITION);                               \
331                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
332                                                                         \
333                                                                         \
334                 EFSYS_PROBE5(mem_writeo, unsigned int, (_offset),       \
335                                          uint32_t, (_eop)->eo_u32[3],   \
336                                          uint32_t, (_eop)->eo_u32[2],   \
337                                          uint32_t, (_eop)->eo_u32[1],   \
338                                          uint32_t, (_eop)->eo_u32[0]);  \
339                                                                         \
340                 _addr = (volatile __m128i *)(_base + (_offset));        \
341                 _addr[0] = (_eop)->eo_u128[0];                          \
342                                                                         \
343                 _NOTE(CONSTANTCONDITION);                               \
344         } while (B_FALSE)
345
346
347 #define EFSYS_MEM_SIZE(_esmp)                                           \
348         ((_esmp)->esm_mz->len)
349
350 #define EFSYS_MEM_ADDR(_esmp)                                           \
351         ((_esmp)->esm_addr)
352
353 #define EFSYS_MEM_IS_NULL(_esmp)                                        \
354         ((_esmp)->esm_base == NULL)
355
356 #define EFSYS_MEM_PREFETCH(_esmp, _offset)                              \
357         do {                                                            \
358                 volatile uint8_t *_base = (_esmp)->esm_base;            \
359                                                                         \
360                 rte_prefetch0(_base + (_offset));                       \
361         } while (0)
362
363
364 /* BAR */
365
366 typedef struct efsys_bar_s {
367         rte_spinlock_t          esb_lock;
368         int                     esb_rid;
369         struct rte_pci_device   *esb_dev;
370         /*
371          * Ideally it should have volatile qualifier to denote that
372          * the memory may be updated by someone else. However, it adds
373          * qualifier discard warnings when the pointer or its derivative
374          * is passed to memset() or rte_mov16().
375          * So, skip the qualifier here, but make sure that it is added
376          * below in access macros.
377          */
378         void                    *esb_base;
379 } efsys_bar_t;
380
381 #define SFC_BAR_LOCK_INIT(_esbp, _ifname)                               \
382         do {                                                            \
383                 rte_spinlock_init(&(_esbp)->esb_lock);                  \
384                 _NOTE(CONSTANTCONDITION);                               \
385         } while (B_FALSE)
386 #define SFC_BAR_LOCK_DESTROY(_esbp)     ((void)0)
387 #define SFC_BAR_LOCK(_esbp)             rte_spinlock_lock(&(_esbp)->esb_lock)
388 #define SFC_BAR_UNLOCK(_esbp)           rte_spinlock_unlock(&(_esbp)->esb_lock)
389
390 #define EFSYS_BAR_READD(_esbp, _offset, _edp, _lock)                    \
391         do {                                                            \
392                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
393                 volatile uint32_t *_addr;                               \
394                                                                         \
395                 _NOTE(CONSTANTCONDITION);                               \
396                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
397                 _NOTE(CONSTANTCONDITION);                               \
398                 if (_lock)                                              \
399                         SFC_BAR_LOCK(_esbp);                            \
400                                                                         \
401                 _addr = (volatile uint32_t *)(_base + (_offset));       \
402                 rte_rmb();                                              \
403                 (_edp)->ed_u32[0] = rte_read32_relaxed(_addr);          \
404                                                                         \
405                 EFSYS_PROBE2(bar_readd, unsigned int, (_offset),        \
406                                          uint32_t, (_edp)->ed_u32[0]);  \
407                                                                         \
408                 _NOTE(CONSTANTCONDITION);                               \
409                 if (_lock)                                              \
410                         SFC_BAR_UNLOCK(_esbp);                          \
411                 _NOTE(CONSTANTCONDITION);                               \
412         } while (B_FALSE)
413
414 #define EFSYS_BAR_READQ(_esbp, _offset, _eqp)                           \
415         do {                                                            \
416                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
417                 volatile uint64_t *_addr;                               \
418                                                                         \
419                 _NOTE(CONSTANTCONDITION);                               \
420                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
421                                                                         \
422                 SFC_BAR_LOCK(_esbp);                                    \
423                                                                         \
424                 _addr = (volatile uint64_t *)(_base + (_offset));       \
425                 rte_rmb();                                              \
426                 (_eqp)->eq_u64[0] = rte_read64_relaxed(_addr);          \
427                                                                         \
428                 EFSYS_PROBE3(bar_readq, unsigned int, (_offset),        \
429                                          uint32_t, (_eqp)->eq_u32[1],   \
430                                          uint32_t, (_eqp)->eq_u32[0]);  \
431                                                                         \
432                 SFC_BAR_UNLOCK(_esbp);                                  \
433                 _NOTE(CONSTANTCONDITION);                               \
434         } while (B_FALSE)
435
436 #define EFSYS_BAR_READO(_esbp, _offset, _eop, _lock)                    \
437         do {                                                            \
438                 volatile uint8_t *_base = (_esbp)->esb_base;            \
439                 volatile __m128i *_addr;                                \
440                                                                         \
441                 _NOTE(CONSTANTCONDITION);                               \
442                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
443                                                                         \
444                 _NOTE(CONSTANTCONDITION);                               \
445                 if (_lock)                                              \
446                         SFC_BAR_LOCK(_esbp);                            \
447                                                                         \
448                 _addr = (volatile __m128i *)(_base + (_offset));        \
449                 rte_rmb();                                              \
450                 /* There is no rte_read128_relaxed() yet */             \
451                 (_eop)->eo_u128[0] = _addr[0];                          \
452                                                                         \
453                 EFSYS_PROBE5(bar_reado, unsigned int, (_offset),        \
454                                          uint32_t, (_eop)->eo_u32[3],   \
455                                          uint32_t, (_eop)->eo_u32[2],   \
456                                          uint32_t, (_eop)->eo_u32[1],   \
457                                          uint32_t, (_eop)->eo_u32[0]);  \
458                                                                         \
459                 _NOTE(CONSTANTCONDITION);                               \
460                 if (_lock)                                              \
461                         SFC_BAR_UNLOCK(_esbp);                          \
462                 _NOTE(CONSTANTCONDITION);                               \
463         } while (B_FALSE)
464
465
466 #define EFSYS_BAR_WRITED(_esbp, _offset, _edp, _lock)                   \
467         do {                                                            \
468                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
469                 volatile uint32_t *_addr;                               \
470                                                                         \
471                 _NOTE(CONSTANTCONDITION);                               \
472                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
473                                                                         \
474                 _NOTE(CONSTANTCONDITION);                               \
475                 if (_lock)                                              \
476                         SFC_BAR_LOCK(_esbp);                            \
477                                                                         \
478                 EFSYS_PROBE2(bar_writed, unsigned int, (_offset),       \
479                                          uint32_t, (_edp)->ed_u32[0]);  \
480                                                                         \
481                 _addr = (volatile uint32_t *)(_base + (_offset));       \
482                 rte_write32_relaxed((_edp)->ed_u32[0], _addr);          \
483                 rte_wmb();                                              \
484                                                                         \
485                 _NOTE(CONSTANTCONDITION);                               \
486                 if (_lock)                                              \
487                         SFC_BAR_UNLOCK(_esbp);                          \
488                 _NOTE(CONSTANTCONDITION);                               \
489         } while (B_FALSE)
490
491 #define EFSYS_BAR_WRITEQ(_esbp, _offset, _eqp)                          \
492         do {                                                            \
493                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
494                 volatile uint64_t *_addr;                               \
495                                                                         \
496                 _NOTE(CONSTANTCONDITION);                               \
497                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
498                                                                         \
499                 SFC_BAR_LOCK(_esbp);                                    \
500                                                                         \
501                 EFSYS_PROBE3(bar_writeq, unsigned int, (_offset),       \
502                                          uint32_t, (_eqp)->eq_u32[1],   \
503                                          uint32_t, (_eqp)->eq_u32[0]);  \
504                                                                         \
505                 _addr = (volatile uint64_t *)(_base + (_offset));       \
506                 rte_write64_relaxed((_eqp)->eq_u64[0], _addr);          \
507                 rte_wmb();                                              \
508                                                                         \
509                 SFC_BAR_UNLOCK(_esbp);                                  \
510                 _NOTE(CONSTANTCONDITION);                               \
511         } while (B_FALSE)
512
513 /*
514  * Guarantees 64bit aligned 64bit writes to write combined BAR mapping
515  * (required by PIO hardware).
516  *
517  * Neither VFIO, nor UIO, nor NIC UIO (on FreeBSD) support
518  * write-combined memory mapped to user-land, so just abort if used.
519  */
520 #define EFSYS_BAR_WC_WRITEQ(_esbp, _offset, _eqp)                       \
521         do {                                                            \
522                 rte_panic("Write-combined BAR access not supported");   \
523         } while (B_FALSE)
524
525 #define EFSYS_BAR_WRITEO(_esbp, _offset, _eop, _lock)                   \
526         do {                                                            \
527                 volatile uint8_t *_base = (_esbp)->esb_base;            \
528                 volatile __m128i *_addr;                                \
529                                                                         \
530                 _NOTE(CONSTANTCONDITION);                               \
531                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
532                                                                         \
533                 _NOTE(CONSTANTCONDITION);                               \
534                 if (_lock)                                              \
535                         SFC_BAR_LOCK(_esbp);                            \
536                                                                         \
537                 EFSYS_PROBE5(bar_writeo, unsigned int, (_offset),       \
538                                          uint32_t, (_eop)->eo_u32[3],   \
539                                          uint32_t, (_eop)->eo_u32[2],   \
540                                          uint32_t, (_eop)->eo_u32[1],   \
541                                          uint32_t, (_eop)->eo_u32[0]);  \
542                                                                         \
543                 _addr = (volatile __m128i *)(_base + (_offset));        \
544                 /* There is no rte_write128_relaxed() yet */            \
545                 _addr[0] = (_eop)->eo_u128[0];                          \
546                 rte_wmb();                                              \
547                                                                         \
548                 _NOTE(CONSTANTCONDITION);                               \
549                 if (_lock)                                              \
550                         SFC_BAR_UNLOCK(_esbp);                          \
551                 _NOTE(CONSTANTCONDITION);                               \
552         } while (B_FALSE)
553
554 /* Use the standard octo-word write for doorbell writes */
555 #define EFSYS_BAR_DOORBELL_WRITEO(_esbp, _offset, _eop)                 \
556         do {                                                            \
557                 EFSYS_BAR_WRITEO((_esbp), (_offset), (_eop), B_FALSE);  \
558                 _NOTE(CONSTANTCONDITION);                               \
559         } while (B_FALSE)
560
561 /* SPIN */
562
563 #define EFSYS_SPIN(_us)                                                 \
564         do {                                                            \
565                 rte_delay_us(_us);                                      \
566                 _NOTE(CONSTANTCONDITION);                               \
567         } while (B_FALSE)
568
569 #define EFSYS_SLEEP EFSYS_SPIN
570
571 /* BARRIERS */
572
573 #define EFSYS_MEM_READ_BARRIER()        rte_rmb()
574 #define EFSYS_PIO_WRITE_BARRIER()       rte_io_wmb()
575
576 /* DMA SYNC */
577
578 /*
579  * DPDK does not provide any DMA syncing API, and no PMD drivers
580  * have any traces of explicit DMA syncing.
581  * DMA mapping is assumed to be coherent.
582  */
583
584 #define EFSYS_DMA_SYNC_FOR_KERNEL(_esmp, _offset, _size)        ((void)0)
585
586 /* Just avoid store and compiler (impliciltly) reordering */
587 #define EFSYS_DMA_SYNC_FOR_DEVICE(_esmp, _offset, _size)        rte_wmb()
588
589 /* TIMESTAMP */
590
591 typedef uint64_t efsys_timestamp_t;
592
593 #define EFSYS_TIMESTAMP(_usp)                                           \
594         do {                                                            \
595                 *(_usp) = rte_get_timer_cycles() * 1000000 /            \
596                         rte_get_timer_hz();                             \
597                 _NOTE(CONSTANTCONDITION);                               \
598         } while (B_FALSE)
599
600 /* KMEM */
601
602 #define EFSYS_KMEM_ALLOC(_esip, _size, _p)                              \
603         do {                                                            \
604                 (_esip) = (_esip);                                      \
605                 (_p) = rte_zmalloc("sfc", (_size), 0);                  \
606                 _NOTE(CONSTANTCONDITION);                               \
607         } while (B_FALSE)
608
609 #define EFSYS_KMEM_FREE(_esip, _size, _p)                               \
610         do {                                                            \
611                 (void)(_esip);                                          \
612                 (void)(_size);                                          \
613                 rte_free((_p));                                         \
614                 _NOTE(CONSTANTCONDITION);                               \
615         } while (B_FALSE)
616
617 /* LOCK */
618
619 typedef rte_spinlock_t efsys_lock_t;
620
621 #define SFC_EFSYS_LOCK_INIT(_eslp, _ifname, _label)     \
622         rte_spinlock_init((_eslp))
623 #define SFC_EFSYS_LOCK_DESTROY(_eslp) ((void)0)
624 #define SFC_EFSYS_LOCK(_eslp)                           \
625         rte_spinlock_lock((_eslp))
626 #define SFC_EFSYS_UNLOCK(_eslp)                         \
627         rte_spinlock_unlock((_eslp))
628 #define SFC_EFSYS_LOCK_ASSERT_OWNED(_eslp)              \
629         SFC_ASSERT(rte_spinlock_is_locked((_eslp)))
630
631 typedef int efsys_lock_state_t;
632
633 #define EFSYS_LOCK_MAGIC        0x000010c4
634
635 #define EFSYS_LOCK(_lockp, _state)                              \
636         do {                                                    \
637                 SFC_EFSYS_LOCK(_lockp);                         \
638                 (_state) = EFSYS_LOCK_MAGIC;                    \
639                 _NOTE(CONSTANTCONDITION);                       \
640         } while (B_FALSE)
641
642 #define EFSYS_UNLOCK(_lockp, _state)                            \
643         do {                                                    \
644                 SFC_ASSERT((_state) == EFSYS_LOCK_MAGIC);       \
645                 SFC_EFSYS_UNLOCK(_lockp);                       \
646                 _NOTE(CONSTANTCONDITION);                       \
647         } while (B_FALSE)
648
649 /* STAT */
650
651 typedef uint64_t        efsys_stat_t;
652
653 #define EFSYS_STAT_INCR(_knp, _delta)                           \
654         do {                                                    \
655                 *(_knp) += (_delta);                            \
656                 _NOTE(CONSTANTCONDITION);                       \
657         } while (B_FALSE)
658
659 #define EFSYS_STAT_DECR(_knp, _delta)                           \
660         do {                                                    \
661                 *(_knp) -= (_delta);                            \
662                 _NOTE(CONSTANTCONDITION);                       \
663         } while (B_FALSE)
664
665 #define EFSYS_STAT_SET(_knp, _val)                              \
666         do {                                                    \
667                 *(_knp) = (_val);                               \
668                 _NOTE(CONSTANTCONDITION);                       \
669         } while (B_FALSE)
670
671 #define EFSYS_STAT_SET_QWORD(_knp, _valp)                       \
672         do {                                                    \
673                 *(_knp) = rte_le_to_cpu_64((_valp)->eq_u64[0]); \
674                 _NOTE(CONSTANTCONDITION);                       \
675         } while (B_FALSE)
676
677 #define EFSYS_STAT_SET_DWORD(_knp, _valp)                       \
678         do {                                                    \
679                 *(_knp) = rte_le_to_cpu_32((_valp)->ed_u32[0]); \
680                 _NOTE(CONSTANTCONDITION);                       \
681         } while (B_FALSE)
682
683 #define EFSYS_STAT_INCR_QWORD(_knp, _valp)                              \
684         do {                                                            \
685                 *(_knp) += rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
686                 _NOTE(CONSTANTCONDITION);                               \
687         } while (B_FALSE)
688
689 #define EFSYS_STAT_SUBR_QWORD(_knp, _valp)                              \
690         do {                                                            \
691                 *(_knp) -= rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
692                 _NOTE(CONSTANTCONDITION);                               \
693         } while (B_FALSE)
694
695 /* ERR */
696
697 #if EFSYS_OPT_DECODE_INTR_FATAL
698 #define EFSYS_ERR(_esip, _code, _dword0, _dword1)                       \
699         do {                                                            \
700                 (void)(_esip);                                          \
701                 SFC_GENERIC_LOG(ERR, "FATAL ERROR #%u (0x%08x%08x)",    \
702                         (_code), (_dword0), (_dword1));                 \
703                 _NOTE(CONSTANTCONDITION);                               \
704         } while (B_FALSE)
705 #endif
706
707 /* ASSERT */
708
709 /* RTE_VERIFY from DPDK treats expressions with % operator incorrectly,
710  * so we re-implement it here
711  */
712 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
713 #define EFSYS_ASSERT(_exp)                                              \
714         do {                                                            \
715                 if (unlikely(!(_exp)))                                  \
716                         rte_panic("line %d\tassert \"%s\" failed\n",    \
717                                   __LINE__, (#_exp));                   \
718         } while (0)
719 #else
720 #define EFSYS_ASSERT(_exp)              (void)(_exp)
721 #endif
722
723 #define EFSYS_ASSERT3(_x, _op, _y, _t)  EFSYS_ASSERT((_t)(_x) _op (_t)(_y))
724
725 #define EFSYS_ASSERT3U(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uint64_t)
726 #define EFSYS_ASSERT3S(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, int64_t)
727 #define EFSYS_ASSERT3P(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uintptr_t)
728
729 /* ROTATE */
730
731 #define EFSYS_HAS_ROTL_DWORD    0
732
733 #ifdef __cplusplus
734 }
735 #endif
736
737 #endif  /* _SFC_COMMON_EFSYS_H */