drivers/net/sfc/efsys.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  * Copyright (c) 2016-2018 Solarflare Communications Inc.
   4  * All rights reserved.
   5  *
   6  * This software was jointly developed between OKTET Labs (under contract
   7  * for Solarflare) and Solarflare Communications, Inc.
   8  */
   9
  10 #ifndef _SFC_COMMON_EFSYS_H
  11 #define _SFC_COMMON_EFSYS_H
  12
  13 #include <stdbool.h>
  14
  15 #include <rte_spinlock.h>
  16 #include <rte_byteorder.h>
  17 #include <rte_debug.h>
  18 #include <rte_memzone.h>
  19 #include <rte_memory.h>
  20 #include <rte_memcpy.h>
  21 #include <rte_cycles.h>
  22 #include <rte_prefetch.h>
  23 #include <rte_common.h>
  24 #include <rte_malloc.h>
  25 #include <rte_log.h>
  26 #include <rte_io.h>
  27
  28 #include "sfc_debug.h"
  29
  30 #ifdef __cplusplus
  31 extern "C" {
  32 #endif
  33
  34 #define EFSYS_HAS_UINT64 1
  35 #define EFSYS_USE_UINT64 1
  36 #define EFSYS_HAS_SSE2_M128 1
  37
  38 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
  39 #define EFSYS_IS_BIG_ENDIAN 1
  40 #define EFSYS_IS_LITTLE_ENDIAN 0
  41 #elif RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
  42 #define EFSYS_IS_BIG_ENDIAN 0
  43 #define EFSYS_IS_LITTLE_ENDIAN 1
  44 #else
  45 #error "Cannot determine system endianness"
  46 #endif
  47 #include "efx_types.h"
  48
  49
  50 #ifndef _NOTE
  51 #define _NOTE(s)
  52 #endif
  53
  54 typedef bool boolean_t;
  55
  56 #ifndef B_FALSE
  57 #define B_FALSE false
  58 #endif
  59 #ifndef B_TRUE
  60 #define B_TRUE  true
  61 #endif
  62
  63 /*
  64  * RTE_MAX() and RTE_MIN() cannot be used since braced-group within
  65  * expression allowed only inside a function, but MAX() is used as
  66  * a number of elements in array.
  67  */
  68 #ifndef MAX
  69 #define MAX(v1, v2)     ((v1) > (v2) ? (v1) : (v2))
  70 #endif
  71 #ifndef MIN
  72 #define MIN(v1, v2)     ((v1) < (v2) ? (v1) : (v2))
  73 #endif
  74
  75 /* There are macros for alignment in DPDK, but we need to make a proper
  76  * correspondence here, if we want to re-use them at all
  77  */
  78 #ifndef IS_P2ALIGNED
  79 #define IS_P2ALIGNED(v, a)      ((((uintptr_t)(v)) & ((uintptr_t)(a) - 1)) == 0)
  80 #endif
  81
  82 #ifndef P2ROUNDUP
  83 #define P2ROUNDUP(x, align)     (-(-(x) & -(align)))
  84 #endif
  85
  86 #ifndef P2ALIGN
  87 #define P2ALIGN(_x, _a)         ((_x) & -(_a))
  88 #endif
  89
  90 #ifndef IS2P
  91 #define ISP2(x)                 rte_is_power_of_2(x)
  92 #endif
  93
  94 #define ENOTACTIVE      ENOTCONN
  95
  96 static inline void
  97 prefetch_read_many(const volatile void *addr)
  98 {
  99         rte_prefetch0(addr);
 100 }
 101
 102 static inline void
 103 prefetch_read_once(const volatile void *addr)
 104 {
 105         rte_prefetch_non_temporal(addr);
 106 }
 107
 108 /* Modifiers used for Windows builds */
 109 #define __in
 110 #define __in_opt
 111 #define __in_ecount(_n)
 112 #define __in_ecount_opt(_n)
 113 #define __in_bcount(_n)
 114 #define __in_bcount_opt(_n)
 115
 116 #define __out
 117 #define __out_opt
 118 #define __out_ecount(_n)
 119 #define __out_ecount_opt(_n)
 120 #define __out_bcount(_n)
 121 #define __out_bcount_opt(_n)
 122 #define __out_bcount_part(_n, _l)
 123 #define __out_bcount_part_opt(_n, _l)
 124
 125 #define __deref_out
 126
 127 #define __inout
 128 #define __inout_opt
 129 #define __inout_ecount(_n)
 130 #define __inout_ecount_opt(_n)
 131 #define __inout_bcount(_n)
 132 #define __inout_bcount_opt(_n)
 133 #define __inout_bcount_full_opt(_n)
 134
 135 #define __deref_out_bcount_opt(n)
 136
 137 #define __checkReturn
 138 #define __success(_x)
 139
 140 #define __drv_when(_p, _c)
 141
 142 /* Code inclusion options */
 143
 144
 145 #define EFSYS_OPT_NAMES 1
 146
 147 /* Disable SFN5xxx/SFN6xxx since it requires specific support in the PMD */
 148 #define EFSYS_OPT_SIENA 0
 149 /* Enable SFN7xxx support */
 150 #define EFSYS_OPT_HUNTINGTON 1
 151 /* Enable SFN8xxx support */
 152 #define EFSYS_OPT_MEDFORD 1
 153 /* Disable SFN2xxx support (not supported yet) */
 154 #define EFSYS_OPT_MEDFORD2 0
 155 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
 156 #define EFSYS_OPT_CHECK_REG 1
 157 #else
 158 #define EFSYS_OPT_CHECK_REG 0
 159 #endif
 160
 161 /* MCDI is required for SFN7xxx and SFN8xx */
 162 #define EFSYS_OPT_MCDI 1
 163 #define EFSYS_OPT_MCDI_LOGGING 1
 164 #define EFSYS_OPT_MCDI_PROXY_AUTH 1
 165
 166 #define EFSYS_OPT_MAC_STATS 1
 167
 168 #define EFSYS_OPT_LOOPBACK 0
 169
 170 #define EFSYS_OPT_MON_MCDI 0
 171 #define EFSYS_OPT_MON_STATS 0
 172
 173 #define EFSYS_OPT_PHY_STATS 0
 174 #define EFSYS_OPT_BIST 0
 175 #define EFSYS_OPT_PHY_LED_CONTROL 0
 176 #define EFSYS_OPT_PHY_FLAGS 0
 177
 178 #define EFSYS_OPT_VPD 0
 179 #define EFSYS_OPT_NVRAM 0
 180 #define EFSYS_OPT_BOOTCFG 0
 181
 182 #define EFSYS_OPT_DIAG 0
 183 #define EFSYS_OPT_RX_SCALE 1
 184 #define EFSYS_OPT_QSTATS 0
 185 /* Filters support is required for SFN7xxx and SFN8xx */
 186 #define EFSYS_OPT_FILTER 1
 187 #define EFSYS_OPT_RX_SCATTER 0
 188
 189 #define EFSYS_OPT_EV_PREFETCH 0
 190
 191 #define EFSYS_OPT_DECODE_INTR_FATAL 0
 192
 193 #define EFSYS_OPT_LICENSING 0
 194
 195 #define EFSYS_OPT_ALLOW_UNCONFIGURED_NIC 0
 196
 197 #define EFSYS_OPT_RX_PACKED_STREAM 0
 198
 199 #define EFSYS_OPT_TUNNEL 1
 200
 201 /* ID */
 202
 203 typedef struct __efsys_identifier_s efsys_identifier_t;
 204
 205
 206 #define EFSYS_PROBE(_name)                                              \
 207         do { } while (0)
 208
 209 #define EFSYS_PROBE1(_name, _type1, _arg1)                              \
 210         do { } while (0)
 211
 212 #define EFSYS_PROBE2(_name, _type1, _arg1, _type2, _arg2)               \
 213         do { } while (0)
 214
 215 #define EFSYS_PROBE3(_name, _type1, _arg1, _type2, _arg2,               \
 216                      _type3, _arg3)                                     \
 217         do { } while (0)
 218
 219 #define EFSYS_PROBE4(_name, _type1, _arg1, _type2, _arg2,               \
 220                      _type3, _arg3, _type4, _arg4)                      \
 221         do { } while (0)
 222
 223 #define EFSYS_PROBE5(_name, _type1, _arg1, _type2, _arg2,               \
 224                      _type3, _arg3, _type4, _arg4, _type5, _arg5)       \
 225         do { } while (0)
 226
 227 #define EFSYS_PROBE6(_name, _type1, _arg1, _type2, _arg2,               \
 228                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
 229                      _type6, _arg6)                                     \
 230         do { } while (0)
 231
 232 #define EFSYS_PROBE7(_name, _type1, _arg1, _type2, _arg2,               \
 233                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
 234                      _type6, _arg6, _type7, _arg7)                      \
 235         do { } while (0)
 236
 237
 238 /* DMA */
 239
 240 typedef rte_iova_t efsys_dma_addr_t;
 241
 242 typedef struct efsys_mem_s {
 243         const struct rte_memzone        *esm_mz;
 244         /*
 245          * Ideally it should have volatile qualifier to denote that
 246          * the memory may be updated by someone else. However, it adds
 247          * qualifier discard warnings when the pointer or its derivative
 248          * is passed to memset() or rte_mov16().
 249          * So, skip the qualifier here, but make sure that it is added
 250          * below in access macros.
 251          */
 252         void                            *esm_base;
 253         efsys_dma_addr_t                esm_addr;
 254 } efsys_mem_t;
 255
 256
 257 #define EFSYS_MEM_ZERO(_esmp, _size)                                    \
 258         do {                                                            \
 259                 (void)memset((void *)(_esmp)->esm_base, 0, (_size));    \
 260                                                                         \
 261                 _NOTE(CONSTANTCONDITION);                               \
 262         } while (B_FALSE)
 263
 264 #define EFSYS_MEM_READD(_esmp, _offset, _edp)                           \
 265         do {                                                            \
 266                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 267                 volatile uint32_t *_addr;                               \
 268                                                                         \
 269                 _NOTE(CONSTANTCONDITION);                               \
 270                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
 271                                                                         \
 272                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 273                 (_edp)->ed_u32[0] = _addr[0];                           \
 274                                                                         \
 275                 EFSYS_PROBE2(mem_readl, unsigned int, (_offset),        \
 276                                          uint32_t, (_edp)->ed_u32[0]);  \
 277                                                                         \
 278                 _NOTE(CONSTANTCONDITION);                               \
 279         } while (B_FALSE)
 280
 281 #define EFSYS_MEM_READQ(_esmp, _offset, _eqp)                           \
 282         do {                                                            \
 283                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 284                 volatile uint64_t *_addr;                               \
 285                                                                         \
 286                 _NOTE(CONSTANTCONDITION);                               \
 287                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
 288                                                                         \
 289                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 290                 (_eqp)->eq_u64[0] = _addr[0];                           \
 291                                                                         \
 292                 EFSYS_PROBE3(mem_readq, unsigned int, (_offset),        \
 293                                          uint32_t, (_eqp)->eq_u32[1],   \
 294                                          uint32_t, (_eqp)->eq_u32[0]);  \
 295                                                                         \
 296                 _NOTE(CONSTANTCONDITION);                               \
 297         } while (B_FALSE)
 298
 299 #define EFSYS_MEM_READO(_esmp, _offset, _eop)                           \
 300         do {                                                            \
 301                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 302                 volatile __m128i *_addr;                                \
 303                                                                         \
 304                 _NOTE(CONSTANTCONDITION);                               \
 305                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
 306                                                                         \
 307                 _addr = (volatile __m128i *)(_base + (_offset));        \
 308                 (_eop)->eo_u128[0] = _addr[0];                          \
 309                                                                         \
 310                 EFSYS_PROBE5(mem_reado, unsigned int, (_offset),        \
 311                                          uint32_t, (_eop)->eo_u32[3],   \
 312                                          uint32_t, (_eop)->eo_u32[2],   \
 313                                          uint32_t, (_eop)->eo_u32[1],   \
 314                                          uint32_t, (_eop)->eo_u32[0]);  \
 315                                                                         \
 316                 _NOTE(CONSTANTCONDITION);                               \
 317         } while (B_FALSE)
 318
 319
 320 #define EFSYS_MEM_WRITED(_esmp, _offset, _edp)                          \
 321         do {                                                            \
 322                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 323                 volatile uint32_t *_addr;                               \
 324                                                                         \
 325                 _NOTE(CONSTANTCONDITION);                               \
 326                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
 327                                                                         \
 328                 EFSYS_PROBE2(mem_writed, unsigned int, (_offset),       \
 329                                          uint32_t, (_edp)->ed_u32[0]);  \
 330                                                                         \
 331                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 332                 _addr[0] = (_edp)->ed_u32[0];                           \
 333                                                                         \
 334                 _NOTE(CONSTANTCONDITION);                               \
 335         } while (B_FALSE)
 336
 337 #define EFSYS_MEM_WRITEQ(_esmp, _offset, _eqp)                          \
 338         do {                                                            \
 339                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 340                 volatile uint64_t *_addr;                               \
 341                                                                         \
 342                 _NOTE(CONSTANTCONDITION);                               \
 343                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
 344                                                                         \
 345                 EFSYS_PROBE3(mem_writeq, unsigned int, (_offset),       \
 346                                          uint32_t, (_eqp)->eq_u32[1],   \
 347                                          uint32_t, (_eqp)->eq_u32[0]);  \
 348                                                                         \
 349                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 350                 _addr[0] = (_eqp)->eq_u64[0];                           \
 351                                                                         \
 352                 _NOTE(CONSTANTCONDITION);                               \
 353         } while (B_FALSE)
 354
 355 #define EFSYS_MEM_WRITEO(_esmp, _offset, _eop)                          \
 356         do {                                                            \
 357                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 358                 volatile __m128i *_addr;                                \
 359                                                                         \
 360                 _NOTE(CONSTANTCONDITION);                               \
 361                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
 362                                                                         \
 363                                                                         \
 364                 EFSYS_PROBE5(mem_writeo, unsigned int, (_offset),       \
 365                                          uint32_t, (_eop)->eo_u32[3],   \
 366                                          uint32_t, (_eop)->eo_u32[2],   \
 367                                          uint32_t, (_eop)->eo_u32[1],   \
 368                                          uint32_t, (_eop)->eo_u32[0]);  \
 369                                                                         \
 370                 _addr = (volatile __m128i *)(_base + (_offset));        \
 371                 _addr[0] = (_eop)->eo_u128[0];                          \
 372                                                                         \
 373                 _NOTE(CONSTANTCONDITION);                               \
 374         } while (B_FALSE)
 375
 376
 377 #define EFSYS_MEM_SIZE(_esmp)                                           \
 378         ((_esmp)->esm_mz->len)
 379
 380 #define EFSYS_MEM_ADDR(_esmp)                                           \
 381         ((_esmp)->esm_addr)
 382
 383 #define EFSYS_MEM_IS_NULL(_esmp)                                        \
 384         ((_esmp)->esm_base == NULL)
 385
 386 #define EFSYS_MEM_PREFETCH(_esmp, _offset)                              \
 387         do {                                                            \
 388                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 389                                                                         \
 390                 rte_prefetch0(_base + (_offset));                       \
 391         } while (0)
 392
 393
 394 /* BAR */
 395
 396 typedef struct efsys_bar_s {
 397         rte_spinlock_t          esb_lock;
 398         int                     esb_rid;
 399         struct rte_pci_device   *esb_dev;
 400         /*
 401          * Ideally it should have volatile qualifier to denote that
 402          * the memory may be updated by someone else. However, it adds
 403          * qualifier discard warnings when the pointer or its derivative
 404          * is passed to memset() or rte_mov16().
 405          * So, skip the qualifier here, but make sure that it is added
 406          * below in access macros.
 407          */
 408         void                    *esb_base;
 409 } efsys_bar_t;
 410
 411 #define SFC_BAR_LOCK_INIT(_esbp, _ifname)                               \
 412         do {                                                            \
 413                 rte_spinlock_init(&(_esbp)->esb_lock);                  \
 414                 _NOTE(CONSTANTCONDITION);                               \
 415         } while (B_FALSE)
 416 #define SFC_BAR_LOCK_DESTROY(_esbp)     ((void)0)
 417 #define SFC_BAR_LOCK(_esbp)             rte_spinlock_lock(&(_esbp)->esb_lock)
 418 #define SFC_BAR_UNLOCK(_esbp)           rte_spinlock_unlock(&(_esbp)->esb_lock)
 419
 420 #define EFSYS_BAR_READD(_esbp, _offset, _edp, _lock)                    \
 421         do {                                                            \
 422                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 423                 volatile uint32_t *_addr;                               \
 424                                                                         \
 425                 _NOTE(CONSTANTCONDITION);                               \
 426                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
 427                 _NOTE(CONSTANTCONDITION);                               \
 428                 if (_lock)                                              \
 429                         SFC_BAR_LOCK(_esbp);                            \
 430                                                                         \
 431                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 432                 rte_rmb();                                              \
 433                 (_edp)->ed_u32[0] = rte_read32_relaxed(_addr);          \
 434                                                                         \
 435                 EFSYS_PROBE2(bar_readd, unsigned int, (_offset),        \
 436                                          uint32_t, (_edp)->ed_u32[0]);  \
 437                                                                         \
 438                 _NOTE(CONSTANTCONDITION);                               \
 439                 if (_lock)                                              \
 440                         SFC_BAR_UNLOCK(_esbp);                          \
 441                 _NOTE(CONSTANTCONDITION);                               \
 442         } while (B_FALSE)
 443
 444 #define EFSYS_BAR_READQ(_esbp, _offset, _eqp)                           \
 445         do {                                                            \
 446                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 447                 volatile uint64_t *_addr;                               \
 448                                                                         \
 449                 _NOTE(CONSTANTCONDITION);                               \
 450                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
 451                                                                         \
 452                 SFC_BAR_LOCK(_esbp);                                    \
 453                                                                         \
 454                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 455                 rte_rmb();                                              \
 456                 (_eqp)->eq_u64[0] = rte_read64_relaxed(_addr);          \
 457                                                                         \
 458                 EFSYS_PROBE3(bar_readq, unsigned int, (_offset),        \
 459                                          uint32_t, (_eqp)->eq_u32[1],   \
 460                                          uint32_t, (_eqp)->eq_u32[0]);  \
 461                                                                         \
 462                 SFC_BAR_UNLOCK(_esbp);                                  \
 463                 _NOTE(CONSTANTCONDITION);                               \
 464         } while (B_FALSE)
 465
 466 #define EFSYS_BAR_READO(_esbp, _offset, _eop, _lock)                    \
 467         do {                                                            \
 468                 volatile uint8_t *_base = (_esbp)->esb_base;            \
 469                 volatile __m128i *_addr;                                \
 470                                                                         \
 471                 _NOTE(CONSTANTCONDITION);                               \
 472                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
 473                                                                         \
 474                 _NOTE(CONSTANTCONDITION);                               \
 475                 if (_lock)                                              \
 476                         SFC_BAR_LOCK(_esbp);                            \
 477                                                                         \
 478                 _addr = (volatile __m128i *)(_base + (_offset));        \
 479                 rte_rmb();                                              \
 480                 /* There is no rte_read128_relaxed() yet */             \
 481                 (_eop)->eo_u128[0] = _addr[0];                          \
 482                                                                         \
 483                 EFSYS_PROBE5(bar_reado, unsigned int, (_offset),        \
 484                                          uint32_t, (_eop)->eo_u32[3],   \
 485                                          uint32_t, (_eop)->eo_u32[2],   \
 486                                          uint32_t, (_eop)->eo_u32[1],   \
 487                                          uint32_t, (_eop)->eo_u32[0]);  \
 488                                                                         \
 489                 _NOTE(CONSTANTCONDITION);                               \
 490                 if (_lock)                                              \
 491                         SFC_BAR_UNLOCK(_esbp);                          \
 492                 _NOTE(CONSTANTCONDITION);                               \
 493         } while (B_FALSE)
 494
 495
 496 #define EFSYS_BAR_WRITED(_esbp, _offset, _edp, _lock)                   \
 497         do {                                                            \
 498                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 499                 volatile uint32_t *_addr;                               \
 500                                                                         \
 501                 _NOTE(CONSTANTCONDITION);                               \
 502                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
 503                                                                         \
 504                 _NOTE(CONSTANTCONDITION);                               \
 505                 if (_lock)                                              \
 506                         SFC_BAR_LOCK(_esbp);                            \
 507                                                                         \
 508                 EFSYS_PROBE2(bar_writed, unsigned int, (_offset),       \
 509                                          uint32_t, (_edp)->ed_u32[0]);  \
 510                                                                         \
 511                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 512                 rte_write32_relaxed((_edp)->ed_u32[0], _addr);          \
 513                 rte_wmb();                                              \
 514                                                                         \
 515                 _NOTE(CONSTANTCONDITION);                               \
 516                 if (_lock)                                              \
 517                         SFC_BAR_UNLOCK(_esbp);                          \
 518                 _NOTE(CONSTANTCONDITION);                               \
 519         } while (B_FALSE)
 520
 521 #define EFSYS_BAR_WRITEQ(_esbp, _offset, _eqp)                          \
 522         do {                                                            \
 523                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 524                 volatile uint64_t *_addr;                               \
 525                                                                         \
 526                 _NOTE(CONSTANTCONDITION);                               \
 527                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
 528                                                                         \
 529                 SFC_BAR_LOCK(_esbp);                                    \
 530                                                                         \
 531                 EFSYS_PROBE3(bar_writeq, unsigned int, (_offset),       \
 532                                          uint32_t, (_eqp)->eq_u32[1],   \
 533                                          uint32_t, (_eqp)->eq_u32[0]);  \
 534                                                                         \
 535                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 536                 rte_write64_relaxed((_eqp)->eq_u64[0], _addr);          \
 537                 rte_wmb();                                              \
 538                                                                         \
 539                 SFC_BAR_UNLOCK(_esbp);                                  \
 540                 _NOTE(CONSTANTCONDITION);                               \
 541         } while (B_FALSE)
 542
 543 /*
 544  * Guarantees 64bit aligned 64bit writes to write combined BAR mapping
 545  * (required by PIO hardware).
 546  *
 547  * Neither VFIO, nor UIO, nor NIC UIO (on FreeBSD) support
 548  * write-combined memory mapped to user-land, so just abort if used.
 549  */
 550 #define EFSYS_BAR_WC_WRITEQ(_esbp, _offset, _eqp)                       \
 551         do {                                                            \
 552                 rte_panic("Write-combined BAR access not supported");   \
 553         } while (B_FALSE)
 554
 555 #define EFSYS_BAR_WRITEO(_esbp, _offset, _eop, _lock)                   \
 556         do {                                                            \
 557                 volatile uint8_t *_base = (_esbp)->esb_base;            \
 558                 volatile __m128i *_addr;                                \
 559                                                                         \
 560                 _NOTE(CONSTANTCONDITION);                               \
 561                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
 562                                                                         \
 563                 _NOTE(CONSTANTCONDITION);                               \
 564                 if (_lock)                                              \
 565                         SFC_BAR_LOCK(_esbp);                            \
 566                                                                         \
 567                 EFSYS_PROBE5(bar_writeo, unsigned int, (_offset),       \
 568                                          uint32_t, (_eop)->eo_u32[3],   \
 569                                          uint32_t, (_eop)->eo_u32[2],   \
 570                                          uint32_t, (_eop)->eo_u32[1],   \
 571                                          uint32_t, (_eop)->eo_u32[0]);  \
 572                                                                         \
 573                 _addr = (volatile __m128i *)(_base + (_offset));        \
 574                 /* There is no rte_write128_relaxed() yet */            \
 575                 _addr[0] = (_eop)->eo_u128[0];                          \
 576                 rte_wmb();                                              \
 577                                                                         \
 578                 _NOTE(CONSTANTCONDITION);                               \
 579                 if (_lock)                                              \
 580                         SFC_BAR_UNLOCK(_esbp);                          \
 581                 _NOTE(CONSTANTCONDITION);                               \
 582         } while (B_FALSE)
 583
 584 /* Use the standard octo-word write for doorbell writes */
 585 #define EFSYS_BAR_DOORBELL_WRITEO(_esbp, _offset, _eop)                 \
 586         do {                                                            \
 587                 EFSYS_BAR_WRITEO((_esbp), (_offset), (_eop), B_FALSE);  \
 588                 _NOTE(CONSTANTCONDITION);                               \
 589         } while (B_FALSE)
 590
 591 /* SPIN */
 592
 593 #define EFSYS_SPIN(_us)                                                 \
 594         do {                                                            \
 595                 rte_delay_us(_us);                                      \
 596                 _NOTE(CONSTANTCONDITION);                               \
 597         } while (B_FALSE)
 598
 599 #define EFSYS_SLEEP EFSYS_SPIN
 600
 601 /* BARRIERS */
 602
 603 #define EFSYS_MEM_READ_BARRIER()        rte_rmb()
 604 #define EFSYS_PIO_WRITE_BARRIER()       rte_io_wmb()
 605
 606 /* DMA SYNC */
 607
 608 /*
 609  * DPDK does not provide any DMA syncing API, and no PMD drivers
 610  * have any traces of explicit DMA syncing.
 611  * DMA mapping is assumed to be coherent.
 612  */
 613
 614 #define EFSYS_DMA_SYNC_FOR_KERNEL(_esmp, _offset, _size)        ((void)0)
 615
 616 /* Just avoid store and compiler (impliciltly) reordering */
 617 #define EFSYS_DMA_SYNC_FOR_DEVICE(_esmp, _offset, _size)        rte_wmb()
 618
 619 /* TIMESTAMP */
 620
 621 typedef uint64_t efsys_timestamp_t;
 622
 623 #define EFSYS_TIMESTAMP(_usp)                                           \
 624         do {                                                            \
 625                 *(_usp) = rte_get_timer_cycles() * 1000000 /            \
 626                         rte_get_timer_hz();                             \
 627                 _NOTE(CONSTANTCONDITION);                               \
 628         } while (B_FALSE)
 629
 630 /* KMEM */
 631
 632 #define EFSYS_KMEM_ALLOC(_esip, _size, _p)                              \
 633         do {                                                            \
 634                 (_esip) = (_esip);                                      \
 635                 (_p) = rte_zmalloc("sfc", (_size), 0);                  \
 636                 _NOTE(CONSTANTCONDITION);                               \
 637         } while (B_FALSE)
 638
 639 #define EFSYS_KMEM_FREE(_esip, _size, _p)                               \
 640         do {                                                            \
 641                 (void)(_esip);                                          \
 642                 (void)(_size);                                          \
 643                 rte_free((_p));                                         \
 644                 _NOTE(CONSTANTCONDITION);                               \
 645         } while (B_FALSE)
 646
 647 /* LOCK */
 648
 649 typedef rte_spinlock_t efsys_lock_t;
 650
 651 #define SFC_EFSYS_LOCK_INIT(_eslp, _ifname, _label)     \
 652         rte_spinlock_init((_eslp))
 653 #define SFC_EFSYS_LOCK_DESTROY(_eslp) ((void)0)
 654 #define SFC_EFSYS_LOCK(_eslp)                           \
 655         rte_spinlock_lock((_eslp))
 656 #define SFC_EFSYS_UNLOCK(_eslp)                         \
 657         rte_spinlock_unlock((_eslp))
 658 #define SFC_EFSYS_LOCK_ASSERT_OWNED(_eslp)              \
 659         SFC_ASSERT(rte_spinlock_is_locked((_eslp)))
 660
 661 typedef int efsys_lock_state_t;
 662
 663 #define EFSYS_LOCK_MAGIC        0x000010c4
 664
 665 #define EFSYS_LOCK(_lockp, _state)                              \
 666         do {                                                    \
 667                 SFC_EFSYS_LOCK(_lockp);                         \
 668                 (_state) = EFSYS_LOCK_MAGIC;                    \
 669                 _NOTE(CONSTANTCONDITION);                       \
 670         } while (B_FALSE)
 671
 672 #define EFSYS_UNLOCK(_lockp, _state)                            \
 673         do {                                                    \
 674                 SFC_ASSERT((_state) == EFSYS_LOCK_MAGIC);       \
 675                 SFC_EFSYS_UNLOCK(_lockp);                       \
 676                 _NOTE(CONSTANTCONDITION);                       \
 677         } while (B_FALSE)
 678
 679 /* STAT */
 680
 681 typedef uint64_t        efsys_stat_t;
 682
 683 #define EFSYS_STAT_INCR(_knp, _delta)                           \
 684         do {                                                    \
 685                 *(_knp) += (_delta);                            \
 686                 _NOTE(CONSTANTCONDITION);                       \
 687         } while (B_FALSE)
 688
 689 #define EFSYS_STAT_DECR(_knp, _delta)                           \
 690         do {                                                    \
 691                 *(_knp) -= (_delta);                            \
 692                 _NOTE(CONSTANTCONDITION);                       \
 693         } while (B_FALSE)
 694
 695 #define EFSYS_STAT_SET(_knp, _val)                              \
 696         do {                                                    \
 697                 *(_knp) = (_val);                               \
 698                 _NOTE(CONSTANTCONDITION);                       \
 699         } while (B_FALSE)
 700
 701 #define EFSYS_STAT_SET_QWORD(_knp, _valp)                       \
 702         do {                                                    \
 703                 *(_knp) = rte_le_to_cpu_64((_valp)->eq_u64[0]); \
 704                 _NOTE(CONSTANTCONDITION);                       \
 705         } while (B_FALSE)
 706
 707 #define EFSYS_STAT_SET_DWORD(_knp, _valp)                       \
 708         do {                                                    \
 709                 *(_knp) = rte_le_to_cpu_32((_valp)->ed_u32[0]); \
 710                 _NOTE(CONSTANTCONDITION);                       \
 711         } while (B_FALSE)
 712
 713 #define EFSYS_STAT_INCR_QWORD(_knp, _valp)                              \
 714         do {                                                            \
 715                 *(_knp) += rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
 716                 _NOTE(CONSTANTCONDITION);                               \
 717         } while (B_FALSE)
 718
 719 #define EFSYS_STAT_SUBR_QWORD(_knp, _valp)                              \
 720         do {                                                            \
 721                 *(_knp) -= rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
 722                 _NOTE(CONSTANTCONDITION);                               \
 723         } while (B_FALSE)
 724
 725 /* ERR */
 726
 727 #if EFSYS_OPT_DECODE_INTR_FATAL
 728 #define EFSYS_ERR(_esip, _code, _dword0, _dword1)                       \
 729         do {                                                            \
 730                 (void)(_esip);                                          \
 731                 RTE_LOG(ERR, PMD, "FATAL ERROR #%u (0x%08x%08x)\n",     \
 732                         (_code), (_dword0), (_dword1));                 \
 733                 _NOTE(CONSTANTCONDITION);                               \
 734         } while (B_FALSE)
 735 #endif
 736
 737 /* ASSERT */
 738
 739 /* RTE_VERIFY from DPDK treats expressions with % operator incorrectly,
 740  * so we re-implement it here
 741  */
 742 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
 743 #define EFSYS_ASSERT(_exp)                                              \
 744         do {                                                            \
 745                 if (unlikely(!(_exp)))                                  \
 746                         rte_panic("line %d\tassert \"%s\" failed\n",    \
 747                                   __LINE__, (#_exp));                   \
 748         } while (0)
 749 #else
 750 #define EFSYS_ASSERT(_exp)              (void)(_exp)
 751 #endif
 752
 753 #define EFSYS_ASSERT3(_x, _op, _y, _t)  EFSYS_ASSERT((_t)(_x) _op (_t)(_y))
 754
 755 #define EFSYS_ASSERT3U(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uint64_t)
 756 #define EFSYS_ASSERT3S(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, int64_t)
 757 #define EFSYS_ASSERT3P(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uintptr_t)
 758
 759 /* ROTATE */
 760
 761 #define EFSYS_HAS_ROTL_DWORD    0
 762
 763 #ifdef __cplusplus
 764 }
 765 #endif
 766
 767 #endif  /* _SFC_COMMON_EFSYS_H */