drivers/net/sfc/efsys.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  * Copyright (c) 2016-2018 Solarflare Communications Inc.
   4  * All rights reserved.
   5  *
   6  * This software was jointly developed between OKTET Labs (under contract
   7  * for Solarflare) and Solarflare Communications, Inc.
   8  */
   9
  10 #ifndef _SFC_COMMON_EFSYS_H
  11 #define _SFC_COMMON_EFSYS_H
  12
  13 #include <stdbool.h>
  14
  15 #include <rte_spinlock.h>
  16 #include <rte_byteorder.h>
  17 #include <rte_debug.h>
  18 #include <rte_memzone.h>
  19 #include <rte_memory.h>
  20 #include <rte_memcpy.h>
  21 #include <rte_cycles.h>
  22 #include <rte_prefetch.h>
  23 #include <rte_common.h>
  24 #include <rte_malloc.h>
  25 #include <rte_log.h>
  26 #include <rte_io.h>
  27
  28 #include "sfc_debug.h"
  29
  30 #ifdef __cplusplus
  31 extern "C" {
  32 #endif
  33
  34 #define EFSYS_HAS_UINT64 1
  35 #define EFSYS_USE_UINT64 1
  36 #define EFSYS_HAS_SSE2_M128 1
  37
  38 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
  39 #define EFSYS_IS_BIG_ENDIAN 1
  40 #define EFSYS_IS_LITTLE_ENDIAN 0
  41 #elif RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
  42 #define EFSYS_IS_BIG_ENDIAN 0
  43 #define EFSYS_IS_LITTLE_ENDIAN 1
  44 #else
  45 #error "Cannot determine system endianness"
  46 #endif
  47 #include "efx_types.h"
  48
  49
  50 #ifndef _NOTE
  51 #define _NOTE(s)
  52 #endif
  53
  54 typedef bool boolean_t;
  55
  56 #ifndef B_FALSE
  57 #define B_FALSE false
  58 #endif
  59 #ifndef B_TRUE
  60 #define B_TRUE  true
  61 #endif
  62
  63 /*
  64  * RTE_MAX() and RTE_MIN() cannot be used since braced-group within
  65  * expression allowed only inside a function, but MAX() is used as
  66  * a number of elements in array.
  67  */
  68 #ifndef MAX
  69 #define MAX(v1, v2)     ((v1) > (v2) ? (v1) : (v2))
  70 #endif
  71 #ifndef MIN
  72 #define MIN(v1, v2)     ((v1) < (v2) ? (v1) : (v2))
  73 #endif
  74
  75 /* There are macros for alignment in DPDK, but we need to make a proper
  76  * correspondence here, if we want to re-use them at all
  77  */
  78 #ifndef IS_P2ALIGNED
  79 #define IS_P2ALIGNED(v, a)      ((((uintptr_t)(v)) & ((uintptr_t)(a) - 1)) == 0)
  80 #endif
  81
  82 #ifndef P2ROUNDUP
  83 #define P2ROUNDUP(x, align)     (-(-(x) & -(align)))
  84 #endif
  85
  86 #ifndef P2ALIGN
  87 #define P2ALIGN(_x, _a)         ((_x) & -(_a))
  88 #endif
  89
  90 #ifndef IS2P
  91 #define ISP2(x)                 rte_is_power_of_2(x)
  92 #endif
  93
  94 #define ENOTACTIVE      ENOTCONN
  95
  96 static inline void
  97 prefetch_read_many(const volatile void *addr)
  98 {
  99         rte_prefetch0(addr);
 100 }
 101
 102 static inline void
 103 prefetch_read_once(const volatile void *addr)
 104 {
 105         rte_prefetch_non_temporal(addr);
 106 }
 107
 108 /* Modifiers used for Windows builds */
 109 #define __in
 110 #define __in_opt
 111 #define __in_ecount(_n)
 112 #define __in_ecount_opt(_n)
 113 #define __in_bcount(_n)
 114 #define __in_bcount_opt(_n)
 115
 116 #define __out
 117 #define __out_opt
 118 #define __out_ecount(_n)
 119 #define __out_ecount_opt(_n)
 120 #define __out_bcount(_n)
 121 #define __out_bcount_opt(_n)
 122 #define __out_bcount_part(_n, _l)
 123 #define __out_bcount_part_opt(_n, _l)
 124
 125 #define __deref_out
 126
 127 #define __inout
 128 #define __inout_opt
 129 #define __inout_ecount(_n)
 130 #define __inout_ecount_opt(_n)
 131 #define __inout_bcount(_n)
 132 #define __inout_bcount_opt(_n)
 133 #define __inout_bcount_full_opt(_n)
 134
 135 #define __deref_out_bcount_opt(n)
 136
 137 #define __checkReturn
 138 #define __success(_x)
 139
 140 #define __drv_when(_p, _c)
 141
 142 /* Code inclusion options */
 143
 144
 145 #define EFSYS_OPT_NAMES 1
 146
 147 /* Disable SFN5xxx/SFN6xxx since it requires specific support in the PMD */
 148 #define EFSYS_OPT_SIENA 0
 149 /* Enable SFN7xxx support */
 150 #define EFSYS_OPT_HUNTINGTON 1
 151 /* Enable SFN8xxx support */
 152 #define EFSYS_OPT_MEDFORD 1
 153 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
 154 #define EFSYS_OPT_CHECK_REG 1
 155 #else
 156 #define EFSYS_OPT_CHECK_REG 0
 157 #endif
 158
 159 /* MCDI is required for SFN7xxx and SFN8xx */
 160 #define EFSYS_OPT_MCDI 1
 161 #define EFSYS_OPT_MCDI_LOGGING 1
 162 #define EFSYS_OPT_MCDI_PROXY_AUTH 1
 163
 164 #define EFSYS_OPT_MAC_STATS 1
 165
 166 #define EFSYS_OPT_LOOPBACK 0
 167
 168 #define EFSYS_OPT_MON_MCDI 0
 169 #define EFSYS_OPT_MON_STATS 0
 170
 171 #define EFSYS_OPT_PHY_STATS 0
 172 #define EFSYS_OPT_BIST 0
 173 #define EFSYS_OPT_PHY_LED_CONTROL 0
 174 #define EFSYS_OPT_PHY_FLAGS 0
 175
 176 #define EFSYS_OPT_VPD 0
 177 #define EFSYS_OPT_NVRAM 0
 178 #define EFSYS_OPT_BOOTCFG 0
 179
 180 #define EFSYS_OPT_DIAG 0
 181 #define EFSYS_OPT_RX_SCALE 1
 182 #define EFSYS_OPT_QSTATS 0
 183 /* Filters support is required for SFN7xxx and SFN8xx */
 184 #define EFSYS_OPT_FILTER 1
 185 #define EFSYS_OPT_RX_SCATTER 0
 186
 187 #define EFSYS_OPT_EV_PREFETCH 0
 188
 189 #define EFSYS_OPT_DECODE_INTR_FATAL 0
 190
 191 #define EFSYS_OPT_LICENSING 0
 192
 193 #define EFSYS_OPT_ALLOW_UNCONFIGURED_NIC 0
 194
 195 #define EFSYS_OPT_RX_PACKED_STREAM 0
 196
 197 #define EFSYS_OPT_TUNNEL 1
 198
 199 /* ID */
 200
 201 typedef struct __efsys_identifier_s efsys_identifier_t;
 202
 203
 204 #define EFSYS_PROBE(_name)                                              \
 205         do { } while (0)
 206
 207 #define EFSYS_PROBE1(_name, _type1, _arg1)                              \
 208         do { } while (0)
 209
 210 #define EFSYS_PROBE2(_name, _type1, _arg1, _type2, _arg2)               \
 211         do { } while (0)
 212
 213 #define EFSYS_PROBE3(_name, _type1, _arg1, _type2, _arg2,               \
 214                      _type3, _arg3)                                     \
 215         do { } while (0)
 216
 217 #define EFSYS_PROBE4(_name, _type1, _arg1, _type2, _arg2,               \
 218                      _type3, _arg3, _type4, _arg4)                      \
 219         do { } while (0)
 220
 221 #define EFSYS_PROBE5(_name, _type1, _arg1, _type2, _arg2,               \
 222                      _type3, _arg3, _type4, _arg4, _type5, _arg5)       \
 223         do { } while (0)
 224
 225 #define EFSYS_PROBE6(_name, _type1, _arg1, _type2, _arg2,               \
 226                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
 227                      _type6, _arg6)                                     \
 228         do { } while (0)
 229
 230 #define EFSYS_PROBE7(_name, _type1, _arg1, _type2, _arg2,               \
 231                      _type3, _arg3, _type4, _arg4, _type5, _arg5,       \
 232                      _type6, _arg6, _type7, _arg7)                      \
 233         do { } while (0)
 234
 235
 236 /* DMA */
 237
 238 typedef rte_iova_t efsys_dma_addr_t;
 239
 240 typedef struct efsys_mem_s {
 241         const struct rte_memzone        *esm_mz;
 242         /*
 243          * Ideally it should have volatile qualifier to denote that
 244          * the memory may be updated by someone else. However, it adds
 245          * qualifier discard warnings when the pointer or its derivative
 246          * is passed to memset() or rte_mov16().
 247          * So, skip the qualifier here, but make sure that it is added
 248          * below in access macros.
 249          */
 250         void                            *esm_base;
 251         efsys_dma_addr_t                esm_addr;
 252 } efsys_mem_t;
 253
 254
 255 #define EFSYS_MEM_ZERO(_esmp, _size)                                    \
 256         do {                                                            \
 257                 (void)memset((void *)(_esmp)->esm_base, 0, (_size));    \
 258                                                                         \
 259                 _NOTE(CONSTANTCONDITION);                               \
 260         } while (B_FALSE)
 261
 262 #define EFSYS_MEM_READD(_esmp, _offset, _edp)                           \
 263         do {                                                            \
 264                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 265                 volatile uint32_t *_addr;                               \
 266                                                                         \
 267                 _NOTE(CONSTANTCONDITION);                               \
 268                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
 269                                                                         \
 270                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 271                 (_edp)->ed_u32[0] = _addr[0];                           \
 272                                                                         \
 273                 EFSYS_PROBE2(mem_readl, unsigned int, (_offset),        \
 274                                          uint32_t, (_edp)->ed_u32[0]);  \
 275                                                                         \
 276                 _NOTE(CONSTANTCONDITION);                               \
 277         } while (B_FALSE)
 278
 279 #define EFSYS_MEM_READQ(_esmp, _offset, _eqp)                           \
 280         do {                                                            \
 281                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 282                 volatile uint64_t *_addr;                               \
 283                                                                         \
 284                 _NOTE(CONSTANTCONDITION);                               \
 285                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
 286                                                                         \
 287                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 288                 (_eqp)->eq_u64[0] = _addr[0];                           \
 289                                                                         \
 290                 EFSYS_PROBE3(mem_readq, unsigned int, (_offset),        \
 291                                          uint32_t, (_eqp)->eq_u32[1],   \
 292                                          uint32_t, (_eqp)->eq_u32[0]);  \
 293                                                                         \
 294                 _NOTE(CONSTANTCONDITION);                               \
 295         } while (B_FALSE)
 296
 297 #define EFSYS_MEM_READO(_esmp, _offset, _eop)                           \
 298         do {                                                            \
 299                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 300                 volatile __m128i *_addr;                                \
 301                                                                         \
 302                 _NOTE(CONSTANTCONDITION);                               \
 303                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
 304                                                                         \
 305                 _addr = (volatile __m128i *)(_base + (_offset));        \
 306                 (_eop)->eo_u128[0] = _addr[0];                          \
 307                                                                         \
 308                 EFSYS_PROBE5(mem_reado, unsigned int, (_offset),        \
 309                                          uint32_t, (_eop)->eo_u32[3],   \
 310                                          uint32_t, (_eop)->eo_u32[2],   \
 311                                          uint32_t, (_eop)->eo_u32[1],   \
 312                                          uint32_t, (_eop)->eo_u32[0]);  \
 313                                                                         \
 314                 _NOTE(CONSTANTCONDITION);                               \
 315         } while (B_FALSE)
 316
 317
 318 #define EFSYS_MEM_WRITED(_esmp, _offset, _edp)                          \
 319         do {                                                            \
 320                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 321                 volatile uint32_t *_addr;                               \
 322                                                                         \
 323                 _NOTE(CONSTANTCONDITION);                               \
 324                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
 325                                                                         \
 326                 EFSYS_PROBE2(mem_writed, unsigned int, (_offset),       \
 327                                          uint32_t, (_edp)->ed_u32[0]);  \
 328                                                                         \
 329                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 330                 _addr[0] = (_edp)->ed_u32[0];                           \
 331                                                                         \
 332                 _NOTE(CONSTANTCONDITION);                               \
 333         } while (B_FALSE)
 334
 335 #define EFSYS_MEM_WRITEQ(_esmp, _offset, _eqp)                          \
 336         do {                                                            \
 337                 volatile uint8_t  *_base = (_esmp)->esm_base;           \
 338                 volatile uint64_t *_addr;                               \
 339                                                                         \
 340                 _NOTE(CONSTANTCONDITION);                               \
 341                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
 342                                                                         \
 343                 EFSYS_PROBE3(mem_writeq, unsigned int, (_offset),       \
 344                                          uint32_t, (_eqp)->eq_u32[1],   \
 345                                          uint32_t, (_eqp)->eq_u32[0]);  \
 346                                                                         \
 347                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 348                 _addr[0] = (_eqp)->eq_u64[0];                           \
 349                                                                         \
 350                 _NOTE(CONSTANTCONDITION);                               \
 351         } while (B_FALSE)
 352
 353 #define EFSYS_MEM_WRITEO(_esmp, _offset, _eop)                          \
 354         do {                                                            \
 355                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 356                 volatile __m128i *_addr;                                \
 357                                                                         \
 358                 _NOTE(CONSTANTCONDITION);                               \
 359                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
 360                                                                         \
 361                                                                         \
 362                 EFSYS_PROBE5(mem_writeo, unsigned int, (_offset),       \
 363                                          uint32_t, (_eop)->eo_u32[3],   \
 364                                          uint32_t, (_eop)->eo_u32[2],   \
 365                                          uint32_t, (_eop)->eo_u32[1],   \
 366                                          uint32_t, (_eop)->eo_u32[0]);  \
 367                                                                         \
 368                 _addr = (volatile __m128i *)(_base + (_offset));        \
 369                 _addr[0] = (_eop)->eo_u128[0];                          \
 370                                                                         \
 371                 _NOTE(CONSTANTCONDITION);                               \
 372         } while (B_FALSE)
 373
 374
 375 #define EFSYS_MEM_ADDR(_esmp)                                           \
 376         ((_esmp)->esm_addr)
 377
 378 #define EFSYS_MEM_IS_NULL(_esmp)                                        \
 379         ((_esmp)->esm_base == NULL)
 380
 381 #define EFSYS_MEM_PREFETCH(_esmp, _offset)                              \
 382         do {                                                            \
 383                 volatile uint8_t *_base = (_esmp)->esm_base;            \
 384                                                                         \
 385                 rte_prefetch0(_base + (_offset));                       \
 386         } while (0)
 387
 388
 389 /* BAR */
 390
 391 typedef struct efsys_bar_s {
 392         rte_spinlock_t          esb_lock;
 393         int                     esb_rid;
 394         struct rte_pci_device   *esb_dev;
 395         /*
 396          * Ideally it should have volatile qualifier to denote that
 397          * the memory may be updated by someone else. However, it adds
 398          * qualifier discard warnings when the pointer or its derivative
 399          * is passed to memset() or rte_mov16().
 400          * So, skip the qualifier here, but make sure that it is added
 401          * below in access macros.
 402          */
 403         void                    *esb_base;
 404 } efsys_bar_t;
 405
 406 #define SFC_BAR_LOCK_INIT(_esbp, _ifname)                               \
 407         do {                                                            \
 408                 rte_spinlock_init(&(_esbp)->esb_lock);                  \
 409                 _NOTE(CONSTANTCONDITION);                               \
 410         } while (B_FALSE)
 411 #define SFC_BAR_LOCK_DESTROY(_esbp)     ((void)0)
 412 #define SFC_BAR_LOCK(_esbp)             rte_spinlock_lock(&(_esbp)->esb_lock)
 413 #define SFC_BAR_UNLOCK(_esbp)           rte_spinlock_unlock(&(_esbp)->esb_lock)
 414
 415 #define EFSYS_BAR_READD(_esbp, _offset, _edp, _lock)                    \
 416         do {                                                            \
 417                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 418                 volatile uint32_t *_addr;                               \
 419                                                                         \
 420                 _NOTE(CONSTANTCONDITION);                               \
 421                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
 422                 _NOTE(CONSTANTCONDITION);                               \
 423                 if (_lock)                                              \
 424                         SFC_BAR_LOCK(_esbp);                            \
 425                                                                         \
 426                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 427                 rte_rmb();                                              \
 428                 (_edp)->ed_u32[0] = rte_read32_relaxed(_addr);          \
 429                                                                         \
 430                 EFSYS_PROBE2(bar_readd, unsigned int, (_offset),        \
 431                                          uint32_t, (_edp)->ed_u32[0]);  \
 432                                                                         \
 433                 _NOTE(CONSTANTCONDITION);                               \
 434                 if (_lock)                                              \
 435                         SFC_BAR_UNLOCK(_esbp);                          \
 436                 _NOTE(CONSTANTCONDITION);                               \
 437         } while (B_FALSE)
 438
 439 #define EFSYS_BAR_READQ(_esbp, _offset, _eqp)                           \
 440         do {                                                            \
 441                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 442                 volatile uint64_t *_addr;                               \
 443                                                                         \
 444                 _NOTE(CONSTANTCONDITION);                               \
 445                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
 446                                                                         \
 447                 SFC_BAR_LOCK(_esbp);                                    \
 448                                                                         \
 449                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 450                 rte_rmb();                                              \
 451                 (_eqp)->eq_u64[0] = rte_read64_relaxed(_addr);          \
 452                                                                         \
 453                 EFSYS_PROBE3(bar_readq, unsigned int, (_offset),        \
 454                                          uint32_t, (_eqp)->eq_u32[1],   \
 455                                          uint32_t, (_eqp)->eq_u32[0]);  \
 456                                                                         \
 457                 SFC_BAR_UNLOCK(_esbp);                                  \
 458                 _NOTE(CONSTANTCONDITION);                               \
 459         } while (B_FALSE)
 460
 461 #define EFSYS_BAR_READO(_esbp, _offset, _eop, _lock)                    \
 462         do {                                                            \
 463                 volatile uint8_t *_base = (_esbp)->esb_base;            \
 464                 volatile __m128i *_addr;                                \
 465                                                                         \
 466                 _NOTE(CONSTANTCONDITION);                               \
 467                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
 468                                                                         \
 469                 _NOTE(CONSTANTCONDITION);                               \
 470                 if (_lock)                                              \
 471                         SFC_BAR_LOCK(_esbp);                            \
 472                                                                         \
 473                 _addr = (volatile __m128i *)(_base + (_offset));        \
 474                 rte_rmb();                                              \
 475                 /* There is no rte_read128_relaxed() yet */             \
 476                 (_eop)->eo_u128[0] = _addr[0];                          \
 477                                                                         \
 478                 EFSYS_PROBE5(bar_reado, unsigned int, (_offset),        \
 479                                          uint32_t, (_eop)->eo_u32[3],   \
 480                                          uint32_t, (_eop)->eo_u32[2],   \
 481                                          uint32_t, (_eop)->eo_u32[1],   \
 482                                          uint32_t, (_eop)->eo_u32[0]);  \
 483                                                                         \
 484                 _NOTE(CONSTANTCONDITION);                               \
 485                 if (_lock)                                              \
 486                         SFC_BAR_UNLOCK(_esbp);                          \
 487                 _NOTE(CONSTANTCONDITION);                               \
 488         } while (B_FALSE)
 489
 490
 491 #define EFSYS_BAR_WRITED(_esbp, _offset, _edp, _lock)                   \
 492         do {                                                            \
 493                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 494                 volatile uint32_t *_addr;                               \
 495                                                                         \
 496                 _NOTE(CONSTANTCONDITION);                               \
 497                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
 498                                                                         \
 499                 _NOTE(CONSTANTCONDITION);                               \
 500                 if (_lock)                                              \
 501                         SFC_BAR_LOCK(_esbp);                            \
 502                                                                         \
 503                 EFSYS_PROBE2(bar_writed, unsigned int, (_offset),       \
 504                                          uint32_t, (_edp)->ed_u32[0]);  \
 505                                                                         \
 506                 _addr = (volatile uint32_t *)(_base + (_offset));       \
 507                 rte_write32_relaxed((_edp)->ed_u32[0], _addr);          \
 508                 rte_wmb();                                              \
 509                                                                         \
 510                 _NOTE(CONSTANTCONDITION);                               \
 511                 if (_lock)                                              \
 512                         SFC_BAR_UNLOCK(_esbp);                          \
 513                 _NOTE(CONSTANTCONDITION);                               \
 514         } while (B_FALSE)
 515
 516 #define EFSYS_BAR_WRITEQ(_esbp, _offset, _eqp)                          \
 517         do {                                                            \
 518                 volatile uint8_t  *_base = (_esbp)->esb_base;           \
 519                 volatile uint64_t *_addr;                               \
 520                                                                         \
 521                 _NOTE(CONSTANTCONDITION);                               \
 522                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
 523                                                                         \
 524                 SFC_BAR_LOCK(_esbp);                                    \
 525                                                                         \
 526                 EFSYS_PROBE3(bar_writeq, unsigned int, (_offset),       \
 527                                          uint32_t, (_eqp)->eq_u32[1],   \
 528                                          uint32_t, (_eqp)->eq_u32[0]);  \
 529                                                                         \
 530                 _addr = (volatile uint64_t *)(_base + (_offset));       \
 531                 rte_write64_relaxed((_eqp)->eq_u64[0], _addr);          \
 532                 rte_wmb();                                              \
 533                                                                         \
 534                 SFC_BAR_UNLOCK(_esbp);                                  \
 535                 _NOTE(CONSTANTCONDITION);                               \
 536         } while (B_FALSE)
 537
 538 /*
 539  * Guarantees 64bit aligned 64bit writes to write combined BAR mapping
 540  * (required by PIO hardware).
 541  *
 542  * Neither VFIO, nor UIO, nor NIC UIO (on FreeBSD) support
 543  * write-combined memory mapped to user-land, so just abort if used.
 544  */
 545 #define EFSYS_BAR_WC_WRITEQ(_esbp, _offset, _eqp)                       \
 546         do {                                                            \
 547                 rte_panic("Write-combined BAR access not supported");   \
 548         } while (B_FALSE)
 549
 550 #define EFSYS_BAR_WRITEO(_esbp, _offset, _eop, _lock)                   \
 551         do {                                                            \
 552                 volatile uint8_t *_base = (_esbp)->esb_base;            \
 553                 volatile __m128i *_addr;                                \
 554                                                                         \
 555                 _NOTE(CONSTANTCONDITION);                               \
 556                 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
 557                                                                         \
 558                 _NOTE(CONSTANTCONDITION);                               \
 559                 if (_lock)                                              \
 560                         SFC_BAR_LOCK(_esbp);                            \
 561                                                                         \
 562                 EFSYS_PROBE5(bar_writeo, unsigned int, (_offset),       \
 563                                          uint32_t, (_eop)->eo_u32[3],   \
 564                                          uint32_t, (_eop)->eo_u32[2],   \
 565                                          uint32_t, (_eop)->eo_u32[1],   \
 566                                          uint32_t, (_eop)->eo_u32[0]);  \
 567                                                                         \
 568                 _addr = (volatile __m128i *)(_base + (_offset));        \
 569                 /* There is no rte_write128_relaxed() yet */            \
 570                 _addr[0] = (_eop)->eo_u128[0];                          \
 571                 rte_wmb();                                              \
 572                                                                         \
 573                 _NOTE(CONSTANTCONDITION);                               \
 574                 if (_lock)                                              \
 575                         SFC_BAR_UNLOCK(_esbp);                          \
 576                 _NOTE(CONSTANTCONDITION);                               \
 577         } while (B_FALSE)
 578
 579 /* Use the standard octo-word write for doorbell writes */
 580 #define EFSYS_BAR_DOORBELL_WRITEO(_esbp, _offset, _eop)                 \
 581         do {                                                            \
 582                 EFSYS_BAR_WRITEO((_esbp), (_offset), (_eop), B_FALSE);  \
 583                 _NOTE(CONSTANTCONDITION);                               \
 584         } while (B_FALSE)
 585
 586 /* SPIN */
 587
 588 #define EFSYS_SPIN(_us)                                                 \
 589         do {                                                            \
 590                 rte_delay_us(_us);                                      \
 591                 _NOTE(CONSTANTCONDITION);                               \
 592         } while (B_FALSE)
 593
 594 #define EFSYS_SLEEP EFSYS_SPIN
 595
 596 /* BARRIERS */
 597
 598 #define EFSYS_MEM_READ_BARRIER()        rte_rmb()
 599 #define EFSYS_PIO_WRITE_BARRIER()       rte_io_wmb()
 600
 601 /* DMA SYNC */
 602
 603 /*
 604  * DPDK does not provide any DMA syncing API, and no PMD drivers
 605  * have any traces of explicit DMA syncing.
 606  * DMA mapping is assumed to be coherent.
 607  */
 608
 609 #define EFSYS_DMA_SYNC_FOR_KERNEL(_esmp, _offset, _size)        ((void)0)
 610
 611 /* Just avoid store and compiler (impliciltly) reordering */
 612 #define EFSYS_DMA_SYNC_FOR_DEVICE(_esmp, _offset, _size)        rte_wmb()
 613
 614 /* TIMESTAMP */
 615
 616 typedef uint64_t efsys_timestamp_t;
 617
 618 #define EFSYS_TIMESTAMP(_usp)                                           \
 619         do {                                                            \
 620                 *(_usp) = rte_get_timer_cycles() * 1000000 /            \
 621                         rte_get_timer_hz();                             \
 622                 _NOTE(CONSTANTCONDITION);                               \
 623         } while (B_FALSE)
 624
 625 /* KMEM */
 626
 627 #define EFSYS_KMEM_ALLOC(_esip, _size, _p)                              \
 628         do {                                                            \
 629                 (_esip) = (_esip);                                      \
 630                 (_p) = rte_zmalloc("sfc", (_size), 0);                  \
 631                 _NOTE(CONSTANTCONDITION);                               \
 632         } while (B_FALSE)
 633
 634 #define EFSYS_KMEM_FREE(_esip, _size, _p)                               \
 635         do {                                                            \
 636                 (void)(_esip);                                          \
 637                 (void)(_size);                                          \
 638                 rte_free((_p));                                         \
 639                 _NOTE(CONSTANTCONDITION);                               \
 640         } while (B_FALSE)
 641
 642 /* LOCK */
 643
 644 typedef rte_spinlock_t efsys_lock_t;
 645
 646 #define SFC_EFSYS_LOCK_INIT(_eslp, _ifname, _label)     \
 647         rte_spinlock_init((_eslp))
 648 #define SFC_EFSYS_LOCK_DESTROY(_eslp) ((void)0)
 649 #define SFC_EFSYS_LOCK(_eslp)                           \
 650         rte_spinlock_lock((_eslp))
 651 #define SFC_EFSYS_UNLOCK(_eslp)                         \
 652         rte_spinlock_unlock((_eslp))
 653 #define SFC_EFSYS_LOCK_ASSERT_OWNED(_eslp)              \
 654         SFC_ASSERT(rte_spinlock_is_locked((_eslp)))
 655
 656 typedef int efsys_lock_state_t;
 657
 658 #define EFSYS_LOCK_MAGIC        0x000010c4
 659
 660 #define EFSYS_LOCK(_lockp, _state)                              \
 661         do {                                                    \
 662                 SFC_EFSYS_LOCK(_lockp);                         \
 663                 (_state) = EFSYS_LOCK_MAGIC;                    \
 664                 _NOTE(CONSTANTCONDITION);                       \
 665         } while (B_FALSE)
 666
 667 #define EFSYS_UNLOCK(_lockp, _state)                            \
 668         do {                                                    \
 669                 SFC_ASSERT((_state) == EFSYS_LOCK_MAGIC);       \
 670                 SFC_EFSYS_UNLOCK(_lockp);                       \
 671                 _NOTE(CONSTANTCONDITION);                       \
 672         } while (B_FALSE)
 673
 674 /* STAT */
 675
 676 typedef uint64_t        efsys_stat_t;
 677
 678 #define EFSYS_STAT_INCR(_knp, _delta)                           \
 679         do {                                                    \
 680                 *(_knp) += (_delta);                            \
 681                 _NOTE(CONSTANTCONDITION);                       \
 682         } while (B_FALSE)
 683
 684 #define EFSYS_STAT_DECR(_knp, _delta)                           \
 685         do {                                                    \
 686                 *(_knp) -= (_delta);                            \
 687                 _NOTE(CONSTANTCONDITION);                       \
 688         } while (B_FALSE)
 689
 690 #define EFSYS_STAT_SET(_knp, _val)                              \
 691         do {                                                    \
 692                 *(_knp) = (_val);                               \
 693                 _NOTE(CONSTANTCONDITION);                       \
 694         } while (B_FALSE)
 695
 696 #define EFSYS_STAT_SET_QWORD(_knp, _valp)                       \
 697         do {                                                    \
 698                 *(_knp) = rte_le_to_cpu_64((_valp)->eq_u64[0]); \
 699                 _NOTE(CONSTANTCONDITION);                       \
 700         } while (B_FALSE)
 701
 702 #define EFSYS_STAT_SET_DWORD(_knp, _valp)                       \
 703         do {                                                    \
 704                 *(_knp) = rte_le_to_cpu_32((_valp)->ed_u32[0]); \
 705                 _NOTE(CONSTANTCONDITION);                       \
 706         } while (B_FALSE)
 707
 708 #define EFSYS_STAT_INCR_QWORD(_knp, _valp)                              \
 709         do {                                                            \
 710                 *(_knp) += rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
 711                 _NOTE(CONSTANTCONDITION);                               \
 712         } while (B_FALSE)
 713
 714 #define EFSYS_STAT_SUBR_QWORD(_knp, _valp)                              \
 715         do {                                                            \
 716                 *(_knp) -= rte_le_to_cpu_64((_valp)->eq_u64[0]);        \
 717                 _NOTE(CONSTANTCONDITION);                               \
 718         } while (B_FALSE)
 719
 720 /* ERR */
 721
 722 #if EFSYS_OPT_DECODE_INTR_FATAL
 723 #define EFSYS_ERR(_esip, _code, _dword0, _dword1)                       \
 724         do {                                                            \
 725                 (void)(_esip);                                          \
 726                 RTE_LOG(ERR, PMD, "FATAL ERROR #%u (0x%08x%08x)\n",     \
 727                         (_code), (_dword0), (_dword1));                 \
 728                 _NOTE(CONSTANTCONDITION);                               \
 729         } while (B_FALSE)
 730 #endif
 731
 732 /* ASSERT */
 733
 734 /* RTE_VERIFY from DPDK treats expressions with % operator incorrectly,
 735  * so we re-implement it here
 736  */
 737 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
 738 #define EFSYS_ASSERT(_exp)                                              \
 739         do {                                                            \
 740                 if (unlikely(!(_exp)))                                  \
 741                         rte_panic("line %d\tassert \"%s\" failed\n",    \
 742                                   __LINE__, (#_exp));                   \
 743         } while (0)
 744 #else
 745 #define EFSYS_ASSERT(_exp)              (void)(_exp)
 746 #endif
 747
 748 #define EFSYS_ASSERT3(_x, _op, _y, _t)  EFSYS_ASSERT((_t)(_x) _op (_t)(_y))
 749
 750 #define EFSYS_ASSERT3U(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uint64_t)
 751 #define EFSYS_ASSERT3S(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, int64_t)
 752 #define EFSYS_ASSERT3P(_x, _op, _y)     EFSYS_ASSERT3(_x, _op, _y, uintptr_t)
 753
 754 /* ROTATE */
 755
 756 #define EFSYS_HAS_ROTL_DWORD    0
 757
 758 #ifdef __cplusplus
 759 }
 760 #endif
 761
 762 #endif  /* _SFC_COMMON_EFSYS_H */