4 * Copyright (c) 2016-2017 Solarflare Communications Inc.
7 * This software was jointly developed between OKTET Labs (under contract
8 * for Solarflare) and Solarflare Communications, Inc.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 #include <rte_ethdev.h>
35 #include <rte_errno.h>
40 #include "sfc_debug.h"
42 #include "sfc_kvargs.h"
48 #include "sfc_dp_rx.h"
50 static struct sfc_dp_list sfc_dp_head =
51 TAILQ_HEAD_INITIALIZER(sfc_dp_head);
54 sfc_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
56 struct sfc_adapter *sa = dev->data->dev_private;
57 efx_nic_fw_info_t enfi;
62 * Return value of the callback is likely supposed to be
63 * equal to or greater than 0, nevertheless, if an error
64 * occurs, it will be desirable to pass it to the caller
66 if ((fw_version == NULL) || (fw_size == 0))
69 rc = efx_nic_get_fw_version(sa->nic, &enfi);
73 ret = snprintf(fw_version, fw_size,
74 "%" PRIu16 ".%" PRIu16 ".%" PRIu16 ".%" PRIu16,
75 enfi.enfi_mc_fw_version[0], enfi.enfi_mc_fw_version[1],
76 enfi.enfi_mc_fw_version[2], enfi.enfi_mc_fw_version[3]);
80 if (enfi.enfi_dpcpu_fw_ids_valid) {
81 size_t dpcpu_fw_ids_offset = MIN(fw_size - 1, (size_t)ret);
84 ret_extra = snprintf(fw_version + dpcpu_fw_ids_offset,
85 fw_size - dpcpu_fw_ids_offset,
86 " rx%" PRIx16 " tx%" PRIx16,
87 enfi.enfi_rx_dpcpu_fw_id,
88 enfi.enfi_tx_dpcpu_fw_id);
95 if (fw_size < (size_t)(++ret))
102 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
104 struct sfc_adapter *sa = dev->data->dev_private;
105 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
107 sfc_log_init(sa, "entry");
109 dev_info->pci_dev = RTE_DEV_TO_PCI(dev->device);
110 dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX;
112 /* Autonegotiation may be disabled */
113 dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
114 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_1000FDX)
115 dev_info->speed_capa |= ETH_LINK_SPEED_1G;
116 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_10000FDX)
117 dev_info->speed_capa |= ETH_LINK_SPEED_10G;
118 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_40000FDX)
119 dev_info->speed_capa |= ETH_LINK_SPEED_40G;
121 dev_info->max_rx_queues = sa->rxq_max;
122 dev_info->max_tx_queues = sa->txq_max;
124 /* By default packets are dropped if no descriptors are available */
125 dev_info->default_rxconf.rx_drop_en = 1;
127 dev_info->rx_offload_capa =
128 DEV_RX_OFFLOAD_IPV4_CKSUM |
129 DEV_RX_OFFLOAD_UDP_CKSUM |
130 DEV_RX_OFFLOAD_TCP_CKSUM;
132 dev_info->tx_offload_capa =
133 DEV_TX_OFFLOAD_IPV4_CKSUM |
134 DEV_TX_OFFLOAD_UDP_CKSUM |
135 DEV_TX_OFFLOAD_TCP_CKSUM;
137 dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP;
138 if (!encp->enc_hw_tx_insert_vlan_enabled)
139 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
141 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_VLAN_INSERT;
143 #if EFSYS_OPT_RX_SCALE
144 if (sa->rss_support != EFX_RX_SCALE_UNAVAILABLE) {
145 dev_info->reta_size = EFX_RSS_TBL_SIZE;
146 dev_info->hash_key_size = SFC_RSS_KEY_SIZE;
147 dev_info->flow_type_rss_offloads = SFC_RSS_OFFLOADS;
152 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO;
154 dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS;
155 dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS;
156 /* The RXQ hardware requires that the descriptor count is a power
157 * of 2, but rx_desc_lim cannot properly describe that constraint.
159 dev_info->rx_desc_lim.nb_align = EFX_RXQ_MINNDESCS;
161 dev_info->tx_desc_lim.nb_max = sa->txq_max_entries;
162 dev_info->tx_desc_lim.nb_min = EFX_TXQ_MINNDESCS;
164 * The TXQ hardware requires that the descriptor count is a power
165 * of 2, but tx_desc_lim cannot properly describe that constraint
167 dev_info->tx_desc_lim.nb_align = EFX_TXQ_MINNDESCS;
170 static const uint32_t *
171 sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev)
173 struct sfc_adapter *sa = dev->data->dev_private;
175 return sa->dp_rx->supported_ptypes_get();
179 sfc_dev_configure(struct rte_eth_dev *dev)
181 struct rte_eth_dev_data *dev_data = dev->data;
182 struct sfc_adapter *sa = dev_data->dev_private;
185 sfc_log_init(sa, "entry n_rxq=%u n_txq=%u",
186 dev_data->nb_rx_queues, dev_data->nb_tx_queues);
188 sfc_adapter_lock(sa);
190 case SFC_ADAPTER_CONFIGURED:
192 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED);
194 case SFC_ADAPTER_INITIALIZED:
195 rc = sfc_configure(sa);
198 sfc_err(sa, "unexpected adapter state %u to configure",
203 sfc_adapter_unlock(sa);
205 sfc_log_init(sa, "done %d", rc);
211 sfc_dev_start(struct rte_eth_dev *dev)
213 struct sfc_adapter *sa = dev->data->dev_private;
216 sfc_log_init(sa, "entry");
218 sfc_adapter_lock(sa);
220 sfc_adapter_unlock(sa);
222 sfc_log_init(sa, "done %d", rc);
228 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
230 struct sfc_adapter *sa = dev->data->dev_private;
231 struct rte_eth_link *dev_link = &dev->data->dev_link;
232 struct rte_eth_link old_link;
233 struct rte_eth_link current_link;
235 sfc_log_init(sa, "entry");
238 EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t));
239 *(int64_t *)&old_link = rte_atomic64_read((rte_atomic64_t *)dev_link);
241 if (sa->state != SFC_ADAPTER_STARTED) {
242 sfc_port_link_mode_to_info(EFX_LINK_UNKNOWN, ¤t_link);
243 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link,
244 *(uint64_t *)&old_link,
245 *(uint64_t *)¤t_link))
247 } else if (wait_to_complete) {
248 efx_link_mode_t link_mode;
250 if (efx_port_poll(sa->nic, &link_mode) != 0)
251 link_mode = EFX_LINK_UNKNOWN;
252 sfc_port_link_mode_to_info(link_mode, ¤t_link);
254 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link,
255 *(uint64_t *)&old_link,
256 *(uint64_t *)¤t_link))
259 sfc_ev_mgmt_qpoll(sa);
260 *(int64_t *)¤t_link =
261 rte_atomic64_read((rte_atomic64_t *)dev_link);
264 if (old_link.link_status != current_link.link_status)
265 sfc_info(sa, "Link status is %s",
266 current_link.link_status ? "UP" : "DOWN");
268 return old_link.link_status == current_link.link_status ? 0 : -1;
272 sfc_dev_stop(struct rte_eth_dev *dev)
274 struct sfc_adapter *sa = dev->data->dev_private;
276 sfc_log_init(sa, "entry");
278 sfc_adapter_lock(sa);
280 sfc_adapter_unlock(sa);
282 sfc_log_init(sa, "done");
286 sfc_dev_set_link_up(struct rte_eth_dev *dev)
288 struct sfc_adapter *sa = dev->data->dev_private;
291 sfc_log_init(sa, "entry");
293 sfc_adapter_lock(sa);
295 sfc_adapter_unlock(sa);
302 sfc_dev_set_link_down(struct rte_eth_dev *dev)
304 struct sfc_adapter *sa = dev->data->dev_private;
306 sfc_log_init(sa, "entry");
308 sfc_adapter_lock(sa);
310 sfc_adapter_unlock(sa);
316 sfc_dev_close(struct rte_eth_dev *dev)
318 struct sfc_adapter *sa = dev->data->dev_private;
320 sfc_log_init(sa, "entry");
322 sfc_adapter_lock(sa);
324 case SFC_ADAPTER_STARTED:
326 SFC_ASSERT(sa->state == SFC_ADAPTER_CONFIGURED);
328 case SFC_ADAPTER_CONFIGURED:
330 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED);
332 case SFC_ADAPTER_INITIALIZED:
335 sfc_err(sa, "unexpected adapter state %u on close", sa->state);
338 sfc_adapter_unlock(sa);
340 sfc_log_init(sa, "done");
344 sfc_dev_filter_set(struct rte_eth_dev *dev, enum sfc_dev_filter_mode mode,
347 struct sfc_port *port;
349 struct sfc_adapter *sa = dev->data->dev_private;
350 boolean_t allmulti = (mode == SFC_DEV_FILTER_MODE_ALLMULTI);
351 const char *desc = (allmulti) ? "all-multi" : "promiscuous";
353 sfc_adapter_lock(sa);
356 toggle = (allmulti) ? (&port->allmulti) : (&port->promisc);
358 if (*toggle != enabled) {
361 if ((sa->state == SFC_ADAPTER_STARTED) &&
362 (sfc_set_rx_mode(sa) != 0)) {
363 *toggle = !(enabled);
364 sfc_warn(sa, "Failed to %s %s mode",
365 ((enabled) ? "enable" : "disable"), desc);
369 sfc_adapter_unlock(sa);
373 sfc_dev_promisc_enable(struct rte_eth_dev *dev)
375 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_TRUE);
379 sfc_dev_promisc_disable(struct rte_eth_dev *dev)
381 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_FALSE);
385 sfc_dev_allmulti_enable(struct rte_eth_dev *dev)
387 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_TRUE);
391 sfc_dev_allmulti_disable(struct rte_eth_dev *dev)
393 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_FALSE);
397 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
398 uint16_t nb_rx_desc, unsigned int socket_id,
399 const struct rte_eth_rxconf *rx_conf,
400 struct rte_mempool *mb_pool)
402 struct sfc_adapter *sa = dev->data->dev_private;
405 sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u",
406 rx_queue_id, nb_rx_desc, socket_id);
408 sfc_adapter_lock(sa);
410 rc = sfc_rx_qinit(sa, rx_queue_id, nb_rx_desc, socket_id,
415 dev->data->rx_queues[rx_queue_id] = sa->rxq_info[rx_queue_id].rxq->dp;
417 sfc_adapter_unlock(sa);
422 sfc_adapter_unlock(sa);
428 sfc_rx_queue_release(void *queue)
430 struct sfc_dp_rxq *dp_rxq = queue;
432 struct sfc_adapter *sa;
433 unsigned int sw_index;
438 rxq = sfc_rxq_by_dp_rxq(dp_rxq);
440 sfc_adapter_lock(sa);
442 sw_index = sfc_rxq_sw_index(rxq);
444 sfc_log_init(sa, "RxQ=%u", sw_index);
446 sa->eth_dev->data->rx_queues[sw_index] = NULL;
448 sfc_rx_qfini(sa, sw_index);
450 sfc_adapter_unlock(sa);
454 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
455 uint16_t nb_tx_desc, unsigned int socket_id,
456 const struct rte_eth_txconf *tx_conf)
458 struct sfc_adapter *sa = dev->data->dev_private;
461 sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u",
462 tx_queue_id, nb_tx_desc, socket_id);
464 sfc_adapter_lock(sa);
466 rc = sfc_tx_qinit(sa, tx_queue_id, nb_tx_desc, socket_id, tx_conf);
470 dev->data->tx_queues[tx_queue_id] = sa->txq_info[tx_queue_id].txq;
472 sfc_adapter_unlock(sa);
476 sfc_adapter_unlock(sa);
482 sfc_tx_queue_release(void *queue)
484 struct sfc_txq *txq = queue;
485 unsigned int sw_index;
486 struct sfc_adapter *sa;
491 sw_index = sfc_txq_sw_index(txq);
493 SFC_ASSERT(txq->evq != NULL);
496 sfc_log_init(sa, "TxQ = %u", sw_index);
498 sfc_adapter_lock(sa);
500 SFC_ASSERT(sw_index < sa->eth_dev->data->nb_tx_queues);
501 sa->eth_dev->data->tx_queues[sw_index] = NULL;
503 sfc_tx_qfini(sa, sw_index);
505 sfc_adapter_unlock(sa);
509 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
511 struct sfc_adapter *sa = dev->data->dev_private;
512 struct sfc_port *port = &sa->port;
515 rte_spinlock_lock(&port->mac_stats_lock);
517 if (sfc_port_update_mac_stats(sa) != 0)
520 mac_stats = port->mac_stats_buf;
522 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask,
523 EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) {
525 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] +
526 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] +
527 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS];
529 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] +
530 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] +
531 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS];
533 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] +
534 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] +
535 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES];
537 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] +
538 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] +
539 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES];
540 stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_OVERFLOW];
541 stats->ierrors = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS];
542 stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS];
544 stats->ipackets = mac_stats[EFX_MAC_RX_PKTS];
545 stats->opackets = mac_stats[EFX_MAC_TX_PKTS];
546 stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS];
547 stats->obytes = mac_stats[EFX_MAC_TX_OCTETS];
549 * Take into account stats which are whenever supported
550 * on EF10. If some stat is not supported by current
551 * firmware variant or HW revision, it is guaranteed
552 * to be zero in mac_stats.
555 mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] +
556 mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] +
557 mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] +
558 mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] +
559 mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] +
560 mac_stats[EFX_MAC_PM_TRUNC_QBB] +
561 mac_stats[EFX_MAC_PM_DISCARD_QBB] +
562 mac_stats[EFX_MAC_PM_DISCARD_MAPPING] +
563 mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] +
564 mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS];
566 mac_stats[EFX_MAC_RX_FCS_ERRORS] +
567 mac_stats[EFX_MAC_RX_ALIGN_ERRORS] +
568 mac_stats[EFX_MAC_RX_JABBER_PKTS];
569 /* no oerrors counters supported on EF10 */
573 rte_spinlock_unlock(&port->mac_stats_lock);
577 sfc_stats_reset(struct rte_eth_dev *dev)
579 struct sfc_adapter *sa = dev->data->dev_private;
580 struct sfc_port *port = &sa->port;
583 if (sa->state != SFC_ADAPTER_STARTED) {
585 * The operation cannot be done if port is not started; it
586 * will be scheduled to be done during the next port start
588 port->mac_stats_reset_pending = B_TRUE;
592 rc = sfc_port_reset_mac_stats(sa);
594 sfc_err(sa, "failed to reset statistics (rc = %d)", rc);
598 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
599 unsigned int xstats_count)
601 struct sfc_adapter *sa = dev->data->dev_private;
602 struct sfc_port *port = &sa->port;
608 rte_spinlock_lock(&port->mac_stats_lock);
610 rc = sfc_port_update_mac_stats(sa);
617 mac_stats = port->mac_stats_buf;
619 for (i = 0; i < EFX_MAC_NSTATS; ++i) {
620 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) {
621 if (xstats != NULL && nstats < (int)xstats_count) {
622 xstats[nstats].id = nstats;
623 xstats[nstats].value = mac_stats[i];
630 rte_spinlock_unlock(&port->mac_stats_lock);
636 sfc_xstats_get_names(struct rte_eth_dev *dev,
637 struct rte_eth_xstat_name *xstats_names,
638 unsigned int xstats_count)
640 struct sfc_adapter *sa = dev->data->dev_private;
641 struct sfc_port *port = &sa->port;
643 unsigned int nstats = 0;
645 for (i = 0; i < EFX_MAC_NSTATS; ++i) {
646 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) {
647 if (xstats_names != NULL && nstats < xstats_count)
648 strncpy(xstats_names[nstats].name,
649 efx_mac_stat_name(sa->nic, i),
650 sizeof(xstats_names[0].name));
659 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
661 struct sfc_adapter *sa = dev->data->dev_private;
662 unsigned int wanted_fc, link_fc;
664 memset(fc_conf, 0, sizeof(*fc_conf));
666 sfc_adapter_lock(sa);
668 if (sa->state == SFC_ADAPTER_STARTED)
669 efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc);
671 link_fc = sa->port.flow_ctrl;
675 fc_conf->mode = RTE_FC_NONE;
677 case EFX_FCNTL_RESPOND:
678 fc_conf->mode = RTE_FC_RX_PAUSE;
680 case EFX_FCNTL_GENERATE:
681 fc_conf->mode = RTE_FC_TX_PAUSE;
683 case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE):
684 fc_conf->mode = RTE_FC_FULL;
687 sfc_err(sa, "%s: unexpected flow control value %#x",
691 fc_conf->autoneg = sa->port.flow_ctrl_autoneg;
693 sfc_adapter_unlock(sa);
699 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
701 struct sfc_adapter *sa = dev->data->dev_private;
702 struct sfc_port *port = &sa->port;
706 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 ||
707 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 ||
708 fc_conf->mac_ctrl_frame_fwd != 0) {
709 sfc_err(sa, "unsupported flow control settings specified");
714 switch (fc_conf->mode) {
718 case RTE_FC_RX_PAUSE:
719 fcntl = EFX_FCNTL_RESPOND;
721 case RTE_FC_TX_PAUSE:
722 fcntl = EFX_FCNTL_GENERATE;
725 fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
732 sfc_adapter_lock(sa);
734 if (sa->state == SFC_ADAPTER_STARTED) {
735 rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg);
737 goto fail_mac_fcntl_set;
740 port->flow_ctrl = fcntl;
741 port->flow_ctrl_autoneg = fc_conf->autoneg;
743 sfc_adapter_unlock(sa);
748 sfc_adapter_unlock(sa);
755 sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
757 struct sfc_adapter *sa = dev->data->dev_private;
758 size_t pdu = EFX_MAC_PDU(mtu);
762 sfc_log_init(sa, "mtu=%u", mtu);
765 if (pdu < EFX_MAC_PDU_MIN) {
766 sfc_err(sa, "too small MTU %u (PDU size %u less than min %u)",
767 (unsigned int)mtu, (unsigned int)pdu,
771 if (pdu > EFX_MAC_PDU_MAX) {
772 sfc_err(sa, "too big MTU %u (PDU size %u greater than max %u)",
773 (unsigned int)mtu, (unsigned int)pdu,
778 sfc_adapter_lock(sa);
780 if (pdu != sa->port.pdu) {
781 if (sa->state == SFC_ADAPTER_STARTED) {
784 old_pdu = sa->port.pdu;
795 * The driver does not use it, but other PMDs update jumbo_frame
796 * flag and max_rx_pkt_len when MTU is set.
798 dev->data->dev_conf.rxmode.jumbo_frame = (mtu > ETHER_MAX_LEN);
799 dev->data->dev_conf.rxmode.max_rx_pkt_len = sa->port.pdu;
801 sfc_adapter_unlock(sa);
803 sfc_log_init(sa, "done");
807 sa->port.pdu = old_pdu;
808 if (sfc_start(sa) != 0)
809 sfc_err(sa, "cannot start with neither new (%u) nor old (%u) "
810 "PDU max size - port is stopped",
811 (unsigned int)pdu, (unsigned int)old_pdu);
812 sfc_adapter_unlock(sa);
815 sfc_log_init(sa, "failed %d", rc);
820 sfc_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
822 struct sfc_adapter *sa = dev->data->dev_private;
823 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
826 sfc_adapter_lock(sa);
828 if (sa->state != SFC_ADAPTER_STARTED) {
829 sfc_info(sa, "the port is not started");
830 sfc_info(sa, "the new MAC address will be set on port start");
835 if (encp->enc_allow_set_mac_with_installed_filters) {
836 rc = efx_mac_addr_set(sa->nic, mac_addr->addr_bytes);
838 sfc_err(sa, "cannot set MAC address (rc = %u)", rc);
843 * Changing the MAC address by means of MCDI request
844 * has no effect on received traffic, therefore
845 * we also need to update unicast filters
847 rc = sfc_set_rx_mode(sa);
849 sfc_err(sa, "cannot set filter (rc = %u)", rc);
851 sfc_warn(sa, "cannot set MAC address with filters installed");
852 sfc_warn(sa, "adapter will be restarted to pick the new MAC");
853 sfc_warn(sa, "(some traffic may be dropped)");
856 * Since setting MAC address with filters installed is not
857 * allowed on the adapter, one needs to simply restart adapter
858 * so that the new MAC address will be taken from an outer
859 * storage and set flawlessly by means of sfc_start() call
864 sfc_err(sa, "cannot restart adapter (rc = %u)", rc);
868 sfc_adapter_unlock(sa);
873 sfc_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set,
876 struct sfc_adapter *sa = dev->data->dev_private;
877 struct sfc_port *port = &sa->port;
878 uint8_t *mc_addrs = port->mcast_addrs;
882 if (mc_addrs == NULL)
885 if (nb_mc_addr > port->max_mcast_addrs) {
886 sfc_err(sa, "too many multicast addresses: %u > %u",
887 nb_mc_addr, port->max_mcast_addrs);
891 for (i = 0; i < nb_mc_addr; ++i) {
892 (void)rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes,
894 mc_addrs += EFX_MAC_ADDR_LEN;
897 port->nb_mcast_addrs = nb_mc_addr;
899 if (sa->state != SFC_ADAPTER_STARTED)
902 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs,
903 port->nb_mcast_addrs);
905 sfc_err(sa, "cannot set multicast address list (rc = %u)", rc);
912 sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id,
913 struct rte_eth_rxq_info *qinfo)
915 struct sfc_adapter *sa = dev->data->dev_private;
916 struct sfc_rxq_info *rxq_info;
919 sfc_adapter_lock(sa);
921 SFC_ASSERT(rx_queue_id < sa->rxq_count);
923 rxq_info = &sa->rxq_info[rx_queue_id];
925 SFC_ASSERT(rxq != NULL);
927 qinfo->mp = rxq->refill_mb_pool;
928 qinfo->conf.rx_free_thresh = rxq->refill_threshold;
929 qinfo->conf.rx_drop_en = 1;
930 qinfo->conf.rx_deferred_start = rxq_info->deferred_start;
931 qinfo->scattered_rx = (rxq_info->type == EFX_RXQ_TYPE_SCATTER);
932 qinfo->nb_desc = rxq_info->entries;
934 sfc_adapter_unlock(sa);
938 sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id,
939 struct rte_eth_txq_info *qinfo)
941 struct sfc_adapter *sa = dev->data->dev_private;
942 struct sfc_txq_info *txq_info;
944 sfc_adapter_lock(sa);
946 SFC_ASSERT(tx_queue_id < sa->txq_count);
948 txq_info = &sa->txq_info[tx_queue_id];
949 SFC_ASSERT(txq_info->txq != NULL);
951 memset(qinfo, 0, sizeof(*qinfo));
953 qinfo->conf.txq_flags = txq_info->txq->flags;
954 qinfo->conf.tx_free_thresh = txq_info->txq->free_thresh;
955 qinfo->conf.tx_deferred_start = txq_info->deferred_start;
956 qinfo->nb_desc = txq_info->entries;
958 sfc_adapter_unlock(sa);
962 sfc_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
964 struct sfc_adapter *sa = dev->data->dev_private;
966 sfc_log_init(sa, "RxQ=%u", rx_queue_id);
968 return sfc_rx_qdesc_npending(sa, rx_queue_id);
972 sfc_rx_descriptor_done(void *queue, uint16_t offset)
974 struct sfc_dp_rxq *dp_rxq = queue;
976 return sfc_rx_qdesc_done(dp_rxq, offset);
980 sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
982 struct sfc_adapter *sa = dev->data->dev_private;
985 sfc_log_init(sa, "RxQ=%u", rx_queue_id);
987 sfc_adapter_lock(sa);
990 if (sa->state != SFC_ADAPTER_STARTED)
991 goto fail_not_started;
993 rc = sfc_rx_qstart(sa, rx_queue_id);
997 sa->rxq_info[rx_queue_id].deferred_started = B_TRUE;
999 sfc_adapter_unlock(sa);
1005 sfc_adapter_unlock(sa);
1011 sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1013 struct sfc_adapter *sa = dev->data->dev_private;
1015 sfc_log_init(sa, "RxQ=%u", rx_queue_id);
1017 sfc_adapter_lock(sa);
1018 sfc_rx_qstop(sa, rx_queue_id);
1020 sa->rxq_info[rx_queue_id].deferred_started = B_FALSE;
1022 sfc_adapter_unlock(sa);
1028 sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1030 struct sfc_adapter *sa = dev->data->dev_private;
1033 sfc_log_init(sa, "TxQ = %u", tx_queue_id);
1035 sfc_adapter_lock(sa);
1038 if (sa->state != SFC_ADAPTER_STARTED)
1039 goto fail_not_started;
1041 rc = sfc_tx_qstart(sa, tx_queue_id);
1043 goto fail_tx_qstart;
1045 sa->txq_info[tx_queue_id].deferred_started = B_TRUE;
1047 sfc_adapter_unlock(sa);
1053 sfc_adapter_unlock(sa);
1059 sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1061 struct sfc_adapter *sa = dev->data->dev_private;
1063 sfc_log_init(sa, "TxQ = %u", tx_queue_id);
1065 sfc_adapter_lock(sa);
1067 sfc_tx_qstop(sa, tx_queue_id);
1069 sa->txq_info[tx_queue_id].deferred_started = B_FALSE;
1071 sfc_adapter_unlock(sa);
1075 #if EFSYS_OPT_RX_SCALE
1077 sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1078 struct rte_eth_rss_conf *rss_conf)
1080 struct sfc_adapter *sa = dev->data->dev_private;
1082 if ((sa->rss_channels == 1) ||
1083 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE))
1086 sfc_adapter_lock(sa);
1089 * Mapping of hash configuration between RTE and EFX is not one-to-one,
1090 * hence, conversion is done here to derive a correct set of ETH_RSS
1091 * flags which corresponds to the active EFX configuration stored
1092 * locally in 'sfc_adapter' and kept up-to-date
1094 rss_conf->rss_hf = sfc_efx_to_rte_hash_type(sa->rss_hash_types);
1095 rss_conf->rss_key_len = SFC_RSS_KEY_SIZE;
1096 if (rss_conf->rss_key != NULL)
1097 rte_memcpy(rss_conf->rss_key, sa->rss_key, SFC_RSS_KEY_SIZE);
1099 sfc_adapter_unlock(sa);
1105 sfc_dev_rss_hash_update(struct rte_eth_dev *dev,
1106 struct rte_eth_rss_conf *rss_conf)
1108 struct sfc_adapter *sa = dev->data->dev_private;
1109 unsigned int efx_hash_types;
1112 if ((sa->rss_channels == 1) ||
1113 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) {
1114 sfc_err(sa, "RSS is not available");
1118 if ((rss_conf->rss_key != NULL) &&
1119 (rss_conf->rss_key_len != sizeof(sa->rss_key))) {
1120 sfc_err(sa, "RSS key size is wrong (should be %lu)",
1121 sizeof(sa->rss_key));
1125 if ((rss_conf->rss_hf & ~SFC_RSS_OFFLOADS) != 0) {
1126 sfc_err(sa, "unsupported hash functions requested");
1130 sfc_adapter_lock(sa);
1132 efx_hash_types = sfc_rte_to_efx_hash_type(rss_conf->rss_hf);
1134 rc = efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ,
1135 efx_hash_types, B_TRUE);
1137 goto fail_scale_mode_set;
1139 if (rss_conf->rss_key != NULL) {
1140 if (sa->state == SFC_ADAPTER_STARTED) {
1141 rc = efx_rx_scale_key_set(sa->nic, rss_conf->rss_key,
1142 sizeof(sa->rss_key));
1144 goto fail_scale_key_set;
1147 rte_memcpy(sa->rss_key, rss_conf->rss_key, sizeof(sa->rss_key));
1150 sa->rss_hash_types = efx_hash_types;
1152 sfc_adapter_unlock(sa);
1157 if (efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ,
1158 sa->rss_hash_types, B_TRUE) != 0)
1159 sfc_err(sa, "failed to restore RSS mode");
1161 fail_scale_mode_set:
1162 sfc_adapter_unlock(sa);
1167 sfc_dev_rss_reta_query(struct rte_eth_dev *dev,
1168 struct rte_eth_rss_reta_entry64 *reta_conf,
1171 struct sfc_adapter *sa = dev->data->dev_private;
1174 if ((sa->rss_channels == 1) ||
1175 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE))
1178 if (reta_size != EFX_RSS_TBL_SIZE)
1181 sfc_adapter_lock(sa);
1183 for (entry = 0; entry < reta_size; entry++) {
1184 int grp = entry / RTE_RETA_GROUP_SIZE;
1185 int grp_idx = entry % RTE_RETA_GROUP_SIZE;
1187 if ((reta_conf[grp].mask >> grp_idx) & 1)
1188 reta_conf[grp].reta[grp_idx] = sa->rss_tbl[entry];
1191 sfc_adapter_unlock(sa);
1197 sfc_dev_rss_reta_update(struct rte_eth_dev *dev,
1198 struct rte_eth_rss_reta_entry64 *reta_conf,
1201 struct sfc_adapter *sa = dev->data->dev_private;
1202 unsigned int *rss_tbl_new;
1207 if ((sa->rss_channels == 1) ||
1208 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) {
1209 sfc_err(sa, "RSS is not available");
1213 if (reta_size != EFX_RSS_TBL_SIZE) {
1214 sfc_err(sa, "RETA size is wrong (should be %u)",
1219 rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(sa->rss_tbl), 0);
1220 if (rss_tbl_new == NULL)
1223 sfc_adapter_lock(sa);
1225 rte_memcpy(rss_tbl_new, sa->rss_tbl, sizeof(sa->rss_tbl));
1227 for (entry = 0; entry < reta_size; entry++) {
1228 int grp_idx = entry % RTE_RETA_GROUP_SIZE;
1229 struct rte_eth_rss_reta_entry64 *grp;
1231 grp = &reta_conf[entry / RTE_RETA_GROUP_SIZE];
1233 if (grp->mask & (1ull << grp_idx)) {
1234 if (grp->reta[grp_idx] >= sa->rss_channels) {
1236 goto bad_reta_entry;
1238 rss_tbl_new[entry] = grp->reta[grp_idx];
1242 rc = efx_rx_scale_tbl_set(sa->nic, rss_tbl_new, EFX_RSS_TBL_SIZE);
1244 rte_memcpy(sa->rss_tbl, rss_tbl_new, sizeof(sa->rss_tbl));
1247 sfc_adapter_unlock(sa);
1249 rte_free(rss_tbl_new);
1251 SFC_ASSERT(rc >= 0);
1257 sfc_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type,
1258 enum rte_filter_op filter_op,
1261 struct sfc_adapter *sa = dev->data->dev_private;
1264 sfc_log_init(sa, "entry");
1266 switch (filter_type) {
1267 case RTE_ETH_FILTER_NONE:
1268 sfc_err(sa, "Global filters configuration not supported");
1270 case RTE_ETH_FILTER_MACVLAN:
1271 sfc_err(sa, "MACVLAN filters not supported");
1273 case RTE_ETH_FILTER_ETHERTYPE:
1274 sfc_err(sa, "EtherType filters not supported");
1276 case RTE_ETH_FILTER_FLEXIBLE:
1277 sfc_err(sa, "Flexible filters not supported");
1279 case RTE_ETH_FILTER_SYN:
1280 sfc_err(sa, "SYN filters not supported");
1282 case RTE_ETH_FILTER_NTUPLE:
1283 sfc_err(sa, "NTUPLE filters not supported");
1285 case RTE_ETH_FILTER_TUNNEL:
1286 sfc_err(sa, "Tunnel filters not supported");
1288 case RTE_ETH_FILTER_FDIR:
1289 sfc_err(sa, "Flow Director filters not supported");
1291 case RTE_ETH_FILTER_HASH:
1292 sfc_err(sa, "Hash filters not supported");
1294 case RTE_ETH_FILTER_GENERIC:
1295 if (filter_op != RTE_ETH_FILTER_GET) {
1298 *(const void **)arg = &sfc_flow_ops;
1303 sfc_err(sa, "Unknown filter type %u", filter_type);
1307 sfc_log_init(sa, "exit: %d", -rc);
1308 SFC_ASSERT(rc >= 0);
1312 static const struct eth_dev_ops sfc_eth_dev_ops = {
1313 .dev_configure = sfc_dev_configure,
1314 .dev_start = sfc_dev_start,
1315 .dev_stop = sfc_dev_stop,
1316 .dev_set_link_up = sfc_dev_set_link_up,
1317 .dev_set_link_down = sfc_dev_set_link_down,
1318 .dev_close = sfc_dev_close,
1319 .promiscuous_enable = sfc_dev_promisc_enable,
1320 .promiscuous_disable = sfc_dev_promisc_disable,
1321 .allmulticast_enable = sfc_dev_allmulti_enable,
1322 .allmulticast_disable = sfc_dev_allmulti_disable,
1323 .link_update = sfc_dev_link_update,
1324 .stats_get = sfc_stats_get,
1325 .stats_reset = sfc_stats_reset,
1326 .xstats_get = sfc_xstats_get,
1327 .xstats_reset = sfc_stats_reset,
1328 .xstats_get_names = sfc_xstats_get_names,
1329 .dev_infos_get = sfc_dev_infos_get,
1330 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get,
1331 .mtu_set = sfc_dev_set_mtu,
1332 .rx_queue_start = sfc_rx_queue_start,
1333 .rx_queue_stop = sfc_rx_queue_stop,
1334 .tx_queue_start = sfc_tx_queue_start,
1335 .tx_queue_stop = sfc_tx_queue_stop,
1336 .rx_queue_setup = sfc_rx_queue_setup,
1337 .rx_queue_release = sfc_rx_queue_release,
1338 .rx_queue_count = sfc_rx_queue_count,
1339 .rx_descriptor_done = sfc_rx_descriptor_done,
1340 .tx_queue_setup = sfc_tx_queue_setup,
1341 .tx_queue_release = sfc_tx_queue_release,
1342 .flow_ctrl_get = sfc_flow_ctrl_get,
1343 .flow_ctrl_set = sfc_flow_ctrl_set,
1344 .mac_addr_set = sfc_mac_addr_set,
1345 #if EFSYS_OPT_RX_SCALE
1346 .reta_update = sfc_dev_rss_reta_update,
1347 .reta_query = sfc_dev_rss_reta_query,
1348 .rss_hash_update = sfc_dev_rss_hash_update,
1349 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get,
1351 .filter_ctrl = sfc_dev_filter_ctrl,
1352 .set_mc_addr_list = sfc_set_mc_addr_list,
1353 .rxq_info_get = sfc_rx_queue_info_get,
1354 .txq_info_get = sfc_tx_queue_info_get,
1355 .fw_version_get = sfc_fw_version_get,
1359 sfc_eth_dev_set_ops(struct rte_eth_dev *dev)
1361 struct sfc_adapter *sa = dev->data->dev_private;
1362 unsigned int avail_caps = 0;
1363 const char *rx_name = NULL;
1366 if (sa == NULL || sa->state == SFC_ADAPTER_UNINITIALIZED)
1367 return -E_RTE_SECONDARY;
1369 switch (sa->family) {
1370 case EFX_FAMILY_HUNTINGTON:
1371 case EFX_FAMILY_MEDFORD:
1372 avail_caps |= SFC_DP_HW_FW_CAP_EF10;
1378 rc = sfc_kvargs_process(sa, SFC_KVARG_RX_DATAPATH,
1379 sfc_kvarg_string_handler, &rx_name);
1381 goto fail_kvarg_rx_datapath;
1383 if (rx_name != NULL) {
1384 sa->dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, rx_name);
1385 if (sa->dp_rx == NULL) {
1386 sfc_err(sa, "Rx datapath %s not found", rx_name);
1390 if (!sfc_dp_match_hw_fw_caps(&sa->dp_rx->dp, avail_caps)) {
1392 "Insufficient Hw/FW capabilities to use Rx datapath %s",
1398 sa->dp_rx = sfc_dp_find_rx_by_caps(&sfc_dp_head, avail_caps);
1399 if (sa->dp_rx == NULL) {
1400 sfc_err(sa, "Rx datapath by caps %#x not found",
1407 sfc_info(sa, "use %s Rx datapath", sa->dp_rx->dp.name);
1409 dev->rx_pkt_burst = sa->dp_rx->pkt_burst;
1411 dev->tx_pkt_burst = sfc_xmit_pkts;
1413 dev->dev_ops = &sfc_eth_dev_ops;
1418 fail_kvarg_rx_datapath:
1423 sfc_register_dp(void)
1426 if (TAILQ_EMPTY(&sfc_dp_head)) {
1427 /* Prefer EF10 datapath */
1428 sfc_dp_register(&sfc_dp_head, &sfc_ef10_rx.dp);
1429 sfc_dp_register(&sfc_dp_head, &sfc_efx_rx.dp);
1434 sfc_eth_dev_init(struct rte_eth_dev *dev)
1436 struct sfc_adapter *sa = dev->data->dev_private;
1437 struct rte_pci_device *pci_dev = SFC_DEV_TO_PCI(dev);
1439 const efx_nic_cfg_t *encp;
1440 const struct ether_addr *from;
1444 /* Required for logging */
1447 /* Copy PCI device info to the dev->data */
1448 rte_eth_copy_pci_info(dev, pci_dev);
1450 rc = sfc_kvargs_parse(sa);
1452 goto fail_kvargs_parse;
1454 rc = sfc_kvargs_process(sa, SFC_KVARG_DEBUG_INIT,
1455 sfc_kvarg_bool_handler, &sa->debug_init);
1457 goto fail_kvarg_debug_init;
1459 sfc_log_init(sa, "entry");
1461 dev->data->mac_addrs = rte_zmalloc("sfc", ETHER_ADDR_LEN, 0);
1462 if (dev->data->mac_addrs == NULL) {
1464 goto fail_mac_addrs;
1467 sfc_adapter_lock_init(sa);
1468 sfc_adapter_lock(sa);
1470 sfc_log_init(sa, "attaching");
1471 rc = sfc_attach(sa);
1475 encp = efx_nic_cfg_get(sa->nic);
1478 * The arguments are really reverse order in comparison to
1479 * Linux kernel. Copy from NIC config to Ethernet device data.
1481 from = (const struct ether_addr *)(encp->enc_mac_addr);
1482 ether_addr_copy(from, &dev->data->mac_addrs[0]);
1484 sfc_adapter_unlock(sa);
1486 sfc_eth_dev_set_ops(dev);
1488 sfc_log_init(sa, "done");
1492 sfc_adapter_unlock(sa);
1493 sfc_adapter_lock_fini(sa);
1494 rte_free(dev->data->mac_addrs);
1495 dev->data->mac_addrs = NULL;
1498 fail_kvarg_debug_init:
1499 sfc_kvargs_cleanup(sa);
1502 sfc_log_init(sa, "failed %d", rc);
1508 sfc_eth_dev_uninit(struct rte_eth_dev *dev)
1510 struct sfc_adapter *sa = dev->data->dev_private;
1512 sfc_log_init(sa, "entry");
1514 sfc_adapter_lock(sa);
1518 rte_free(dev->data->mac_addrs);
1519 dev->data->mac_addrs = NULL;
1521 dev->dev_ops = NULL;
1522 dev->rx_pkt_burst = NULL;
1523 dev->tx_pkt_burst = NULL;
1525 sfc_kvargs_cleanup(sa);
1527 sfc_adapter_unlock(sa);
1528 sfc_adapter_lock_fini(sa);
1530 sfc_log_init(sa, "done");
1532 /* Required for logging, so cleanup last */
1537 static const struct rte_pci_id pci_id_sfc_efx_map[] = {
1538 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) },
1539 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE_VF) },
1540 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) },
1541 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT_VF) },
1542 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) },
1543 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) },
1544 { .vendor_id = 0 /* sentinel */ }
1547 static struct eth_driver sfc_efx_pmd = {
1549 .id_table = pci_id_sfc_efx_map,
1551 RTE_PCI_DRV_INTR_LSC |
1552 RTE_PCI_DRV_NEED_MAPPING,
1553 .probe = rte_eth_dev_pci_probe,
1554 .remove = rte_eth_dev_pci_remove,
1556 .eth_dev_init = sfc_eth_dev_init,
1557 .eth_dev_uninit = sfc_eth_dev_uninit,
1558 .dev_private_size = sizeof(struct sfc_adapter),
1561 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd.pci_drv);
1562 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map);
1563 RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio");
1564 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx,
1565 SFC_KVARG_RX_DATAPATH "=" SFC_KVARG_VALUES_RX_DATAPATH " "
1566 SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " "
1567 SFC_KVARG_STATS_UPDATE_PERIOD_MS "=<long> "
1568 SFC_KVARG_MCDI_LOGGING "=" SFC_KVARG_VALUES_BOOL " "
1569 SFC_KVARG_DEBUG_INIT "=" SFC_KVARG_VALUES_BOOL);