4 * Copyright (c) 2016-2017 Solarflare Communications Inc.
7 * This software was jointly developed between OKTET Labs (under contract
8 * for Solarflare) and Solarflare Communications, Inc.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 #include <rte_ethdev.h>
35 #include <rte_errno.h>
40 #include "sfc_debug.h"
42 #include "sfc_kvargs.h"
48 #include "sfc_dp_rx.h"
50 static struct sfc_dp_list sfc_dp_head =
51 TAILQ_HEAD_INITIALIZER(sfc_dp_head);
54 sfc_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
56 struct sfc_adapter *sa = dev->data->dev_private;
57 efx_nic_fw_info_t enfi;
62 * Return value of the callback is likely supposed to be
63 * equal to or greater than 0, nevertheless, if an error
64 * occurs, it will be desirable to pass it to the caller
66 if ((fw_version == NULL) || (fw_size == 0))
69 rc = efx_nic_get_fw_version(sa->nic, &enfi);
73 ret = snprintf(fw_version, fw_size,
74 "%" PRIu16 ".%" PRIu16 ".%" PRIu16 ".%" PRIu16,
75 enfi.enfi_mc_fw_version[0], enfi.enfi_mc_fw_version[1],
76 enfi.enfi_mc_fw_version[2], enfi.enfi_mc_fw_version[3]);
80 if (enfi.enfi_dpcpu_fw_ids_valid) {
81 size_t dpcpu_fw_ids_offset = MIN(fw_size - 1, (size_t)ret);
84 ret_extra = snprintf(fw_version + dpcpu_fw_ids_offset,
85 fw_size - dpcpu_fw_ids_offset,
86 " rx%" PRIx16 " tx%" PRIx16,
87 enfi.enfi_rx_dpcpu_fw_id,
88 enfi.enfi_tx_dpcpu_fw_id);
95 if (fw_size < (size_t)(++ret))
102 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
104 struct sfc_adapter *sa = dev->data->dev_private;
105 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
107 sfc_log_init(sa, "entry");
109 dev_info->pci_dev = RTE_DEV_TO_PCI(dev->device);
110 dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX;
112 /* Autonegotiation may be disabled */
113 dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
114 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_1000FDX)
115 dev_info->speed_capa |= ETH_LINK_SPEED_1G;
116 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_10000FDX)
117 dev_info->speed_capa |= ETH_LINK_SPEED_10G;
118 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_40000FDX)
119 dev_info->speed_capa |= ETH_LINK_SPEED_40G;
121 dev_info->max_rx_queues = sa->rxq_max;
122 dev_info->max_tx_queues = sa->txq_max;
124 /* By default packets are dropped if no descriptors are available */
125 dev_info->default_rxconf.rx_drop_en = 1;
127 dev_info->rx_offload_capa =
128 DEV_RX_OFFLOAD_IPV4_CKSUM |
129 DEV_RX_OFFLOAD_UDP_CKSUM |
130 DEV_RX_OFFLOAD_TCP_CKSUM;
132 dev_info->tx_offload_capa =
133 DEV_TX_OFFLOAD_IPV4_CKSUM |
134 DEV_TX_OFFLOAD_UDP_CKSUM |
135 DEV_TX_OFFLOAD_TCP_CKSUM;
137 dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP;
138 if ((~sa->dp_tx->features & SFC_DP_TX_FEAT_VLAN_INSERT) ||
139 !encp->enc_hw_tx_insert_vlan_enabled)
140 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
142 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_VLAN_INSERT;
144 #if EFSYS_OPT_RX_SCALE
145 if (sa->rss_support != EFX_RX_SCALE_UNAVAILABLE) {
146 dev_info->reta_size = EFX_RSS_TBL_SIZE;
147 dev_info->hash_key_size = SFC_RSS_KEY_SIZE;
148 dev_info->flow_type_rss_offloads = SFC_RSS_OFFLOADS;
153 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO;
155 dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS;
156 dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS;
157 /* The RXQ hardware requires that the descriptor count is a power
158 * of 2, but rx_desc_lim cannot properly describe that constraint.
160 dev_info->rx_desc_lim.nb_align = EFX_RXQ_MINNDESCS;
162 dev_info->tx_desc_lim.nb_max = sa->txq_max_entries;
163 dev_info->tx_desc_lim.nb_min = EFX_TXQ_MINNDESCS;
165 * The TXQ hardware requires that the descriptor count is a power
166 * of 2, but tx_desc_lim cannot properly describe that constraint
168 dev_info->tx_desc_lim.nb_align = EFX_TXQ_MINNDESCS;
171 static const uint32_t *
172 sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev)
174 struct sfc_adapter *sa = dev->data->dev_private;
176 return sa->dp_rx->supported_ptypes_get();
180 sfc_dev_configure(struct rte_eth_dev *dev)
182 struct rte_eth_dev_data *dev_data = dev->data;
183 struct sfc_adapter *sa = dev_data->dev_private;
186 sfc_log_init(sa, "entry n_rxq=%u n_txq=%u",
187 dev_data->nb_rx_queues, dev_data->nb_tx_queues);
189 sfc_adapter_lock(sa);
191 case SFC_ADAPTER_CONFIGURED:
193 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED);
195 case SFC_ADAPTER_INITIALIZED:
196 rc = sfc_configure(sa);
199 sfc_err(sa, "unexpected adapter state %u to configure",
204 sfc_adapter_unlock(sa);
206 sfc_log_init(sa, "done %d", rc);
212 sfc_dev_start(struct rte_eth_dev *dev)
214 struct sfc_adapter *sa = dev->data->dev_private;
217 sfc_log_init(sa, "entry");
219 sfc_adapter_lock(sa);
221 sfc_adapter_unlock(sa);
223 sfc_log_init(sa, "done %d", rc);
229 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
231 struct sfc_adapter *sa = dev->data->dev_private;
232 struct rte_eth_link *dev_link = &dev->data->dev_link;
233 struct rte_eth_link old_link;
234 struct rte_eth_link current_link;
236 sfc_log_init(sa, "entry");
239 EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t));
240 *(int64_t *)&old_link = rte_atomic64_read((rte_atomic64_t *)dev_link);
242 if (sa->state != SFC_ADAPTER_STARTED) {
243 sfc_port_link_mode_to_info(EFX_LINK_UNKNOWN, ¤t_link);
244 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link,
245 *(uint64_t *)&old_link,
246 *(uint64_t *)¤t_link))
248 } else if (wait_to_complete) {
249 efx_link_mode_t link_mode;
251 if (efx_port_poll(sa->nic, &link_mode) != 0)
252 link_mode = EFX_LINK_UNKNOWN;
253 sfc_port_link_mode_to_info(link_mode, ¤t_link);
255 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link,
256 *(uint64_t *)&old_link,
257 *(uint64_t *)¤t_link))
260 sfc_ev_mgmt_qpoll(sa);
261 *(int64_t *)¤t_link =
262 rte_atomic64_read((rte_atomic64_t *)dev_link);
265 if (old_link.link_status != current_link.link_status)
266 sfc_info(sa, "Link status is %s",
267 current_link.link_status ? "UP" : "DOWN");
269 return old_link.link_status == current_link.link_status ? 0 : -1;
273 sfc_dev_stop(struct rte_eth_dev *dev)
275 struct sfc_adapter *sa = dev->data->dev_private;
277 sfc_log_init(sa, "entry");
279 sfc_adapter_lock(sa);
281 sfc_adapter_unlock(sa);
283 sfc_log_init(sa, "done");
287 sfc_dev_set_link_up(struct rte_eth_dev *dev)
289 struct sfc_adapter *sa = dev->data->dev_private;
292 sfc_log_init(sa, "entry");
294 sfc_adapter_lock(sa);
296 sfc_adapter_unlock(sa);
303 sfc_dev_set_link_down(struct rte_eth_dev *dev)
305 struct sfc_adapter *sa = dev->data->dev_private;
307 sfc_log_init(sa, "entry");
309 sfc_adapter_lock(sa);
311 sfc_adapter_unlock(sa);
317 sfc_dev_close(struct rte_eth_dev *dev)
319 struct sfc_adapter *sa = dev->data->dev_private;
321 sfc_log_init(sa, "entry");
323 sfc_adapter_lock(sa);
325 case SFC_ADAPTER_STARTED:
327 SFC_ASSERT(sa->state == SFC_ADAPTER_CONFIGURED);
329 case SFC_ADAPTER_CONFIGURED:
331 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED);
333 case SFC_ADAPTER_INITIALIZED:
336 sfc_err(sa, "unexpected adapter state %u on close", sa->state);
339 sfc_adapter_unlock(sa);
341 sfc_log_init(sa, "done");
345 sfc_dev_filter_set(struct rte_eth_dev *dev, enum sfc_dev_filter_mode mode,
348 struct sfc_port *port;
350 struct sfc_adapter *sa = dev->data->dev_private;
351 boolean_t allmulti = (mode == SFC_DEV_FILTER_MODE_ALLMULTI);
352 const char *desc = (allmulti) ? "all-multi" : "promiscuous";
354 sfc_adapter_lock(sa);
357 toggle = (allmulti) ? (&port->allmulti) : (&port->promisc);
359 if (*toggle != enabled) {
362 if ((sa->state == SFC_ADAPTER_STARTED) &&
363 (sfc_set_rx_mode(sa) != 0)) {
364 *toggle = !(enabled);
365 sfc_warn(sa, "Failed to %s %s mode",
366 ((enabled) ? "enable" : "disable"), desc);
370 sfc_adapter_unlock(sa);
374 sfc_dev_promisc_enable(struct rte_eth_dev *dev)
376 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_TRUE);
380 sfc_dev_promisc_disable(struct rte_eth_dev *dev)
382 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_FALSE);
386 sfc_dev_allmulti_enable(struct rte_eth_dev *dev)
388 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_TRUE);
392 sfc_dev_allmulti_disable(struct rte_eth_dev *dev)
394 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_FALSE);
398 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
399 uint16_t nb_rx_desc, unsigned int socket_id,
400 const struct rte_eth_rxconf *rx_conf,
401 struct rte_mempool *mb_pool)
403 struct sfc_adapter *sa = dev->data->dev_private;
406 sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u",
407 rx_queue_id, nb_rx_desc, socket_id);
409 sfc_adapter_lock(sa);
411 rc = sfc_rx_qinit(sa, rx_queue_id, nb_rx_desc, socket_id,
416 dev->data->rx_queues[rx_queue_id] = sa->rxq_info[rx_queue_id].rxq->dp;
418 sfc_adapter_unlock(sa);
423 sfc_adapter_unlock(sa);
429 sfc_rx_queue_release(void *queue)
431 struct sfc_dp_rxq *dp_rxq = queue;
433 struct sfc_adapter *sa;
434 unsigned int sw_index;
439 rxq = sfc_rxq_by_dp_rxq(dp_rxq);
441 sfc_adapter_lock(sa);
443 sw_index = sfc_rxq_sw_index(rxq);
445 sfc_log_init(sa, "RxQ=%u", sw_index);
447 sa->eth_dev->data->rx_queues[sw_index] = NULL;
449 sfc_rx_qfini(sa, sw_index);
451 sfc_adapter_unlock(sa);
455 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
456 uint16_t nb_tx_desc, unsigned int socket_id,
457 const struct rte_eth_txconf *tx_conf)
459 struct sfc_adapter *sa = dev->data->dev_private;
462 sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u",
463 tx_queue_id, nb_tx_desc, socket_id);
465 sfc_adapter_lock(sa);
467 rc = sfc_tx_qinit(sa, tx_queue_id, nb_tx_desc, socket_id, tx_conf);
471 dev->data->tx_queues[tx_queue_id] = sa->txq_info[tx_queue_id].txq->dp;
473 sfc_adapter_unlock(sa);
477 sfc_adapter_unlock(sa);
483 sfc_tx_queue_release(void *queue)
485 struct sfc_dp_txq *dp_txq = queue;
487 unsigned int sw_index;
488 struct sfc_adapter *sa;
493 txq = sfc_txq_by_dp_txq(dp_txq);
494 sw_index = sfc_txq_sw_index(txq);
496 SFC_ASSERT(txq->evq != NULL);
499 sfc_log_init(sa, "TxQ = %u", sw_index);
501 sfc_adapter_lock(sa);
503 SFC_ASSERT(sw_index < sa->eth_dev->data->nb_tx_queues);
504 sa->eth_dev->data->tx_queues[sw_index] = NULL;
506 sfc_tx_qfini(sa, sw_index);
508 sfc_adapter_unlock(sa);
512 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
514 struct sfc_adapter *sa = dev->data->dev_private;
515 struct sfc_port *port = &sa->port;
518 rte_spinlock_lock(&port->mac_stats_lock);
520 if (sfc_port_update_mac_stats(sa) != 0)
523 mac_stats = port->mac_stats_buf;
525 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask,
526 EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) {
528 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] +
529 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] +
530 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS];
532 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] +
533 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] +
534 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS];
536 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] +
537 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] +
538 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES];
540 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] +
541 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] +
542 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES];
543 stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_OVERFLOW];
544 stats->ierrors = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS];
545 stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS];
547 stats->ipackets = mac_stats[EFX_MAC_RX_PKTS];
548 stats->opackets = mac_stats[EFX_MAC_TX_PKTS];
549 stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS];
550 stats->obytes = mac_stats[EFX_MAC_TX_OCTETS];
552 * Take into account stats which are whenever supported
553 * on EF10. If some stat is not supported by current
554 * firmware variant or HW revision, it is guaranteed
555 * to be zero in mac_stats.
558 mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] +
559 mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] +
560 mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] +
561 mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] +
562 mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] +
563 mac_stats[EFX_MAC_PM_TRUNC_QBB] +
564 mac_stats[EFX_MAC_PM_DISCARD_QBB] +
565 mac_stats[EFX_MAC_PM_DISCARD_MAPPING] +
566 mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] +
567 mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS];
569 mac_stats[EFX_MAC_RX_FCS_ERRORS] +
570 mac_stats[EFX_MAC_RX_ALIGN_ERRORS] +
571 mac_stats[EFX_MAC_RX_JABBER_PKTS];
572 /* no oerrors counters supported on EF10 */
576 rte_spinlock_unlock(&port->mac_stats_lock);
580 sfc_stats_reset(struct rte_eth_dev *dev)
582 struct sfc_adapter *sa = dev->data->dev_private;
583 struct sfc_port *port = &sa->port;
586 if (sa->state != SFC_ADAPTER_STARTED) {
588 * The operation cannot be done if port is not started; it
589 * will be scheduled to be done during the next port start
591 port->mac_stats_reset_pending = B_TRUE;
595 rc = sfc_port_reset_mac_stats(sa);
597 sfc_err(sa, "failed to reset statistics (rc = %d)", rc);
601 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
602 unsigned int xstats_count)
604 struct sfc_adapter *sa = dev->data->dev_private;
605 struct sfc_port *port = &sa->port;
611 rte_spinlock_lock(&port->mac_stats_lock);
613 rc = sfc_port_update_mac_stats(sa);
620 mac_stats = port->mac_stats_buf;
622 for (i = 0; i < EFX_MAC_NSTATS; ++i) {
623 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) {
624 if (xstats != NULL && nstats < (int)xstats_count) {
625 xstats[nstats].id = nstats;
626 xstats[nstats].value = mac_stats[i];
633 rte_spinlock_unlock(&port->mac_stats_lock);
639 sfc_xstats_get_names(struct rte_eth_dev *dev,
640 struct rte_eth_xstat_name *xstats_names,
641 unsigned int xstats_count)
643 struct sfc_adapter *sa = dev->data->dev_private;
644 struct sfc_port *port = &sa->port;
646 unsigned int nstats = 0;
648 for (i = 0; i < EFX_MAC_NSTATS; ++i) {
649 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) {
650 if (xstats_names != NULL && nstats < xstats_count)
651 strncpy(xstats_names[nstats].name,
652 efx_mac_stat_name(sa->nic, i),
653 sizeof(xstats_names[0].name));
662 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
664 struct sfc_adapter *sa = dev->data->dev_private;
665 unsigned int wanted_fc, link_fc;
667 memset(fc_conf, 0, sizeof(*fc_conf));
669 sfc_adapter_lock(sa);
671 if (sa->state == SFC_ADAPTER_STARTED)
672 efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc);
674 link_fc = sa->port.flow_ctrl;
678 fc_conf->mode = RTE_FC_NONE;
680 case EFX_FCNTL_RESPOND:
681 fc_conf->mode = RTE_FC_RX_PAUSE;
683 case EFX_FCNTL_GENERATE:
684 fc_conf->mode = RTE_FC_TX_PAUSE;
686 case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE):
687 fc_conf->mode = RTE_FC_FULL;
690 sfc_err(sa, "%s: unexpected flow control value %#x",
694 fc_conf->autoneg = sa->port.flow_ctrl_autoneg;
696 sfc_adapter_unlock(sa);
702 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
704 struct sfc_adapter *sa = dev->data->dev_private;
705 struct sfc_port *port = &sa->port;
709 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 ||
710 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 ||
711 fc_conf->mac_ctrl_frame_fwd != 0) {
712 sfc_err(sa, "unsupported flow control settings specified");
717 switch (fc_conf->mode) {
721 case RTE_FC_RX_PAUSE:
722 fcntl = EFX_FCNTL_RESPOND;
724 case RTE_FC_TX_PAUSE:
725 fcntl = EFX_FCNTL_GENERATE;
728 fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
735 sfc_adapter_lock(sa);
737 if (sa->state == SFC_ADAPTER_STARTED) {
738 rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg);
740 goto fail_mac_fcntl_set;
743 port->flow_ctrl = fcntl;
744 port->flow_ctrl_autoneg = fc_conf->autoneg;
746 sfc_adapter_unlock(sa);
751 sfc_adapter_unlock(sa);
758 sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
760 struct sfc_adapter *sa = dev->data->dev_private;
761 size_t pdu = EFX_MAC_PDU(mtu);
765 sfc_log_init(sa, "mtu=%u", mtu);
768 if (pdu < EFX_MAC_PDU_MIN) {
769 sfc_err(sa, "too small MTU %u (PDU size %u less than min %u)",
770 (unsigned int)mtu, (unsigned int)pdu,
774 if (pdu > EFX_MAC_PDU_MAX) {
775 sfc_err(sa, "too big MTU %u (PDU size %u greater than max %u)",
776 (unsigned int)mtu, (unsigned int)pdu,
781 sfc_adapter_lock(sa);
783 if (pdu != sa->port.pdu) {
784 if (sa->state == SFC_ADAPTER_STARTED) {
787 old_pdu = sa->port.pdu;
798 * The driver does not use it, but other PMDs update jumbo_frame
799 * flag and max_rx_pkt_len when MTU is set.
801 dev->data->dev_conf.rxmode.jumbo_frame = (mtu > ETHER_MAX_LEN);
802 dev->data->dev_conf.rxmode.max_rx_pkt_len = sa->port.pdu;
804 sfc_adapter_unlock(sa);
806 sfc_log_init(sa, "done");
810 sa->port.pdu = old_pdu;
811 if (sfc_start(sa) != 0)
812 sfc_err(sa, "cannot start with neither new (%u) nor old (%u) "
813 "PDU max size - port is stopped",
814 (unsigned int)pdu, (unsigned int)old_pdu);
815 sfc_adapter_unlock(sa);
818 sfc_log_init(sa, "failed %d", rc);
823 sfc_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
825 struct sfc_adapter *sa = dev->data->dev_private;
826 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
829 sfc_adapter_lock(sa);
831 if (sa->state != SFC_ADAPTER_STARTED) {
832 sfc_info(sa, "the port is not started");
833 sfc_info(sa, "the new MAC address will be set on port start");
838 if (encp->enc_allow_set_mac_with_installed_filters) {
839 rc = efx_mac_addr_set(sa->nic, mac_addr->addr_bytes);
841 sfc_err(sa, "cannot set MAC address (rc = %u)", rc);
846 * Changing the MAC address by means of MCDI request
847 * has no effect on received traffic, therefore
848 * we also need to update unicast filters
850 rc = sfc_set_rx_mode(sa);
852 sfc_err(sa, "cannot set filter (rc = %u)", rc);
854 sfc_warn(sa, "cannot set MAC address with filters installed");
855 sfc_warn(sa, "adapter will be restarted to pick the new MAC");
856 sfc_warn(sa, "(some traffic may be dropped)");
859 * Since setting MAC address with filters installed is not
860 * allowed on the adapter, one needs to simply restart adapter
861 * so that the new MAC address will be taken from an outer
862 * storage and set flawlessly by means of sfc_start() call
867 sfc_err(sa, "cannot restart adapter (rc = %u)", rc);
871 sfc_adapter_unlock(sa);
876 sfc_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set,
879 struct sfc_adapter *sa = dev->data->dev_private;
880 struct sfc_port *port = &sa->port;
881 uint8_t *mc_addrs = port->mcast_addrs;
885 if (mc_addrs == NULL)
888 if (nb_mc_addr > port->max_mcast_addrs) {
889 sfc_err(sa, "too many multicast addresses: %u > %u",
890 nb_mc_addr, port->max_mcast_addrs);
894 for (i = 0; i < nb_mc_addr; ++i) {
895 (void)rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes,
897 mc_addrs += EFX_MAC_ADDR_LEN;
900 port->nb_mcast_addrs = nb_mc_addr;
902 if (sa->state != SFC_ADAPTER_STARTED)
905 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs,
906 port->nb_mcast_addrs);
908 sfc_err(sa, "cannot set multicast address list (rc = %u)", rc);
915 sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id,
916 struct rte_eth_rxq_info *qinfo)
918 struct sfc_adapter *sa = dev->data->dev_private;
919 struct sfc_rxq_info *rxq_info;
922 sfc_adapter_lock(sa);
924 SFC_ASSERT(rx_queue_id < sa->rxq_count);
926 rxq_info = &sa->rxq_info[rx_queue_id];
928 SFC_ASSERT(rxq != NULL);
930 qinfo->mp = rxq->refill_mb_pool;
931 qinfo->conf.rx_free_thresh = rxq->refill_threshold;
932 qinfo->conf.rx_drop_en = 1;
933 qinfo->conf.rx_deferred_start = rxq_info->deferred_start;
934 qinfo->scattered_rx = (rxq_info->type == EFX_RXQ_TYPE_SCATTER);
935 qinfo->nb_desc = rxq_info->entries;
937 sfc_adapter_unlock(sa);
941 sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id,
942 struct rte_eth_txq_info *qinfo)
944 struct sfc_adapter *sa = dev->data->dev_private;
945 struct sfc_txq_info *txq_info;
947 sfc_adapter_lock(sa);
949 SFC_ASSERT(tx_queue_id < sa->txq_count);
951 txq_info = &sa->txq_info[tx_queue_id];
952 SFC_ASSERT(txq_info->txq != NULL);
954 memset(qinfo, 0, sizeof(*qinfo));
956 qinfo->conf.txq_flags = txq_info->txq->flags;
957 qinfo->conf.tx_free_thresh = txq_info->txq->free_thresh;
958 qinfo->conf.tx_deferred_start = txq_info->deferred_start;
959 qinfo->nb_desc = txq_info->entries;
961 sfc_adapter_unlock(sa);
965 sfc_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
967 struct sfc_adapter *sa = dev->data->dev_private;
969 sfc_log_init(sa, "RxQ=%u", rx_queue_id);
971 return sfc_rx_qdesc_npending(sa, rx_queue_id);
975 sfc_rx_descriptor_done(void *queue, uint16_t offset)
977 struct sfc_dp_rxq *dp_rxq = queue;
979 return sfc_rx_qdesc_done(dp_rxq, offset);
983 sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
985 struct sfc_adapter *sa = dev->data->dev_private;
988 sfc_log_init(sa, "RxQ=%u", rx_queue_id);
990 sfc_adapter_lock(sa);
993 if (sa->state != SFC_ADAPTER_STARTED)
994 goto fail_not_started;
996 rc = sfc_rx_qstart(sa, rx_queue_id);
1000 sa->rxq_info[rx_queue_id].deferred_started = B_TRUE;
1002 sfc_adapter_unlock(sa);
1008 sfc_adapter_unlock(sa);
1014 sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1016 struct sfc_adapter *sa = dev->data->dev_private;
1018 sfc_log_init(sa, "RxQ=%u", rx_queue_id);
1020 sfc_adapter_lock(sa);
1021 sfc_rx_qstop(sa, rx_queue_id);
1023 sa->rxq_info[rx_queue_id].deferred_started = B_FALSE;
1025 sfc_adapter_unlock(sa);
1031 sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1033 struct sfc_adapter *sa = dev->data->dev_private;
1036 sfc_log_init(sa, "TxQ = %u", tx_queue_id);
1038 sfc_adapter_lock(sa);
1041 if (sa->state != SFC_ADAPTER_STARTED)
1042 goto fail_not_started;
1044 rc = sfc_tx_qstart(sa, tx_queue_id);
1046 goto fail_tx_qstart;
1048 sa->txq_info[tx_queue_id].deferred_started = B_TRUE;
1050 sfc_adapter_unlock(sa);
1056 sfc_adapter_unlock(sa);
1062 sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1064 struct sfc_adapter *sa = dev->data->dev_private;
1066 sfc_log_init(sa, "TxQ = %u", tx_queue_id);
1068 sfc_adapter_lock(sa);
1070 sfc_tx_qstop(sa, tx_queue_id);
1072 sa->txq_info[tx_queue_id].deferred_started = B_FALSE;
1074 sfc_adapter_unlock(sa);
1078 #if EFSYS_OPT_RX_SCALE
1080 sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1081 struct rte_eth_rss_conf *rss_conf)
1083 struct sfc_adapter *sa = dev->data->dev_private;
1085 if ((sa->rss_channels == 1) ||
1086 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE))
1089 sfc_adapter_lock(sa);
1092 * Mapping of hash configuration between RTE and EFX is not one-to-one,
1093 * hence, conversion is done here to derive a correct set of ETH_RSS
1094 * flags which corresponds to the active EFX configuration stored
1095 * locally in 'sfc_adapter' and kept up-to-date
1097 rss_conf->rss_hf = sfc_efx_to_rte_hash_type(sa->rss_hash_types);
1098 rss_conf->rss_key_len = SFC_RSS_KEY_SIZE;
1099 if (rss_conf->rss_key != NULL)
1100 rte_memcpy(rss_conf->rss_key, sa->rss_key, SFC_RSS_KEY_SIZE);
1102 sfc_adapter_unlock(sa);
1108 sfc_dev_rss_hash_update(struct rte_eth_dev *dev,
1109 struct rte_eth_rss_conf *rss_conf)
1111 struct sfc_adapter *sa = dev->data->dev_private;
1112 unsigned int efx_hash_types;
1115 if ((sa->rss_channels == 1) ||
1116 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) {
1117 sfc_err(sa, "RSS is not available");
1121 if ((rss_conf->rss_key != NULL) &&
1122 (rss_conf->rss_key_len != sizeof(sa->rss_key))) {
1123 sfc_err(sa, "RSS key size is wrong (should be %lu)",
1124 sizeof(sa->rss_key));
1128 if ((rss_conf->rss_hf & ~SFC_RSS_OFFLOADS) != 0) {
1129 sfc_err(sa, "unsupported hash functions requested");
1133 sfc_adapter_lock(sa);
1135 efx_hash_types = sfc_rte_to_efx_hash_type(rss_conf->rss_hf);
1137 rc = efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ,
1138 efx_hash_types, B_TRUE);
1140 goto fail_scale_mode_set;
1142 if (rss_conf->rss_key != NULL) {
1143 if (sa->state == SFC_ADAPTER_STARTED) {
1144 rc = efx_rx_scale_key_set(sa->nic, rss_conf->rss_key,
1145 sizeof(sa->rss_key));
1147 goto fail_scale_key_set;
1150 rte_memcpy(sa->rss_key, rss_conf->rss_key, sizeof(sa->rss_key));
1153 sa->rss_hash_types = efx_hash_types;
1155 sfc_adapter_unlock(sa);
1160 if (efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ,
1161 sa->rss_hash_types, B_TRUE) != 0)
1162 sfc_err(sa, "failed to restore RSS mode");
1164 fail_scale_mode_set:
1165 sfc_adapter_unlock(sa);
1170 sfc_dev_rss_reta_query(struct rte_eth_dev *dev,
1171 struct rte_eth_rss_reta_entry64 *reta_conf,
1174 struct sfc_adapter *sa = dev->data->dev_private;
1177 if ((sa->rss_channels == 1) ||
1178 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE))
1181 if (reta_size != EFX_RSS_TBL_SIZE)
1184 sfc_adapter_lock(sa);
1186 for (entry = 0; entry < reta_size; entry++) {
1187 int grp = entry / RTE_RETA_GROUP_SIZE;
1188 int grp_idx = entry % RTE_RETA_GROUP_SIZE;
1190 if ((reta_conf[grp].mask >> grp_idx) & 1)
1191 reta_conf[grp].reta[grp_idx] = sa->rss_tbl[entry];
1194 sfc_adapter_unlock(sa);
1200 sfc_dev_rss_reta_update(struct rte_eth_dev *dev,
1201 struct rte_eth_rss_reta_entry64 *reta_conf,
1204 struct sfc_adapter *sa = dev->data->dev_private;
1205 unsigned int *rss_tbl_new;
1210 if ((sa->rss_channels == 1) ||
1211 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) {
1212 sfc_err(sa, "RSS is not available");
1216 if (reta_size != EFX_RSS_TBL_SIZE) {
1217 sfc_err(sa, "RETA size is wrong (should be %u)",
1222 rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(sa->rss_tbl), 0);
1223 if (rss_tbl_new == NULL)
1226 sfc_adapter_lock(sa);
1228 rte_memcpy(rss_tbl_new, sa->rss_tbl, sizeof(sa->rss_tbl));
1230 for (entry = 0; entry < reta_size; entry++) {
1231 int grp_idx = entry % RTE_RETA_GROUP_SIZE;
1232 struct rte_eth_rss_reta_entry64 *grp;
1234 grp = &reta_conf[entry / RTE_RETA_GROUP_SIZE];
1236 if (grp->mask & (1ull << grp_idx)) {
1237 if (grp->reta[grp_idx] >= sa->rss_channels) {
1239 goto bad_reta_entry;
1241 rss_tbl_new[entry] = grp->reta[grp_idx];
1245 rc = efx_rx_scale_tbl_set(sa->nic, rss_tbl_new, EFX_RSS_TBL_SIZE);
1247 rte_memcpy(sa->rss_tbl, rss_tbl_new, sizeof(sa->rss_tbl));
1250 sfc_adapter_unlock(sa);
1252 rte_free(rss_tbl_new);
1254 SFC_ASSERT(rc >= 0);
1260 sfc_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type,
1261 enum rte_filter_op filter_op,
1264 struct sfc_adapter *sa = dev->data->dev_private;
1267 sfc_log_init(sa, "entry");
1269 switch (filter_type) {
1270 case RTE_ETH_FILTER_NONE:
1271 sfc_err(sa, "Global filters configuration not supported");
1273 case RTE_ETH_FILTER_MACVLAN:
1274 sfc_err(sa, "MACVLAN filters not supported");
1276 case RTE_ETH_FILTER_ETHERTYPE:
1277 sfc_err(sa, "EtherType filters not supported");
1279 case RTE_ETH_FILTER_FLEXIBLE:
1280 sfc_err(sa, "Flexible filters not supported");
1282 case RTE_ETH_FILTER_SYN:
1283 sfc_err(sa, "SYN filters not supported");
1285 case RTE_ETH_FILTER_NTUPLE:
1286 sfc_err(sa, "NTUPLE filters not supported");
1288 case RTE_ETH_FILTER_TUNNEL:
1289 sfc_err(sa, "Tunnel filters not supported");
1291 case RTE_ETH_FILTER_FDIR:
1292 sfc_err(sa, "Flow Director filters not supported");
1294 case RTE_ETH_FILTER_HASH:
1295 sfc_err(sa, "Hash filters not supported");
1297 case RTE_ETH_FILTER_GENERIC:
1298 if (filter_op != RTE_ETH_FILTER_GET) {
1301 *(const void **)arg = &sfc_flow_ops;
1306 sfc_err(sa, "Unknown filter type %u", filter_type);
1310 sfc_log_init(sa, "exit: %d", -rc);
1311 SFC_ASSERT(rc >= 0);
1315 static const struct eth_dev_ops sfc_eth_dev_ops = {
1316 .dev_configure = sfc_dev_configure,
1317 .dev_start = sfc_dev_start,
1318 .dev_stop = sfc_dev_stop,
1319 .dev_set_link_up = sfc_dev_set_link_up,
1320 .dev_set_link_down = sfc_dev_set_link_down,
1321 .dev_close = sfc_dev_close,
1322 .promiscuous_enable = sfc_dev_promisc_enable,
1323 .promiscuous_disable = sfc_dev_promisc_disable,
1324 .allmulticast_enable = sfc_dev_allmulti_enable,
1325 .allmulticast_disable = sfc_dev_allmulti_disable,
1326 .link_update = sfc_dev_link_update,
1327 .stats_get = sfc_stats_get,
1328 .stats_reset = sfc_stats_reset,
1329 .xstats_get = sfc_xstats_get,
1330 .xstats_reset = sfc_stats_reset,
1331 .xstats_get_names = sfc_xstats_get_names,
1332 .dev_infos_get = sfc_dev_infos_get,
1333 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get,
1334 .mtu_set = sfc_dev_set_mtu,
1335 .rx_queue_start = sfc_rx_queue_start,
1336 .rx_queue_stop = sfc_rx_queue_stop,
1337 .tx_queue_start = sfc_tx_queue_start,
1338 .tx_queue_stop = sfc_tx_queue_stop,
1339 .rx_queue_setup = sfc_rx_queue_setup,
1340 .rx_queue_release = sfc_rx_queue_release,
1341 .rx_queue_count = sfc_rx_queue_count,
1342 .rx_descriptor_done = sfc_rx_descriptor_done,
1343 .tx_queue_setup = sfc_tx_queue_setup,
1344 .tx_queue_release = sfc_tx_queue_release,
1345 .flow_ctrl_get = sfc_flow_ctrl_get,
1346 .flow_ctrl_set = sfc_flow_ctrl_set,
1347 .mac_addr_set = sfc_mac_addr_set,
1348 #if EFSYS_OPT_RX_SCALE
1349 .reta_update = sfc_dev_rss_reta_update,
1350 .reta_query = sfc_dev_rss_reta_query,
1351 .rss_hash_update = sfc_dev_rss_hash_update,
1352 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get,
1354 .filter_ctrl = sfc_dev_filter_ctrl,
1355 .set_mc_addr_list = sfc_set_mc_addr_list,
1356 .rxq_info_get = sfc_rx_queue_info_get,
1357 .txq_info_get = sfc_tx_queue_info_get,
1358 .fw_version_get = sfc_fw_version_get,
1362 sfc_eth_dev_set_ops(struct rte_eth_dev *dev)
1364 struct sfc_adapter *sa = dev->data->dev_private;
1365 unsigned int avail_caps = 0;
1366 const char *rx_name = NULL;
1367 const char *tx_name = NULL;
1370 if (sa == NULL || sa->state == SFC_ADAPTER_UNINITIALIZED)
1371 return -E_RTE_SECONDARY;
1373 switch (sa->family) {
1374 case EFX_FAMILY_HUNTINGTON:
1375 case EFX_FAMILY_MEDFORD:
1376 avail_caps |= SFC_DP_HW_FW_CAP_EF10;
1382 rc = sfc_kvargs_process(sa, SFC_KVARG_RX_DATAPATH,
1383 sfc_kvarg_string_handler, &rx_name);
1385 goto fail_kvarg_rx_datapath;
1387 if (rx_name != NULL) {
1388 sa->dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, rx_name);
1389 if (sa->dp_rx == NULL) {
1390 sfc_err(sa, "Rx datapath %s not found", rx_name);
1394 if (!sfc_dp_match_hw_fw_caps(&sa->dp_rx->dp, avail_caps)) {
1396 "Insufficient Hw/FW capabilities to use Rx datapath %s",
1402 sa->dp_rx = sfc_dp_find_rx_by_caps(&sfc_dp_head, avail_caps);
1403 if (sa->dp_rx == NULL) {
1404 sfc_err(sa, "Rx datapath by caps %#x not found",
1411 sfc_info(sa, "use %s Rx datapath", sa->dp_rx->dp.name);
1413 dev->rx_pkt_burst = sa->dp_rx->pkt_burst;
1415 rc = sfc_kvargs_process(sa, SFC_KVARG_TX_DATAPATH,
1416 sfc_kvarg_string_handler, &tx_name);
1418 goto fail_kvarg_tx_datapath;
1420 if (tx_name != NULL) {
1421 sa->dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, tx_name);
1422 if (sa->dp_tx == NULL) {
1423 sfc_err(sa, "Tx datapath %s not found", tx_name);
1427 if (!sfc_dp_match_hw_fw_caps(&sa->dp_tx->dp, avail_caps)) {
1429 "Insufficient Hw/FW capabilities to use Tx datapath %s",
1435 sa->dp_tx = sfc_dp_find_tx_by_caps(&sfc_dp_head, avail_caps);
1436 if (sa->dp_tx == NULL) {
1437 sfc_err(sa, "Tx datapath by caps %#x not found",
1444 sfc_info(sa, "use %s Tx datapath", sa->dp_tx->dp.name);
1446 dev->tx_pkt_burst = sa->dp_tx->pkt_burst;
1448 dev->dev_ops = &sfc_eth_dev_ops;
1453 fail_kvarg_tx_datapath:
1455 fail_kvarg_rx_datapath:
1460 sfc_register_dp(void)
1463 if (TAILQ_EMPTY(&sfc_dp_head)) {
1464 /* Prefer EF10 datapath */
1465 sfc_dp_register(&sfc_dp_head, &sfc_ef10_rx.dp);
1466 sfc_dp_register(&sfc_dp_head, &sfc_efx_rx.dp);
1468 sfc_dp_register(&sfc_dp_head, &sfc_efx_tx.dp);
1473 sfc_eth_dev_init(struct rte_eth_dev *dev)
1475 struct sfc_adapter *sa = dev->data->dev_private;
1476 struct rte_pci_device *pci_dev = SFC_DEV_TO_PCI(dev);
1478 const efx_nic_cfg_t *encp;
1479 const struct ether_addr *from;
1483 /* Required for logging */
1486 /* Copy PCI device info to the dev->data */
1487 rte_eth_copy_pci_info(dev, pci_dev);
1489 rc = sfc_kvargs_parse(sa);
1491 goto fail_kvargs_parse;
1493 rc = sfc_kvargs_process(sa, SFC_KVARG_DEBUG_INIT,
1494 sfc_kvarg_bool_handler, &sa->debug_init);
1496 goto fail_kvarg_debug_init;
1498 sfc_log_init(sa, "entry");
1500 dev->data->mac_addrs = rte_zmalloc("sfc", ETHER_ADDR_LEN, 0);
1501 if (dev->data->mac_addrs == NULL) {
1503 goto fail_mac_addrs;
1506 sfc_adapter_lock_init(sa);
1507 sfc_adapter_lock(sa);
1509 sfc_log_init(sa, "attaching");
1510 rc = sfc_attach(sa);
1514 encp = efx_nic_cfg_get(sa->nic);
1517 * The arguments are really reverse order in comparison to
1518 * Linux kernel. Copy from NIC config to Ethernet device data.
1520 from = (const struct ether_addr *)(encp->enc_mac_addr);
1521 ether_addr_copy(from, &dev->data->mac_addrs[0]);
1523 sfc_adapter_unlock(sa);
1525 sfc_eth_dev_set_ops(dev);
1527 sfc_log_init(sa, "done");
1531 sfc_adapter_unlock(sa);
1532 sfc_adapter_lock_fini(sa);
1533 rte_free(dev->data->mac_addrs);
1534 dev->data->mac_addrs = NULL;
1537 fail_kvarg_debug_init:
1538 sfc_kvargs_cleanup(sa);
1541 sfc_log_init(sa, "failed %d", rc);
1547 sfc_eth_dev_uninit(struct rte_eth_dev *dev)
1549 struct sfc_adapter *sa = dev->data->dev_private;
1551 sfc_log_init(sa, "entry");
1553 sfc_adapter_lock(sa);
1557 rte_free(dev->data->mac_addrs);
1558 dev->data->mac_addrs = NULL;
1560 dev->dev_ops = NULL;
1561 dev->rx_pkt_burst = NULL;
1562 dev->tx_pkt_burst = NULL;
1564 sfc_kvargs_cleanup(sa);
1566 sfc_adapter_unlock(sa);
1567 sfc_adapter_lock_fini(sa);
1569 sfc_log_init(sa, "done");
1571 /* Required for logging, so cleanup last */
1576 static const struct rte_pci_id pci_id_sfc_efx_map[] = {
1577 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) },
1578 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE_VF) },
1579 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) },
1580 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT_VF) },
1581 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) },
1582 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) },
1583 { .vendor_id = 0 /* sentinel */ }
1586 static struct eth_driver sfc_efx_pmd = {
1588 .id_table = pci_id_sfc_efx_map,
1590 RTE_PCI_DRV_INTR_LSC |
1591 RTE_PCI_DRV_NEED_MAPPING,
1592 .probe = rte_eth_dev_pci_probe,
1593 .remove = rte_eth_dev_pci_remove,
1595 .eth_dev_init = sfc_eth_dev_init,
1596 .eth_dev_uninit = sfc_eth_dev_uninit,
1597 .dev_private_size = sizeof(struct sfc_adapter),
1600 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd.pci_drv);
1601 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map);
1602 RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio");
1603 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx,
1604 SFC_KVARG_RX_DATAPATH "=" SFC_KVARG_VALUES_RX_DATAPATH " "
1605 SFC_KVARG_TX_DATAPATH "=" SFC_KVARG_VALUES_TX_DATAPATH " "
1606 SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " "
1607 SFC_KVARG_STATS_UPDATE_PERIOD_MS "=<long> "
1608 SFC_KVARG_MCDI_LOGGING "=" SFC_KVARG_VALUES_BOOL " "
1609 SFC_KVARG_DEBUG_INIT "=" SFC_KVARG_VALUES_BOOL);