4 * Copyright (c) 2016-2017 Solarflare Communications Inc.
7 * This software was jointly developed between OKTET Labs (under contract
8 * for Solarflare) and Solarflare Communications, Inc.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 #include <rte_ethdev.h>
35 #include <rte_errno.h>
40 #include "sfc_debug.h"
42 #include "sfc_kvargs.h"
48 #include "sfc_dp_rx.h"
50 static struct sfc_dp_list sfc_dp_head =
51 TAILQ_HEAD_INITIALIZER(sfc_dp_head);
54 sfc_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
56 struct sfc_adapter *sa = dev->data->dev_private;
57 efx_nic_fw_info_t enfi;
62 * Return value of the callback is likely supposed to be
63 * equal to or greater than 0, nevertheless, if an error
64 * occurs, it will be desirable to pass it to the caller
66 if ((fw_version == NULL) || (fw_size == 0))
69 rc = efx_nic_get_fw_version(sa->nic, &enfi);
73 ret = snprintf(fw_version, fw_size,
74 "%" PRIu16 ".%" PRIu16 ".%" PRIu16 ".%" PRIu16,
75 enfi.enfi_mc_fw_version[0], enfi.enfi_mc_fw_version[1],
76 enfi.enfi_mc_fw_version[2], enfi.enfi_mc_fw_version[3]);
80 if (enfi.enfi_dpcpu_fw_ids_valid) {
81 size_t dpcpu_fw_ids_offset = MIN(fw_size - 1, (size_t)ret);
84 ret_extra = snprintf(fw_version + dpcpu_fw_ids_offset,
85 fw_size - dpcpu_fw_ids_offset,
86 " rx%" PRIx16 " tx%" PRIx16,
87 enfi.enfi_rx_dpcpu_fw_id,
88 enfi.enfi_tx_dpcpu_fw_id);
95 if (fw_size < (size_t)(++ret))
102 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
104 struct sfc_adapter *sa = dev->data->dev_private;
105 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
107 sfc_log_init(sa, "entry");
109 dev_info->pci_dev = RTE_DEV_TO_PCI(dev->device);
110 dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX;
112 /* Autonegotiation may be disabled */
113 dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
114 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_1000FDX)
115 dev_info->speed_capa |= ETH_LINK_SPEED_1G;
116 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_10000FDX)
117 dev_info->speed_capa |= ETH_LINK_SPEED_10G;
118 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_40000FDX)
119 dev_info->speed_capa |= ETH_LINK_SPEED_40G;
121 dev_info->max_rx_queues = sa->rxq_max;
122 dev_info->max_tx_queues = sa->txq_max;
124 /* By default packets are dropped if no descriptors are available */
125 dev_info->default_rxconf.rx_drop_en = 1;
127 dev_info->rx_offload_capa =
128 DEV_RX_OFFLOAD_IPV4_CKSUM |
129 DEV_RX_OFFLOAD_UDP_CKSUM |
130 DEV_RX_OFFLOAD_TCP_CKSUM;
132 dev_info->tx_offload_capa =
133 DEV_TX_OFFLOAD_IPV4_CKSUM |
134 DEV_TX_OFFLOAD_UDP_CKSUM |
135 DEV_TX_OFFLOAD_TCP_CKSUM;
137 dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP;
138 if ((~sa->dp_tx->features & SFC_DP_TX_FEAT_VLAN_INSERT) ||
139 !encp->enc_hw_tx_insert_vlan_enabled)
140 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
142 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_VLAN_INSERT;
144 if (~sa->dp_tx->features & SFC_DP_TX_FEAT_MULTI_SEG)
145 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
147 #if EFSYS_OPT_RX_SCALE
148 if (sa->rss_support != EFX_RX_SCALE_UNAVAILABLE) {
149 dev_info->reta_size = EFX_RSS_TBL_SIZE;
150 dev_info->hash_key_size = SFC_RSS_KEY_SIZE;
151 dev_info->flow_type_rss_offloads = SFC_RSS_OFFLOADS;
156 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO;
158 dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS;
159 dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS;
160 /* The RXQ hardware requires that the descriptor count is a power
161 * of 2, but rx_desc_lim cannot properly describe that constraint.
163 dev_info->rx_desc_lim.nb_align = EFX_RXQ_MINNDESCS;
165 dev_info->tx_desc_lim.nb_max = sa->txq_max_entries;
166 dev_info->tx_desc_lim.nb_min = EFX_TXQ_MINNDESCS;
168 * The TXQ hardware requires that the descriptor count is a power
169 * of 2, but tx_desc_lim cannot properly describe that constraint
171 dev_info->tx_desc_lim.nb_align = EFX_TXQ_MINNDESCS;
174 static const uint32_t *
175 sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev)
177 struct sfc_adapter *sa = dev->data->dev_private;
179 return sa->dp_rx->supported_ptypes_get();
183 sfc_dev_configure(struct rte_eth_dev *dev)
185 struct rte_eth_dev_data *dev_data = dev->data;
186 struct sfc_adapter *sa = dev_data->dev_private;
189 sfc_log_init(sa, "entry n_rxq=%u n_txq=%u",
190 dev_data->nb_rx_queues, dev_data->nb_tx_queues);
192 sfc_adapter_lock(sa);
194 case SFC_ADAPTER_CONFIGURED:
196 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED);
198 case SFC_ADAPTER_INITIALIZED:
199 rc = sfc_configure(sa);
202 sfc_err(sa, "unexpected adapter state %u to configure",
207 sfc_adapter_unlock(sa);
209 sfc_log_init(sa, "done %d", rc);
215 sfc_dev_start(struct rte_eth_dev *dev)
217 struct sfc_adapter *sa = dev->data->dev_private;
220 sfc_log_init(sa, "entry");
222 sfc_adapter_lock(sa);
224 sfc_adapter_unlock(sa);
226 sfc_log_init(sa, "done %d", rc);
232 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
234 struct sfc_adapter *sa = dev->data->dev_private;
235 struct rte_eth_link *dev_link = &dev->data->dev_link;
236 struct rte_eth_link old_link;
237 struct rte_eth_link current_link;
239 sfc_log_init(sa, "entry");
242 EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t));
243 *(int64_t *)&old_link = rte_atomic64_read((rte_atomic64_t *)dev_link);
245 if (sa->state != SFC_ADAPTER_STARTED) {
246 sfc_port_link_mode_to_info(EFX_LINK_UNKNOWN, ¤t_link);
247 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link,
248 *(uint64_t *)&old_link,
249 *(uint64_t *)¤t_link))
251 } else if (wait_to_complete) {
252 efx_link_mode_t link_mode;
254 if (efx_port_poll(sa->nic, &link_mode) != 0)
255 link_mode = EFX_LINK_UNKNOWN;
256 sfc_port_link_mode_to_info(link_mode, ¤t_link);
258 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link,
259 *(uint64_t *)&old_link,
260 *(uint64_t *)¤t_link))
263 sfc_ev_mgmt_qpoll(sa);
264 *(int64_t *)¤t_link =
265 rte_atomic64_read((rte_atomic64_t *)dev_link);
268 if (old_link.link_status != current_link.link_status)
269 sfc_info(sa, "Link status is %s",
270 current_link.link_status ? "UP" : "DOWN");
272 return old_link.link_status == current_link.link_status ? 0 : -1;
276 sfc_dev_stop(struct rte_eth_dev *dev)
278 struct sfc_adapter *sa = dev->data->dev_private;
280 sfc_log_init(sa, "entry");
282 sfc_adapter_lock(sa);
284 sfc_adapter_unlock(sa);
286 sfc_log_init(sa, "done");
290 sfc_dev_set_link_up(struct rte_eth_dev *dev)
292 struct sfc_adapter *sa = dev->data->dev_private;
295 sfc_log_init(sa, "entry");
297 sfc_adapter_lock(sa);
299 sfc_adapter_unlock(sa);
306 sfc_dev_set_link_down(struct rte_eth_dev *dev)
308 struct sfc_adapter *sa = dev->data->dev_private;
310 sfc_log_init(sa, "entry");
312 sfc_adapter_lock(sa);
314 sfc_adapter_unlock(sa);
320 sfc_dev_close(struct rte_eth_dev *dev)
322 struct sfc_adapter *sa = dev->data->dev_private;
324 sfc_log_init(sa, "entry");
326 sfc_adapter_lock(sa);
328 case SFC_ADAPTER_STARTED:
330 SFC_ASSERT(sa->state == SFC_ADAPTER_CONFIGURED);
332 case SFC_ADAPTER_CONFIGURED:
334 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED);
336 case SFC_ADAPTER_INITIALIZED:
339 sfc_err(sa, "unexpected adapter state %u on close", sa->state);
342 sfc_adapter_unlock(sa);
344 sfc_log_init(sa, "done");
348 sfc_dev_filter_set(struct rte_eth_dev *dev, enum sfc_dev_filter_mode mode,
351 struct sfc_port *port;
353 struct sfc_adapter *sa = dev->data->dev_private;
354 boolean_t allmulti = (mode == SFC_DEV_FILTER_MODE_ALLMULTI);
355 const char *desc = (allmulti) ? "all-multi" : "promiscuous";
357 sfc_adapter_lock(sa);
360 toggle = (allmulti) ? (&port->allmulti) : (&port->promisc);
362 if (*toggle != enabled) {
365 if ((sa->state == SFC_ADAPTER_STARTED) &&
366 (sfc_set_rx_mode(sa) != 0)) {
367 *toggle = !(enabled);
368 sfc_warn(sa, "Failed to %s %s mode",
369 ((enabled) ? "enable" : "disable"), desc);
373 sfc_adapter_unlock(sa);
377 sfc_dev_promisc_enable(struct rte_eth_dev *dev)
379 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_TRUE);
383 sfc_dev_promisc_disable(struct rte_eth_dev *dev)
385 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_FALSE);
389 sfc_dev_allmulti_enable(struct rte_eth_dev *dev)
391 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_TRUE);
395 sfc_dev_allmulti_disable(struct rte_eth_dev *dev)
397 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_FALSE);
401 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
402 uint16_t nb_rx_desc, unsigned int socket_id,
403 const struct rte_eth_rxconf *rx_conf,
404 struct rte_mempool *mb_pool)
406 struct sfc_adapter *sa = dev->data->dev_private;
409 sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u",
410 rx_queue_id, nb_rx_desc, socket_id);
412 sfc_adapter_lock(sa);
414 rc = sfc_rx_qinit(sa, rx_queue_id, nb_rx_desc, socket_id,
419 dev->data->rx_queues[rx_queue_id] = sa->rxq_info[rx_queue_id].rxq->dp;
421 sfc_adapter_unlock(sa);
426 sfc_adapter_unlock(sa);
432 sfc_rx_queue_release(void *queue)
434 struct sfc_dp_rxq *dp_rxq = queue;
436 struct sfc_adapter *sa;
437 unsigned int sw_index;
442 rxq = sfc_rxq_by_dp_rxq(dp_rxq);
444 sfc_adapter_lock(sa);
446 sw_index = sfc_rxq_sw_index(rxq);
448 sfc_log_init(sa, "RxQ=%u", sw_index);
450 sa->eth_dev->data->rx_queues[sw_index] = NULL;
452 sfc_rx_qfini(sa, sw_index);
454 sfc_adapter_unlock(sa);
458 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
459 uint16_t nb_tx_desc, unsigned int socket_id,
460 const struct rte_eth_txconf *tx_conf)
462 struct sfc_adapter *sa = dev->data->dev_private;
465 sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u",
466 tx_queue_id, nb_tx_desc, socket_id);
468 sfc_adapter_lock(sa);
470 rc = sfc_tx_qinit(sa, tx_queue_id, nb_tx_desc, socket_id, tx_conf);
474 dev->data->tx_queues[tx_queue_id] = sa->txq_info[tx_queue_id].txq->dp;
476 sfc_adapter_unlock(sa);
480 sfc_adapter_unlock(sa);
486 sfc_tx_queue_release(void *queue)
488 struct sfc_dp_txq *dp_txq = queue;
490 unsigned int sw_index;
491 struct sfc_adapter *sa;
496 txq = sfc_txq_by_dp_txq(dp_txq);
497 sw_index = sfc_txq_sw_index(txq);
499 SFC_ASSERT(txq->evq != NULL);
502 sfc_log_init(sa, "TxQ = %u", sw_index);
504 sfc_adapter_lock(sa);
506 SFC_ASSERT(sw_index < sa->eth_dev->data->nb_tx_queues);
507 sa->eth_dev->data->tx_queues[sw_index] = NULL;
509 sfc_tx_qfini(sa, sw_index);
511 sfc_adapter_unlock(sa);
515 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
517 struct sfc_adapter *sa = dev->data->dev_private;
518 struct sfc_port *port = &sa->port;
521 rte_spinlock_lock(&port->mac_stats_lock);
523 if (sfc_port_update_mac_stats(sa) != 0)
526 mac_stats = port->mac_stats_buf;
528 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask,
529 EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) {
531 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] +
532 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] +
533 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS];
535 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] +
536 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] +
537 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS];
539 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] +
540 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] +
541 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES];
543 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] +
544 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] +
545 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES];
546 stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_OVERFLOW];
547 stats->ierrors = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS];
548 stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS];
550 stats->ipackets = mac_stats[EFX_MAC_RX_PKTS];
551 stats->opackets = mac_stats[EFX_MAC_TX_PKTS];
552 stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS];
553 stats->obytes = mac_stats[EFX_MAC_TX_OCTETS];
555 * Take into account stats which are whenever supported
556 * on EF10. If some stat is not supported by current
557 * firmware variant or HW revision, it is guaranteed
558 * to be zero in mac_stats.
561 mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] +
562 mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] +
563 mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] +
564 mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] +
565 mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] +
566 mac_stats[EFX_MAC_PM_TRUNC_QBB] +
567 mac_stats[EFX_MAC_PM_DISCARD_QBB] +
568 mac_stats[EFX_MAC_PM_DISCARD_MAPPING] +
569 mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] +
570 mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS];
572 mac_stats[EFX_MAC_RX_FCS_ERRORS] +
573 mac_stats[EFX_MAC_RX_ALIGN_ERRORS] +
574 mac_stats[EFX_MAC_RX_JABBER_PKTS];
575 /* no oerrors counters supported on EF10 */
579 rte_spinlock_unlock(&port->mac_stats_lock);
583 sfc_stats_reset(struct rte_eth_dev *dev)
585 struct sfc_adapter *sa = dev->data->dev_private;
586 struct sfc_port *port = &sa->port;
589 if (sa->state != SFC_ADAPTER_STARTED) {
591 * The operation cannot be done if port is not started; it
592 * will be scheduled to be done during the next port start
594 port->mac_stats_reset_pending = B_TRUE;
598 rc = sfc_port_reset_mac_stats(sa);
600 sfc_err(sa, "failed to reset statistics (rc = %d)", rc);
604 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
605 unsigned int xstats_count)
607 struct sfc_adapter *sa = dev->data->dev_private;
608 struct sfc_port *port = &sa->port;
614 rte_spinlock_lock(&port->mac_stats_lock);
616 rc = sfc_port_update_mac_stats(sa);
623 mac_stats = port->mac_stats_buf;
625 for (i = 0; i < EFX_MAC_NSTATS; ++i) {
626 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) {
627 if (xstats != NULL && nstats < (int)xstats_count) {
628 xstats[nstats].id = nstats;
629 xstats[nstats].value = mac_stats[i];
636 rte_spinlock_unlock(&port->mac_stats_lock);
642 sfc_xstats_get_names(struct rte_eth_dev *dev,
643 struct rte_eth_xstat_name *xstats_names,
644 unsigned int xstats_count)
646 struct sfc_adapter *sa = dev->data->dev_private;
647 struct sfc_port *port = &sa->port;
649 unsigned int nstats = 0;
651 for (i = 0; i < EFX_MAC_NSTATS; ++i) {
652 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) {
653 if (xstats_names != NULL && nstats < xstats_count)
654 strncpy(xstats_names[nstats].name,
655 efx_mac_stat_name(sa->nic, i),
656 sizeof(xstats_names[0].name));
665 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
667 struct sfc_adapter *sa = dev->data->dev_private;
668 unsigned int wanted_fc, link_fc;
670 memset(fc_conf, 0, sizeof(*fc_conf));
672 sfc_adapter_lock(sa);
674 if (sa->state == SFC_ADAPTER_STARTED)
675 efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc);
677 link_fc = sa->port.flow_ctrl;
681 fc_conf->mode = RTE_FC_NONE;
683 case EFX_FCNTL_RESPOND:
684 fc_conf->mode = RTE_FC_RX_PAUSE;
686 case EFX_FCNTL_GENERATE:
687 fc_conf->mode = RTE_FC_TX_PAUSE;
689 case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE):
690 fc_conf->mode = RTE_FC_FULL;
693 sfc_err(sa, "%s: unexpected flow control value %#x",
697 fc_conf->autoneg = sa->port.flow_ctrl_autoneg;
699 sfc_adapter_unlock(sa);
705 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
707 struct sfc_adapter *sa = dev->data->dev_private;
708 struct sfc_port *port = &sa->port;
712 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 ||
713 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 ||
714 fc_conf->mac_ctrl_frame_fwd != 0) {
715 sfc_err(sa, "unsupported flow control settings specified");
720 switch (fc_conf->mode) {
724 case RTE_FC_RX_PAUSE:
725 fcntl = EFX_FCNTL_RESPOND;
727 case RTE_FC_TX_PAUSE:
728 fcntl = EFX_FCNTL_GENERATE;
731 fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
738 sfc_adapter_lock(sa);
740 if (sa->state == SFC_ADAPTER_STARTED) {
741 rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg);
743 goto fail_mac_fcntl_set;
746 port->flow_ctrl = fcntl;
747 port->flow_ctrl_autoneg = fc_conf->autoneg;
749 sfc_adapter_unlock(sa);
754 sfc_adapter_unlock(sa);
761 sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
763 struct sfc_adapter *sa = dev->data->dev_private;
764 size_t pdu = EFX_MAC_PDU(mtu);
768 sfc_log_init(sa, "mtu=%u", mtu);
771 if (pdu < EFX_MAC_PDU_MIN) {
772 sfc_err(sa, "too small MTU %u (PDU size %u less than min %u)",
773 (unsigned int)mtu, (unsigned int)pdu,
777 if (pdu > EFX_MAC_PDU_MAX) {
778 sfc_err(sa, "too big MTU %u (PDU size %u greater than max %u)",
779 (unsigned int)mtu, (unsigned int)pdu,
784 sfc_adapter_lock(sa);
786 if (pdu != sa->port.pdu) {
787 if (sa->state == SFC_ADAPTER_STARTED) {
790 old_pdu = sa->port.pdu;
801 * The driver does not use it, but other PMDs update jumbo_frame
802 * flag and max_rx_pkt_len when MTU is set.
804 dev->data->dev_conf.rxmode.jumbo_frame = (mtu > ETHER_MAX_LEN);
805 dev->data->dev_conf.rxmode.max_rx_pkt_len = sa->port.pdu;
807 sfc_adapter_unlock(sa);
809 sfc_log_init(sa, "done");
813 sa->port.pdu = old_pdu;
814 if (sfc_start(sa) != 0)
815 sfc_err(sa, "cannot start with neither new (%u) nor old (%u) "
816 "PDU max size - port is stopped",
817 (unsigned int)pdu, (unsigned int)old_pdu);
818 sfc_adapter_unlock(sa);
821 sfc_log_init(sa, "failed %d", rc);
826 sfc_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
828 struct sfc_adapter *sa = dev->data->dev_private;
829 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
832 sfc_adapter_lock(sa);
834 if (sa->state != SFC_ADAPTER_STARTED) {
835 sfc_info(sa, "the port is not started");
836 sfc_info(sa, "the new MAC address will be set on port start");
841 if (encp->enc_allow_set_mac_with_installed_filters) {
842 rc = efx_mac_addr_set(sa->nic, mac_addr->addr_bytes);
844 sfc_err(sa, "cannot set MAC address (rc = %u)", rc);
849 * Changing the MAC address by means of MCDI request
850 * has no effect on received traffic, therefore
851 * we also need to update unicast filters
853 rc = sfc_set_rx_mode(sa);
855 sfc_err(sa, "cannot set filter (rc = %u)", rc);
857 sfc_warn(sa, "cannot set MAC address with filters installed");
858 sfc_warn(sa, "adapter will be restarted to pick the new MAC");
859 sfc_warn(sa, "(some traffic may be dropped)");
862 * Since setting MAC address with filters installed is not
863 * allowed on the adapter, one needs to simply restart adapter
864 * so that the new MAC address will be taken from an outer
865 * storage and set flawlessly by means of sfc_start() call
870 sfc_err(sa, "cannot restart adapter (rc = %u)", rc);
874 sfc_adapter_unlock(sa);
879 sfc_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set,
882 struct sfc_adapter *sa = dev->data->dev_private;
883 struct sfc_port *port = &sa->port;
884 uint8_t *mc_addrs = port->mcast_addrs;
888 if (mc_addrs == NULL)
891 if (nb_mc_addr > port->max_mcast_addrs) {
892 sfc_err(sa, "too many multicast addresses: %u > %u",
893 nb_mc_addr, port->max_mcast_addrs);
897 for (i = 0; i < nb_mc_addr; ++i) {
898 (void)rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes,
900 mc_addrs += EFX_MAC_ADDR_LEN;
903 port->nb_mcast_addrs = nb_mc_addr;
905 if (sa->state != SFC_ADAPTER_STARTED)
908 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs,
909 port->nb_mcast_addrs);
911 sfc_err(sa, "cannot set multicast address list (rc = %u)", rc);
918 sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id,
919 struct rte_eth_rxq_info *qinfo)
921 struct sfc_adapter *sa = dev->data->dev_private;
922 struct sfc_rxq_info *rxq_info;
925 sfc_adapter_lock(sa);
927 SFC_ASSERT(rx_queue_id < sa->rxq_count);
929 rxq_info = &sa->rxq_info[rx_queue_id];
931 SFC_ASSERT(rxq != NULL);
933 qinfo->mp = rxq->refill_mb_pool;
934 qinfo->conf.rx_free_thresh = rxq->refill_threshold;
935 qinfo->conf.rx_drop_en = 1;
936 qinfo->conf.rx_deferred_start = rxq_info->deferred_start;
937 qinfo->scattered_rx = (rxq_info->type == EFX_RXQ_TYPE_SCATTER);
938 qinfo->nb_desc = rxq_info->entries;
940 sfc_adapter_unlock(sa);
944 sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id,
945 struct rte_eth_txq_info *qinfo)
947 struct sfc_adapter *sa = dev->data->dev_private;
948 struct sfc_txq_info *txq_info;
950 sfc_adapter_lock(sa);
952 SFC_ASSERT(tx_queue_id < sa->txq_count);
954 txq_info = &sa->txq_info[tx_queue_id];
955 SFC_ASSERT(txq_info->txq != NULL);
957 memset(qinfo, 0, sizeof(*qinfo));
959 qinfo->conf.txq_flags = txq_info->txq->flags;
960 qinfo->conf.tx_free_thresh = txq_info->txq->free_thresh;
961 qinfo->conf.tx_deferred_start = txq_info->deferred_start;
962 qinfo->nb_desc = txq_info->entries;
964 sfc_adapter_unlock(sa);
968 sfc_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
970 struct sfc_adapter *sa = dev->data->dev_private;
972 sfc_log_init(sa, "RxQ=%u", rx_queue_id);
974 return sfc_rx_qdesc_npending(sa, rx_queue_id);
978 sfc_rx_descriptor_done(void *queue, uint16_t offset)
980 struct sfc_dp_rxq *dp_rxq = queue;
982 return sfc_rx_qdesc_done(dp_rxq, offset);
986 sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
988 struct sfc_adapter *sa = dev->data->dev_private;
991 sfc_log_init(sa, "RxQ=%u", rx_queue_id);
993 sfc_adapter_lock(sa);
996 if (sa->state != SFC_ADAPTER_STARTED)
997 goto fail_not_started;
999 rc = sfc_rx_qstart(sa, rx_queue_id);
1001 goto fail_rx_qstart;
1003 sa->rxq_info[rx_queue_id].deferred_started = B_TRUE;
1005 sfc_adapter_unlock(sa);
1011 sfc_adapter_unlock(sa);
1017 sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1019 struct sfc_adapter *sa = dev->data->dev_private;
1021 sfc_log_init(sa, "RxQ=%u", rx_queue_id);
1023 sfc_adapter_lock(sa);
1024 sfc_rx_qstop(sa, rx_queue_id);
1026 sa->rxq_info[rx_queue_id].deferred_started = B_FALSE;
1028 sfc_adapter_unlock(sa);
1034 sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1036 struct sfc_adapter *sa = dev->data->dev_private;
1039 sfc_log_init(sa, "TxQ = %u", tx_queue_id);
1041 sfc_adapter_lock(sa);
1044 if (sa->state != SFC_ADAPTER_STARTED)
1045 goto fail_not_started;
1047 rc = sfc_tx_qstart(sa, tx_queue_id);
1049 goto fail_tx_qstart;
1051 sa->txq_info[tx_queue_id].deferred_started = B_TRUE;
1053 sfc_adapter_unlock(sa);
1059 sfc_adapter_unlock(sa);
1065 sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1067 struct sfc_adapter *sa = dev->data->dev_private;
1069 sfc_log_init(sa, "TxQ = %u", tx_queue_id);
1071 sfc_adapter_lock(sa);
1073 sfc_tx_qstop(sa, tx_queue_id);
1075 sa->txq_info[tx_queue_id].deferred_started = B_FALSE;
1077 sfc_adapter_unlock(sa);
1081 #if EFSYS_OPT_RX_SCALE
1083 sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1084 struct rte_eth_rss_conf *rss_conf)
1086 struct sfc_adapter *sa = dev->data->dev_private;
1088 if ((sa->rss_channels == 1) ||
1089 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE))
1092 sfc_adapter_lock(sa);
1095 * Mapping of hash configuration between RTE and EFX is not one-to-one,
1096 * hence, conversion is done here to derive a correct set of ETH_RSS
1097 * flags which corresponds to the active EFX configuration stored
1098 * locally in 'sfc_adapter' and kept up-to-date
1100 rss_conf->rss_hf = sfc_efx_to_rte_hash_type(sa->rss_hash_types);
1101 rss_conf->rss_key_len = SFC_RSS_KEY_SIZE;
1102 if (rss_conf->rss_key != NULL)
1103 rte_memcpy(rss_conf->rss_key, sa->rss_key, SFC_RSS_KEY_SIZE);
1105 sfc_adapter_unlock(sa);
1111 sfc_dev_rss_hash_update(struct rte_eth_dev *dev,
1112 struct rte_eth_rss_conf *rss_conf)
1114 struct sfc_adapter *sa = dev->data->dev_private;
1115 unsigned int efx_hash_types;
1118 if ((sa->rss_channels == 1) ||
1119 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) {
1120 sfc_err(sa, "RSS is not available");
1124 if ((rss_conf->rss_key != NULL) &&
1125 (rss_conf->rss_key_len != sizeof(sa->rss_key))) {
1126 sfc_err(sa, "RSS key size is wrong (should be %lu)",
1127 sizeof(sa->rss_key));
1131 if ((rss_conf->rss_hf & ~SFC_RSS_OFFLOADS) != 0) {
1132 sfc_err(sa, "unsupported hash functions requested");
1136 sfc_adapter_lock(sa);
1138 efx_hash_types = sfc_rte_to_efx_hash_type(rss_conf->rss_hf);
1140 rc = efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ,
1141 efx_hash_types, B_TRUE);
1143 goto fail_scale_mode_set;
1145 if (rss_conf->rss_key != NULL) {
1146 if (sa->state == SFC_ADAPTER_STARTED) {
1147 rc = efx_rx_scale_key_set(sa->nic, rss_conf->rss_key,
1148 sizeof(sa->rss_key));
1150 goto fail_scale_key_set;
1153 rte_memcpy(sa->rss_key, rss_conf->rss_key, sizeof(sa->rss_key));
1156 sa->rss_hash_types = efx_hash_types;
1158 sfc_adapter_unlock(sa);
1163 if (efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ,
1164 sa->rss_hash_types, B_TRUE) != 0)
1165 sfc_err(sa, "failed to restore RSS mode");
1167 fail_scale_mode_set:
1168 sfc_adapter_unlock(sa);
1173 sfc_dev_rss_reta_query(struct rte_eth_dev *dev,
1174 struct rte_eth_rss_reta_entry64 *reta_conf,
1177 struct sfc_adapter *sa = dev->data->dev_private;
1180 if ((sa->rss_channels == 1) ||
1181 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE))
1184 if (reta_size != EFX_RSS_TBL_SIZE)
1187 sfc_adapter_lock(sa);
1189 for (entry = 0; entry < reta_size; entry++) {
1190 int grp = entry / RTE_RETA_GROUP_SIZE;
1191 int grp_idx = entry % RTE_RETA_GROUP_SIZE;
1193 if ((reta_conf[grp].mask >> grp_idx) & 1)
1194 reta_conf[grp].reta[grp_idx] = sa->rss_tbl[entry];
1197 sfc_adapter_unlock(sa);
1203 sfc_dev_rss_reta_update(struct rte_eth_dev *dev,
1204 struct rte_eth_rss_reta_entry64 *reta_conf,
1207 struct sfc_adapter *sa = dev->data->dev_private;
1208 unsigned int *rss_tbl_new;
1213 if ((sa->rss_channels == 1) ||
1214 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) {
1215 sfc_err(sa, "RSS is not available");
1219 if (reta_size != EFX_RSS_TBL_SIZE) {
1220 sfc_err(sa, "RETA size is wrong (should be %u)",
1225 rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(sa->rss_tbl), 0);
1226 if (rss_tbl_new == NULL)
1229 sfc_adapter_lock(sa);
1231 rte_memcpy(rss_tbl_new, sa->rss_tbl, sizeof(sa->rss_tbl));
1233 for (entry = 0; entry < reta_size; entry++) {
1234 int grp_idx = entry % RTE_RETA_GROUP_SIZE;
1235 struct rte_eth_rss_reta_entry64 *grp;
1237 grp = &reta_conf[entry / RTE_RETA_GROUP_SIZE];
1239 if (grp->mask & (1ull << grp_idx)) {
1240 if (grp->reta[grp_idx] >= sa->rss_channels) {
1242 goto bad_reta_entry;
1244 rss_tbl_new[entry] = grp->reta[grp_idx];
1248 rc = efx_rx_scale_tbl_set(sa->nic, rss_tbl_new, EFX_RSS_TBL_SIZE);
1250 rte_memcpy(sa->rss_tbl, rss_tbl_new, sizeof(sa->rss_tbl));
1253 sfc_adapter_unlock(sa);
1255 rte_free(rss_tbl_new);
1257 SFC_ASSERT(rc >= 0);
1263 sfc_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type,
1264 enum rte_filter_op filter_op,
1267 struct sfc_adapter *sa = dev->data->dev_private;
1270 sfc_log_init(sa, "entry");
1272 switch (filter_type) {
1273 case RTE_ETH_FILTER_NONE:
1274 sfc_err(sa, "Global filters configuration not supported");
1276 case RTE_ETH_FILTER_MACVLAN:
1277 sfc_err(sa, "MACVLAN filters not supported");
1279 case RTE_ETH_FILTER_ETHERTYPE:
1280 sfc_err(sa, "EtherType filters not supported");
1282 case RTE_ETH_FILTER_FLEXIBLE:
1283 sfc_err(sa, "Flexible filters not supported");
1285 case RTE_ETH_FILTER_SYN:
1286 sfc_err(sa, "SYN filters not supported");
1288 case RTE_ETH_FILTER_NTUPLE:
1289 sfc_err(sa, "NTUPLE filters not supported");
1291 case RTE_ETH_FILTER_TUNNEL:
1292 sfc_err(sa, "Tunnel filters not supported");
1294 case RTE_ETH_FILTER_FDIR:
1295 sfc_err(sa, "Flow Director filters not supported");
1297 case RTE_ETH_FILTER_HASH:
1298 sfc_err(sa, "Hash filters not supported");
1300 case RTE_ETH_FILTER_GENERIC:
1301 if (filter_op != RTE_ETH_FILTER_GET) {
1304 *(const void **)arg = &sfc_flow_ops;
1309 sfc_err(sa, "Unknown filter type %u", filter_type);
1313 sfc_log_init(sa, "exit: %d", -rc);
1314 SFC_ASSERT(rc >= 0);
1318 static const struct eth_dev_ops sfc_eth_dev_ops = {
1319 .dev_configure = sfc_dev_configure,
1320 .dev_start = sfc_dev_start,
1321 .dev_stop = sfc_dev_stop,
1322 .dev_set_link_up = sfc_dev_set_link_up,
1323 .dev_set_link_down = sfc_dev_set_link_down,
1324 .dev_close = sfc_dev_close,
1325 .promiscuous_enable = sfc_dev_promisc_enable,
1326 .promiscuous_disable = sfc_dev_promisc_disable,
1327 .allmulticast_enable = sfc_dev_allmulti_enable,
1328 .allmulticast_disable = sfc_dev_allmulti_disable,
1329 .link_update = sfc_dev_link_update,
1330 .stats_get = sfc_stats_get,
1331 .stats_reset = sfc_stats_reset,
1332 .xstats_get = sfc_xstats_get,
1333 .xstats_reset = sfc_stats_reset,
1334 .xstats_get_names = sfc_xstats_get_names,
1335 .dev_infos_get = sfc_dev_infos_get,
1336 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get,
1337 .mtu_set = sfc_dev_set_mtu,
1338 .rx_queue_start = sfc_rx_queue_start,
1339 .rx_queue_stop = sfc_rx_queue_stop,
1340 .tx_queue_start = sfc_tx_queue_start,
1341 .tx_queue_stop = sfc_tx_queue_stop,
1342 .rx_queue_setup = sfc_rx_queue_setup,
1343 .rx_queue_release = sfc_rx_queue_release,
1344 .rx_queue_count = sfc_rx_queue_count,
1345 .rx_descriptor_done = sfc_rx_descriptor_done,
1346 .tx_queue_setup = sfc_tx_queue_setup,
1347 .tx_queue_release = sfc_tx_queue_release,
1348 .flow_ctrl_get = sfc_flow_ctrl_get,
1349 .flow_ctrl_set = sfc_flow_ctrl_set,
1350 .mac_addr_set = sfc_mac_addr_set,
1351 #if EFSYS_OPT_RX_SCALE
1352 .reta_update = sfc_dev_rss_reta_update,
1353 .reta_query = sfc_dev_rss_reta_query,
1354 .rss_hash_update = sfc_dev_rss_hash_update,
1355 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get,
1357 .filter_ctrl = sfc_dev_filter_ctrl,
1358 .set_mc_addr_list = sfc_set_mc_addr_list,
1359 .rxq_info_get = sfc_rx_queue_info_get,
1360 .txq_info_get = sfc_tx_queue_info_get,
1361 .fw_version_get = sfc_fw_version_get,
1365 sfc_eth_dev_set_ops(struct rte_eth_dev *dev)
1367 struct sfc_adapter *sa = dev->data->dev_private;
1368 unsigned int avail_caps = 0;
1369 const char *rx_name = NULL;
1370 const char *tx_name = NULL;
1373 if (sa == NULL || sa->state == SFC_ADAPTER_UNINITIALIZED)
1374 return -E_RTE_SECONDARY;
1376 switch (sa->family) {
1377 case EFX_FAMILY_HUNTINGTON:
1378 case EFX_FAMILY_MEDFORD:
1379 avail_caps |= SFC_DP_HW_FW_CAP_EF10;
1385 rc = sfc_kvargs_process(sa, SFC_KVARG_RX_DATAPATH,
1386 sfc_kvarg_string_handler, &rx_name);
1388 goto fail_kvarg_rx_datapath;
1390 if (rx_name != NULL) {
1391 sa->dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, rx_name);
1392 if (sa->dp_rx == NULL) {
1393 sfc_err(sa, "Rx datapath %s not found", rx_name);
1397 if (!sfc_dp_match_hw_fw_caps(&sa->dp_rx->dp, avail_caps)) {
1399 "Insufficient Hw/FW capabilities to use Rx datapath %s",
1405 sa->dp_rx = sfc_dp_find_rx_by_caps(&sfc_dp_head, avail_caps);
1406 if (sa->dp_rx == NULL) {
1407 sfc_err(sa, "Rx datapath by caps %#x not found",
1414 sfc_info(sa, "use %s Rx datapath", sa->dp_rx->dp.name);
1416 dev->rx_pkt_burst = sa->dp_rx->pkt_burst;
1418 rc = sfc_kvargs_process(sa, SFC_KVARG_TX_DATAPATH,
1419 sfc_kvarg_string_handler, &tx_name);
1421 goto fail_kvarg_tx_datapath;
1423 if (tx_name != NULL) {
1424 sa->dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, tx_name);
1425 if (sa->dp_tx == NULL) {
1426 sfc_err(sa, "Tx datapath %s not found", tx_name);
1430 if (!sfc_dp_match_hw_fw_caps(&sa->dp_tx->dp, avail_caps)) {
1432 "Insufficient Hw/FW capabilities to use Tx datapath %s",
1438 sa->dp_tx = sfc_dp_find_tx_by_caps(&sfc_dp_head, avail_caps);
1439 if (sa->dp_tx == NULL) {
1440 sfc_err(sa, "Tx datapath by caps %#x not found",
1447 sfc_info(sa, "use %s Tx datapath", sa->dp_tx->dp.name);
1449 dev->tx_pkt_burst = sa->dp_tx->pkt_burst;
1451 dev->dev_ops = &sfc_eth_dev_ops;
1456 fail_kvarg_tx_datapath:
1458 fail_kvarg_rx_datapath:
1463 sfc_register_dp(void)
1466 if (TAILQ_EMPTY(&sfc_dp_head)) {
1467 /* Prefer EF10 datapath */
1468 sfc_dp_register(&sfc_dp_head, &sfc_ef10_rx.dp);
1469 sfc_dp_register(&sfc_dp_head, &sfc_efx_rx.dp);
1471 sfc_dp_register(&sfc_dp_head, &sfc_ef10_tx.dp);
1472 sfc_dp_register(&sfc_dp_head, &sfc_efx_tx.dp);
1477 sfc_eth_dev_init(struct rte_eth_dev *dev)
1479 struct sfc_adapter *sa = dev->data->dev_private;
1480 struct rte_pci_device *pci_dev = SFC_DEV_TO_PCI(dev);
1482 const efx_nic_cfg_t *encp;
1483 const struct ether_addr *from;
1487 /* Required for logging */
1490 /* Copy PCI device info to the dev->data */
1491 rte_eth_copy_pci_info(dev, pci_dev);
1493 rc = sfc_kvargs_parse(sa);
1495 goto fail_kvargs_parse;
1497 rc = sfc_kvargs_process(sa, SFC_KVARG_DEBUG_INIT,
1498 sfc_kvarg_bool_handler, &sa->debug_init);
1500 goto fail_kvarg_debug_init;
1502 sfc_log_init(sa, "entry");
1504 dev->data->mac_addrs = rte_zmalloc("sfc", ETHER_ADDR_LEN, 0);
1505 if (dev->data->mac_addrs == NULL) {
1507 goto fail_mac_addrs;
1510 sfc_adapter_lock_init(sa);
1511 sfc_adapter_lock(sa);
1513 sfc_log_init(sa, "attaching");
1514 rc = sfc_attach(sa);
1518 encp = efx_nic_cfg_get(sa->nic);
1521 * The arguments are really reverse order in comparison to
1522 * Linux kernel. Copy from NIC config to Ethernet device data.
1524 from = (const struct ether_addr *)(encp->enc_mac_addr);
1525 ether_addr_copy(from, &dev->data->mac_addrs[0]);
1527 sfc_adapter_unlock(sa);
1529 sfc_eth_dev_set_ops(dev);
1531 sfc_log_init(sa, "done");
1535 sfc_adapter_unlock(sa);
1536 sfc_adapter_lock_fini(sa);
1537 rte_free(dev->data->mac_addrs);
1538 dev->data->mac_addrs = NULL;
1541 fail_kvarg_debug_init:
1542 sfc_kvargs_cleanup(sa);
1545 sfc_log_init(sa, "failed %d", rc);
1551 sfc_eth_dev_uninit(struct rte_eth_dev *dev)
1553 struct sfc_adapter *sa = dev->data->dev_private;
1555 sfc_log_init(sa, "entry");
1557 sfc_adapter_lock(sa);
1561 rte_free(dev->data->mac_addrs);
1562 dev->data->mac_addrs = NULL;
1564 dev->dev_ops = NULL;
1565 dev->rx_pkt_burst = NULL;
1566 dev->tx_pkt_burst = NULL;
1568 sfc_kvargs_cleanup(sa);
1570 sfc_adapter_unlock(sa);
1571 sfc_adapter_lock_fini(sa);
1573 sfc_log_init(sa, "done");
1575 /* Required for logging, so cleanup last */
1580 static const struct rte_pci_id pci_id_sfc_efx_map[] = {
1581 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) },
1582 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE_VF) },
1583 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) },
1584 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT_VF) },
1585 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) },
1586 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) },
1587 { .vendor_id = 0 /* sentinel */ }
1590 static struct eth_driver sfc_efx_pmd = {
1592 .id_table = pci_id_sfc_efx_map,
1594 RTE_PCI_DRV_INTR_LSC |
1595 RTE_PCI_DRV_NEED_MAPPING,
1596 .probe = rte_eth_dev_pci_probe,
1597 .remove = rte_eth_dev_pci_remove,
1599 .eth_dev_init = sfc_eth_dev_init,
1600 .eth_dev_uninit = sfc_eth_dev_uninit,
1601 .dev_private_size = sizeof(struct sfc_adapter),
1604 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd.pci_drv);
1605 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map);
1606 RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio");
1607 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx,
1608 SFC_KVARG_RX_DATAPATH "=" SFC_KVARG_VALUES_RX_DATAPATH " "
1609 SFC_KVARG_TX_DATAPATH "=" SFC_KVARG_VALUES_TX_DATAPATH " "
1610 SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " "
1611 SFC_KVARG_STATS_UPDATE_PERIOD_MS "=<long> "
1612 SFC_KVARG_MCDI_LOGGING "=" SFC_KVARG_VALUES_BOOL " "
1613 SFC_KVARG_DEBUG_INIT "=" SFC_KVARG_VALUES_BOOL);