4 * Copyright (c) 2016-2017 Solarflare Communications Inc.
7 * This software was jointly developed between OKTET Labs (under contract
8 * for Solarflare) and Solarflare Communications, Inc.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 #include <rte_ethdev.h>
39 #include "sfc_debug.h"
41 #include "sfc_kvargs.h"
48 sfc_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
50 struct sfc_adapter *sa = dev->data->dev_private;
51 efx_nic_fw_info_t enfi;
56 * Return value of the callback is likely supposed to be
57 * equal to or greater than 0, nevertheless, if an error
58 * occurs, it will be desirable to pass it to the caller
60 if ((fw_version == NULL) || (fw_size == 0))
63 rc = efx_nic_get_fw_version(sa->nic, &enfi);
67 ret = snprintf(fw_version, fw_size,
68 "%" PRIu16 ".%" PRIu16 ".%" PRIu16 ".%" PRIu16,
69 enfi.enfi_mc_fw_version[0], enfi.enfi_mc_fw_version[1],
70 enfi.enfi_mc_fw_version[2], enfi.enfi_mc_fw_version[3]);
74 if (enfi.enfi_dpcpu_fw_ids_valid) {
75 size_t dpcpu_fw_ids_offset = MIN(fw_size - 1, (size_t)ret);
78 ret_extra = snprintf(fw_version + dpcpu_fw_ids_offset,
79 fw_size - dpcpu_fw_ids_offset,
80 " rx%" PRIx16 " tx%" PRIx16,
81 enfi.enfi_rx_dpcpu_fw_id,
82 enfi.enfi_tx_dpcpu_fw_id);
89 if (fw_size < (size_t)(++ret))
96 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
98 struct sfc_adapter *sa = dev->data->dev_private;
99 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
101 sfc_log_init(sa, "entry");
103 dev_info->pci_dev = RTE_DEV_TO_PCI(dev->device);
104 dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX;
106 /* Autonegotiation may be disabled */
107 dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
108 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_1000FDX)
109 dev_info->speed_capa |= ETH_LINK_SPEED_1G;
110 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_10000FDX)
111 dev_info->speed_capa |= ETH_LINK_SPEED_10G;
112 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_40000FDX)
113 dev_info->speed_capa |= ETH_LINK_SPEED_40G;
115 dev_info->max_rx_queues = sa->rxq_max;
116 dev_info->max_tx_queues = sa->txq_max;
118 /* By default packets are dropped if no descriptors are available */
119 dev_info->default_rxconf.rx_drop_en = 1;
121 dev_info->rx_offload_capa =
122 DEV_RX_OFFLOAD_IPV4_CKSUM |
123 DEV_RX_OFFLOAD_UDP_CKSUM |
124 DEV_RX_OFFLOAD_TCP_CKSUM;
126 dev_info->tx_offload_capa =
127 DEV_TX_OFFLOAD_IPV4_CKSUM |
128 DEV_TX_OFFLOAD_UDP_CKSUM |
129 DEV_TX_OFFLOAD_TCP_CKSUM;
131 dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP;
132 if (!encp->enc_hw_tx_insert_vlan_enabled)
133 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
135 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_VLAN_INSERT;
137 #if EFSYS_OPT_RX_SCALE
138 if (sa->rss_support != EFX_RX_SCALE_UNAVAILABLE) {
139 dev_info->reta_size = EFX_RSS_TBL_SIZE;
140 dev_info->hash_key_size = SFC_RSS_KEY_SIZE;
141 dev_info->flow_type_rss_offloads = SFC_RSS_OFFLOADS;
146 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO;
148 dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS;
149 dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS;
150 /* The RXQ hardware requires that the descriptor count is a power
151 * of 2, but rx_desc_lim cannot properly describe that constraint.
153 dev_info->rx_desc_lim.nb_align = EFX_RXQ_MINNDESCS;
155 dev_info->tx_desc_lim.nb_max = sa->txq_max_entries;
156 dev_info->tx_desc_lim.nb_min = EFX_TXQ_MINNDESCS;
158 * The TXQ hardware requires that the descriptor count is a power
159 * of 2, but tx_desc_lim cannot properly describe that constraint
161 dev_info->tx_desc_lim.nb_align = EFX_TXQ_MINNDESCS;
164 static const uint32_t *
165 sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev)
167 static const uint32_t ptypes[] = {
169 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
170 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
176 if (dev->rx_pkt_burst == sfc_recv_pkts)
183 sfc_dev_configure(struct rte_eth_dev *dev)
185 struct rte_eth_dev_data *dev_data = dev->data;
186 struct sfc_adapter *sa = dev_data->dev_private;
189 sfc_log_init(sa, "entry n_rxq=%u n_txq=%u",
190 dev_data->nb_rx_queues, dev_data->nb_tx_queues);
192 sfc_adapter_lock(sa);
194 case SFC_ADAPTER_CONFIGURED:
196 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED);
198 case SFC_ADAPTER_INITIALIZED:
199 rc = sfc_configure(sa);
202 sfc_err(sa, "unexpected adapter state %u to configure",
207 sfc_adapter_unlock(sa);
209 sfc_log_init(sa, "done %d", rc);
215 sfc_dev_start(struct rte_eth_dev *dev)
217 struct sfc_adapter *sa = dev->data->dev_private;
220 sfc_log_init(sa, "entry");
222 sfc_adapter_lock(sa);
224 sfc_adapter_unlock(sa);
226 sfc_log_init(sa, "done %d", rc);
232 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
234 struct sfc_adapter *sa = dev->data->dev_private;
235 struct rte_eth_link *dev_link = &dev->data->dev_link;
236 struct rte_eth_link old_link;
237 struct rte_eth_link current_link;
239 sfc_log_init(sa, "entry");
242 EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t));
243 *(int64_t *)&old_link = rte_atomic64_read((rte_atomic64_t *)dev_link);
245 if (sa->state != SFC_ADAPTER_STARTED) {
246 sfc_port_link_mode_to_info(EFX_LINK_UNKNOWN, ¤t_link);
247 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link,
248 *(uint64_t *)&old_link,
249 *(uint64_t *)¤t_link))
251 } else if (wait_to_complete) {
252 efx_link_mode_t link_mode;
254 if (efx_port_poll(sa->nic, &link_mode) != 0)
255 link_mode = EFX_LINK_UNKNOWN;
256 sfc_port_link_mode_to_info(link_mode, ¤t_link);
258 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link,
259 *(uint64_t *)&old_link,
260 *(uint64_t *)¤t_link))
263 sfc_ev_mgmt_qpoll(sa);
264 *(int64_t *)¤t_link =
265 rte_atomic64_read((rte_atomic64_t *)dev_link);
268 if (old_link.link_status != current_link.link_status)
269 sfc_info(sa, "Link status is %s",
270 current_link.link_status ? "UP" : "DOWN");
272 return old_link.link_status == current_link.link_status ? 0 : -1;
276 sfc_dev_stop(struct rte_eth_dev *dev)
278 struct sfc_adapter *sa = dev->data->dev_private;
280 sfc_log_init(sa, "entry");
282 sfc_adapter_lock(sa);
284 sfc_adapter_unlock(sa);
286 sfc_log_init(sa, "done");
290 sfc_dev_set_link_up(struct rte_eth_dev *dev)
292 struct sfc_adapter *sa = dev->data->dev_private;
295 sfc_log_init(sa, "entry");
297 sfc_adapter_lock(sa);
299 sfc_adapter_unlock(sa);
306 sfc_dev_set_link_down(struct rte_eth_dev *dev)
308 struct sfc_adapter *sa = dev->data->dev_private;
310 sfc_log_init(sa, "entry");
312 sfc_adapter_lock(sa);
314 sfc_adapter_unlock(sa);
320 sfc_dev_close(struct rte_eth_dev *dev)
322 struct sfc_adapter *sa = dev->data->dev_private;
324 sfc_log_init(sa, "entry");
326 sfc_adapter_lock(sa);
328 case SFC_ADAPTER_STARTED:
330 SFC_ASSERT(sa->state == SFC_ADAPTER_CONFIGURED);
332 case SFC_ADAPTER_CONFIGURED:
334 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED);
336 case SFC_ADAPTER_INITIALIZED:
339 sfc_err(sa, "unexpected adapter state %u on close", sa->state);
342 sfc_adapter_unlock(sa);
344 sfc_log_init(sa, "done");
348 sfc_dev_filter_set(struct rte_eth_dev *dev, enum sfc_dev_filter_mode mode,
351 struct sfc_port *port;
353 struct sfc_adapter *sa = dev->data->dev_private;
354 boolean_t allmulti = (mode == SFC_DEV_FILTER_MODE_ALLMULTI);
355 const char *desc = (allmulti) ? "all-multi" : "promiscuous";
357 sfc_adapter_lock(sa);
360 toggle = (allmulti) ? (&port->allmulti) : (&port->promisc);
362 if (*toggle != enabled) {
365 if ((sa->state == SFC_ADAPTER_STARTED) &&
366 (sfc_set_rx_mode(sa) != 0)) {
367 *toggle = !(enabled);
368 sfc_warn(sa, "Failed to %s %s mode",
369 ((enabled) ? "enable" : "disable"), desc);
373 sfc_adapter_unlock(sa);
377 sfc_dev_promisc_enable(struct rte_eth_dev *dev)
379 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_TRUE);
383 sfc_dev_promisc_disable(struct rte_eth_dev *dev)
385 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_FALSE);
389 sfc_dev_allmulti_enable(struct rte_eth_dev *dev)
391 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_TRUE);
395 sfc_dev_allmulti_disable(struct rte_eth_dev *dev)
397 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_FALSE);
401 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
402 uint16_t nb_rx_desc, unsigned int socket_id,
403 const struct rte_eth_rxconf *rx_conf,
404 struct rte_mempool *mb_pool)
406 struct sfc_adapter *sa = dev->data->dev_private;
409 sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u",
410 rx_queue_id, nb_rx_desc, socket_id);
412 sfc_adapter_lock(sa);
414 rc = sfc_rx_qinit(sa, rx_queue_id, nb_rx_desc, socket_id,
419 dev->data->rx_queues[rx_queue_id] = sa->rxq_info[rx_queue_id].rxq;
421 sfc_adapter_unlock(sa);
426 sfc_adapter_unlock(sa);
432 sfc_rx_queue_release(void *queue)
434 struct sfc_rxq *rxq = queue;
435 struct sfc_adapter *sa;
436 unsigned int sw_index;
442 sfc_adapter_lock(sa);
444 sw_index = sfc_rxq_sw_index(rxq);
446 sfc_log_init(sa, "RxQ=%u", sw_index);
448 sa->eth_dev->data->rx_queues[sw_index] = NULL;
450 sfc_rx_qfini(sa, sw_index);
452 sfc_adapter_unlock(sa);
456 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
457 uint16_t nb_tx_desc, unsigned int socket_id,
458 const struct rte_eth_txconf *tx_conf)
460 struct sfc_adapter *sa = dev->data->dev_private;
463 sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u",
464 tx_queue_id, nb_tx_desc, socket_id);
466 sfc_adapter_lock(sa);
468 rc = sfc_tx_qinit(sa, tx_queue_id, nb_tx_desc, socket_id, tx_conf);
472 dev->data->tx_queues[tx_queue_id] = sa->txq_info[tx_queue_id].txq;
474 sfc_adapter_unlock(sa);
478 sfc_adapter_unlock(sa);
484 sfc_tx_queue_release(void *queue)
486 struct sfc_txq *txq = queue;
487 unsigned int sw_index;
488 struct sfc_adapter *sa;
493 sw_index = sfc_txq_sw_index(txq);
495 SFC_ASSERT(txq->evq != NULL);
498 sfc_log_init(sa, "TxQ = %u", sw_index);
500 sfc_adapter_lock(sa);
502 SFC_ASSERT(sw_index < sa->eth_dev->data->nb_tx_queues);
503 sa->eth_dev->data->tx_queues[sw_index] = NULL;
505 sfc_tx_qfini(sa, sw_index);
507 sfc_adapter_unlock(sa);
511 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
513 struct sfc_adapter *sa = dev->data->dev_private;
514 struct sfc_port *port = &sa->port;
517 rte_spinlock_lock(&port->mac_stats_lock);
519 if (sfc_port_update_mac_stats(sa) != 0)
522 mac_stats = port->mac_stats_buf;
524 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask,
525 EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) {
527 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] +
528 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] +
529 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS];
531 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] +
532 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] +
533 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS];
535 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] +
536 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] +
537 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES];
539 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] +
540 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] +
541 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES];
542 stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_OVERFLOW];
543 stats->ierrors = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS];
544 stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS];
546 stats->ipackets = mac_stats[EFX_MAC_RX_PKTS];
547 stats->opackets = mac_stats[EFX_MAC_TX_PKTS];
548 stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS];
549 stats->obytes = mac_stats[EFX_MAC_TX_OCTETS];
551 * Take into account stats which are whenever supported
552 * on EF10. If some stat is not supported by current
553 * firmware variant or HW revision, it is guaranteed
554 * to be zero in mac_stats.
557 mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] +
558 mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] +
559 mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] +
560 mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] +
561 mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] +
562 mac_stats[EFX_MAC_PM_TRUNC_QBB] +
563 mac_stats[EFX_MAC_PM_DISCARD_QBB] +
564 mac_stats[EFX_MAC_PM_DISCARD_MAPPING] +
565 mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] +
566 mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS];
568 mac_stats[EFX_MAC_RX_FCS_ERRORS] +
569 mac_stats[EFX_MAC_RX_ALIGN_ERRORS] +
570 mac_stats[EFX_MAC_RX_JABBER_PKTS];
571 /* no oerrors counters supported on EF10 */
575 rte_spinlock_unlock(&port->mac_stats_lock);
579 sfc_stats_reset(struct rte_eth_dev *dev)
581 struct sfc_adapter *sa = dev->data->dev_private;
582 struct sfc_port *port = &sa->port;
585 if (sa->state != SFC_ADAPTER_STARTED) {
587 * The operation cannot be done if port is not started; it
588 * will be scheduled to be done during the next port start
590 port->mac_stats_reset_pending = B_TRUE;
594 rc = sfc_port_reset_mac_stats(sa);
596 sfc_err(sa, "failed to reset statistics (rc = %d)", rc);
600 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
601 unsigned int xstats_count)
603 struct sfc_adapter *sa = dev->data->dev_private;
604 struct sfc_port *port = &sa->port;
610 rte_spinlock_lock(&port->mac_stats_lock);
612 rc = sfc_port_update_mac_stats(sa);
619 mac_stats = port->mac_stats_buf;
621 for (i = 0; i < EFX_MAC_NSTATS; ++i) {
622 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) {
623 if (xstats != NULL && nstats < (int)xstats_count) {
624 xstats[nstats].id = nstats;
625 xstats[nstats].value = mac_stats[i];
632 rte_spinlock_unlock(&port->mac_stats_lock);
638 sfc_xstats_get_names(struct rte_eth_dev *dev,
639 struct rte_eth_xstat_name *xstats_names,
640 unsigned int xstats_count)
642 struct sfc_adapter *sa = dev->data->dev_private;
643 struct sfc_port *port = &sa->port;
645 unsigned int nstats = 0;
647 for (i = 0; i < EFX_MAC_NSTATS; ++i) {
648 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) {
649 if (xstats_names != NULL && nstats < xstats_count)
650 strncpy(xstats_names[nstats].name,
651 efx_mac_stat_name(sa->nic, i),
652 sizeof(xstats_names[0].name));
661 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
663 struct sfc_adapter *sa = dev->data->dev_private;
664 unsigned int wanted_fc, link_fc;
666 memset(fc_conf, 0, sizeof(*fc_conf));
668 sfc_adapter_lock(sa);
670 if (sa->state == SFC_ADAPTER_STARTED)
671 efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc);
673 link_fc = sa->port.flow_ctrl;
677 fc_conf->mode = RTE_FC_NONE;
679 case EFX_FCNTL_RESPOND:
680 fc_conf->mode = RTE_FC_RX_PAUSE;
682 case EFX_FCNTL_GENERATE:
683 fc_conf->mode = RTE_FC_TX_PAUSE;
685 case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE):
686 fc_conf->mode = RTE_FC_FULL;
689 sfc_err(sa, "%s: unexpected flow control value %#x",
693 fc_conf->autoneg = sa->port.flow_ctrl_autoneg;
695 sfc_adapter_unlock(sa);
701 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
703 struct sfc_adapter *sa = dev->data->dev_private;
704 struct sfc_port *port = &sa->port;
708 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 ||
709 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 ||
710 fc_conf->mac_ctrl_frame_fwd != 0) {
711 sfc_err(sa, "unsupported flow control settings specified");
716 switch (fc_conf->mode) {
720 case RTE_FC_RX_PAUSE:
721 fcntl = EFX_FCNTL_RESPOND;
723 case RTE_FC_TX_PAUSE:
724 fcntl = EFX_FCNTL_GENERATE;
727 fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
734 sfc_adapter_lock(sa);
736 if (sa->state == SFC_ADAPTER_STARTED) {
737 rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg);
739 goto fail_mac_fcntl_set;
742 port->flow_ctrl = fcntl;
743 port->flow_ctrl_autoneg = fc_conf->autoneg;
745 sfc_adapter_unlock(sa);
750 sfc_adapter_unlock(sa);
757 sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
759 struct sfc_adapter *sa = dev->data->dev_private;
760 size_t pdu = EFX_MAC_PDU(mtu);
764 sfc_log_init(sa, "mtu=%u", mtu);
767 if (pdu < EFX_MAC_PDU_MIN) {
768 sfc_err(sa, "too small MTU %u (PDU size %u less than min %u)",
769 (unsigned int)mtu, (unsigned int)pdu,
773 if (pdu > EFX_MAC_PDU_MAX) {
774 sfc_err(sa, "too big MTU %u (PDU size %u greater than max %u)",
775 (unsigned int)mtu, (unsigned int)pdu,
780 sfc_adapter_lock(sa);
782 if (pdu != sa->port.pdu) {
783 if (sa->state == SFC_ADAPTER_STARTED) {
786 old_pdu = sa->port.pdu;
797 * The driver does not use it, but other PMDs update jumbo_frame
798 * flag and max_rx_pkt_len when MTU is set.
800 dev->data->dev_conf.rxmode.jumbo_frame = (mtu > ETHER_MAX_LEN);
801 dev->data->dev_conf.rxmode.max_rx_pkt_len = sa->port.pdu;
803 sfc_adapter_unlock(sa);
805 sfc_log_init(sa, "done");
809 sa->port.pdu = old_pdu;
810 if (sfc_start(sa) != 0)
811 sfc_err(sa, "cannot start with neither new (%u) nor old (%u) "
812 "PDU max size - port is stopped",
813 (unsigned int)pdu, (unsigned int)old_pdu);
814 sfc_adapter_unlock(sa);
817 sfc_log_init(sa, "failed %d", rc);
822 sfc_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
824 struct sfc_adapter *sa = dev->data->dev_private;
825 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
828 sfc_adapter_lock(sa);
830 if (sa->state != SFC_ADAPTER_STARTED) {
831 sfc_info(sa, "the port is not started");
832 sfc_info(sa, "the new MAC address will be set on port start");
837 if (encp->enc_allow_set_mac_with_installed_filters) {
838 rc = efx_mac_addr_set(sa->nic, mac_addr->addr_bytes);
840 sfc_err(sa, "cannot set MAC address (rc = %u)", rc);
845 * Changing the MAC address by means of MCDI request
846 * has no effect on received traffic, therefore
847 * we also need to update unicast filters
849 rc = sfc_set_rx_mode(sa);
851 sfc_err(sa, "cannot set filter (rc = %u)", rc);
853 sfc_warn(sa, "cannot set MAC address with filters installed");
854 sfc_warn(sa, "adapter will be restarted to pick the new MAC");
855 sfc_warn(sa, "(some traffic may be dropped)");
858 * Since setting MAC address with filters installed is not
859 * allowed on the adapter, one needs to simply restart adapter
860 * so that the new MAC address will be taken from an outer
861 * storage and set flawlessly by means of sfc_start() call
866 sfc_err(sa, "cannot restart adapter (rc = %u)", rc);
870 sfc_adapter_unlock(sa);
875 sfc_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set,
878 struct sfc_adapter *sa = dev->data->dev_private;
879 struct sfc_port *port = &sa->port;
880 uint8_t *mc_addrs = port->mcast_addrs;
884 if (mc_addrs == NULL)
887 if (nb_mc_addr > port->max_mcast_addrs) {
888 sfc_err(sa, "too many multicast addresses: %u > %u",
889 nb_mc_addr, port->max_mcast_addrs);
893 for (i = 0; i < nb_mc_addr; ++i) {
894 (void)rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes,
896 mc_addrs += EFX_MAC_ADDR_LEN;
899 port->nb_mcast_addrs = nb_mc_addr;
901 if (sa->state != SFC_ADAPTER_STARTED)
904 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs,
905 port->nb_mcast_addrs);
907 sfc_err(sa, "cannot set multicast address list (rc = %u)", rc);
914 sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id,
915 struct rte_eth_rxq_info *qinfo)
917 struct sfc_adapter *sa = dev->data->dev_private;
918 struct sfc_rxq_info *rxq_info;
921 sfc_adapter_lock(sa);
923 SFC_ASSERT(rx_queue_id < sa->rxq_count);
925 rxq_info = &sa->rxq_info[rx_queue_id];
927 SFC_ASSERT(rxq != NULL);
929 qinfo->mp = rxq->refill_mb_pool;
930 qinfo->conf.rx_free_thresh = rxq->refill_threshold;
931 qinfo->conf.rx_drop_en = 1;
932 qinfo->conf.rx_deferred_start = rxq_info->deferred_start;
933 qinfo->scattered_rx = (rxq_info->type == EFX_RXQ_TYPE_SCATTER);
934 qinfo->nb_desc = rxq_info->entries;
936 sfc_adapter_unlock(sa);
940 sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id,
941 struct rte_eth_txq_info *qinfo)
943 struct sfc_adapter *sa = dev->data->dev_private;
944 struct sfc_txq_info *txq_info;
946 sfc_adapter_lock(sa);
948 SFC_ASSERT(tx_queue_id < sa->txq_count);
950 txq_info = &sa->txq_info[tx_queue_id];
951 SFC_ASSERT(txq_info->txq != NULL);
953 memset(qinfo, 0, sizeof(*qinfo));
955 qinfo->conf.txq_flags = txq_info->txq->flags;
956 qinfo->conf.tx_free_thresh = txq_info->txq->free_thresh;
957 qinfo->conf.tx_deferred_start = txq_info->deferred_start;
958 qinfo->nb_desc = txq_info->entries;
960 sfc_adapter_unlock(sa);
964 sfc_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
966 struct sfc_adapter *sa = dev->data->dev_private;
968 sfc_log_init(sa, "RxQ=%u", rx_queue_id);
970 return sfc_rx_qdesc_npending(sa, rx_queue_id);
974 sfc_rx_descriptor_done(void *queue, uint16_t offset)
976 struct sfc_rxq *rxq = queue;
978 return sfc_rx_qdesc_done(rxq, offset);
982 sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
984 struct sfc_adapter *sa = dev->data->dev_private;
987 sfc_log_init(sa, "RxQ=%u", rx_queue_id);
989 sfc_adapter_lock(sa);
992 if (sa->state != SFC_ADAPTER_STARTED)
993 goto fail_not_started;
995 rc = sfc_rx_qstart(sa, rx_queue_id);
999 sa->rxq_info[rx_queue_id].deferred_started = B_TRUE;
1001 sfc_adapter_unlock(sa);
1007 sfc_adapter_unlock(sa);
1013 sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1015 struct sfc_adapter *sa = dev->data->dev_private;
1017 sfc_log_init(sa, "RxQ=%u", rx_queue_id);
1019 sfc_adapter_lock(sa);
1020 sfc_rx_qstop(sa, rx_queue_id);
1022 sa->rxq_info[rx_queue_id].deferred_started = B_FALSE;
1024 sfc_adapter_unlock(sa);
1030 sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1032 struct sfc_adapter *sa = dev->data->dev_private;
1035 sfc_log_init(sa, "TxQ = %u", tx_queue_id);
1037 sfc_adapter_lock(sa);
1040 if (sa->state != SFC_ADAPTER_STARTED)
1041 goto fail_not_started;
1043 rc = sfc_tx_qstart(sa, tx_queue_id);
1045 goto fail_tx_qstart;
1047 sa->txq_info[tx_queue_id].deferred_started = B_TRUE;
1049 sfc_adapter_unlock(sa);
1055 sfc_adapter_unlock(sa);
1061 sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1063 struct sfc_adapter *sa = dev->data->dev_private;
1065 sfc_log_init(sa, "TxQ = %u", tx_queue_id);
1067 sfc_adapter_lock(sa);
1069 sfc_tx_qstop(sa, tx_queue_id);
1071 sa->txq_info[tx_queue_id].deferred_started = B_FALSE;
1073 sfc_adapter_unlock(sa);
1077 #if EFSYS_OPT_RX_SCALE
1079 sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1080 struct rte_eth_rss_conf *rss_conf)
1082 struct sfc_adapter *sa = dev->data->dev_private;
1084 if ((sa->rss_channels == 1) ||
1085 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE))
1088 sfc_adapter_lock(sa);
1091 * Mapping of hash configuration between RTE and EFX is not one-to-one,
1092 * hence, conversion is done here to derive a correct set of ETH_RSS
1093 * flags which corresponds to the active EFX configuration stored
1094 * locally in 'sfc_adapter' and kept up-to-date
1096 rss_conf->rss_hf = sfc_efx_to_rte_hash_type(sa->rss_hash_types);
1097 rss_conf->rss_key_len = SFC_RSS_KEY_SIZE;
1098 if (rss_conf->rss_key != NULL)
1099 rte_memcpy(rss_conf->rss_key, sa->rss_key, SFC_RSS_KEY_SIZE);
1101 sfc_adapter_unlock(sa);
1107 sfc_dev_rss_hash_update(struct rte_eth_dev *dev,
1108 struct rte_eth_rss_conf *rss_conf)
1110 struct sfc_adapter *sa = dev->data->dev_private;
1111 unsigned int efx_hash_types;
1114 if ((sa->rss_channels == 1) ||
1115 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) {
1116 sfc_err(sa, "RSS is not available");
1120 if ((rss_conf->rss_key != NULL) &&
1121 (rss_conf->rss_key_len != sizeof(sa->rss_key))) {
1122 sfc_err(sa, "RSS key size is wrong (should be %lu)",
1123 sizeof(sa->rss_key));
1127 if ((rss_conf->rss_hf & ~SFC_RSS_OFFLOADS) != 0) {
1128 sfc_err(sa, "unsupported hash functions requested");
1132 sfc_adapter_lock(sa);
1134 efx_hash_types = sfc_rte_to_efx_hash_type(rss_conf->rss_hf);
1136 rc = efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ,
1137 efx_hash_types, B_TRUE);
1139 goto fail_scale_mode_set;
1141 if (rss_conf->rss_key != NULL) {
1142 if (sa->state == SFC_ADAPTER_STARTED) {
1143 rc = efx_rx_scale_key_set(sa->nic, rss_conf->rss_key,
1144 sizeof(sa->rss_key));
1146 goto fail_scale_key_set;
1149 rte_memcpy(sa->rss_key, rss_conf->rss_key, sizeof(sa->rss_key));
1152 sa->rss_hash_types = efx_hash_types;
1154 sfc_adapter_unlock(sa);
1159 if (efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ,
1160 sa->rss_hash_types, B_TRUE) != 0)
1161 sfc_err(sa, "failed to restore RSS mode");
1163 fail_scale_mode_set:
1164 sfc_adapter_unlock(sa);
1169 sfc_dev_rss_reta_query(struct rte_eth_dev *dev,
1170 struct rte_eth_rss_reta_entry64 *reta_conf,
1173 struct sfc_adapter *sa = dev->data->dev_private;
1176 if ((sa->rss_channels == 1) ||
1177 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE))
1180 if (reta_size != EFX_RSS_TBL_SIZE)
1183 sfc_adapter_lock(sa);
1185 for (entry = 0; entry < reta_size; entry++) {
1186 int grp = entry / RTE_RETA_GROUP_SIZE;
1187 int grp_idx = entry % RTE_RETA_GROUP_SIZE;
1189 if ((reta_conf[grp].mask >> grp_idx) & 1)
1190 reta_conf[grp].reta[grp_idx] = sa->rss_tbl[entry];
1193 sfc_adapter_unlock(sa);
1199 sfc_dev_rss_reta_update(struct rte_eth_dev *dev,
1200 struct rte_eth_rss_reta_entry64 *reta_conf,
1203 struct sfc_adapter *sa = dev->data->dev_private;
1204 unsigned int *rss_tbl_new;
1209 if ((sa->rss_channels == 1) ||
1210 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) {
1211 sfc_err(sa, "RSS is not available");
1215 if (reta_size != EFX_RSS_TBL_SIZE) {
1216 sfc_err(sa, "RETA size is wrong (should be %u)",
1221 rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(sa->rss_tbl), 0);
1222 if (rss_tbl_new == NULL)
1225 sfc_adapter_lock(sa);
1227 rte_memcpy(rss_tbl_new, sa->rss_tbl, sizeof(sa->rss_tbl));
1229 for (entry = 0; entry < reta_size; entry++) {
1230 int grp_idx = entry % RTE_RETA_GROUP_SIZE;
1231 struct rte_eth_rss_reta_entry64 *grp;
1233 grp = &reta_conf[entry / RTE_RETA_GROUP_SIZE];
1235 if (grp->mask & (1ull << grp_idx)) {
1236 if (grp->reta[grp_idx] >= sa->rss_channels) {
1238 goto bad_reta_entry;
1240 rss_tbl_new[entry] = grp->reta[grp_idx];
1244 rc = efx_rx_scale_tbl_set(sa->nic, rss_tbl_new, EFX_RSS_TBL_SIZE);
1246 rte_memcpy(sa->rss_tbl, rss_tbl_new, sizeof(sa->rss_tbl));
1249 sfc_adapter_unlock(sa);
1251 rte_free(rss_tbl_new);
1253 SFC_ASSERT(rc >= 0);
1259 sfc_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type,
1260 enum rte_filter_op filter_op,
1263 struct sfc_adapter *sa = dev->data->dev_private;
1266 sfc_log_init(sa, "entry");
1268 switch (filter_type) {
1269 case RTE_ETH_FILTER_NONE:
1270 sfc_err(sa, "Global filters configuration not supported");
1272 case RTE_ETH_FILTER_MACVLAN:
1273 sfc_err(sa, "MACVLAN filters not supported");
1275 case RTE_ETH_FILTER_ETHERTYPE:
1276 sfc_err(sa, "EtherType filters not supported");
1278 case RTE_ETH_FILTER_FLEXIBLE:
1279 sfc_err(sa, "Flexible filters not supported");
1281 case RTE_ETH_FILTER_SYN:
1282 sfc_err(sa, "SYN filters not supported");
1284 case RTE_ETH_FILTER_NTUPLE:
1285 sfc_err(sa, "NTUPLE filters not supported");
1287 case RTE_ETH_FILTER_TUNNEL:
1288 sfc_err(sa, "Tunnel filters not supported");
1290 case RTE_ETH_FILTER_FDIR:
1291 sfc_err(sa, "Flow Director filters not supported");
1293 case RTE_ETH_FILTER_HASH:
1294 sfc_err(sa, "Hash filters not supported");
1296 case RTE_ETH_FILTER_GENERIC:
1297 if (filter_op != RTE_ETH_FILTER_GET) {
1300 *(const void **)arg = &sfc_flow_ops;
1305 sfc_err(sa, "Unknown filter type %u", filter_type);
1309 sfc_log_init(sa, "exit: %d", -rc);
1310 SFC_ASSERT(rc >= 0);
1314 static const struct eth_dev_ops sfc_eth_dev_ops = {
1315 .dev_configure = sfc_dev_configure,
1316 .dev_start = sfc_dev_start,
1317 .dev_stop = sfc_dev_stop,
1318 .dev_set_link_up = sfc_dev_set_link_up,
1319 .dev_set_link_down = sfc_dev_set_link_down,
1320 .dev_close = sfc_dev_close,
1321 .promiscuous_enable = sfc_dev_promisc_enable,
1322 .promiscuous_disable = sfc_dev_promisc_disable,
1323 .allmulticast_enable = sfc_dev_allmulti_enable,
1324 .allmulticast_disable = sfc_dev_allmulti_disable,
1325 .link_update = sfc_dev_link_update,
1326 .stats_get = sfc_stats_get,
1327 .stats_reset = sfc_stats_reset,
1328 .xstats_get = sfc_xstats_get,
1329 .xstats_reset = sfc_stats_reset,
1330 .xstats_get_names = sfc_xstats_get_names,
1331 .dev_infos_get = sfc_dev_infos_get,
1332 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get,
1333 .mtu_set = sfc_dev_set_mtu,
1334 .rx_queue_start = sfc_rx_queue_start,
1335 .rx_queue_stop = sfc_rx_queue_stop,
1336 .tx_queue_start = sfc_tx_queue_start,
1337 .tx_queue_stop = sfc_tx_queue_stop,
1338 .rx_queue_setup = sfc_rx_queue_setup,
1339 .rx_queue_release = sfc_rx_queue_release,
1340 .rx_queue_count = sfc_rx_queue_count,
1341 .rx_descriptor_done = sfc_rx_descriptor_done,
1342 .tx_queue_setup = sfc_tx_queue_setup,
1343 .tx_queue_release = sfc_tx_queue_release,
1344 .flow_ctrl_get = sfc_flow_ctrl_get,
1345 .flow_ctrl_set = sfc_flow_ctrl_set,
1346 .mac_addr_set = sfc_mac_addr_set,
1347 #if EFSYS_OPT_RX_SCALE
1348 .reta_update = sfc_dev_rss_reta_update,
1349 .reta_query = sfc_dev_rss_reta_query,
1350 .rss_hash_update = sfc_dev_rss_hash_update,
1351 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get,
1353 .filter_ctrl = sfc_dev_filter_ctrl,
1354 .set_mc_addr_list = sfc_set_mc_addr_list,
1355 .rxq_info_get = sfc_rx_queue_info_get,
1356 .txq_info_get = sfc_tx_queue_info_get,
1357 .fw_version_get = sfc_fw_version_get,
1361 sfc_eth_dev_init(struct rte_eth_dev *dev)
1363 struct sfc_adapter *sa = dev->data->dev_private;
1364 struct rte_pci_device *pci_dev = SFC_DEV_TO_PCI(dev);
1366 const efx_nic_cfg_t *encp;
1367 const struct ether_addr *from;
1369 /* Required for logging */
1372 /* Copy PCI device info to the dev->data */
1373 rte_eth_copy_pci_info(dev, pci_dev);
1375 rc = sfc_kvargs_parse(sa);
1377 goto fail_kvargs_parse;
1379 rc = sfc_kvargs_process(sa, SFC_KVARG_DEBUG_INIT,
1380 sfc_kvarg_bool_handler, &sa->debug_init);
1382 goto fail_kvarg_debug_init;
1384 sfc_log_init(sa, "entry");
1386 dev->data->mac_addrs = rte_zmalloc("sfc", ETHER_ADDR_LEN, 0);
1387 if (dev->data->mac_addrs == NULL) {
1389 goto fail_mac_addrs;
1392 sfc_adapter_lock_init(sa);
1393 sfc_adapter_lock(sa);
1395 sfc_log_init(sa, "attaching");
1396 rc = sfc_attach(sa);
1400 encp = efx_nic_cfg_get(sa->nic);
1403 * The arguments are really reverse order in comparison to
1404 * Linux kernel. Copy from NIC config to Ethernet device data.
1406 from = (const struct ether_addr *)(encp->enc_mac_addr);
1407 ether_addr_copy(from, &dev->data->mac_addrs[0]);
1409 dev->dev_ops = &sfc_eth_dev_ops;
1410 dev->rx_pkt_burst = &sfc_recv_pkts;
1411 dev->tx_pkt_burst = &sfc_xmit_pkts;
1413 sfc_adapter_unlock(sa);
1415 sfc_log_init(sa, "done");
1419 sfc_adapter_unlock(sa);
1420 sfc_adapter_lock_fini(sa);
1421 rte_free(dev->data->mac_addrs);
1422 dev->data->mac_addrs = NULL;
1425 fail_kvarg_debug_init:
1426 sfc_kvargs_cleanup(sa);
1429 sfc_log_init(sa, "failed %d", rc);
1435 sfc_eth_dev_uninit(struct rte_eth_dev *dev)
1437 struct sfc_adapter *sa = dev->data->dev_private;
1439 sfc_log_init(sa, "entry");
1441 sfc_adapter_lock(sa);
1445 rte_free(dev->data->mac_addrs);
1446 dev->data->mac_addrs = NULL;
1448 dev->dev_ops = NULL;
1449 dev->rx_pkt_burst = NULL;
1450 dev->tx_pkt_burst = NULL;
1452 sfc_kvargs_cleanup(sa);
1454 sfc_adapter_unlock(sa);
1455 sfc_adapter_lock_fini(sa);
1457 sfc_log_init(sa, "done");
1459 /* Required for logging, so cleanup last */
1464 static const struct rte_pci_id pci_id_sfc_efx_map[] = {
1465 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) },
1466 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE_VF) },
1467 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) },
1468 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT_VF) },
1469 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) },
1470 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) },
1471 { .vendor_id = 0 /* sentinel */ }
1474 static struct eth_driver sfc_efx_pmd = {
1476 .id_table = pci_id_sfc_efx_map,
1478 RTE_PCI_DRV_INTR_LSC |
1479 RTE_PCI_DRV_NEED_MAPPING,
1480 .probe = rte_eth_dev_pci_probe,
1481 .remove = rte_eth_dev_pci_remove,
1483 .eth_dev_init = sfc_eth_dev_init,
1484 .eth_dev_uninit = sfc_eth_dev_uninit,
1485 .dev_private_size = sizeof(struct sfc_adapter),
1488 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd.pci_drv);
1489 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map);
1490 RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio");
1491 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx,
1492 SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " "
1493 SFC_KVARG_STATS_UPDATE_PERIOD_MS "=<long> "
1494 SFC_KVARG_MCDI_LOGGING "=" SFC_KVARG_VALUES_BOOL " "
1495 SFC_KVARG_DEBUG_INIT "=" SFC_KVARG_VALUES_BOOL);