2 * Copyright (c) 2016 Solarflare Communications Inc.
5 * This software was jointly developed between OKTET Labs (under contract
6 * for Solarflare) and Solarflare Communications, Inc.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
11 * 1. Redistributions of source code must retain the above copyright notice,
12 * this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright notice,
14 * this list of conditions and the following disclaimer in the documentation
15 * and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
21 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
23 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
24 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
26 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
27 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 #include <rte_ethdev.h>
37 #include "sfc_debug.h"
39 #include "sfc_kvargs.h"
46 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
48 struct sfc_adapter *sa = dev->data->dev_private;
49 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
51 sfc_log_init(sa, "entry");
53 dev_info->pci_dev = RTE_DEV_TO_PCI(dev->device);
54 dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX;
56 /* Autonegotiation may be disabled */
57 dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
58 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_1000FDX)
59 dev_info->speed_capa |= ETH_LINK_SPEED_1G;
60 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_10000FDX)
61 dev_info->speed_capa |= ETH_LINK_SPEED_10G;
62 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_40000FDX)
63 dev_info->speed_capa |= ETH_LINK_SPEED_40G;
65 dev_info->max_rx_queues = sa->rxq_max;
66 dev_info->max_tx_queues = sa->txq_max;
68 /* By default packets are dropped if no descriptors are available */
69 dev_info->default_rxconf.rx_drop_en = 1;
71 dev_info->rx_offload_capa =
72 DEV_RX_OFFLOAD_IPV4_CKSUM |
73 DEV_RX_OFFLOAD_UDP_CKSUM |
74 DEV_RX_OFFLOAD_TCP_CKSUM;
76 dev_info->tx_offload_capa =
77 DEV_TX_OFFLOAD_IPV4_CKSUM |
78 DEV_TX_OFFLOAD_UDP_CKSUM |
79 DEV_TX_OFFLOAD_TCP_CKSUM;
81 dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP;
82 if (!encp->enc_hw_tx_insert_vlan_enabled)
83 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
85 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_VLAN_INSERT;
87 #if EFSYS_OPT_RX_SCALE
88 if (sa->rss_support != EFX_RX_SCALE_UNAVAILABLE) {
89 dev_info->reta_size = EFX_RSS_TBL_SIZE;
90 dev_info->hash_key_size = SFC_RSS_KEY_SIZE;
91 dev_info->flow_type_rss_offloads = SFC_RSS_OFFLOADS;
96 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO;
98 dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS;
99 dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS;
100 /* The RXQ hardware requires that the descriptor count is a power
101 * of 2, but rx_desc_lim cannot properly describe that constraint.
103 dev_info->rx_desc_lim.nb_align = EFX_RXQ_MINNDESCS;
105 dev_info->tx_desc_lim.nb_max = sa->txq_max_entries;
106 dev_info->tx_desc_lim.nb_min = EFX_TXQ_MINNDESCS;
108 * The TXQ hardware requires that the descriptor count is a power
109 * of 2, but tx_desc_lim cannot properly describe that constraint
111 dev_info->tx_desc_lim.nb_align = EFX_TXQ_MINNDESCS;
114 static const uint32_t *
115 sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev)
117 static const uint32_t ptypes[] = {
119 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
120 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
126 if (dev->rx_pkt_burst == sfc_recv_pkts)
133 sfc_dev_configure(struct rte_eth_dev *dev)
135 struct rte_eth_dev_data *dev_data = dev->data;
136 struct sfc_adapter *sa = dev_data->dev_private;
139 sfc_log_init(sa, "entry n_rxq=%u n_txq=%u",
140 dev_data->nb_rx_queues, dev_data->nb_tx_queues);
142 sfc_adapter_lock(sa);
144 case SFC_ADAPTER_CONFIGURED:
146 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED);
148 case SFC_ADAPTER_INITIALIZED:
149 rc = sfc_configure(sa);
152 sfc_err(sa, "unexpected adapter state %u to configure",
157 sfc_adapter_unlock(sa);
159 sfc_log_init(sa, "done %d", rc);
165 sfc_dev_start(struct rte_eth_dev *dev)
167 struct sfc_adapter *sa = dev->data->dev_private;
170 sfc_log_init(sa, "entry");
172 sfc_adapter_lock(sa);
174 sfc_adapter_unlock(sa);
176 sfc_log_init(sa, "done %d", rc);
182 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
184 struct sfc_adapter *sa = dev->data->dev_private;
185 struct rte_eth_link *dev_link = &dev->data->dev_link;
186 struct rte_eth_link old_link;
187 struct rte_eth_link current_link;
189 sfc_log_init(sa, "entry");
191 if (sa->state != SFC_ADAPTER_STARTED)
195 EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t));
196 *(int64_t *)&old_link = rte_atomic64_read((rte_atomic64_t *)dev_link);
198 if (wait_to_complete) {
199 efx_link_mode_t link_mode;
201 if (efx_port_poll(sa->nic, &link_mode) != 0)
202 link_mode = EFX_LINK_UNKNOWN;
203 sfc_port_link_mode_to_info(link_mode, ¤t_link);
205 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link,
206 *(uint64_t *)&old_link,
207 *(uint64_t *)¤t_link))
210 sfc_ev_mgmt_qpoll(sa);
211 *(int64_t *)¤t_link =
212 rte_atomic64_read((rte_atomic64_t *)dev_link);
215 if (old_link.link_status != current_link.link_status)
216 sfc_info(sa, "Link status is %s",
217 current_link.link_status ? "UP" : "DOWN");
219 return old_link.link_status == current_link.link_status ? 0 : -1;
223 sfc_dev_stop(struct rte_eth_dev *dev)
225 struct sfc_adapter *sa = dev->data->dev_private;
227 sfc_log_init(sa, "entry");
229 sfc_adapter_lock(sa);
231 sfc_adapter_unlock(sa);
233 sfc_log_init(sa, "done");
237 sfc_dev_set_link_up(struct rte_eth_dev *dev)
239 struct sfc_adapter *sa = dev->data->dev_private;
242 sfc_log_init(sa, "entry");
244 sfc_adapter_lock(sa);
246 sfc_adapter_unlock(sa);
253 sfc_dev_set_link_down(struct rte_eth_dev *dev)
255 struct sfc_adapter *sa = dev->data->dev_private;
257 sfc_log_init(sa, "entry");
259 sfc_adapter_lock(sa);
261 sfc_adapter_unlock(sa);
267 sfc_dev_close(struct rte_eth_dev *dev)
269 struct sfc_adapter *sa = dev->data->dev_private;
271 sfc_log_init(sa, "entry");
273 sfc_adapter_lock(sa);
275 case SFC_ADAPTER_STARTED:
277 SFC_ASSERT(sa->state == SFC_ADAPTER_CONFIGURED);
279 case SFC_ADAPTER_CONFIGURED:
281 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED);
283 case SFC_ADAPTER_INITIALIZED:
286 sfc_err(sa, "unexpected adapter state %u on close", sa->state);
289 sfc_adapter_unlock(sa);
291 sfc_log_init(sa, "done");
295 sfc_dev_filter_set(struct rte_eth_dev *dev, enum sfc_dev_filter_mode mode,
298 struct sfc_port *port;
300 struct sfc_adapter *sa = dev->data->dev_private;
301 boolean_t allmulti = (mode == SFC_DEV_FILTER_MODE_ALLMULTI);
302 const char *desc = (allmulti) ? "all-multi" : "promiscuous";
304 sfc_adapter_lock(sa);
307 toggle = (allmulti) ? (&port->allmulti) : (&port->promisc);
309 if (*toggle != enabled) {
312 if ((sa->state == SFC_ADAPTER_STARTED) &&
313 (sfc_set_rx_mode(sa) != 0)) {
314 *toggle = !(enabled);
315 sfc_warn(sa, "Failed to %s %s mode",
316 ((enabled) ? "enable" : "disable"), desc);
320 sfc_adapter_unlock(sa);
324 sfc_dev_promisc_enable(struct rte_eth_dev *dev)
326 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_TRUE);
330 sfc_dev_promisc_disable(struct rte_eth_dev *dev)
332 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_FALSE);
336 sfc_dev_allmulti_enable(struct rte_eth_dev *dev)
338 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_TRUE);
342 sfc_dev_allmulti_disable(struct rte_eth_dev *dev)
344 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_FALSE);
348 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
349 uint16_t nb_rx_desc, unsigned int socket_id,
350 const struct rte_eth_rxconf *rx_conf,
351 struct rte_mempool *mb_pool)
353 struct sfc_adapter *sa = dev->data->dev_private;
356 sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u",
357 rx_queue_id, nb_rx_desc, socket_id);
359 sfc_adapter_lock(sa);
361 rc = sfc_rx_qinit(sa, rx_queue_id, nb_rx_desc, socket_id,
366 dev->data->rx_queues[rx_queue_id] = sa->rxq_info[rx_queue_id].rxq;
368 sfc_adapter_unlock(sa);
373 sfc_adapter_unlock(sa);
379 sfc_rx_queue_release(void *queue)
381 struct sfc_rxq *rxq = queue;
382 struct sfc_adapter *sa;
383 unsigned int sw_index;
389 sfc_adapter_lock(sa);
391 sw_index = sfc_rxq_sw_index(rxq);
393 sfc_log_init(sa, "RxQ=%u", sw_index);
395 sa->eth_dev->data->rx_queues[sw_index] = NULL;
397 sfc_rx_qfini(sa, sw_index);
399 sfc_adapter_unlock(sa);
403 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
404 uint16_t nb_tx_desc, unsigned int socket_id,
405 const struct rte_eth_txconf *tx_conf)
407 struct sfc_adapter *sa = dev->data->dev_private;
410 sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u",
411 tx_queue_id, nb_tx_desc, socket_id);
413 sfc_adapter_lock(sa);
415 rc = sfc_tx_qinit(sa, tx_queue_id, nb_tx_desc, socket_id, tx_conf);
419 dev->data->tx_queues[tx_queue_id] = sa->txq_info[tx_queue_id].txq;
421 sfc_adapter_unlock(sa);
425 sfc_adapter_unlock(sa);
431 sfc_tx_queue_release(void *queue)
433 struct sfc_txq *txq = queue;
434 unsigned int sw_index;
435 struct sfc_adapter *sa;
440 sw_index = sfc_txq_sw_index(txq);
442 SFC_ASSERT(txq->evq != NULL);
445 sfc_log_init(sa, "TxQ = %u", sw_index);
447 sfc_adapter_lock(sa);
449 SFC_ASSERT(sw_index < sa->eth_dev->data->nb_tx_queues);
450 sa->eth_dev->data->tx_queues[sw_index] = NULL;
452 sfc_tx_qfini(sa, sw_index);
454 sfc_adapter_unlock(sa);
458 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
460 struct sfc_adapter *sa = dev->data->dev_private;
461 struct sfc_port *port = &sa->port;
464 rte_spinlock_lock(&port->mac_stats_lock);
466 if (sfc_port_update_mac_stats(sa) != 0)
469 mac_stats = port->mac_stats_buf;
471 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask,
472 EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) {
474 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] +
475 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] +
476 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS];
478 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] +
479 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] +
480 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS];
482 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] +
483 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] +
484 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES];
486 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] +
487 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] +
488 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES];
489 stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_OVERFLOW];
490 stats->ierrors = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS];
491 stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS];
493 stats->ipackets = mac_stats[EFX_MAC_RX_PKTS];
494 stats->opackets = mac_stats[EFX_MAC_TX_PKTS];
495 stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS];
496 stats->obytes = mac_stats[EFX_MAC_TX_OCTETS];
498 * Take into account stats which are whenever supported
499 * on EF10. If some stat is not supported by current
500 * firmware variant or HW revision, it is guaranteed
501 * to be zero in mac_stats.
504 mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] +
505 mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] +
506 mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] +
507 mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] +
508 mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] +
509 mac_stats[EFX_MAC_PM_TRUNC_QBB] +
510 mac_stats[EFX_MAC_PM_DISCARD_QBB] +
511 mac_stats[EFX_MAC_PM_DISCARD_MAPPING] +
512 mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] +
513 mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS];
515 mac_stats[EFX_MAC_RX_FCS_ERRORS] +
516 mac_stats[EFX_MAC_RX_ALIGN_ERRORS] +
517 mac_stats[EFX_MAC_RX_JABBER_PKTS];
518 /* no oerrors counters supported on EF10 */
522 rte_spinlock_unlock(&port->mac_stats_lock);
526 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
527 unsigned int xstats_count)
529 struct sfc_adapter *sa = dev->data->dev_private;
530 struct sfc_port *port = &sa->port;
536 rte_spinlock_lock(&port->mac_stats_lock);
538 rc = sfc_port_update_mac_stats(sa);
545 mac_stats = port->mac_stats_buf;
547 for (i = 0; i < EFX_MAC_NSTATS; ++i) {
548 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) {
549 if (xstats != NULL && nstats < (int)xstats_count) {
550 xstats[nstats].id = nstats;
551 xstats[nstats].value = mac_stats[i];
558 rte_spinlock_unlock(&port->mac_stats_lock);
564 sfc_xstats_get_names(struct rte_eth_dev *dev,
565 struct rte_eth_xstat_name *xstats_names,
566 unsigned int xstats_count)
568 struct sfc_adapter *sa = dev->data->dev_private;
569 struct sfc_port *port = &sa->port;
571 unsigned int nstats = 0;
573 for (i = 0; i < EFX_MAC_NSTATS; ++i) {
574 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) {
575 if (xstats_names != NULL && nstats < xstats_count)
576 strncpy(xstats_names[nstats].name,
577 efx_mac_stat_name(sa->nic, i),
578 sizeof(xstats_names[0].name));
587 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
589 struct sfc_adapter *sa = dev->data->dev_private;
590 unsigned int wanted_fc, link_fc;
592 memset(fc_conf, 0, sizeof(*fc_conf));
594 sfc_adapter_lock(sa);
596 if (sa->state == SFC_ADAPTER_STARTED)
597 efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc);
599 link_fc = sa->port.flow_ctrl;
603 fc_conf->mode = RTE_FC_NONE;
605 case EFX_FCNTL_RESPOND:
606 fc_conf->mode = RTE_FC_RX_PAUSE;
608 case EFX_FCNTL_GENERATE:
609 fc_conf->mode = RTE_FC_TX_PAUSE;
611 case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE):
612 fc_conf->mode = RTE_FC_FULL;
615 sfc_err(sa, "%s: unexpected flow control value %#x",
619 fc_conf->autoneg = sa->port.flow_ctrl_autoneg;
621 sfc_adapter_unlock(sa);
627 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
629 struct sfc_adapter *sa = dev->data->dev_private;
630 struct sfc_port *port = &sa->port;
634 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 ||
635 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 ||
636 fc_conf->mac_ctrl_frame_fwd != 0) {
637 sfc_err(sa, "unsupported flow control settings specified");
642 switch (fc_conf->mode) {
646 case RTE_FC_RX_PAUSE:
647 fcntl = EFX_FCNTL_RESPOND;
649 case RTE_FC_TX_PAUSE:
650 fcntl = EFX_FCNTL_GENERATE;
653 fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
660 sfc_adapter_lock(sa);
662 if (sa->state == SFC_ADAPTER_STARTED) {
663 rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg);
665 goto fail_mac_fcntl_set;
668 port->flow_ctrl = fcntl;
669 port->flow_ctrl_autoneg = fc_conf->autoneg;
671 sfc_adapter_unlock(sa);
676 sfc_adapter_unlock(sa);
683 sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
685 struct sfc_adapter *sa = dev->data->dev_private;
686 size_t pdu = EFX_MAC_PDU(mtu);
690 sfc_log_init(sa, "mtu=%u", mtu);
693 if (pdu < EFX_MAC_PDU_MIN) {
694 sfc_err(sa, "too small MTU %u (PDU size %u less than min %u)",
695 (unsigned int)mtu, (unsigned int)pdu,
699 if (pdu > EFX_MAC_PDU_MAX) {
700 sfc_err(sa, "too big MTU %u (PDU size %u greater than max %u)",
701 (unsigned int)mtu, (unsigned int)pdu,
706 sfc_adapter_lock(sa);
708 if (pdu != sa->port.pdu) {
709 if (sa->state == SFC_ADAPTER_STARTED) {
712 old_pdu = sa->port.pdu;
723 * The driver does not use it, but other PMDs update jumbo_frame
724 * flag and max_rx_pkt_len when MTU is set.
726 dev->data->dev_conf.rxmode.jumbo_frame = (mtu > ETHER_MAX_LEN);
727 dev->data->dev_conf.rxmode.max_rx_pkt_len = sa->port.pdu;
729 sfc_adapter_unlock(sa);
731 sfc_log_init(sa, "done");
735 sa->port.pdu = old_pdu;
736 if (sfc_start(sa) != 0)
737 sfc_err(sa, "cannot start with neither new (%u) nor old (%u) "
738 "PDU max size - port is stopped",
739 (unsigned int)pdu, (unsigned int)old_pdu);
740 sfc_adapter_unlock(sa);
743 sfc_log_init(sa, "failed %d", rc);
748 sfc_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
750 struct sfc_adapter *sa = dev->data->dev_private;
751 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
754 sfc_adapter_lock(sa);
756 if (sa->state != SFC_ADAPTER_STARTED) {
757 sfc_info(sa, "the port is not started");
758 sfc_info(sa, "the new MAC address will be set on port start");
763 if (encp->enc_allow_set_mac_with_installed_filters) {
764 rc = efx_mac_addr_set(sa->nic, mac_addr->addr_bytes);
766 sfc_err(sa, "cannot set MAC address (rc = %u)", rc);
771 * Changing the MAC address by means of MCDI request
772 * has no effect on received traffic, therefore
773 * we also need to update unicast filters
775 rc = sfc_set_rx_mode(sa);
777 sfc_err(sa, "cannot set filter (rc = %u)", rc);
779 sfc_warn(sa, "cannot set MAC address with filters installed");
780 sfc_warn(sa, "adapter will be restarted to pick the new MAC");
781 sfc_warn(sa, "(some traffic may be dropped)");
784 * Since setting MAC address with filters installed is not
785 * allowed on the adapter, one needs to simply restart adapter
786 * so that the new MAC address will be taken from an outer
787 * storage and set flawlessly by means of sfc_start() call
792 sfc_err(sa, "cannot restart adapter (rc = %u)", rc);
796 sfc_adapter_unlock(sa);
801 sfc_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set,
804 struct sfc_adapter *sa = dev->data->dev_private;
810 if (nb_mc_addr > EFX_MAC_MULTICAST_LIST_MAX) {
811 sfc_err(sa, "too many multicast addresses: %u > %u",
812 nb_mc_addr, EFX_MAC_MULTICAST_LIST_MAX);
816 mc_addrs_p = rte_calloc("mc-addrs", nb_mc_addr, EFX_MAC_ADDR_LEN, 0);
817 if (mc_addrs_p == NULL)
820 mc_addrs = mc_addrs_p;
822 for (i = 0; i < nb_mc_addr; ++i) {
823 (void)rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes,
825 mc_addrs += EFX_MAC_ADDR_LEN;
828 rc = efx_mac_multicast_list_set(sa->nic, mc_addrs_p, nb_mc_addr);
830 rte_free(mc_addrs_p);
833 sfc_err(sa, "cannot set multicast address list (rc = %u)", rc);
840 sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id,
841 struct rte_eth_rxq_info *qinfo)
843 struct sfc_adapter *sa = dev->data->dev_private;
844 struct sfc_rxq_info *rxq_info;
847 sfc_adapter_lock(sa);
849 SFC_ASSERT(rx_queue_id < sa->rxq_count);
851 rxq_info = &sa->rxq_info[rx_queue_id];
853 SFC_ASSERT(rxq != NULL);
855 qinfo->mp = rxq->refill_mb_pool;
856 qinfo->conf.rx_free_thresh = rxq->refill_threshold;
857 qinfo->conf.rx_drop_en = 1;
858 qinfo->conf.rx_deferred_start = rxq_info->deferred_start;
859 qinfo->scattered_rx = (rxq_info->type == EFX_RXQ_TYPE_SCATTER);
860 qinfo->nb_desc = rxq_info->entries;
862 sfc_adapter_unlock(sa);
866 sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id,
867 struct rte_eth_txq_info *qinfo)
869 struct sfc_adapter *sa = dev->data->dev_private;
870 struct sfc_txq_info *txq_info;
872 sfc_adapter_lock(sa);
874 SFC_ASSERT(tx_queue_id < sa->txq_count);
876 txq_info = &sa->txq_info[tx_queue_id];
877 SFC_ASSERT(txq_info->txq != NULL);
879 memset(qinfo, 0, sizeof(*qinfo));
881 qinfo->conf.txq_flags = txq_info->txq->flags;
882 qinfo->conf.tx_free_thresh = txq_info->txq->free_thresh;
883 qinfo->conf.tx_deferred_start = txq_info->deferred_start;
884 qinfo->nb_desc = txq_info->entries;
886 sfc_adapter_unlock(sa);
890 sfc_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
892 struct sfc_adapter *sa = dev->data->dev_private;
894 sfc_log_init(sa, "RxQ=%u", rx_queue_id);
896 return sfc_rx_qdesc_npending(sa, rx_queue_id);
900 sfc_rx_descriptor_done(void *queue, uint16_t offset)
902 struct sfc_rxq *rxq = queue;
904 return sfc_rx_qdesc_done(rxq, offset);
908 sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
910 struct sfc_adapter *sa = dev->data->dev_private;
913 sfc_log_init(sa, "RxQ=%u", rx_queue_id);
915 sfc_adapter_lock(sa);
918 if (sa->state != SFC_ADAPTER_STARTED)
919 goto fail_not_started;
921 rc = sfc_rx_qstart(sa, rx_queue_id);
925 sa->rxq_info[rx_queue_id].deferred_started = B_TRUE;
927 sfc_adapter_unlock(sa);
933 sfc_adapter_unlock(sa);
939 sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
941 struct sfc_adapter *sa = dev->data->dev_private;
943 sfc_log_init(sa, "RxQ=%u", rx_queue_id);
945 sfc_adapter_lock(sa);
946 sfc_rx_qstop(sa, rx_queue_id);
948 sa->rxq_info[rx_queue_id].deferred_started = B_FALSE;
950 sfc_adapter_unlock(sa);
956 sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
958 struct sfc_adapter *sa = dev->data->dev_private;
961 sfc_log_init(sa, "TxQ = %u", tx_queue_id);
963 sfc_adapter_lock(sa);
966 if (sa->state != SFC_ADAPTER_STARTED)
967 goto fail_not_started;
969 rc = sfc_tx_qstart(sa, tx_queue_id);
973 sa->txq_info[tx_queue_id].deferred_started = B_TRUE;
975 sfc_adapter_unlock(sa);
981 sfc_adapter_unlock(sa);
987 sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
989 struct sfc_adapter *sa = dev->data->dev_private;
991 sfc_log_init(sa, "TxQ = %u", tx_queue_id);
993 sfc_adapter_lock(sa);
995 sfc_tx_qstop(sa, tx_queue_id);
997 sa->txq_info[tx_queue_id].deferred_started = B_FALSE;
999 sfc_adapter_unlock(sa);
1003 #if EFSYS_OPT_RX_SCALE
1005 sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1006 struct rte_eth_rss_conf *rss_conf)
1008 struct sfc_adapter *sa = dev->data->dev_private;
1010 if ((sa->rss_channels == 1) ||
1011 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE))
1014 sfc_adapter_lock(sa);
1017 * Mapping of hash configuration between RTE and EFX is not one-to-one,
1018 * hence, conversion is done here to derive a correct set of ETH_RSS
1019 * flags which corresponds to the active EFX configuration stored
1020 * locally in 'sfc_adapter' and kept up-to-date
1022 rss_conf->rss_hf = sfc_efx_to_rte_hash_type(sa->rss_hash_types);
1023 rss_conf->rss_key_len = SFC_RSS_KEY_SIZE;
1024 if (rss_conf->rss_key != NULL)
1025 rte_memcpy(rss_conf->rss_key, sa->rss_key, SFC_RSS_KEY_SIZE);
1027 sfc_adapter_unlock(sa);
1033 sfc_dev_rss_hash_update(struct rte_eth_dev *dev,
1034 struct rte_eth_rss_conf *rss_conf)
1036 struct sfc_adapter *sa = dev->data->dev_private;
1037 unsigned int efx_hash_types;
1040 if ((sa->rss_channels == 1) ||
1041 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) {
1042 sfc_err(sa, "RSS is not available");
1046 if ((rss_conf->rss_key != NULL) &&
1047 (rss_conf->rss_key_len != sizeof(sa->rss_key))) {
1048 sfc_err(sa, "RSS key size is wrong (should be %lu)",
1049 sizeof(sa->rss_key));
1053 if ((rss_conf->rss_hf & ~SFC_RSS_OFFLOADS) != 0) {
1054 sfc_err(sa, "unsupported hash functions requested");
1058 sfc_adapter_lock(sa);
1060 efx_hash_types = sfc_rte_to_efx_hash_type(rss_conf->rss_hf);
1062 rc = efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ,
1063 efx_hash_types, B_TRUE);
1065 goto fail_scale_mode_set;
1067 if (rss_conf->rss_key != NULL) {
1068 if (sa->state == SFC_ADAPTER_STARTED) {
1069 rc = efx_rx_scale_key_set(sa->nic, rss_conf->rss_key,
1070 sizeof(sa->rss_key));
1072 goto fail_scale_key_set;
1075 rte_memcpy(sa->rss_key, rss_conf->rss_key, sizeof(sa->rss_key));
1078 sa->rss_hash_types = efx_hash_types;
1080 sfc_adapter_unlock(sa);
1085 if (efx_rx_scale_mode_set(sa->nic, EFX_RX_HASHALG_TOEPLITZ,
1086 sa->rss_hash_types, B_TRUE) != 0)
1087 sfc_err(sa, "failed to restore RSS mode");
1089 fail_scale_mode_set:
1090 sfc_adapter_unlock(sa);
1095 sfc_dev_rss_reta_query(struct rte_eth_dev *dev,
1096 struct rte_eth_rss_reta_entry64 *reta_conf,
1099 struct sfc_adapter *sa = dev->data->dev_private;
1102 if ((sa->rss_channels == 1) ||
1103 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE))
1106 if (reta_size != EFX_RSS_TBL_SIZE)
1109 sfc_adapter_lock(sa);
1111 for (entry = 0; entry < reta_size; entry++) {
1112 int grp = entry / RTE_RETA_GROUP_SIZE;
1113 int grp_idx = entry % RTE_RETA_GROUP_SIZE;
1115 if ((reta_conf[grp].mask >> grp_idx) & 1)
1116 reta_conf[grp].reta[grp_idx] = sa->rss_tbl[entry];
1119 sfc_adapter_unlock(sa);
1125 sfc_dev_rss_reta_update(struct rte_eth_dev *dev,
1126 struct rte_eth_rss_reta_entry64 *reta_conf,
1129 struct sfc_adapter *sa = dev->data->dev_private;
1130 unsigned int *rss_tbl_new;
1135 if ((sa->rss_channels == 1) ||
1136 (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE)) {
1137 sfc_err(sa, "RSS is not available");
1141 if (reta_size != EFX_RSS_TBL_SIZE) {
1142 sfc_err(sa, "RETA size is wrong (should be %u)",
1147 rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(sa->rss_tbl), 0);
1148 if (rss_tbl_new == NULL)
1151 sfc_adapter_lock(sa);
1153 rte_memcpy(rss_tbl_new, sa->rss_tbl, sizeof(sa->rss_tbl));
1155 for (entry = 0; entry < reta_size; entry++) {
1156 int grp_idx = entry % RTE_RETA_GROUP_SIZE;
1157 struct rte_eth_rss_reta_entry64 *grp;
1159 grp = &reta_conf[entry / RTE_RETA_GROUP_SIZE];
1161 if (grp->mask & (1ull << grp_idx)) {
1162 if (grp->reta[grp_idx] >= sa->rss_channels) {
1164 goto bad_reta_entry;
1166 rss_tbl_new[entry] = grp->reta[grp_idx];
1170 rc = efx_rx_scale_tbl_set(sa->nic, rss_tbl_new, EFX_RSS_TBL_SIZE);
1172 rte_memcpy(sa->rss_tbl, rss_tbl_new, sizeof(sa->rss_tbl));
1175 sfc_adapter_unlock(sa);
1177 rte_free(rss_tbl_new);
1179 SFC_ASSERT(rc >= 0);
1184 static const struct eth_dev_ops sfc_eth_dev_ops = {
1185 .dev_configure = sfc_dev_configure,
1186 .dev_start = sfc_dev_start,
1187 .dev_stop = sfc_dev_stop,
1188 .dev_set_link_up = sfc_dev_set_link_up,
1189 .dev_set_link_down = sfc_dev_set_link_down,
1190 .dev_close = sfc_dev_close,
1191 .promiscuous_enable = sfc_dev_promisc_enable,
1192 .promiscuous_disable = sfc_dev_promisc_disable,
1193 .allmulticast_enable = sfc_dev_allmulti_enable,
1194 .allmulticast_disable = sfc_dev_allmulti_disable,
1195 .link_update = sfc_dev_link_update,
1196 .stats_get = sfc_stats_get,
1197 .xstats_get = sfc_xstats_get,
1198 .xstats_get_names = sfc_xstats_get_names,
1199 .dev_infos_get = sfc_dev_infos_get,
1200 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get,
1201 .mtu_set = sfc_dev_set_mtu,
1202 .rx_queue_start = sfc_rx_queue_start,
1203 .rx_queue_stop = sfc_rx_queue_stop,
1204 .tx_queue_start = sfc_tx_queue_start,
1205 .tx_queue_stop = sfc_tx_queue_stop,
1206 .rx_queue_setup = sfc_rx_queue_setup,
1207 .rx_queue_release = sfc_rx_queue_release,
1208 .rx_queue_count = sfc_rx_queue_count,
1209 .rx_descriptor_done = sfc_rx_descriptor_done,
1210 .tx_queue_setup = sfc_tx_queue_setup,
1211 .tx_queue_release = sfc_tx_queue_release,
1212 .flow_ctrl_get = sfc_flow_ctrl_get,
1213 .flow_ctrl_set = sfc_flow_ctrl_set,
1214 .mac_addr_set = sfc_mac_addr_set,
1215 #if EFSYS_OPT_RX_SCALE
1216 .reta_update = sfc_dev_rss_reta_update,
1217 .reta_query = sfc_dev_rss_reta_query,
1218 .rss_hash_update = sfc_dev_rss_hash_update,
1219 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get,
1221 .set_mc_addr_list = sfc_set_mc_addr_list,
1222 .rxq_info_get = sfc_rx_queue_info_get,
1223 .txq_info_get = sfc_tx_queue_info_get,
1227 sfc_eth_dev_init(struct rte_eth_dev *dev)
1229 struct sfc_adapter *sa = dev->data->dev_private;
1230 struct rte_pci_device *pci_dev = SFC_DEV_TO_PCI(dev);
1232 const efx_nic_cfg_t *encp;
1233 const struct ether_addr *from;
1235 /* Required for logging */
1238 /* Copy PCI device info to the dev->data */
1239 rte_eth_copy_pci_info(dev, pci_dev);
1241 rc = sfc_kvargs_parse(sa);
1243 goto fail_kvargs_parse;
1245 rc = sfc_kvargs_process(sa, SFC_KVARG_DEBUG_INIT,
1246 sfc_kvarg_bool_handler, &sa->debug_init);
1248 goto fail_kvarg_debug_init;
1250 sfc_log_init(sa, "entry");
1252 dev->data->mac_addrs = rte_zmalloc("sfc", ETHER_ADDR_LEN, 0);
1253 if (dev->data->mac_addrs == NULL) {
1255 goto fail_mac_addrs;
1258 sfc_adapter_lock_init(sa);
1259 sfc_adapter_lock(sa);
1261 sfc_log_init(sa, "attaching");
1262 rc = sfc_attach(sa);
1266 encp = efx_nic_cfg_get(sa->nic);
1269 * The arguments are really reverse order in comparison to
1270 * Linux kernel. Copy from NIC config to Ethernet device data.
1272 from = (const struct ether_addr *)(encp->enc_mac_addr);
1273 ether_addr_copy(from, &dev->data->mac_addrs[0]);
1275 dev->dev_ops = &sfc_eth_dev_ops;
1276 dev->rx_pkt_burst = &sfc_recv_pkts;
1277 dev->tx_pkt_burst = &sfc_xmit_pkts;
1279 sfc_adapter_unlock(sa);
1281 sfc_log_init(sa, "done");
1285 sfc_adapter_unlock(sa);
1286 sfc_adapter_lock_fini(sa);
1287 rte_free(dev->data->mac_addrs);
1288 dev->data->mac_addrs = NULL;
1291 fail_kvarg_debug_init:
1292 sfc_kvargs_cleanup(sa);
1295 sfc_log_init(sa, "failed %d", rc);
1301 sfc_eth_dev_uninit(struct rte_eth_dev *dev)
1303 struct sfc_adapter *sa = dev->data->dev_private;
1305 sfc_log_init(sa, "entry");
1307 sfc_adapter_lock(sa);
1311 rte_free(dev->data->mac_addrs);
1312 dev->data->mac_addrs = NULL;
1314 dev->dev_ops = NULL;
1315 dev->rx_pkt_burst = NULL;
1316 dev->tx_pkt_burst = NULL;
1318 sfc_kvargs_cleanup(sa);
1320 sfc_adapter_unlock(sa);
1321 sfc_adapter_lock_fini(sa);
1323 sfc_log_init(sa, "done");
1325 /* Required for logging, so cleanup last */
1330 static const struct rte_pci_id pci_id_sfc_efx_map[] = {
1331 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) },
1332 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) },
1333 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) },
1334 { .vendor_id = 0 /* sentinel */ }
1337 static struct eth_driver sfc_efx_pmd = {
1339 .id_table = pci_id_sfc_efx_map,
1341 RTE_PCI_DRV_INTR_LSC |
1342 RTE_PCI_DRV_NEED_MAPPING,
1343 .probe = rte_eth_dev_pci_probe,
1344 .remove = rte_eth_dev_pci_remove,
1346 .eth_dev_init = sfc_eth_dev_init,
1347 .eth_dev_uninit = sfc_eth_dev_uninit,
1348 .dev_private_size = sizeof(struct sfc_adapter),
1351 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd.pci_drv);
1352 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map);
1353 RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio");
1354 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx,
1355 SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " "
1356 SFC_KVARG_MCDI_LOGGING "=" SFC_KVARG_VALUES_BOOL " "
1357 SFC_KVARG_DEBUG_INIT "=" SFC_KVARG_VALUES_BOOL);