4 * Copyright (c) 2016-2017 Solarflare Communications Inc.
7 * This software was jointly developed between OKTET Labs (under contract
8 * for Solarflare) and Solarflare Communications, Inc.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 #include <rte_ethdev.h>
34 #include <rte_ethdev_pci.h>
36 #include <rte_bus_pci.h>
37 #include <rte_errno.h>
42 #include "sfc_debug.h"
44 #include "sfc_kvargs.h"
50 #include "sfc_dp_rx.h"
52 static struct sfc_dp_list sfc_dp_head =
53 TAILQ_HEAD_INITIALIZER(sfc_dp_head);
56 sfc_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
58 struct sfc_adapter *sa = dev->data->dev_private;
59 efx_nic_fw_info_t enfi;
64 * Return value of the callback is likely supposed to be
65 * equal to or greater than 0, nevertheless, if an error
66 * occurs, it will be desirable to pass it to the caller
68 if ((fw_version == NULL) || (fw_size == 0))
71 rc = efx_nic_get_fw_version(sa->nic, &enfi);
75 ret = snprintf(fw_version, fw_size,
76 "%" PRIu16 ".%" PRIu16 ".%" PRIu16 ".%" PRIu16,
77 enfi.enfi_mc_fw_version[0], enfi.enfi_mc_fw_version[1],
78 enfi.enfi_mc_fw_version[2], enfi.enfi_mc_fw_version[3]);
82 if (enfi.enfi_dpcpu_fw_ids_valid) {
83 size_t dpcpu_fw_ids_offset = MIN(fw_size - 1, (size_t)ret);
86 ret_extra = snprintf(fw_version + dpcpu_fw_ids_offset,
87 fw_size - dpcpu_fw_ids_offset,
88 " rx%" PRIx16 " tx%" PRIx16,
89 enfi.enfi_rx_dpcpu_fw_id,
90 enfi.enfi_tx_dpcpu_fw_id);
97 if (fw_size < (size_t)(++ret))
104 sfc_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
106 struct sfc_adapter *sa = dev->data->dev_private;
107 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
109 sfc_log_init(sa, "entry");
111 dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
112 dev_info->max_rx_pktlen = EFX_MAC_PDU_MAX;
114 /* Autonegotiation may be disabled */
115 dev_info->speed_capa = ETH_LINK_SPEED_FIXED;
116 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_1000FDX)
117 dev_info->speed_capa |= ETH_LINK_SPEED_1G;
118 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_10000FDX)
119 dev_info->speed_capa |= ETH_LINK_SPEED_10G;
120 if (sa->port.phy_adv_cap_mask & EFX_PHY_CAP_40000FDX)
121 dev_info->speed_capa |= ETH_LINK_SPEED_40G;
123 dev_info->max_rx_queues = sa->rxq_max;
124 dev_info->max_tx_queues = sa->txq_max;
126 /* By default packets are dropped if no descriptors are available */
127 dev_info->default_rxconf.rx_drop_en = 1;
129 dev_info->rx_offload_capa =
130 DEV_RX_OFFLOAD_IPV4_CKSUM |
131 DEV_RX_OFFLOAD_UDP_CKSUM |
132 DEV_RX_OFFLOAD_TCP_CKSUM;
134 dev_info->tx_offload_capa =
135 DEV_TX_OFFLOAD_IPV4_CKSUM |
136 DEV_TX_OFFLOAD_UDP_CKSUM |
137 DEV_TX_OFFLOAD_TCP_CKSUM;
139 dev_info->default_txconf.txq_flags = ETH_TXQ_FLAGS_NOXSUMSCTP;
140 if ((~sa->dp_tx->features & SFC_DP_TX_FEAT_VLAN_INSERT) ||
141 !encp->enc_hw_tx_insert_vlan_enabled)
142 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
144 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_VLAN_INSERT;
146 if (~sa->dp_tx->features & SFC_DP_TX_FEAT_MULTI_SEG)
147 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
149 if (~sa->dp_tx->features & SFC_DP_TX_FEAT_MULTI_POOL)
150 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOMULTMEMP;
152 if (~sa->dp_tx->features & SFC_DP_TX_FEAT_REFCNT)
153 dev_info->default_txconf.txq_flags |= ETH_TXQ_FLAGS_NOREFCOUNT;
155 #if EFSYS_OPT_RX_SCALE
156 if (sa->rss_support != EFX_RX_SCALE_UNAVAILABLE) {
157 dev_info->reta_size = EFX_RSS_TBL_SIZE;
158 dev_info->hash_key_size = EFX_RSS_KEY_SIZE;
159 dev_info->flow_type_rss_offloads = SFC_RSS_OFFLOADS;
164 dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO;
166 dev_info->rx_desc_lim.nb_max = EFX_RXQ_MAXNDESCS;
167 dev_info->rx_desc_lim.nb_min = EFX_RXQ_MINNDESCS;
168 /* The RXQ hardware requires that the descriptor count is a power
169 * of 2, but rx_desc_lim cannot properly describe that constraint.
171 dev_info->rx_desc_lim.nb_align = EFX_RXQ_MINNDESCS;
173 dev_info->tx_desc_lim.nb_max = sa->txq_max_entries;
174 dev_info->tx_desc_lim.nb_min = EFX_TXQ_MINNDESCS;
176 * The TXQ hardware requires that the descriptor count is a power
177 * of 2, but tx_desc_lim cannot properly describe that constraint
179 dev_info->tx_desc_lim.nb_align = EFX_TXQ_MINNDESCS;
182 static const uint32_t *
183 sfc_dev_supported_ptypes_get(struct rte_eth_dev *dev)
185 struct sfc_adapter *sa = dev->data->dev_private;
187 return sa->dp_rx->supported_ptypes_get();
191 sfc_dev_configure(struct rte_eth_dev *dev)
193 struct rte_eth_dev_data *dev_data = dev->data;
194 struct sfc_adapter *sa = dev_data->dev_private;
197 sfc_log_init(sa, "entry n_rxq=%u n_txq=%u",
198 dev_data->nb_rx_queues, dev_data->nb_tx_queues);
200 sfc_adapter_lock(sa);
202 case SFC_ADAPTER_CONFIGURED:
204 case SFC_ADAPTER_INITIALIZED:
205 rc = sfc_configure(sa);
208 sfc_err(sa, "unexpected adapter state %u to configure",
213 sfc_adapter_unlock(sa);
215 sfc_log_init(sa, "done %d", rc);
221 sfc_dev_start(struct rte_eth_dev *dev)
223 struct sfc_adapter *sa = dev->data->dev_private;
226 sfc_log_init(sa, "entry");
228 sfc_adapter_lock(sa);
230 sfc_adapter_unlock(sa);
232 sfc_log_init(sa, "done %d", rc);
238 sfc_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
240 struct sfc_adapter *sa = dev->data->dev_private;
241 struct rte_eth_link *dev_link = &dev->data->dev_link;
242 struct rte_eth_link old_link;
243 struct rte_eth_link current_link;
245 sfc_log_init(sa, "entry");
248 EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t));
249 *(int64_t *)&old_link = rte_atomic64_read((rte_atomic64_t *)dev_link);
251 if (sa->state != SFC_ADAPTER_STARTED) {
252 sfc_port_link_mode_to_info(EFX_LINK_UNKNOWN, ¤t_link);
253 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link,
254 *(uint64_t *)&old_link,
255 *(uint64_t *)¤t_link))
257 } else if (wait_to_complete) {
258 efx_link_mode_t link_mode;
260 if (efx_port_poll(sa->nic, &link_mode) != 0)
261 link_mode = EFX_LINK_UNKNOWN;
262 sfc_port_link_mode_to_info(link_mode, ¤t_link);
264 if (!rte_atomic64_cmpset((volatile uint64_t *)dev_link,
265 *(uint64_t *)&old_link,
266 *(uint64_t *)¤t_link))
269 sfc_ev_mgmt_qpoll(sa);
270 *(int64_t *)¤t_link =
271 rte_atomic64_read((rte_atomic64_t *)dev_link);
274 if (old_link.link_status != current_link.link_status)
275 sfc_info(sa, "Link status is %s",
276 current_link.link_status ? "UP" : "DOWN");
278 return old_link.link_status == current_link.link_status ? 0 : -1;
282 sfc_dev_stop(struct rte_eth_dev *dev)
284 struct sfc_adapter *sa = dev->data->dev_private;
286 sfc_log_init(sa, "entry");
288 sfc_adapter_lock(sa);
290 sfc_adapter_unlock(sa);
292 sfc_log_init(sa, "done");
296 sfc_dev_set_link_up(struct rte_eth_dev *dev)
298 struct sfc_adapter *sa = dev->data->dev_private;
301 sfc_log_init(sa, "entry");
303 sfc_adapter_lock(sa);
305 sfc_adapter_unlock(sa);
312 sfc_dev_set_link_down(struct rte_eth_dev *dev)
314 struct sfc_adapter *sa = dev->data->dev_private;
316 sfc_log_init(sa, "entry");
318 sfc_adapter_lock(sa);
320 sfc_adapter_unlock(sa);
326 sfc_dev_close(struct rte_eth_dev *dev)
328 struct sfc_adapter *sa = dev->data->dev_private;
330 sfc_log_init(sa, "entry");
332 sfc_adapter_lock(sa);
334 case SFC_ADAPTER_STARTED:
336 SFC_ASSERT(sa->state == SFC_ADAPTER_CONFIGURED);
338 case SFC_ADAPTER_CONFIGURED:
340 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED);
342 case SFC_ADAPTER_INITIALIZED:
345 sfc_err(sa, "unexpected adapter state %u on close", sa->state);
348 sfc_adapter_unlock(sa);
350 sfc_log_init(sa, "done");
354 sfc_dev_filter_set(struct rte_eth_dev *dev, enum sfc_dev_filter_mode mode,
357 struct sfc_port *port;
359 struct sfc_adapter *sa = dev->data->dev_private;
360 boolean_t allmulti = (mode == SFC_DEV_FILTER_MODE_ALLMULTI);
361 const char *desc = (allmulti) ? "all-multi" : "promiscuous";
363 sfc_adapter_lock(sa);
366 toggle = (allmulti) ? (&port->allmulti) : (&port->promisc);
368 if (*toggle != enabled) {
371 if (port->isolated) {
372 sfc_warn(sa, "isolated mode is active on the port");
373 sfc_warn(sa, "the change is to be applied on the next "
374 "start provided that isolated mode is "
375 "disabled prior the next start");
376 } else if ((sa->state == SFC_ADAPTER_STARTED) &&
377 (sfc_set_rx_mode(sa) != 0)) {
378 *toggle = !(enabled);
379 sfc_warn(sa, "Failed to %s %s mode",
380 ((enabled) ? "enable" : "disable"), desc);
384 sfc_adapter_unlock(sa);
388 sfc_dev_promisc_enable(struct rte_eth_dev *dev)
390 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_TRUE);
394 sfc_dev_promisc_disable(struct rte_eth_dev *dev)
396 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_PROMISC, B_FALSE);
400 sfc_dev_allmulti_enable(struct rte_eth_dev *dev)
402 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_TRUE);
406 sfc_dev_allmulti_disable(struct rte_eth_dev *dev)
408 sfc_dev_filter_set(dev, SFC_DEV_FILTER_MODE_ALLMULTI, B_FALSE);
412 sfc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
413 uint16_t nb_rx_desc, unsigned int socket_id,
414 const struct rte_eth_rxconf *rx_conf,
415 struct rte_mempool *mb_pool)
417 struct sfc_adapter *sa = dev->data->dev_private;
420 sfc_log_init(sa, "RxQ=%u nb_rx_desc=%u socket_id=%u",
421 rx_queue_id, nb_rx_desc, socket_id);
423 sfc_adapter_lock(sa);
425 rc = sfc_rx_qinit(sa, rx_queue_id, nb_rx_desc, socket_id,
430 dev->data->rx_queues[rx_queue_id] = sa->rxq_info[rx_queue_id].rxq->dp;
432 sfc_adapter_unlock(sa);
437 sfc_adapter_unlock(sa);
443 sfc_rx_queue_release(void *queue)
445 struct sfc_dp_rxq *dp_rxq = queue;
447 struct sfc_adapter *sa;
448 unsigned int sw_index;
453 rxq = sfc_rxq_by_dp_rxq(dp_rxq);
455 sfc_adapter_lock(sa);
457 sw_index = sfc_rxq_sw_index(rxq);
459 sfc_log_init(sa, "RxQ=%u", sw_index);
461 sa->eth_dev->data->rx_queues[sw_index] = NULL;
463 sfc_rx_qfini(sa, sw_index);
465 sfc_adapter_unlock(sa);
469 sfc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
470 uint16_t nb_tx_desc, unsigned int socket_id,
471 const struct rte_eth_txconf *tx_conf)
473 struct sfc_adapter *sa = dev->data->dev_private;
476 sfc_log_init(sa, "TxQ = %u, nb_tx_desc = %u, socket_id = %u",
477 tx_queue_id, nb_tx_desc, socket_id);
479 sfc_adapter_lock(sa);
481 rc = sfc_tx_qinit(sa, tx_queue_id, nb_tx_desc, socket_id, tx_conf);
485 dev->data->tx_queues[tx_queue_id] = sa->txq_info[tx_queue_id].txq->dp;
487 sfc_adapter_unlock(sa);
491 sfc_adapter_unlock(sa);
497 sfc_tx_queue_release(void *queue)
499 struct sfc_dp_txq *dp_txq = queue;
501 unsigned int sw_index;
502 struct sfc_adapter *sa;
507 txq = sfc_txq_by_dp_txq(dp_txq);
508 sw_index = sfc_txq_sw_index(txq);
510 SFC_ASSERT(txq->evq != NULL);
513 sfc_log_init(sa, "TxQ = %u", sw_index);
515 sfc_adapter_lock(sa);
517 SFC_ASSERT(sw_index < sa->eth_dev->data->nb_tx_queues);
518 sa->eth_dev->data->tx_queues[sw_index] = NULL;
520 sfc_tx_qfini(sa, sw_index);
522 sfc_adapter_unlock(sa);
526 sfc_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
528 struct sfc_adapter *sa = dev->data->dev_private;
529 struct sfc_port *port = &sa->port;
533 rte_spinlock_lock(&port->mac_stats_lock);
535 ret = sfc_port_update_mac_stats(sa);
539 mac_stats = port->mac_stats_buf;
541 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask,
542 EFX_MAC_VADAPTER_RX_UNICAST_PACKETS)) {
544 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS] +
545 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS] +
546 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS];
548 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS] +
549 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS] +
550 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS];
552 mac_stats[EFX_MAC_VADAPTER_RX_UNICAST_BYTES] +
553 mac_stats[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES] +
554 mac_stats[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES];
556 mac_stats[EFX_MAC_VADAPTER_TX_UNICAST_BYTES] +
557 mac_stats[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES] +
558 mac_stats[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES];
559 stats->imissed = mac_stats[EFX_MAC_VADAPTER_RX_OVERFLOW];
560 stats->ierrors = mac_stats[EFX_MAC_VADAPTER_RX_BAD_PACKETS];
561 stats->oerrors = mac_stats[EFX_MAC_VADAPTER_TX_BAD_PACKETS];
563 stats->ipackets = mac_stats[EFX_MAC_RX_PKTS];
564 stats->opackets = mac_stats[EFX_MAC_TX_PKTS];
565 stats->ibytes = mac_stats[EFX_MAC_RX_OCTETS];
566 stats->obytes = mac_stats[EFX_MAC_TX_OCTETS];
568 * Take into account stats which are whenever supported
569 * on EF10. If some stat is not supported by current
570 * firmware variant or HW revision, it is guaranteed
571 * to be zero in mac_stats.
574 mac_stats[EFX_MAC_RX_NODESC_DROP_CNT] +
575 mac_stats[EFX_MAC_PM_TRUNC_BB_OVERFLOW] +
576 mac_stats[EFX_MAC_PM_DISCARD_BB_OVERFLOW] +
577 mac_stats[EFX_MAC_PM_TRUNC_VFIFO_FULL] +
578 mac_stats[EFX_MAC_PM_DISCARD_VFIFO_FULL] +
579 mac_stats[EFX_MAC_PM_TRUNC_QBB] +
580 mac_stats[EFX_MAC_PM_DISCARD_QBB] +
581 mac_stats[EFX_MAC_PM_DISCARD_MAPPING] +
582 mac_stats[EFX_MAC_RXDP_Q_DISABLED_PKTS] +
583 mac_stats[EFX_MAC_RXDP_DI_DROPPED_PKTS];
585 mac_stats[EFX_MAC_RX_FCS_ERRORS] +
586 mac_stats[EFX_MAC_RX_ALIGN_ERRORS] +
587 mac_stats[EFX_MAC_RX_JABBER_PKTS];
588 /* no oerrors counters supported on EF10 */
592 rte_spinlock_unlock(&port->mac_stats_lock);
593 SFC_ASSERT(ret >= 0);
598 sfc_stats_reset(struct rte_eth_dev *dev)
600 struct sfc_adapter *sa = dev->data->dev_private;
601 struct sfc_port *port = &sa->port;
604 if (sa->state != SFC_ADAPTER_STARTED) {
606 * The operation cannot be done if port is not started; it
607 * will be scheduled to be done during the next port start
609 port->mac_stats_reset_pending = B_TRUE;
613 rc = sfc_port_reset_mac_stats(sa);
615 sfc_err(sa, "failed to reset statistics (rc = %d)", rc);
619 sfc_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
620 unsigned int xstats_count)
622 struct sfc_adapter *sa = dev->data->dev_private;
623 struct sfc_port *port = &sa->port;
629 rte_spinlock_lock(&port->mac_stats_lock);
631 rc = sfc_port_update_mac_stats(sa);
638 mac_stats = port->mac_stats_buf;
640 for (i = 0; i < EFX_MAC_NSTATS; ++i) {
641 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) {
642 if (xstats != NULL && nstats < (int)xstats_count) {
643 xstats[nstats].id = nstats;
644 xstats[nstats].value = mac_stats[i];
651 rte_spinlock_unlock(&port->mac_stats_lock);
657 sfc_xstats_get_names(struct rte_eth_dev *dev,
658 struct rte_eth_xstat_name *xstats_names,
659 unsigned int xstats_count)
661 struct sfc_adapter *sa = dev->data->dev_private;
662 struct sfc_port *port = &sa->port;
664 unsigned int nstats = 0;
666 for (i = 0; i < EFX_MAC_NSTATS; ++i) {
667 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i)) {
668 if (xstats_names != NULL && nstats < xstats_count)
669 strncpy(xstats_names[nstats].name,
670 efx_mac_stat_name(sa->nic, i),
671 sizeof(xstats_names[0].name));
680 sfc_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
681 uint64_t *values, unsigned int n)
683 struct sfc_adapter *sa = dev->data->dev_private;
684 struct sfc_port *port = &sa->port;
686 unsigned int nb_supported = 0;
687 unsigned int nb_written = 0;
692 if (unlikely(values == NULL) ||
693 unlikely((ids == NULL) && (n < port->mac_stats_nb_supported)))
694 return port->mac_stats_nb_supported;
696 rte_spinlock_lock(&port->mac_stats_lock);
698 rc = sfc_port_update_mac_stats(sa);
705 mac_stats = port->mac_stats_buf;
707 for (i = 0; (i < EFX_MAC_NSTATS) && (nb_written < n); ++i) {
708 if (!EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i))
711 if ((ids == NULL) || (ids[nb_written] == nb_supported))
712 values[nb_written++] = mac_stats[i];
720 rte_spinlock_unlock(&port->mac_stats_lock);
726 sfc_xstats_get_names_by_id(struct rte_eth_dev *dev,
727 struct rte_eth_xstat_name *xstats_names,
728 const uint64_t *ids, unsigned int size)
730 struct sfc_adapter *sa = dev->data->dev_private;
731 struct sfc_port *port = &sa->port;
732 unsigned int nb_supported = 0;
733 unsigned int nb_written = 0;
736 if (unlikely(xstats_names == NULL) ||
737 unlikely((ids == NULL) && (size < port->mac_stats_nb_supported)))
738 return port->mac_stats_nb_supported;
740 for (i = 0; (i < EFX_MAC_NSTATS) && (nb_written < size); ++i) {
741 if (!EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i))
744 if ((ids == NULL) || (ids[nb_written] == nb_supported)) {
745 char *name = xstats_names[nb_written++].name;
747 strncpy(name, efx_mac_stat_name(sa->nic, i),
748 sizeof(xstats_names[0].name));
749 name[sizeof(xstats_names[0].name) - 1] = '\0';
759 sfc_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
761 struct sfc_adapter *sa = dev->data->dev_private;
762 unsigned int wanted_fc, link_fc;
764 memset(fc_conf, 0, sizeof(*fc_conf));
766 sfc_adapter_lock(sa);
768 if (sa->state == SFC_ADAPTER_STARTED)
769 efx_mac_fcntl_get(sa->nic, &wanted_fc, &link_fc);
771 link_fc = sa->port.flow_ctrl;
775 fc_conf->mode = RTE_FC_NONE;
777 case EFX_FCNTL_RESPOND:
778 fc_conf->mode = RTE_FC_RX_PAUSE;
780 case EFX_FCNTL_GENERATE:
781 fc_conf->mode = RTE_FC_TX_PAUSE;
783 case (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE):
784 fc_conf->mode = RTE_FC_FULL;
787 sfc_err(sa, "%s: unexpected flow control value %#x",
791 fc_conf->autoneg = sa->port.flow_ctrl_autoneg;
793 sfc_adapter_unlock(sa);
799 sfc_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
801 struct sfc_adapter *sa = dev->data->dev_private;
802 struct sfc_port *port = &sa->port;
806 if (fc_conf->high_water != 0 || fc_conf->low_water != 0 ||
807 fc_conf->pause_time != 0 || fc_conf->send_xon != 0 ||
808 fc_conf->mac_ctrl_frame_fwd != 0) {
809 sfc_err(sa, "unsupported flow control settings specified");
814 switch (fc_conf->mode) {
818 case RTE_FC_RX_PAUSE:
819 fcntl = EFX_FCNTL_RESPOND;
821 case RTE_FC_TX_PAUSE:
822 fcntl = EFX_FCNTL_GENERATE;
825 fcntl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
832 sfc_adapter_lock(sa);
834 if (sa->state == SFC_ADAPTER_STARTED) {
835 rc = efx_mac_fcntl_set(sa->nic, fcntl, fc_conf->autoneg);
837 goto fail_mac_fcntl_set;
840 port->flow_ctrl = fcntl;
841 port->flow_ctrl_autoneg = fc_conf->autoneg;
843 sfc_adapter_unlock(sa);
848 sfc_adapter_unlock(sa);
855 sfc_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
857 struct sfc_adapter *sa = dev->data->dev_private;
858 size_t pdu = EFX_MAC_PDU(mtu);
862 sfc_log_init(sa, "mtu=%u", mtu);
865 if (pdu < EFX_MAC_PDU_MIN) {
866 sfc_err(sa, "too small MTU %u (PDU size %u less than min %u)",
867 (unsigned int)mtu, (unsigned int)pdu,
871 if (pdu > EFX_MAC_PDU_MAX) {
872 sfc_err(sa, "too big MTU %u (PDU size %u greater than max %u)",
873 (unsigned int)mtu, (unsigned int)pdu,
878 sfc_adapter_lock(sa);
880 if (pdu != sa->port.pdu) {
881 if (sa->state == SFC_ADAPTER_STARTED) {
884 old_pdu = sa->port.pdu;
895 * The driver does not use it, but other PMDs update jumbo_frame
896 * flag and max_rx_pkt_len when MTU is set.
898 dev->data->dev_conf.rxmode.jumbo_frame = (mtu > ETHER_MAX_LEN);
899 dev->data->dev_conf.rxmode.max_rx_pkt_len = sa->port.pdu;
901 sfc_adapter_unlock(sa);
903 sfc_log_init(sa, "done");
907 sa->port.pdu = old_pdu;
908 if (sfc_start(sa) != 0)
909 sfc_err(sa, "cannot start with neither new (%u) nor old (%u) "
910 "PDU max size - port is stopped",
911 (unsigned int)pdu, (unsigned int)old_pdu);
912 sfc_adapter_unlock(sa);
915 sfc_log_init(sa, "failed %d", rc);
920 sfc_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
922 struct sfc_adapter *sa = dev->data->dev_private;
923 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
924 struct sfc_port *port = &sa->port;
927 sfc_adapter_lock(sa);
930 * Copy the address to the device private data so that
931 * it could be recalled in the case of adapter restart.
933 ether_addr_copy(mac_addr, &port->default_mac_addr);
935 if (port->isolated) {
936 sfc_err(sa, "isolated mode is active on the port");
937 sfc_err(sa, "will not set MAC address");
941 if (sa->state != SFC_ADAPTER_STARTED) {
942 sfc_info(sa, "the port is not started");
943 sfc_info(sa, "the new MAC address will be set on port start");
948 if (encp->enc_allow_set_mac_with_installed_filters) {
949 rc = efx_mac_addr_set(sa->nic, mac_addr->addr_bytes);
951 sfc_err(sa, "cannot set MAC address (rc = %u)", rc);
956 * Changing the MAC address by means of MCDI request
957 * has no effect on received traffic, therefore
958 * we also need to update unicast filters
960 rc = sfc_set_rx_mode(sa);
962 sfc_err(sa, "cannot set filter (rc = %u)", rc);
964 sfc_warn(sa, "cannot set MAC address with filters installed");
965 sfc_warn(sa, "adapter will be restarted to pick the new MAC");
966 sfc_warn(sa, "(some traffic may be dropped)");
969 * Since setting MAC address with filters installed is not
970 * allowed on the adapter, the new MAC address will be set
971 * by means of adapter restart. sfc_start() shall retrieve
972 * the new address from the device private data and set it.
977 sfc_err(sa, "cannot restart adapter (rc = %u)", rc);
982 * In the case of failure sa->port->default_mac_addr does not
983 * need rollback since no error code is returned, and the upper
984 * API will anyway update the external MAC address storage.
985 * To be consistent with that new value it is better to keep
986 * the device private value the same.
988 sfc_adapter_unlock(sa);
993 sfc_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set,
996 struct sfc_adapter *sa = dev->data->dev_private;
997 struct sfc_port *port = &sa->port;
998 uint8_t *mc_addrs = port->mcast_addrs;
1002 if (port->isolated) {
1003 sfc_err(sa, "isolated mode is active on the port");
1004 sfc_err(sa, "will not set multicast address list");
1008 if (mc_addrs == NULL)
1011 if (nb_mc_addr > port->max_mcast_addrs) {
1012 sfc_err(sa, "too many multicast addresses: %u > %u",
1013 nb_mc_addr, port->max_mcast_addrs);
1017 for (i = 0; i < nb_mc_addr; ++i) {
1018 rte_memcpy(mc_addrs, mc_addr_set[i].addr_bytes,
1020 mc_addrs += EFX_MAC_ADDR_LEN;
1023 port->nb_mcast_addrs = nb_mc_addr;
1025 if (sa->state != SFC_ADAPTER_STARTED)
1028 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs,
1029 port->nb_mcast_addrs);
1031 sfc_err(sa, "cannot set multicast address list (rc = %u)", rc);
1038 * The function is used by the secondary process as well. It must not
1039 * use any process-local pointers from the adapter data.
1042 sfc_rx_queue_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id,
1043 struct rte_eth_rxq_info *qinfo)
1045 struct sfc_adapter *sa = dev->data->dev_private;
1046 struct sfc_rxq_info *rxq_info;
1047 struct sfc_rxq *rxq;
1049 sfc_adapter_lock(sa);
1051 SFC_ASSERT(rx_queue_id < sa->rxq_count);
1053 rxq_info = &sa->rxq_info[rx_queue_id];
1054 rxq = rxq_info->rxq;
1055 SFC_ASSERT(rxq != NULL);
1057 qinfo->mp = rxq->refill_mb_pool;
1058 qinfo->conf.rx_free_thresh = rxq->refill_threshold;
1059 qinfo->conf.rx_drop_en = 1;
1060 qinfo->conf.rx_deferred_start = rxq_info->deferred_start;
1061 qinfo->scattered_rx = (rxq_info->type == EFX_RXQ_TYPE_SCATTER);
1062 qinfo->nb_desc = rxq_info->entries;
1064 sfc_adapter_unlock(sa);
1068 * The function is used by the secondary process as well. It must not
1069 * use any process-local pointers from the adapter data.
1072 sfc_tx_queue_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id,
1073 struct rte_eth_txq_info *qinfo)
1075 struct sfc_adapter *sa = dev->data->dev_private;
1076 struct sfc_txq_info *txq_info;
1078 sfc_adapter_lock(sa);
1080 SFC_ASSERT(tx_queue_id < sa->txq_count);
1082 txq_info = &sa->txq_info[tx_queue_id];
1083 SFC_ASSERT(txq_info->txq != NULL);
1085 memset(qinfo, 0, sizeof(*qinfo));
1087 qinfo->conf.txq_flags = txq_info->txq->flags;
1088 qinfo->conf.tx_free_thresh = txq_info->txq->free_thresh;
1089 qinfo->conf.tx_deferred_start = txq_info->deferred_start;
1090 qinfo->nb_desc = txq_info->entries;
1092 sfc_adapter_unlock(sa);
1096 sfc_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1098 struct sfc_adapter *sa = dev->data->dev_private;
1100 sfc_log_init(sa, "RxQ=%u", rx_queue_id);
1102 return sfc_rx_qdesc_npending(sa, rx_queue_id);
1106 sfc_rx_descriptor_done(void *queue, uint16_t offset)
1108 struct sfc_dp_rxq *dp_rxq = queue;
1110 return sfc_rx_qdesc_done(dp_rxq, offset);
1114 sfc_rx_descriptor_status(void *queue, uint16_t offset)
1116 struct sfc_dp_rxq *dp_rxq = queue;
1117 struct sfc_rxq *rxq = sfc_rxq_by_dp_rxq(dp_rxq);
1119 return rxq->evq->sa->dp_rx->qdesc_status(dp_rxq, offset);
1123 sfc_tx_descriptor_status(void *queue, uint16_t offset)
1125 struct sfc_dp_txq *dp_txq = queue;
1126 struct sfc_txq *txq = sfc_txq_by_dp_txq(dp_txq);
1128 return txq->evq->sa->dp_tx->qdesc_status(dp_txq, offset);
1132 sfc_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1134 struct sfc_adapter *sa = dev->data->dev_private;
1137 sfc_log_init(sa, "RxQ=%u", rx_queue_id);
1139 sfc_adapter_lock(sa);
1142 if (sa->state != SFC_ADAPTER_STARTED)
1143 goto fail_not_started;
1145 rc = sfc_rx_qstart(sa, rx_queue_id);
1147 goto fail_rx_qstart;
1149 sa->rxq_info[rx_queue_id].deferred_started = B_TRUE;
1151 sfc_adapter_unlock(sa);
1157 sfc_adapter_unlock(sa);
1163 sfc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1165 struct sfc_adapter *sa = dev->data->dev_private;
1167 sfc_log_init(sa, "RxQ=%u", rx_queue_id);
1169 sfc_adapter_lock(sa);
1170 sfc_rx_qstop(sa, rx_queue_id);
1172 sa->rxq_info[rx_queue_id].deferred_started = B_FALSE;
1174 sfc_adapter_unlock(sa);
1180 sfc_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1182 struct sfc_adapter *sa = dev->data->dev_private;
1185 sfc_log_init(sa, "TxQ = %u", tx_queue_id);
1187 sfc_adapter_lock(sa);
1190 if (sa->state != SFC_ADAPTER_STARTED)
1191 goto fail_not_started;
1193 rc = sfc_tx_qstart(sa, tx_queue_id);
1195 goto fail_tx_qstart;
1197 sa->txq_info[tx_queue_id].deferred_started = B_TRUE;
1199 sfc_adapter_unlock(sa);
1205 sfc_adapter_unlock(sa);
1211 sfc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1213 struct sfc_adapter *sa = dev->data->dev_private;
1215 sfc_log_init(sa, "TxQ = %u", tx_queue_id);
1217 sfc_adapter_lock(sa);
1219 sfc_tx_qstop(sa, tx_queue_id);
1221 sa->txq_info[tx_queue_id].deferred_started = B_FALSE;
1223 sfc_adapter_unlock(sa);
1227 #if EFSYS_OPT_RX_SCALE
1229 sfc_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1230 struct rte_eth_rss_conf *rss_conf)
1232 struct sfc_adapter *sa = dev->data->dev_private;
1233 struct sfc_port *port = &sa->port;
1235 if ((sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) || port->isolated)
1238 if (sa->rss_channels == 0)
1241 sfc_adapter_lock(sa);
1244 * Mapping of hash configuration between RTE and EFX is not one-to-one,
1245 * hence, conversion is done here to derive a correct set of ETH_RSS
1246 * flags which corresponds to the active EFX configuration stored
1247 * locally in 'sfc_adapter' and kept up-to-date
1249 rss_conf->rss_hf = sfc_efx_to_rte_hash_type(sa->rss_hash_types);
1250 rss_conf->rss_key_len = EFX_RSS_KEY_SIZE;
1251 if (rss_conf->rss_key != NULL)
1252 rte_memcpy(rss_conf->rss_key, sa->rss_key, EFX_RSS_KEY_SIZE);
1254 sfc_adapter_unlock(sa);
1260 sfc_dev_rss_hash_update(struct rte_eth_dev *dev,
1261 struct rte_eth_rss_conf *rss_conf)
1263 struct sfc_adapter *sa = dev->data->dev_private;
1264 struct sfc_port *port = &sa->port;
1265 unsigned int efx_hash_types;
1271 if (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) {
1272 sfc_err(sa, "RSS is not available");
1276 if (sa->rss_channels == 0) {
1277 sfc_err(sa, "RSS is not configured");
1281 if ((rss_conf->rss_key != NULL) &&
1282 (rss_conf->rss_key_len != sizeof(sa->rss_key))) {
1283 sfc_err(sa, "RSS key size is wrong (should be %lu)",
1284 sizeof(sa->rss_key));
1288 if ((rss_conf->rss_hf & ~SFC_RSS_OFFLOADS) != 0) {
1289 sfc_err(sa, "unsupported hash functions requested");
1293 sfc_adapter_lock(sa);
1295 efx_hash_types = sfc_rte_to_efx_hash_type(rss_conf->rss_hf);
1297 rc = efx_rx_scale_mode_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
1298 EFX_RX_HASHALG_TOEPLITZ,
1299 efx_hash_types, B_TRUE);
1301 goto fail_scale_mode_set;
1303 if (rss_conf->rss_key != NULL) {
1304 if (sa->state == SFC_ADAPTER_STARTED) {
1305 rc = efx_rx_scale_key_set(sa->nic,
1306 EFX_RSS_CONTEXT_DEFAULT,
1308 sizeof(sa->rss_key));
1310 goto fail_scale_key_set;
1313 rte_memcpy(sa->rss_key, rss_conf->rss_key, sizeof(sa->rss_key));
1316 sa->rss_hash_types = efx_hash_types;
1318 sfc_adapter_unlock(sa);
1323 if (efx_rx_scale_mode_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
1324 EFX_RX_HASHALG_TOEPLITZ,
1325 sa->rss_hash_types, B_TRUE) != 0)
1326 sfc_err(sa, "failed to restore RSS mode");
1328 fail_scale_mode_set:
1329 sfc_adapter_unlock(sa);
1334 sfc_dev_rss_reta_query(struct rte_eth_dev *dev,
1335 struct rte_eth_rss_reta_entry64 *reta_conf,
1338 struct sfc_adapter *sa = dev->data->dev_private;
1339 struct sfc_port *port = &sa->port;
1342 if ((sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) || port->isolated)
1345 if (sa->rss_channels == 0)
1348 if (reta_size != EFX_RSS_TBL_SIZE)
1351 sfc_adapter_lock(sa);
1353 for (entry = 0; entry < reta_size; entry++) {
1354 int grp = entry / RTE_RETA_GROUP_SIZE;
1355 int grp_idx = entry % RTE_RETA_GROUP_SIZE;
1357 if ((reta_conf[grp].mask >> grp_idx) & 1)
1358 reta_conf[grp].reta[grp_idx] = sa->rss_tbl[entry];
1361 sfc_adapter_unlock(sa);
1367 sfc_dev_rss_reta_update(struct rte_eth_dev *dev,
1368 struct rte_eth_rss_reta_entry64 *reta_conf,
1371 struct sfc_adapter *sa = dev->data->dev_private;
1372 struct sfc_port *port = &sa->port;
1373 unsigned int *rss_tbl_new;
1381 if (sa->rss_support != EFX_RX_SCALE_EXCLUSIVE) {
1382 sfc_err(sa, "RSS is not available");
1386 if (sa->rss_channels == 0) {
1387 sfc_err(sa, "RSS is not configured");
1391 if (reta_size != EFX_RSS_TBL_SIZE) {
1392 sfc_err(sa, "RETA size is wrong (should be %u)",
1397 rss_tbl_new = rte_zmalloc("rss_tbl_new", sizeof(sa->rss_tbl), 0);
1398 if (rss_tbl_new == NULL)
1401 sfc_adapter_lock(sa);
1403 rte_memcpy(rss_tbl_new, sa->rss_tbl, sizeof(sa->rss_tbl));
1405 for (entry = 0; entry < reta_size; entry++) {
1406 int grp_idx = entry % RTE_RETA_GROUP_SIZE;
1407 struct rte_eth_rss_reta_entry64 *grp;
1409 grp = &reta_conf[entry / RTE_RETA_GROUP_SIZE];
1411 if (grp->mask & (1ull << grp_idx)) {
1412 if (grp->reta[grp_idx] >= sa->rss_channels) {
1414 goto bad_reta_entry;
1416 rss_tbl_new[entry] = grp->reta[grp_idx];
1420 if (sa->state == SFC_ADAPTER_STARTED) {
1421 rc = efx_rx_scale_tbl_set(sa->nic, EFX_RSS_CONTEXT_DEFAULT,
1422 rss_tbl_new, EFX_RSS_TBL_SIZE);
1424 goto fail_scale_tbl_set;
1427 rte_memcpy(sa->rss_tbl, rss_tbl_new, sizeof(sa->rss_tbl));
1431 sfc_adapter_unlock(sa);
1433 rte_free(rss_tbl_new);
1435 SFC_ASSERT(rc >= 0);
1441 sfc_dev_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type,
1442 enum rte_filter_op filter_op,
1445 struct sfc_adapter *sa = dev->data->dev_private;
1448 sfc_log_init(sa, "entry");
1450 switch (filter_type) {
1451 case RTE_ETH_FILTER_NONE:
1452 sfc_err(sa, "Global filters configuration not supported");
1454 case RTE_ETH_FILTER_MACVLAN:
1455 sfc_err(sa, "MACVLAN filters not supported");
1457 case RTE_ETH_FILTER_ETHERTYPE:
1458 sfc_err(sa, "EtherType filters not supported");
1460 case RTE_ETH_FILTER_FLEXIBLE:
1461 sfc_err(sa, "Flexible filters not supported");
1463 case RTE_ETH_FILTER_SYN:
1464 sfc_err(sa, "SYN filters not supported");
1466 case RTE_ETH_FILTER_NTUPLE:
1467 sfc_err(sa, "NTUPLE filters not supported");
1469 case RTE_ETH_FILTER_TUNNEL:
1470 sfc_err(sa, "Tunnel filters not supported");
1472 case RTE_ETH_FILTER_FDIR:
1473 sfc_err(sa, "Flow Director filters not supported");
1475 case RTE_ETH_FILTER_HASH:
1476 sfc_err(sa, "Hash filters not supported");
1478 case RTE_ETH_FILTER_GENERIC:
1479 if (filter_op != RTE_ETH_FILTER_GET) {
1482 *(const void **)arg = &sfc_flow_ops;
1487 sfc_err(sa, "Unknown filter type %u", filter_type);
1491 sfc_log_init(sa, "exit: %d", -rc);
1492 SFC_ASSERT(rc >= 0);
1496 static const struct eth_dev_ops sfc_eth_dev_ops = {
1497 .dev_configure = sfc_dev_configure,
1498 .dev_start = sfc_dev_start,
1499 .dev_stop = sfc_dev_stop,
1500 .dev_set_link_up = sfc_dev_set_link_up,
1501 .dev_set_link_down = sfc_dev_set_link_down,
1502 .dev_close = sfc_dev_close,
1503 .promiscuous_enable = sfc_dev_promisc_enable,
1504 .promiscuous_disable = sfc_dev_promisc_disable,
1505 .allmulticast_enable = sfc_dev_allmulti_enable,
1506 .allmulticast_disable = sfc_dev_allmulti_disable,
1507 .link_update = sfc_dev_link_update,
1508 .stats_get = sfc_stats_get,
1509 .stats_reset = sfc_stats_reset,
1510 .xstats_get = sfc_xstats_get,
1511 .xstats_reset = sfc_stats_reset,
1512 .xstats_get_names = sfc_xstats_get_names,
1513 .dev_infos_get = sfc_dev_infos_get,
1514 .dev_supported_ptypes_get = sfc_dev_supported_ptypes_get,
1515 .mtu_set = sfc_dev_set_mtu,
1516 .rx_queue_start = sfc_rx_queue_start,
1517 .rx_queue_stop = sfc_rx_queue_stop,
1518 .tx_queue_start = sfc_tx_queue_start,
1519 .tx_queue_stop = sfc_tx_queue_stop,
1520 .rx_queue_setup = sfc_rx_queue_setup,
1521 .rx_queue_release = sfc_rx_queue_release,
1522 .rx_queue_count = sfc_rx_queue_count,
1523 .rx_descriptor_done = sfc_rx_descriptor_done,
1524 .rx_descriptor_status = sfc_rx_descriptor_status,
1525 .tx_descriptor_status = sfc_tx_descriptor_status,
1526 .tx_queue_setup = sfc_tx_queue_setup,
1527 .tx_queue_release = sfc_tx_queue_release,
1528 .flow_ctrl_get = sfc_flow_ctrl_get,
1529 .flow_ctrl_set = sfc_flow_ctrl_set,
1530 .mac_addr_set = sfc_mac_addr_set,
1531 #if EFSYS_OPT_RX_SCALE
1532 .reta_update = sfc_dev_rss_reta_update,
1533 .reta_query = sfc_dev_rss_reta_query,
1534 .rss_hash_update = sfc_dev_rss_hash_update,
1535 .rss_hash_conf_get = sfc_dev_rss_hash_conf_get,
1537 .filter_ctrl = sfc_dev_filter_ctrl,
1538 .set_mc_addr_list = sfc_set_mc_addr_list,
1539 .rxq_info_get = sfc_rx_queue_info_get,
1540 .txq_info_get = sfc_tx_queue_info_get,
1541 .fw_version_get = sfc_fw_version_get,
1542 .xstats_get_by_id = sfc_xstats_get_by_id,
1543 .xstats_get_names_by_id = sfc_xstats_get_names_by_id,
1547 * Duplicate a string in potentially shared memory required for
1548 * multi-process support.
1550 * strdup() allocates from process-local heap/memory.
1553 sfc_strdup(const char *str)
1561 size = strlen(str) + 1;
1562 copy = rte_malloc(__func__, size, 0);
1564 rte_memcpy(copy, str, size);
1570 sfc_eth_dev_set_ops(struct rte_eth_dev *dev)
1572 struct sfc_adapter *sa = dev->data->dev_private;
1573 unsigned int avail_caps = 0;
1574 const char *rx_name = NULL;
1575 const char *tx_name = NULL;
1578 switch (sa->family) {
1579 case EFX_FAMILY_HUNTINGTON:
1580 case EFX_FAMILY_MEDFORD:
1581 avail_caps |= SFC_DP_HW_FW_CAP_EF10;
1587 rc = sfc_kvargs_process(sa, SFC_KVARG_RX_DATAPATH,
1588 sfc_kvarg_string_handler, &rx_name);
1590 goto fail_kvarg_rx_datapath;
1592 if (rx_name != NULL) {
1593 sa->dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, rx_name);
1594 if (sa->dp_rx == NULL) {
1595 sfc_err(sa, "Rx datapath %s not found", rx_name);
1599 if (!sfc_dp_match_hw_fw_caps(&sa->dp_rx->dp, avail_caps)) {
1601 "Insufficient Hw/FW capabilities to use Rx datapath %s",
1604 goto fail_dp_rx_caps;
1607 sa->dp_rx = sfc_dp_find_rx_by_caps(&sfc_dp_head, avail_caps);
1608 if (sa->dp_rx == NULL) {
1609 sfc_err(sa, "Rx datapath by caps %#x not found",
1616 sa->dp_rx_name = sfc_strdup(sa->dp_rx->dp.name);
1617 if (sa->dp_rx_name == NULL) {
1619 goto fail_dp_rx_name;
1622 sfc_info(sa, "use %s Rx datapath", sa->dp_rx_name);
1624 dev->rx_pkt_burst = sa->dp_rx->pkt_burst;
1626 rc = sfc_kvargs_process(sa, SFC_KVARG_TX_DATAPATH,
1627 sfc_kvarg_string_handler, &tx_name);
1629 goto fail_kvarg_tx_datapath;
1631 if (tx_name != NULL) {
1632 sa->dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, tx_name);
1633 if (sa->dp_tx == NULL) {
1634 sfc_err(sa, "Tx datapath %s not found", tx_name);
1638 if (!sfc_dp_match_hw_fw_caps(&sa->dp_tx->dp, avail_caps)) {
1640 "Insufficient Hw/FW capabilities to use Tx datapath %s",
1643 goto fail_dp_tx_caps;
1646 sa->dp_tx = sfc_dp_find_tx_by_caps(&sfc_dp_head, avail_caps);
1647 if (sa->dp_tx == NULL) {
1648 sfc_err(sa, "Tx datapath by caps %#x not found",
1655 sa->dp_tx_name = sfc_strdup(sa->dp_tx->dp.name);
1656 if (sa->dp_tx_name == NULL) {
1658 goto fail_dp_tx_name;
1661 sfc_info(sa, "use %s Tx datapath", sa->dp_tx_name);
1663 dev->tx_pkt_burst = sa->dp_tx->pkt_burst;
1665 dev->dev_ops = &sfc_eth_dev_ops;
1674 fail_kvarg_tx_datapath:
1675 rte_free(sa->dp_rx_name);
1676 sa->dp_rx_name = NULL;
1683 fail_kvarg_rx_datapath:
1688 sfc_eth_dev_clear_ops(struct rte_eth_dev *dev)
1690 struct sfc_adapter *sa = dev->data->dev_private;
1692 dev->dev_ops = NULL;
1693 dev->rx_pkt_burst = NULL;
1694 dev->tx_pkt_burst = NULL;
1696 rte_free(sa->dp_tx_name);
1697 sa->dp_tx_name = NULL;
1700 rte_free(sa->dp_rx_name);
1701 sa->dp_rx_name = NULL;
1705 static const struct eth_dev_ops sfc_eth_dev_secondary_ops = {
1706 .rxq_info_get = sfc_rx_queue_info_get,
1707 .txq_info_get = sfc_tx_queue_info_get,
1711 sfc_eth_dev_secondary_set_ops(struct rte_eth_dev *dev)
1714 * Device private data has really many process-local pointers.
1715 * Below code should be extremely careful to use data located
1716 * in shared memory only.
1718 struct sfc_adapter *sa = dev->data->dev_private;
1719 const struct sfc_dp_rx *dp_rx;
1720 const struct sfc_dp_tx *dp_tx;
1723 dp_rx = sfc_dp_find_rx_by_name(&sfc_dp_head, sa->dp_rx_name);
1724 if (dp_rx == NULL) {
1725 sfc_err(sa, "cannot find %s Rx datapath", sa->dp_tx_name);
1729 if (~dp_rx->features & SFC_DP_RX_FEAT_MULTI_PROCESS) {
1730 sfc_err(sa, "%s Rx datapath does not support multi-process",
1733 goto fail_dp_rx_multi_process;
1736 dp_tx = sfc_dp_find_tx_by_name(&sfc_dp_head, sa->dp_tx_name);
1737 if (dp_tx == NULL) {
1738 sfc_err(sa, "cannot find %s Tx datapath", sa->dp_tx_name);
1742 if (~dp_tx->features & SFC_DP_TX_FEAT_MULTI_PROCESS) {
1743 sfc_err(sa, "%s Tx datapath does not support multi-process",
1746 goto fail_dp_tx_multi_process;
1749 dev->rx_pkt_burst = dp_rx->pkt_burst;
1750 dev->tx_pkt_burst = dp_tx->pkt_burst;
1751 dev->dev_ops = &sfc_eth_dev_secondary_ops;
1755 fail_dp_tx_multi_process:
1757 fail_dp_rx_multi_process:
1763 sfc_eth_dev_secondary_clear_ops(struct rte_eth_dev *dev)
1765 dev->dev_ops = NULL;
1766 dev->tx_pkt_burst = NULL;
1767 dev->rx_pkt_burst = NULL;
1771 sfc_register_dp(void)
1774 if (TAILQ_EMPTY(&sfc_dp_head)) {
1775 /* Prefer EF10 datapath */
1776 sfc_dp_register(&sfc_dp_head, &sfc_ef10_rx.dp);
1777 sfc_dp_register(&sfc_dp_head, &sfc_efx_rx.dp);
1779 sfc_dp_register(&sfc_dp_head, &sfc_ef10_tx.dp);
1780 sfc_dp_register(&sfc_dp_head, &sfc_efx_tx.dp);
1781 sfc_dp_register(&sfc_dp_head, &sfc_ef10_simple_tx.dp);
1786 sfc_eth_dev_init(struct rte_eth_dev *dev)
1788 struct sfc_adapter *sa = dev->data->dev_private;
1789 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1791 const efx_nic_cfg_t *encp;
1792 const struct ether_addr *from;
1796 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1797 return -sfc_eth_dev_secondary_set_ops(dev);
1799 /* Required for logging */
1800 sa->pci_addr = pci_dev->addr;
1801 sa->port_id = dev->data->port_id;
1805 /* Copy PCI device info to the dev->data */
1806 rte_eth_copy_pci_info(dev, pci_dev);
1808 rc = sfc_kvargs_parse(sa);
1810 goto fail_kvargs_parse;
1812 rc = sfc_kvargs_process(sa, SFC_KVARG_DEBUG_INIT,
1813 sfc_kvarg_bool_handler, &sa->debug_init);
1815 goto fail_kvarg_debug_init;
1817 sfc_log_init(sa, "entry");
1819 dev->data->mac_addrs = rte_zmalloc("sfc", ETHER_ADDR_LEN, 0);
1820 if (dev->data->mac_addrs == NULL) {
1822 goto fail_mac_addrs;
1825 sfc_adapter_lock_init(sa);
1826 sfc_adapter_lock(sa);
1828 sfc_log_init(sa, "probing");
1833 sfc_log_init(sa, "set device ops");
1834 rc = sfc_eth_dev_set_ops(dev);
1838 sfc_log_init(sa, "attaching");
1839 rc = sfc_attach(sa);
1843 encp = efx_nic_cfg_get(sa->nic);
1846 * The arguments are really reverse order in comparison to
1847 * Linux kernel. Copy from NIC config to Ethernet device data.
1849 from = (const struct ether_addr *)(encp->enc_mac_addr);
1850 ether_addr_copy(from, &dev->data->mac_addrs[0]);
1852 sfc_adapter_unlock(sa);
1854 sfc_log_init(sa, "done");
1858 sfc_eth_dev_clear_ops(dev);
1864 sfc_adapter_unlock(sa);
1865 sfc_adapter_lock_fini(sa);
1866 rte_free(dev->data->mac_addrs);
1867 dev->data->mac_addrs = NULL;
1870 fail_kvarg_debug_init:
1871 sfc_kvargs_cleanup(sa);
1874 sfc_log_init(sa, "failed %d", rc);
1880 sfc_eth_dev_uninit(struct rte_eth_dev *dev)
1882 struct sfc_adapter *sa;
1884 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1885 sfc_eth_dev_secondary_clear_ops(dev);
1889 sa = dev->data->dev_private;
1890 sfc_log_init(sa, "entry");
1892 sfc_adapter_lock(sa);
1894 sfc_eth_dev_clear_ops(dev);
1899 rte_free(dev->data->mac_addrs);
1900 dev->data->mac_addrs = NULL;
1902 sfc_kvargs_cleanup(sa);
1904 sfc_adapter_unlock(sa);
1905 sfc_adapter_lock_fini(sa);
1907 sfc_log_init(sa, "done");
1909 /* Required for logging, so cleanup last */
1914 static const struct rte_pci_id pci_id_sfc_efx_map[] = {
1915 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE) },
1916 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_FARMINGDALE_VF) },
1917 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT) },
1918 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_GREENPORT_VF) },
1919 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD) },
1920 { RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) },
1921 { .vendor_id = 0 /* sentinel */ }
1924 static int sfc_eth_dev_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1925 struct rte_pci_device *pci_dev)
1927 return rte_eth_dev_pci_generic_probe(pci_dev,
1928 sizeof(struct sfc_adapter), sfc_eth_dev_init);
1931 static int sfc_eth_dev_pci_remove(struct rte_pci_device *pci_dev)
1933 return rte_eth_dev_pci_generic_remove(pci_dev, sfc_eth_dev_uninit);
1936 static struct rte_pci_driver sfc_efx_pmd = {
1937 .id_table = pci_id_sfc_efx_map,
1939 RTE_PCI_DRV_INTR_LSC |
1940 RTE_PCI_DRV_NEED_MAPPING,
1941 .probe = sfc_eth_dev_pci_probe,
1942 .remove = sfc_eth_dev_pci_remove,
1945 RTE_PMD_REGISTER_PCI(net_sfc_efx, sfc_efx_pmd);
1946 RTE_PMD_REGISTER_PCI_TABLE(net_sfc_efx, pci_id_sfc_efx_map);
1947 RTE_PMD_REGISTER_KMOD_DEP(net_sfc_efx, "* igb_uio | uio_pci_generic | vfio-pci");
1948 RTE_PMD_REGISTER_PARAM_STRING(net_sfc_efx,
1949 SFC_KVARG_RX_DATAPATH "=" SFC_KVARG_VALUES_RX_DATAPATH " "
1950 SFC_KVARG_TX_DATAPATH "=" SFC_KVARG_VALUES_TX_DATAPATH " "
1951 SFC_KVARG_PERF_PROFILE "=" SFC_KVARG_VALUES_PERF_PROFILE " "
1952 SFC_KVARG_STATS_UPDATE_PERIOD_MS "=<long> "
1953 SFC_KVARG_MCDI_LOGGING "=" SFC_KVARG_VALUES_BOOL " "
1954 SFC_KVARG_DEBUG_INIT "=" SFC_KVARG_VALUES_BOOL);