net/i40e: fix Rx packet statistics
[dpdk.git] / drivers / net / sfc / sfc_mae.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  *
3  * Copyright(c) 2019-2021 Xilinx, Inc.
4  * Copyright(c) 2019 Solarflare Communications Inc.
5  *
6  * This software was jointly developed between OKTET Labs (under contract
7  * for Solarflare) and Solarflare Communications, Inc.
8  */
9
10 #include <stdbool.h>
11
12 #include <rte_bitops.h>
13 #include <rte_common.h>
14 #include <rte_vxlan.h>
15
16 #include "efx.h"
17
18 #include "sfc.h"
19 #include "sfc_mae_counter.h"
20 #include "sfc_log.h"
21 #include "sfc_switch.h"
22 #include "sfc_service.h"
23
24 static int
25 sfc_mae_assign_entity_mport(struct sfc_adapter *sa,
26                             efx_mport_sel_t *mportp)
27 {
28         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
29
30         return efx_mae_mport_by_pcie_function(encp->enc_pf, encp->enc_vf,
31                                               mportp);
32 }
33
34 static int
35 sfc_mae_counter_registry_init(struct sfc_mae_counter_registry *registry,
36                               uint32_t nb_counters_max)
37 {
38         return sfc_mae_counters_init(&registry->counters, nb_counters_max);
39 }
40
41 static void
42 sfc_mae_counter_registry_fini(struct sfc_mae_counter_registry *registry)
43 {
44         sfc_mae_counters_fini(&registry->counters);
45 }
46
47 static int
48 sfc_mae_internal_rule_find_empty_slot(struct sfc_adapter *sa,
49                                       struct sfc_mae_rule **rule)
50 {
51         struct sfc_mae *mae = &sa->mae;
52         struct sfc_mae_internal_rules *internal_rules = &mae->internal_rules;
53         unsigned int entry;
54         int rc;
55
56         for (entry = 0; entry < SFC_MAE_NB_RULES_MAX; entry++) {
57                 if (internal_rules->rules[entry].spec == NULL)
58                         break;
59         }
60
61         if (entry == SFC_MAE_NB_RULES_MAX) {
62                 rc = ENOSPC;
63                 sfc_err(sa, "failed too many rules (%u rules used)", entry);
64                 goto fail_too_many_rules;
65         }
66
67         *rule = &internal_rules->rules[entry];
68
69         return 0;
70
71 fail_too_many_rules:
72         return rc;
73 }
74
75 int
76 sfc_mae_rule_add_mport_match_deliver(struct sfc_adapter *sa,
77                                      const efx_mport_sel_t *mport_match,
78                                      const efx_mport_sel_t *mport_deliver,
79                                      int prio, struct sfc_mae_rule **rulep)
80 {
81         struct sfc_mae *mae = &sa->mae;
82         struct sfc_mae_rule *rule;
83         int rc;
84
85         sfc_log_init(sa, "entry");
86
87         if (prio > 0 && (unsigned int)prio >= mae->nb_action_rule_prios_max) {
88                 rc = EINVAL;
89                 sfc_err(sa, "failed: invalid priority %d (max %u)", prio,
90                         mae->nb_action_rule_prios_max);
91                 goto fail_invalid_prio;
92         }
93         if (prio < 0)
94                 prio = mae->nb_action_rule_prios_max - 1;
95
96         rc = sfc_mae_internal_rule_find_empty_slot(sa, &rule);
97         if (rc != 0)
98                 goto fail_find_empty_slot;
99
100         sfc_log_init(sa, "init MAE match spec");
101         rc = efx_mae_match_spec_init(sa->nic, EFX_MAE_RULE_ACTION,
102                                      (uint32_t)prio, &rule->spec);
103         if (rc != 0) {
104                 sfc_err(sa, "failed to init MAE match spec");
105                 goto fail_match_init;
106         }
107
108         rc = efx_mae_match_spec_mport_set(rule->spec, mport_match, NULL);
109         if (rc != 0) {
110                 sfc_err(sa, "failed to get MAE match mport selector");
111                 goto fail_mport_set;
112         }
113
114         rc = efx_mae_action_set_spec_init(sa->nic, &rule->actions);
115         if (rc != 0) {
116                 sfc_err(sa, "failed to init MAE action set");
117                 goto fail_action_init;
118         }
119
120         rc = efx_mae_action_set_populate_deliver(rule->actions,
121                                                  mport_deliver);
122         if (rc != 0) {
123                 sfc_err(sa, "failed to populate deliver action");
124                 goto fail_populate_deliver;
125         }
126
127         rc = efx_mae_action_set_alloc(sa->nic, rule->actions,
128                                       &rule->action_set);
129         if (rc != 0) {
130                 sfc_err(sa, "failed to allocate action set");
131                 goto fail_action_set_alloc;
132         }
133
134         rc = efx_mae_action_rule_insert(sa->nic, rule->spec, NULL,
135                                         &rule->action_set,
136                                         &rule->rule_id);
137         if (rc != 0) {
138                 sfc_err(sa, "failed to insert action rule");
139                 goto fail_rule_insert;
140         }
141
142         *rulep = rule;
143
144         sfc_log_init(sa, "done");
145
146         return 0;
147
148 fail_rule_insert:
149         efx_mae_action_set_free(sa->nic, &rule->action_set);
150
151 fail_action_set_alloc:
152 fail_populate_deliver:
153         efx_mae_action_set_spec_fini(sa->nic, rule->actions);
154
155 fail_action_init:
156 fail_mport_set:
157         efx_mae_match_spec_fini(sa->nic, rule->spec);
158
159 fail_match_init:
160 fail_find_empty_slot:
161 fail_invalid_prio:
162         sfc_log_init(sa, "failed: %s", rte_strerror(rc));
163         return rc;
164 }
165
166 void
167 sfc_mae_rule_del(struct sfc_adapter *sa, struct sfc_mae_rule *rule)
168 {
169         if (rule == NULL || rule->spec == NULL)
170                 return;
171
172         efx_mae_action_rule_remove(sa->nic, &rule->rule_id);
173         efx_mae_action_set_free(sa->nic, &rule->action_set);
174         efx_mae_action_set_spec_fini(sa->nic, rule->actions);
175         efx_mae_match_spec_fini(sa->nic, rule->spec);
176
177         rule->spec = NULL;
178 }
179
180 int
181 sfc_mae_attach(struct sfc_adapter *sa)
182 {
183         struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
184         struct sfc_mae_switch_port_request switch_port_request = {0};
185         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
186         efx_mport_sel_t entity_mport;
187         struct sfc_mae *mae = &sa->mae;
188         struct sfc_mae_bounce_eh *bounce_eh = &mae->bounce_eh;
189         efx_mae_limits_t limits;
190         int rc;
191
192         sfc_log_init(sa, "entry");
193
194         if (!encp->enc_mae_supported) {
195                 mae->status = SFC_MAE_STATUS_UNSUPPORTED;
196                 return 0;
197         }
198
199         sfc_log_init(sa, "init MAE");
200         rc = efx_mae_init(sa->nic);
201         if (rc != 0)
202                 goto fail_mae_init;
203
204         sfc_log_init(sa, "get MAE limits");
205         rc = efx_mae_get_limits(sa->nic, &limits);
206         if (rc != 0)
207                 goto fail_mae_get_limits;
208
209         sfc_log_init(sa, "init MAE counter registry");
210         rc = sfc_mae_counter_registry_init(&mae->counter_registry,
211                                            limits.eml_max_n_counters);
212         if (rc != 0) {
213                 sfc_err(sa, "failed to init MAE counters registry for %u entries: %s",
214                         limits.eml_max_n_counters, rte_strerror(rc));
215                 goto fail_counter_registry_init;
216         }
217
218         sfc_log_init(sa, "assign entity MPORT");
219         rc = sfc_mae_assign_entity_mport(sa, &entity_mport);
220         if (rc != 0)
221                 goto fail_mae_assign_entity_mport;
222
223         sfc_log_init(sa, "assign RTE switch domain");
224         rc = sfc_mae_assign_switch_domain(sa, &mae->switch_domain_id);
225         if (rc != 0)
226                 goto fail_mae_assign_switch_domain;
227
228         sfc_log_init(sa, "assign RTE switch port");
229         switch_port_request.type = SFC_MAE_SWITCH_PORT_INDEPENDENT;
230         switch_port_request.entity_mportp = &entity_mport;
231         /* RTE ethdev MPORT matches that of the entity for independent ports. */
232         switch_port_request.ethdev_mportp = &entity_mport;
233         switch_port_request.ethdev_port_id = sas->port_id;
234         rc = sfc_mae_assign_switch_port(mae->switch_domain_id,
235                                         &switch_port_request,
236                                         &mae->switch_port_id);
237         if (rc != 0)
238                 goto fail_mae_assign_switch_port;
239
240         sfc_log_init(sa, "allocate encap. header bounce buffer");
241         bounce_eh->buf_size = limits.eml_encap_header_size_limit;
242         bounce_eh->buf = rte_malloc("sfc_mae_bounce_eh",
243                                     bounce_eh->buf_size, 0);
244         if (bounce_eh->buf == NULL)
245                 goto fail_mae_alloc_bounce_eh;
246
247         mae->status = SFC_MAE_STATUS_SUPPORTED;
248         mae->nb_outer_rule_prios_max = limits.eml_max_n_outer_prios;
249         mae->nb_action_rule_prios_max = limits.eml_max_n_action_prios;
250         mae->encap_types_supported = limits.eml_encap_types_supported;
251         TAILQ_INIT(&mae->outer_rules);
252         TAILQ_INIT(&mae->encap_headers);
253         TAILQ_INIT(&mae->action_sets);
254
255         sfc_log_init(sa, "done");
256
257         return 0;
258
259 fail_mae_alloc_bounce_eh:
260 fail_mae_assign_switch_port:
261 fail_mae_assign_switch_domain:
262 fail_mae_assign_entity_mport:
263         sfc_mae_counter_registry_fini(&mae->counter_registry);
264
265 fail_counter_registry_init:
266 fail_mae_get_limits:
267         efx_mae_fini(sa->nic);
268
269 fail_mae_init:
270         sfc_log_init(sa, "failed %d", rc);
271
272         return rc;
273 }
274
275 void
276 sfc_mae_detach(struct sfc_adapter *sa)
277 {
278         struct sfc_mae *mae = &sa->mae;
279         enum sfc_mae_status status_prev = mae->status;
280
281         sfc_log_init(sa, "entry");
282
283         mae->nb_action_rule_prios_max = 0;
284         mae->status = SFC_MAE_STATUS_UNKNOWN;
285
286         if (status_prev != SFC_MAE_STATUS_SUPPORTED)
287                 return;
288
289         rte_free(mae->bounce_eh.buf);
290         sfc_mae_counter_registry_fini(&mae->counter_registry);
291
292         efx_mae_fini(sa->nic);
293
294         sfc_log_init(sa, "done");
295 }
296
297 static struct sfc_mae_outer_rule *
298 sfc_mae_outer_rule_attach(struct sfc_adapter *sa,
299                           const efx_mae_match_spec_t *match_spec,
300                           efx_tunnel_protocol_t encap_type)
301 {
302         struct sfc_mae_outer_rule *rule;
303         struct sfc_mae *mae = &sa->mae;
304
305         SFC_ASSERT(sfc_adapter_is_locked(sa));
306
307         TAILQ_FOREACH(rule, &mae->outer_rules, entries) {
308                 if (efx_mae_match_specs_equal(rule->match_spec, match_spec) &&
309                     rule->encap_type == encap_type) {
310                         sfc_dbg(sa, "attaching to outer_rule=%p", rule);
311                         ++(rule->refcnt);
312                         return rule;
313                 }
314         }
315
316         return NULL;
317 }
318
319 static int
320 sfc_mae_outer_rule_add(struct sfc_adapter *sa,
321                        efx_mae_match_spec_t *match_spec,
322                        efx_tunnel_protocol_t encap_type,
323                        struct sfc_mae_outer_rule **rulep)
324 {
325         struct sfc_mae_outer_rule *rule;
326         struct sfc_mae *mae = &sa->mae;
327
328         SFC_ASSERT(sfc_adapter_is_locked(sa));
329
330         rule = rte_zmalloc("sfc_mae_outer_rule", sizeof(*rule), 0);
331         if (rule == NULL)
332                 return ENOMEM;
333
334         rule->refcnt = 1;
335         rule->match_spec = match_spec;
336         rule->encap_type = encap_type;
337
338         rule->fw_rsrc.rule_id.id = EFX_MAE_RSRC_ID_INVALID;
339
340         TAILQ_INSERT_TAIL(&mae->outer_rules, rule, entries);
341
342         *rulep = rule;
343
344         sfc_dbg(sa, "added outer_rule=%p", rule);
345
346         return 0;
347 }
348
349 static void
350 sfc_mae_outer_rule_del(struct sfc_adapter *sa,
351                        struct sfc_mae_outer_rule *rule)
352 {
353         struct sfc_mae *mae = &sa->mae;
354
355         SFC_ASSERT(sfc_adapter_is_locked(sa));
356         SFC_ASSERT(rule->refcnt != 0);
357
358         --(rule->refcnt);
359
360         if (rule->refcnt != 0)
361                 return;
362
363         if (rule->fw_rsrc.rule_id.id != EFX_MAE_RSRC_ID_INVALID ||
364             rule->fw_rsrc.refcnt != 0) {
365                 sfc_err(sa, "deleting outer_rule=%p abandons its FW resource: OR_ID=0x%08x, refcnt=%u",
366                         rule, rule->fw_rsrc.rule_id.id, rule->fw_rsrc.refcnt);
367         }
368
369         efx_mae_match_spec_fini(sa->nic, rule->match_spec);
370
371         TAILQ_REMOVE(&mae->outer_rules, rule, entries);
372         rte_free(rule);
373
374         sfc_dbg(sa, "deleted outer_rule=%p", rule);
375 }
376
377 static int
378 sfc_mae_outer_rule_enable(struct sfc_adapter *sa,
379                           struct sfc_mae_outer_rule *rule,
380                           efx_mae_match_spec_t *match_spec_action)
381 {
382         struct sfc_mae_fw_rsrc *fw_rsrc = &rule->fw_rsrc;
383         int rc;
384
385         SFC_ASSERT(sfc_adapter_is_locked(sa));
386
387         if (fw_rsrc->refcnt == 0) {
388                 SFC_ASSERT(fw_rsrc->rule_id.id == EFX_MAE_RSRC_ID_INVALID);
389                 SFC_ASSERT(rule->match_spec != NULL);
390
391                 rc = efx_mae_outer_rule_insert(sa->nic, rule->match_spec,
392                                                rule->encap_type,
393                                                &fw_rsrc->rule_id);
394                 if (rc != 0) {
395                         sfc_err(sa, "failed to enable outer_rule=%p: %s",
396                                 rule, strerror(rc));
397                         return rc;
398                 }
399         }
400
401         rc = efx_mae_match_spec_outer_rule_id_set(match_spec_action,
402                                                   &fw_rsrc->rule_id);
403         if (rc != 0) {
404                 if (fw_rsrc->refcnt == 0) {
405                         (void)efx_mae_outer_rule_remove(sa->nic,
406                                                         &fw_rsrc->rule_id);
407                         fw_rsrc->rule_id.id = EFX_MAE_RSRC_ID_INVALID;
408                 }
409
410                 sfc_err(sa, "can't match on outer rule ID: %s", strerror(rc));
411
412                 return rc;
413         }
414
415         if (fw_rsrc->refcnt == 0) {
416                 sfc_dbg(sa, "enabled outer_rule=%p: OR_ID=0x%08x",
417                         rule, fw_rsrc->rule_id.id);
418         }
419
420         ++(fw_rsrc->refcnt);
421
422         return 0;
423 }
424
425 static void
426 sfc_mae_outer_rule_disable(struct sfc_adapter *sa,
427                            struct sfc_mae_outer_rule *rule)
428 {
429         struct sfc_mae_fw_rsrc *fw_rsrc = &rule->fw_rsrc;
430         int rc;
431
432         SFC_ASSERT(sfc_adapter_is_locked(sa));
433
434         if (fw_rsrc->rule_id.id == EFX_MAE_RSRC_ID_INVALID ||
435             fw_rsrc->refcnt == 0) {
436                 sfc_err(sa, "failed to disable outer_rule=%p: already disabled; OR_ID=0x%08x, refcnt=%u",
437                         rule, fw_rsrc->rule_id.id, fw_rsrc->refcnt);
438                 return;
439         }
440
441         if (fw_rsrc->refcnt == 1) {
442                 rc = efx_mae_outer_rule_remove(sa->nic, &fw_rsrc->rule_id);
443                 if (rc == 0) {
444                         sfc_dbg(sa, "disabled outer_rule=%p with OR_ID=0x%08x",
445                                 rule, fw_rsrc->rule_id.id);
446                 } else {
447                         sfc_err(sa, "failed to disable outer_rule=%p with OR_ID=0x%08x: %s",
448                                 rule, fw_rsrc->rule_id.id, strerror(rc));
449                 }
450                 fw_rsrc->rule_id.id = EFX_MAE_RSRC_ID_INVALID;
451         }
452
453         --(fw_rsrc->refcnt);
454 }
455
456 static struct sfc_mae_encap_header *
457 sfc_mae_encap_header_attach(struct sfc_adapter *sa,
458                             const struct sfc_mae_bounce_eh *bounce_eh)
459 {
460         struct sfc_mae_encap_header *encap_header;
461         struct sfc_mae *mae = &sa->mae;
462
463         SFC_ASSERT(sfc_adapter_is_locked(sa));
464
465         TAILQ_FOREACH(encap_header, &mae->encap_headers, entries) {
466                 if (encap_header->size == bounce_eh->size &&
467                     memcmp(encap_header->buf, bounce_eh->buf,
468                            bounce_eh->size) == 0) {
469                         sfc_dbg(sa, "attaching to encap_header=%p",
470                                 encap_header);
471                         ++(encap_header->refcnt);
472                         return encap_header;
473                 }
474         }
475
476         return NULL;
477 }
478
479 static int
480 sfc_mae_encap_header_add(struct sfc_adapter *sa,
481                          const struct sfc_mae_bounce_eh *bounce_eh,
482                          struct sfc_mae_encap_header **encap_headerp)
483 {
484         struct sfc_mae_encap_header *encap_header;
485         struct sfc_mae *mae = &sa->mae;
486
487         SFC_ASSERT(sfc_adapter_is_locked(sa));
488
489         encap_header = rte_zmalloc("sfc_mae_encap_header",
490                                    sizeof(*encap_header), 0);
491         if (encap_header == NULL)
492                 return ENOMEM;
493
494         encap_header->size = bounce_eh->size;
495
496         encap_header->buf = rte_malloc("sfc_mae_encap_header_buf",
497                                        encap_header->size, 0);
498         if (encap_header->buf == NULL) {
499                 rte_free(encap_header);
500                 return ENOMEM;
501         }
502
503         rte_memcpy(encap_header->buf, bounce_eh->buf, bounce_eh->size);
504
505         encap_header->refcnt = 1;
506         encap_header->type = bounce_eh->type;
507         encap_header->fw_rsrc.eh_id.id = EFX_MAE_RSRC_ID_INVALID;
508
509         TAILQ_INSERT_TAIL(&mae->encap_headers, encap_header, entries);
510
511         *encap_headerp = encap_header;
512
513         sfc_dbg(sa, "added encap_header=%p", encap_header);
514
515         return 0;
516 }
517
518 static void
519 sfc_mae_encap_header_del(struct sfc_adapter *sa,
520                        struct sfc_mae_encap_header *encap_header)
521 {
522         struct sfc_mae *mae = &sa->mae;
523
524         if (encap_header == NULL)
525                 return;
526
527         SFC_ASSERT(sfc_adapter_is_locked(sa));
528         SFC_ASSERT(encap_header->refcnt != 0);
529
530         --(encap_header->refcnt);
531
532         if (encap_header->refcnt != 0)
533                 return;
534
535         if (encap_header->fw_rsrc.eh_id.id != EFX_MAE_RSRC_ID_INVALID ||
536             encap_header->fw_rsrc.refcnt != 0) {
537                 sfc_err(sa, "deleting encap_header=%p abandons its FW resource: EH_ID=0x%08x, refcnt=%u",
538                         encap_header, encap_header->fw_rsrc.eh_id.id,
539                         encap_header->fw_rsrc.refcnt);
540         }
541
542         TAILQ_REMOVE(&mae->encap_headers, encap_header, entries);
543         rte_free(encap_header->buf);
544         rte_free(encap_header);
545
546         sfc_dbg(sa, "deleted encap_header=%p", encap_header);
547 }
548
549 static int
550 sfc_mae_encap_header_enable(struct sfc_adapter *sa,
551                             struct sfc_mae_encap_header *encap_header,
552                             efx_mae_actions_t *action_set_spec)
553 {
554         struct sfc_mae_fw_rsrc *fw_rsrc;
555         int rc;
556
557         if (encap_header == NULL)
558                 return 0;
559
560         SFC_ASSERT(sfc_adapter_is_locked(sa));
561
562         fw_rsrc = &encap_header->fw_rsrc;
563
564         if (fw_rsrc->refcnt == 0) {
565                 SFC_ASSERT(fw_rsrc->eh_id.id == EFX_MAE_RSRC_ID_INVALID);
566                 SFC_ASSERT(encap_header->buf != NULL);
567                 SFC_ASSERT(encap_header->size != 0);
568
569                 rc = efx_mae_encap_header_alloc(sa->nic, encap_header->type,
570                                                 encap_header->buf,
571                                                 encap_header->size,
572                                                 &fw_rsrc->eh_id);
573                 if (rc != 0) {
574                         sfc_err(sa, "failed to enable encap_header=%p: %s",
575                                 encap_header, strerror(rc));
576                         return rc;
577                 }
578         }
579
580         rc = efx_mae_action_set_fill_in_eh_id(action_set_spec,
581                                               &fw_rsrc->eh_id);
582         if (rc != 0) {
583                 if (fw_rsrc->refcnt == 0) {
584                         (void)efx_mae_encap_header_free(sa->nic,
585                                                         &fw_rsrc->eh_id);
586                         fw_rsrc->eh_id.id = EFX_MAE_RSRC_ID_INVALID;
587                 }
588
589                 sfc_err(sa, "can't fill in encap. header ID: %s", strerror(rc));
590
591                 return rc;
592         }
593
594         if (fw_rsrc->refcnt == 0) {
595                 sfc_dbg(sa, "enabled encap_header=%p: EH_ID=0x%08x",
596                         encap_header, fw_rsrc->eh_id.id);
597         }
598
599         ++(fw_rsrc->refcnt);
600
601         return 0;
602 }
603
604 static void
605 sfc_mae_encap_header_disable(struct sfc_adapter *sa,
606                              struct sfc_mae_encap_header *encap_header)
607 {
608         struct sfc_mae_fw_rsrc *fw_rsrc;
609         int rc;
610
611         if (encap_header == NULL)
612                 return;
613
614         SFC_ASSERT(sfc_adapter_is_locked(sa));
615
616         fw_rsrc = &encap_header->fw_rsrc;
617
618         if (fw_rsrc->eh_id.id == EFX_MAE_RSRC_ID_INVALID ||
619             fw_rsrc->refcnt == 0) {
620                 sfc_err(sa, "failed to disable encap_header=%p: already disabled; EH_ID=0x%08x, refcnt=%u",
621                         encap_header, fw_rsrc->eh_id.id, fw_rsrc->refcnt);
622                 return;
623         }
624
625         if (fw_rsrc->refcnt == 1) {
626                 rc = efx_mae_encap_header_free(sa->nic, &fw_rsrc->eh_id);
627                 if (rc == 0) {
628                         sfc_dbg(sa, "disabled encap_header=%p with EH_ID=0x%08x",
629                                 encap_header, fw_rsrc->eh_id.id);
630                 } else {
631                         sfc_err(sa, "failed to disable encap_header=%p with EH_ID=0x%08x: %s",
632                                 encap_header, fw_rsrc->eh_id.id, strerror(rc));
633                 }
634                 fw_rsrc->eh_id.id = EFX_MAE_RSRC_ID_INVALID;
635         }
636
637         --(fw_rsrc->refcnt);
638 }
639
640 static int
641 sfc_mae_counters_enable(struct sfc_adapter *sa,
642                         struct sfc_mae_counter_id *counters,
643                         unsigned int n_counters,
644                         efx_mae_actions_t *action_set_spec)
645 {
646         int rc;
647
648         sfc_log_init(sa, "entry");
649
650         if (n_counters == 0) {
651                 sfc_log_init(sa, "no counters - skip");
652                 return 0;
653         }
654
655         SFC_ASSERT(sfc_adapter_is_locked(sa));
656         SFC_ASSERT(n_counters == 1);
657
658         rc = sfc_mae_counter_enable(sa, &counters[0]);
659         if (rc != 0) {
660                 sfc_err(sa, "failed to enable MAE counter %u: %s",
661                         counters[0].mae_id.id, rte_strerror(rc));
662                 goto fail_counter_add;
663         }
664
665         rc = efx_mae_action_set_fill_in_counter_id(action_set_spec,
666                                                    &counters[0].mae_id);
667         if (rc != 0) {
668                 sfc_err(sa, "failed to fill in MAE counter %u in action set: %s",
669                         counters[0].mae_id.id, rte_strerror(rc));
670                 goto fail_fill_in_id;
671         }
672
673         return 0;
674
675 fail_fill_in_id:
676         (void)sfc_mae_counter_disable(sa, &counters[0]);
677
678 fail_counter_add:
679         sfc_log_init(sa, "failed: %s", rte_strerror(rc));
680         return rc;
681 }
682
683 static int
684 sfc_mae_counters_disable(struct sfc_adapter *sa,
685                          struct sfc_mae_counter_id *counters,
686                          unsigned int n_counters)
687 {
688         if (n_counters == 0)
689                 return 0;
690
691         SFC_ASSERT(sfc_adapter_is_locked(sa));
692         SFC_ASSERT(n_counters == 1);
693
694         if (counters[0].mae_id.id == EFX_MAE_RSRC_ID_INVALID) {
695                 sfc_err(sa, "failed to disable: already disabled");
696                 return EALREADY;
697         }
698
699         return sfc_mae_counter_disable(sa, &counters[0]);
700 }
701
702 static struct sfc_mae_action_set *
703 sfc_mae_action_set_attach(struct sfc_adapter *sa,
704                           const struct sfc_mae_encap_header *encap_header,
705                           unsigned int n_count,
706                           const efx_mae_actions_t *spec)
707 {
708         struct sfc_mae_action_set *action_set;
709         struct sfc_mae *mae = &sa->mae;
710
711         SFC_ASSERT(sfc_adapter_is_locked(sa));
712
713         TAILQ_FOREACH(action_set, &mae->action_sets, entries) {
714                 /*
715                  * Shared counters are not supported, hence action sets with
716                  * COUNT are not attachable.
717                  */
718                 if (action_set->encap_header == encap_header &&
719                     n_count == 0 &&
720                     efx_mae_action_set_specs_equal(action_set->spec, spec)) {
721                         sfc_dbg(sa, "attaching to action_set=%p", action_set);
722                         ++(action_set->refcnt);
723                         return action_set;
724                 }
725         }
726
727         return NULL;
728 }
729
730 static int
731 sfc_mae_action_set_add(struct sfc_adapter *sa,
732                        const struct rte_flow_action actions[],
733                        efx_mae_actions_t *spec,
734                        struct sfc_mae_encap_header *encap_header,
735                        unsigned int n_counters,
736                        struct sfc_mae_action_set **action_setp)
737 {
738         struct sfc_mae_action_set *action_set;
739         struct sfc_mae *mae = &sa->mae;
740         unsigned int i;
741
742         SFC_ASSERT(sfc_adapter_is_locked(sa));
743
744         action_set = rte_zmalloc("sfc_mae_action_set", sizeof(*action_set), 0);
745         if (action_set == NULL) {
746                 sfc_err(sa, "failed to alloc action set");
747                 return ENOMEM;
748         }
749
750         if (n_counters > 0) {
751                 const struct rte_flow_action *action;
752
753                 action_set->counters = rte_malloc("sfc_mae_counter_ids",
754                         sizeof(action_set->counters[0]) * n_counters, 0);
755                 if (action_set->counters == NULL) {
756                         rte_free(action_set);
757                         sfc_err(sa, "failed to alloc counters");
758                         return ENOMEM;
759                 }
760
761                 for (action = actions, i = 0;
762                      action->type != RTE_FLOW_ACTION_TYPE_END && i < n_counters;
763                      ++action) {
764                         const struct rte_flow_action_count *conf;
765
766                         if (action->type != RTE_FLOW_ACTION_TYPE_COUNT)
767                                 continue;
768
769                         conf = action->conf;
770
771                         action_set->counters[i].mae_id.id =
772                                 EFX_MAE_RSRC_ID_INVALID;
773                         action_set->counters[i].rte_id = conf->id;
774                         i++;
775                 }
776                 action_set->n_counters = n_counters;
777         }
778
779         action_set->refcnt = 1;
780         action_set->spec = spec;
781         action_set->encap_header = encap_header;
782
783         action_set->fw_rsrc.aset_id.id = EFX_MAE_RSRC_ID_INVALID;
784
785         TAILQ_INSERT_TAIL(&mae->action_sets, action_set, entries);
786
787         *action_setp = action_set;
788
789         sfc_dbg(sa, "added action_set=%p", action_set);
790
791         return 0;
792 }
793
794 static void
795 sfc_mae_action_set_del(struct sfc_adapter *sa,
796                        struct sfc_mae_action_set *action_set)
797 {
798         struct sfc_mae *mae = &sa->mae;
799
800         SFC_ASSERT(sfc_adapter_is_locked(sa));
801         SFC_ASSERT(action_set->refcnt != 0);
802
803         --(action_set->refcnt);
804
805         if (action_set->refcnt != 0)
806                 return;
807
808         if (action_set->fw_rsrc.aset_id.id != EFX_MAE_RSRC_ID_INVALID ||
809             action_set->fw_rsrc.refcnt != 0) {
810                 sfc_err(sa, "deleting action_set=%p abandons its FW resource: AS_ID=0x%08x, refcnt=%u",
811                         action_set, action_set->fw_rsrc.aset_id.id,
812                         action_set->fw_rsrc.refcnt);
813         }
814
815         efx_mae_action_set_spec_fini(sa->nic, action_set->spec);
816         sfc_mae_encap_header_del(sa, action_set->encap_header);
817         if (action_set->n_counters > 0) {
818                 SFC_ASSERT(action_set->n_counters == 1);
819                 SFC_ASSERT(action_set->counters[0].mae_id.id ==
820                            EFX_MAE_RSRC_ID_INVALID);
821                 rte_free(action_set->counters);
822         }
823         TAILQ_REMOVE(&mae->action_sets, action_set, entries);
824         rte_free(action_set);
825
826         sfc_dbg(sa, "deleted action_set=%p", action_set);
827 }
828
829 static int
830 sfc_mae_action_set_enable(struct sfc_adapter *sa,
831                           struct sfc_mae_action_set *action_set)
832 {
833         struct sfc_mae_encap_header *encap_header = action_set->encap_header;
834         struct sfc_mae_counter_id *counters = action_set->counters;
835         struct sfc_mae_fw_rsrc *fw_rsrc = &action_set->fw_rsrc;
836         int rc;
837
838         SFC_ASSERT(sfc_adapter_is_locked(sa));
839
840         if (fw_rsrc->refcnt == 0) {
841                 SFC_ASSERT(fw_rsrc->aset_id.id == EFX_MAE_RSRC_ID_INVALID);
842                 SFC_ASSERT(action_set->spec != NULL);
843
844                 rc = sfc_mae_encap_header_enable(sa, encap_header,
845                                                  action_set->spec);
846                 if (rc != 0)
847                         return rc;
848
849                 rc = sfc_mae_counters_enable(sa, counters,
850                                              action_set->n_counters,
851                                              action_set->spec);
852                 if (rc != 0) {
853                         sfc_err(sa, "failed to enable %u MAE counters: %s",
854                                 action_set->n_counters, rte_strerror(rc));
855
856                         sfc_mae_encap_header_disable(sa, encap_header);
857                         return rc;
858                 }
859
860                 rc = efx_mae_action_set_alloc(sa->nic, action_set->spec,
861                                               &fw_rsrc->aset_id);
862                 if (rc != 0) {
863                         sfc_err(sa, "failed to enable action_set=%p: %s",
864                                 action_set, strerror(rc));
865
866                         (void)sfc_mae_counters_disable(sa, counters,
867                                                        action_set->n_counters);
868                         sfc_mae_encap_header_disable(sa, encap_header);
869                         return rc;
870                 }
871
872                 sfc_dbg(sa, "enabled action_set=%p: AS_ID=0x%08x",
873                         action_set, fw_rsrc->aset_id.id);
874         }
875
876         ++(fw_rsrc->refcnt);
877
878         return 0;
879 }
880
881 static void
882 sfc_mae_action_set_disable(struct sfc_adapter *sa,
883                            struct sfc_mae_action_set *action_set)
884 {
885         struct sfc_mae_fw_rsrc *fw_rsrc = &action_set->fw_rsrc;
886         int rc;
887
888         SFC_ASSERT(sfc_adapter_is_locked(sa));
889
890         if (fw_rsrc->aset_id.id == EFX_MAE_RSRC_ID_INVALID ||
891             fw_rsrc->refcnt == 0) {
892                 sfc_err(sa, "failed to disable action_set=%p: already disabled; AS_ID=0x%08x, refcnt=%u",
893                         action_set, fw_rsrc->aset_id.id, fw_rsrc->refcnt);
894                 return;
895         }
896
897         if (fw_rsrc->refcnt == 1) {
898                 rc = efx_mae_action_set_free(sa->nic, &fw_rsrc->aset_id);
899                 if (rc == 0) {
900                         sfc_dbg(sa, "disabled action_set=%p with AS_ID=0x%08x",
901                                 action_set, fw_rsrc->aset_id.id);
902                 } else {
903                         sfc_err(sa, "failed to disable action_set=%p with AS_ID=0x%08x: %s",
904                                 action_set, fw_rsrc->aset_id.id, strerror(rc));
905                 }
906                 fw_rsrc->aset_id.id = EFX_MAE_RSRC_ID_INVALID;
907
908                 rc = sfc_mae_counters_disable(sa, action_set->counters,
909                                               action_set->n_counters);
910                 if (rc != 0) {
911                         sfc_err(sa, "failed to disable %u MAE counters: %s",
912                                 action_set->n_counters, rte_strerror(rc));
913                 }
914
915                 sfc_mae_encap_header_disable(sa, action_set->encap_header);
916         }
917
918         --(fw_rsrc->refcnt);
919 }
920
921 void
922 sfc_mae_flow_cleanup(struct sfc_adapter *sa,
923                      struct rte_flow *flow)
924 {
925         struct sfc_flow_spec *spec;
926         struct sfc_flow_spec_mae *spec_mae;
927
928         if (flow == NULL)
929                 return;
930
931         spec = &flow->spec;
932
933         if (spec == NULL)
934                 return;
935
936         spec_mae = &spec->mae;
937
938         SFC_ASSERT(spec_mae->rule_id.id == EFX_MAE_RSRC_ID_INVALID);
939
940         if (spec_mae->outer_rule != NULL)
941                 sfc_mae_outer_rule_del(sa, spec_mae->outer_rule);
942
943         if (spec_mae->action_set != NULL)
944                 sfc_mae_action_set_del(sa, spec_mae->action_set);
945
946         if (spec_mae->match_spec != NULL)
947                 efx_mae_match_spec_fini(sa->nic, spec_mae->match_spec);
948 }
949
950 static int
951 sfc_mae_set_ethertypes(struct sfc_mae_parse_ctx *ctx)
952 {
953         struct sfc_mae_pattern_data *pdata = &ctx->pattern_data;
954         const efx_mae_field_id_t *fremap = ctx->field_ids_remap;
955         const efx_mae_field_id_t field_ids[] = {
956                 EFX_MAE_FIELD_VLAN0_PROTO_BE,
957                 EFX_MAE_FIELD_VLAN1_PROTO_BE,
958         };
959         const struct sfc_mae_ethertype *et;
960         unsigned int i;
961         int rc;
962
963         /*
964          * In accordance with RTE flow API convention, the innermost L2
965          * item's "type" ("inner_type") is a L3 EtherType. If there is
966          * no L3 item, it's 0x0000/0x0000.
967          */
968         et = &pdata->ethertypes[pdata->nb_vlan_tags];
969         rc = efx_mae_match_spec_field_set(ctx->match_spec,
970                                           fremap[EFX_MAE_FIELD_ETHER_TYPE_BE],
971                                           sizeof(et->value),
972                                           (const uint8_t *)&et->value,
973                                           sizeof(et->mask),
974                                           (const uint8_t *)&et->mask);
975         if (rc != 0)
976                 return rc;
977
978         /*
979          * sfc_mae_rule_parse_item_vlan() has already made sure
980          * that pdata->nb_vlan_tags does not exceed this figure.
981          */
982         RTE_BUILD_BUG_ON(SFC_MAE_MATCH_VLAN_MAX_NTAGS != 2);
983
984         for (i = 0; i < pdata->nb_vlan_tags; ++i) {
985                 et = &pdata->ethertypes[i];
986
987                 rc = efx_mae_match_spec_field_set(ctx->match_spec,
988                                                   fremap[field_ids[i]],
989                                                   sizeof(et->value),
990                                                   (const uint8_t *)&et->value,
991                                                   sizeof(et->mask),
992                                                   (const uint8_t *)&et->mask);
993                 if (rc != 0)
994                         return rc;
995         }
996
997         return 0;
998 }
999
1000 static int
1001 sfc_mae_rule_process_pattern_data(struct sfc_mae_parse_ctx *ctx,
1002                                   struct rte_flow_error *error)
1003 {
1004         const efx_mae_field_id_t *fremap = ctx->field_ids_remap;
1005         struct sfc_mae_pattern_data *pdata = &ctx->pattern_data;
1006         struct sfc_mae_ethertype *ethertypes = pdata->ethertypes;
1007         const rte_be16_t supported_tpids[] = {
1008                 /* VLAN standard TPID (always the first element) */
1009                 RTE_BE16(RTE_ETHER_TYPE_VLAN),
1010
1011                 /* Double-tagging TPIDs */
1012                 RTE_BE16(RTE_ETHER_TYPE_QINQ),
1013                 RTE_BE16(RTE_ETHER_TYPE_QINQ1),
1014                 RTE_BE16(RTE_ETHER_TYPE_QINQ2),
1015                 RTE_BE16(RTE_ETHER_TYPE_QINQ3),
1016         };
1017         bool enforce_tag_presence[SFC_MAE_MATCH_VLAN_MAX_NTAGS] = {0};
1018         unsigned int nb_supported_tpids = RTE_DIM(supported_tpids);
1019         unsigned int ethertype_idx;
1020         const uint8_t *valuep;
1021         const uint8_t *maskp;
1022         int rc;
1023
1024         if (pdata->innermost_ethertype_restriction.mask != 0 &&
1025             pdata->nb_vlan_tags < SFC_MAE_MATCH_VLAN_MAX_NTAGS) {
1026                 /*
1027                  * If a single item VLAN is followed by a L3 item, value
1028                  * of "type" in item ETH can't be a double-tagging TPID.
1029                  */
1030                 nb_supported_tpids = 1;
1031         }
1032
1033         /*
1034          * sfc_mae_rule_parse_item_vlan() has already made sure
1035          * that pdata->nb_vlan_tags does not exceed this figure.
1036          */
1037         RTE_BUILD_BUG_ON(SFC_MAE_MATCH_VLAN_MAX_NTAGS != 2);
1038
1039         for (ethertype_idx = 0;
1040              ethertype_idx < pdata->nb_vlan_tags; ++ethertype_idx) {
1041                 rte_be16_t tpid_v = ethertypes[ethertype_idx].value;
1042                 rte_be16_t tpid_m = ethertypes[ethertype_idx].mask;
1043                 unsigned int tpid_idx;
1044
1045                 /*
1046                  * This loop can have only two iterations. On the second one,
1047                  * drop outer tag presence enforcement bit because the inner
1048                  * tag presence automatically assumes that for the outer tag.
1049                  */
1050                 enforce_tag_presence[0] = B_FALSE;
1051
1052                 if (tpid_m == RTE_BE16(0)) {
1053                         if (pdata->tci_masks[ethertype_idx] == RTE_BE16(0))
1054                                 enforce_tag_presence[ethertype_idx] = B_TRUE;
1055
1056                         /* No match on this field, and no value check. */
1057                         nb_supported_tpids = 1;
1058                         continue;
1059                 }
1060
1061                 /* Exact match is supported only. */
1062                 if (tpid_m != RTE_BE16(0xffff)) {
1063                         sfc_err(ctx->sa, "TPID mask must be 0x0 or 0xffff; got 0x%04x",
1064                                 rte_be_to_cpu_16(tpid_m));
1065                         rc = EINVAL;
1066                         goto fail;
1067                 }
1068
1069                 for (tpid_idx = pdata->nb_vlan_tags - ethertype_idx - 1;
1070                      tpid_idx < nb_supported_tpids; ++tpid_idx) {
1071                         if (tpid_v == supported_tpids[tpid_idx])
1072                                 break;
1073                 }
1074
1075                 if (tpid_idx == nb_supported_tpids) {
1076                         sfc_err(ctx->sa, "TPID 0x%04x is unsupported",
1077                                 rte_be_to_cpu_16(tpid_v));
1078                         rc = EINVAL;
1079                         goto fail;
1080                 }
1081
1082                 nb_supported_tpids = 1;
1083         }
1084
1085         if (pdata->innermost_ethertype_restriction.mask == RTE_BE16(0xffff)) {
1086                 struct sfc_mae_ethertype *et = &ethertypes[ethertype_idx];
1087                 rte_be16_t enforced_et;
1088
1089                 enforced_et = pdata->innermost_ethertype_restriction.value;
1090
1091                 if (et->mask == 0) {
1092                         et->mask = RTE_BE16(0xffff);
1093                         et->value = enforced_et;
1094                 } else if (et->mask != RTE_BE16(0xffff) ||
1095                            et->value != enforced_et) {
1096                         sfc_err(ctx->sa, "L3 EtherType must be 0x0/0x0 or 0x%04x/0xffff; got 0x%04x/0x%04x",
1097                                 rte_be_to_cpu_16(enforced_et),
1098                                 rte_be_to_cpu_16(et->value),
1099                                 rte_be_to_cpu_16(et->mask));
1100                         rc = EINVAL;
1101                         goto fail;
1102                 }
1103         }
1104
1105         /*
1106          * Now, when the number of VLAN tags is known, set fields
1107          * ETHER_TYPE, VLAN0_PROTO and VLAN1_PROTO so that the first
1108          * one is either a valid L3 EtherType (or 0x0000/0x0000),
1109          * and the last two are valid TPIDs (or 0x0000/0x0000).
1110          */
1111         rc = sfc_mae_set_ethertypes(ctx);
1112         if (rc != 0)
1113                 goto fail;
1114
1115         if (pdata->l3_next_proto_restriction_mask == 0xff) {
1116                 if (pdata->l3_next_proto_mask == 0) {
1117                         pdata->l3_next_proto_mask = 0xff;
1118                         pdata->l3_next_proto_value =
1119                                 pdata->l3_next_proto_restriction_value;
1120                 } else if (pdata->l3_next_proto_mask != 0xff ||
1121                            pdata->l3_next_proto_value !=
1122                            pdata->l3_next_proto_restriction_value) {
1123                         sfc_err(ctx->sa, "L3 next protocol must be 0x0/0x0 or 0x%02x/0xff; got 0x%02x/0x%02x",
1124                                 pdata->l3_next_proto_restriction_value,
1125                                 pdata->l3_next_proto_value,
1126                                 pdata->l3_next_proto_mask);
1127                         rc = EINVAL;
1128                         goto fail;
1129                 }
1130         }
1131
1132         if (enforce_tag_presence[0] || pdata->has_ovlan_mask) {
1133                 rc = efx_mae_match_spec_bit_set(ctx->match_spec,
1134                                                 fremap[EFX_MAE_FIELD_HAS_OVLAN],
1135                                                 enforce_tag_presence[0] ||
1136                                                 pdata->has_ovlan_value);
1137                 if (rc != 0)
1138                         goto fail;
1139         }
1140
1141         if (enforce_tag_presence[1] || pdata->has_ivlan_mask) {
1142                 rc = efx_mae_match_spec_bit_set(ctx->match_spec,
1143                                                 fremap[EFX_MAE_FIELD_HAS_IVLAN],
1144                                                 enforce_tag_presence[1] ||
1145                                                 pdata->has_ivlan_value);
1146                 if (rc != 0)
1147                         goto fail;
1148         }
1149
1150         valuep = (const uint8_t *)&pdata->l3_next_proto_value;
1151         maskp = (const uint8_t *)&pdata->l3_next_proto_mask;
1152         rc = efx_mae_match_spec_field_set(ctx->match_spec,
1153                                           fremap[EFX_MAE_FIELD_IP_PROTO],
1154                                           sizeof(pdata->l3_next_proto_value),
1155                                           valuep,
1156                                           sizeof(pdata->l3_next_proto_mask),
1157                                           maskp);
1158         if (rc != 0)
1159                 goto fail;
1160
1161         return 0;
1162
1163 fail:
1164         return rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ITEM, NULL,
1165                                   "Failed to process pattern data");
1166 }
1167
1168 static int
1169 sfc_mae_rule_parse_item_port_id(const struct rte_flow_item *item,
1170                                 struct sfc_flow_parse_ctx *ctx,
1171                                 struct rte_flow_error *error)
1172 {
1173         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1174         const struct rte_flow_item_port_id supp_mask = {
1175                 .id = 0xffffffff,
1176         };
1177         const void *def_mask = &rte_flow_item_port_id_mask;
1178         const struct rte_flow_item_port_id *spec = NULL;
1179         const struct rte_flow_item_port_id *mask = NULL;
1180         efx_mport_sel_t mport_sel;
1181         int rc;
1182
1183         if (ctx_mae->match_mport_set) {
1184                 return rte_flow_error_set(error, ENOTSUP,
1185                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1186                                 "Can't handle multiple traffic source items");
1187         }
1188
1189         rc = sfc_flow_parse_init(item,
1190                                  (const void **)&spec, (const void **)&mask,
1191                                  (const void *)&supp_mask, def_mask,
1192                                  sizeof(struct rte_flow_item_port_id), error);
1193         if (rc != 0)
1194                 return rc;
1195
1196         if (mask->id != supp_mask.id) {
1197                 return rte_flow_error_set(error, EINVAL,
1198                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1199                                 "Bad mask in the PORT_ID pattern item");
1200         }
1201
1202         /* If "spec" is not set, could be any port ID */
1203         if (spec == NULL)
1204                 return 0;
1205
1206         if (spec->id > UINT16_MAX) {
1207                 return rte_flow_error_set(error, EOVERFLOW,
1208                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1209                                           "The port ID is too large");
1210         }
1211
1212         rc = sfc_mae_switch_port_by_ethdev(ctx_mae->sa->mae.switch_domain_id,
1213                                            spec->id, &mport_sel);
1214         if (rc != 0) {
1215                 return rte_flow_error_set(error, rc,
1216                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1217                                 "Can't find RTE ethdev by the port ID");
1218         }
1219
1220         rc = efx_mae_match_spec_mport_set(ctx_mae->match_spec,
1221                                           &mport_sel, NULL);
1222         if (rc != 0) {
1223                 return rte_flow_error_set(error, rc,
1224                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1225                                 "Failed to set MPORT for the port ID");
1226         }
1227
1228         ctx_mae->match_mport_set = B_TRUE;
1229
1230         return 0;
1231 }
1232
1233 static int
1234 sfc_mae_rule_parse_item_phy_port(const struct rte_flow_item *item,
1235                                  struct sfc_flow_parse_ctx *ctx,
1236                                  struct rte_flow_error *error)
1237 {
1238         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1239         const struct rte_flow_item_phy_port supp_mask = {
1240                 .index = 0xffffffff,
1241         };
1242         const void *def_mask = &rte_flow_item_phy_port_mask;
1243         const struct rte_flow_item_phy_port *spec = NULL;
1244         const struct rte_flow_item_phy_port *mask = NULL;
1245         efx_mport_sel_t mport_v;
1246         int rc;
1247
1248         if (ctx_mae->match_mport_set) {
1249                 return rte_flow_error_set(error, ENOTSUP,
1250                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1251                                 "Can't handle multiple traffic source items");
1252         }
1253
1254         rc = sfc_flow_parse_init(item,
1255                                  (const void **)&spec, (const void **)&mask,
1256                                  (const void *)&supp_mask, def_mask,
1257                                  sizeof(struct rte_flow_item_phy_port), error);
1258         if (rc != 0)
1259                 return rc;
1260
1261         if (mask->index != supp_mask.index) {
1262                 return rte_flow_error_set(error, EINVAL,
1263                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1264                                 "Bad mask in the PHY_PORT pattern item");
1265         }
1266
1267         /* If "spec" is not set, could be any physical port */
1268         if (spec == NULL)
1269                 return 0;
1270
1271         rc = efx_mae_mport_by_phy_port(spec->index, &mport_v);
1272         if (rc != 0) {
1273                 return rte_flow_error_set(error, rc,
1274                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1275                                 "Failed to convert the PHY_PORT index");
1276         }
1277
1278         rc = efx_mae_match_spec_mport_set(ctx_mae->match_spec, &mport_v, NULL);
1279         if (rc != 0) {
1280                 return rte_flow_error_set(error, rc,
1281                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1282                                 "Failed to set MPORT for the PHY_PORT");
1283         }
1284
1285         ctx_mae->match_mport_set = B_TRUE;
1286
1287         return 0;
1288 }
1289
1290 static int
1291 sfc_mae_rule_parse_item_pf(const struct rte_flow_item *item,
1292                            struct sfc_flow_parse_ctx *ctx,
1293                            struct rte_flow_error *error)
1294 {
1295         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1296         const efx_nic_cfg_t *encp = efx_nic_cfg_get(ctx_mae->sa->nic);
1297         efx_mport_sel_t mport_v;
1298         int rc;
1299
1300         if (ctx_mae->match_mport_set) {
1301                 return rte_flow_error_set(error, ENOTSUP,
1302                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1303                                 "Can't handle multiple traffic source items");
1304         }
1305
1306         rc = efx_mae_mport_by_pcie_function(encp->enc_pf, EFX_PCI_VF_INVALID,
1307                                             &mport_v);
1308         if (rc != 0) {
1309                 return rte_flow_error_set(error, rc,
1310                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1311                                 "Failed to convert the PF ID");
1312         }
1313
1314         rc = efx_mae_match_spec_mport_set(ctx_mae->match_spec, &mport_v, NULL);
1315         if (rc != 0) {
1316                 return rte_flow_error_set(error, rc,
1317                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1318                                 "Failed to set MPORT for the PF");
1319         }
1320
1321         ctx_mae->match_mport_set = B_TRUE;
1322
1323         return 0;
1324 }
1325
1326 static int
1327 sfc_mae_rule_parse_item_vf(const struct rte_flow_item *item,
1328                            struct sfc_flow_parse_ctx *ctx,
1329                            struct rte_flow_error *error)
1330 {
1331         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1332         const efx_nic_cfg_t *encp = efx_nic_cfg_get(ctx_mae->sa->nic);
1333         const struct rte_flow_item_vf supp_mask = {
1334                 .id = 0xffffffff,
1335         };
1336         const void *def_mask = &rte_flow_item_vf_mask;
1337         const struct rte_flow_item_vf *spec = NULL;
1338         const struct rte_flow_item_vf *mask = NULL;
1339         efx_mport_sel_t mport_v;
1340         int rc;
1341
1342         if (ctx_mae->match_mport_set) {
1343                 return rte_flow_error_set(error, ENOTSUP,
1344                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1345                                 "Can't handle multiple traffic source items");
1346         }
1347
1348         rc = sfc_flow_parse_init(item,
1349                                  (const void **)&spec, (const void **)&mask,
1350                                  (const void *)&supp_mask, def_mask,
1351                                  sizeof(struct rte_flow_item_vf), error);
1352         if (rc != 0)
1353                 return rc;
1354
1355         if (mask->id != supp_mask.id) {
1356                 return rte_flow_error_set(error, EINVAL,
1357                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1358                                 "Bad mask in the VF pattern item");
1359         }
1360
1361         /*
1362          * If "spec" is not set, the item requests any VF related to the
1363          * PF of the current DPDK port (but not the PF itself).
1364          * Reject this match criterion as unsupported.
1365          */
1366         if (spec == NULL) {
1367                 return rte_flow_error_set(error, EINVAL,
1368                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1369                                 "Bad spec in the VF pattern item");
1370         }
1371
1372         rc = efx_mae_mport_by_pcie_function(encp->enc_pf, spec->id, &mport_v);
1373         if (rc != 0) {
1374                 return rte_flow_error_set(error, rc,
1375                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1376                                 "Failed to convert the PF + VF IDs");
1377         }
1378
1379         rc = efx_mae_match_spec_mport_set(ctx_mae->match_spec, &mport_v, NULL);
1380         if (rc != 0) {
1381                 return rte_flow_error_set(error, rc,
1382                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1383                                 "Failed to set MPORT for the PF + VF");
1384         }
1385
1386         ctx_mae->match_mport_set = B_TRUE;
1387
1388         return 0;
1389 }
1390
1391 /*
1392  * Having this field ID in a field locator means that this
1393  * locator cannot be used to actually set the field at the
1394  * time when the corresponding item gets encountered. Such
1395  * fields get stashed in the parsing context instead. This
1396  * is required to resolve dependencies between the stashed
1397  * fields. See sfc_mae_rule_process_pattern_data().
1398  */
1399 #define SFC_MAE_FIELD_HANDLING_DEFERRED EFX_MAE_FIELD_NIDS
1400
1401 struct sfc_mae_field_locator {
1402         efx_mae_field_id_t              field_id;
1403         size_t                          size;
1404         /* Field offset in the corresponding rte_flow_item_ struct */
1405         size_t                          ofst;
1406 };
1407
1408 static void
1409 sfc_mae_item_build_supp_mask(const struct sfc_mae_field_locator *field_locators,
1410                              unsigned int nb_field_locators, void *mask_ptr,
1411                              size_t mask_size)
1412 {
1413         unsigned int i;
1414
1415         memset(mask_ptr, 0, mask_size);
1416
1417         for (i = 0; i < nb_field_locators; ++i) {
1418                 const struct sfc_mae_field_locator *fl = &field_locators[i];
1419
1420                 SFC_ASSERT(fl->ofst + fl->size <= mask_size);
1421                 memset(RTE_PTR_ADD(mask_ptr, fl->ofst), 0xff, fl->size);
1422         }
1423 }
1424
1425 static int
1426 sfc_mae_parse_item(const struct sfc_mae_field_locator *field_locators,
1427                    unsigned int nb_field_locators, const uint8_t *spec,
1428                    const uint8_t *mask, struct sfc_mae_parse_ctx *ctx,
1429                    struct rte_flow_error *error)
1430 {
1431         const efx_mae_field_id_t *fremap = ctx->field_ids_remap;
1432         unsigned int i;
1433         int rc = 0;
1434
1435         for (i = 0; i < nb_field_locators; ++i) {
1436                 const struct sfc_mae_field_locator *fl = &field_locators[i];
1437
1438                 if (fl->field_id == SFC_MAE_FIELD_HANDLING_DEFERRED)
1439                         continue;
1440
1441                 rc = efx_mae_match_spec_field_set(ctx->match_spec,
1442                                                   fremap[fl->field_id],
1443                                                   fl->size, spec + fl->ofst,
1444                                                   fl->size, mask + fl->ofst);
1445                 if (rc != 0)
1446                         break;
1447         }
1448
1449         if (rc != 0) {
1450                 rc = rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ITEM,
1451                                 NULL, "Failed to process item fields");
1452         }
1453
1454         return rc;
1455 }
1456
1457 static const struct sfc_mae_field_locator flocs_eth[] = {
1458         {
1459                 /*
1460                  * This locator is used only for building supported fields mask.
1461                  * The field is handled by sfc_mae_rule_process_pattern_data().
1462                  */
1463                 SFC_MAE_FIELD_HANDLING_DEFERRED,
1464                 RTE_SIZEOF_FIELD(struct rte_flow_item_eth, type),
1465                 offsetof(struct rte_flow_item_eth, type),
1466         },
1467         {
1468                 EFX_MAE_FIELD_ETH_DADDR_BE,
1469                 RTE_SIZEOF_FIELD(struct rte_flow_item_eth, dst),
1470                 offsetof(struct rte_flow_item_eth, dst),
1471         },
1472         {
1473                 EFX_MAE_FIELD_ETH_SADDR_BE,
1474                 RTE_SIZEOF_FIELD(struct rte_flow_item_eth, src),
1475                 offsetof(struct rte_flow_item_eth, src),
1476         },
1477 };
1478
1479 static int
1480 sfc_mae_rule_parse_item_eth(const struct rte_flow_item *item,
1481                             struct sfc_flow_parse_ctx *ctx,
1482                             struct rte_flow_error *error)
1483 {
1484         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1485         struct rte_flow_item_eth supp_mask;
1486         const uint8_t *spec = NULL;
1487         const uint8_t *mask = NULL;
1488         int rc;
1489
1490         sfc_mae_item_build_supp_mask(flocs_eth, RTE_DIM(flocs_eth),
1491                                      &supp_mask, sizeof(supp_mask));
1492         supp_mask.has_vlan = 1;
1493
1494         rc = sfc_flow_parse_init(item,
1495                                  (const void **)&spec, (const void **)&mask,
1496                                  (const void *)&supp_mask,
1497                                  &rte_flow_item_eth_mask,
1498                                  sizeof(struct rte_flow_item_eth), error);
1499         if (rc != 0)
1500                 return rc;
1501
1502         if (spec != NULL) {
1503                 struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1504                 struct sfc_mae_ethertype *ethertypes = pdata->ethertypes;
1505                 const struct rte_flow_item_eth *item_spec;
1506                 const struct rte_flow_item_eth *item_mask;
1507
1508                 item_spec = (const struct rte_flow_item_eth *)spec;
1509                 item_mask = (const struct rte_flow_item_eth *)mask;
1510
1511                 /*
1512                  * Remember various match criteria in the parsing context.
1513                  * sfc_mae_rule_process_pattern_data() will consider them
1514                  * altogether when the rest of the items have been parsed.
1515                  */
1516                 ethertypes[0].value = item_spec->type;
1517                 ethertypes[0].mask = item_mask->type;
1518                 if (item_mask->has_vlan) {
1519                         pdata->has_ovlan_mask = B_TRUE;
1520                         if (item_spec->has_vlan)
1521                                 pdata->has_ovlan_value = B_TRUE;
1522                 }
1523         } else {
1524                 /*
1525                  * The specification is empty. The overall pattern
1526                  * validity will be enforced at the end of parsing.
1527                  * See sfc_mae_rule_process_pattern_data().
1528                  */
1529                 return 0;
1530         }
1531
1532         return sfc_mae_parse_item(flocs_eth, RTE_DIM(flocs_eth), spec, mask,
1533                                   ctx_mae, error);
1534 }
1535
1536 static const struct sfc_mae_field_locator flocs_vlan[] = {
1537         /* Outermost tag */
1538         {
1539                 EFX_MAE_FIELD_VLAN0_TCI_BE,
1540                 RTE_SIZEOF_FIELD(struct rte_flow_item_vlan, tci),
1541                 offsetof(struct rte_flow_item_vlan, tci),
1542         },
1543         {
1544                 /*
1545                  * This locator is used only for building supported fields mask.
1546                  * The field is handled by sfc_mae_rule_process_pattern_data().
1547                  */
1548                 SFC_MAE_FIELD_HANDLING_DEFERRED,
1549                 RTE_SIZEOF_FIELD(struct rte_flow_item_vlan, inner_type),
1550                 offsetof(struct rte_flow_item_vlan, inner_type),
1551         },
1552
1553         /* Innermost tag */
1554         {
1555                 EFX_MAE_FIELD_VLAN1_TCI_BE,
1556                 RTE_SIZEOF_FIELD(struct rte_flow_item_vlan, tci),
1557                 offsetof(struct rte_flow_item_vlan, tci),
1558         },
1559         {
1560                 /*
1561                  * This locator is used only for building supported fields mask.
1562                  * The field is handled by sfc_mae_rule_process_pattern_data().
1563                  */
1564                 SFC_MAE_FIELD_HANDLING_DEFERRED,
1565                 RTE_SIZEOF_FIELD(struct rte_flow_item_vlan, inner_type),
1566                 offsetof(struct rte_flow_item_vlan, inner_type),
1567         },
1568 };
1569
1570 static int
1571 sfc_mae_rule_parse_item_vlan(const struct rte_flow_item *item,
1572                              struct sfc_flow_parse_ctx *ctx,
1573                              struct rte_flow_error *error)
1574 {
1575         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1576         struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1577         boolean_t *has_vlan_mp_by_nb_tags[SFC_MAE_MATCH_VLAN_MAX_NTAGS] = {
1578                 &pdata->has_ovlan_mask,
1579                 &pdata->has_ivlan_mask,
1580         };
1581         boolean_t *has_vlan_vp_by_nb_tags[SFC_MAE_MATCH_VLAN_MAX_NTAGS] = {
1582                 &pdata->has_ovlan_value,
1583                 &pdata->has_ivlan_value,
1584         };
1585         boolean_t *cur_tag_presence_bit_mp;
1586         boolean_t *cur_tag_presence_bit_vp;
1587         const struct sfc_mae_field_locator *flocs;
1588         struct rte_flow_item_vlan supp_mask;
1589         const uint8_t *spec = NULL;
1590         const uint8_t *mask = NULL;
1591         unsigned int nb_flocs;
1592         int rc;
1593
1594         RTE_BUILD_BUG_ON(SFC_MAE_MATCH_VLAN_MAX_NTAGS != 2);
1595
1596         if (pdata->nb_vlan_tags == SFC_MAE_MATCH_VLAN_MAX_NTAGS) {
1597                 return rte_flow_error_set(error, ENOTSUP,
1598                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1599                                 "Can't match that many VLAN tags");
1600         }
1601
1602         cur_tag_presence_bit_mp = has_vlan_mp_by_nb_tags[pdata->nb_vlan_tags];
1603         cur_tag_presence_bit_vp = has_vlan_vp_by_nb_tags[pdata->nb_vlan_tags];
1604
1605         if (*cur_tag_presence_bit_mp == B_TRUE &&
1606             *cur_tag_presence_bit_vp == B_FALSE) {
1607                 return rte_flow_error_set(error, EINVAL,
1608                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1609                                 "The previous item enforces no (more) VLAN, "
1610                                 "so the current item (VLAN) must not exist");
1611         }
1612
1613         nb_flocs = RTE_DIM(flocs_vlan) / SFC_MAE_MATCH_VLAN_MAX_NTAGS;
1614         flocs = flocs_vlan + pdata->nb_vlan_tags * nb_flocs;
1615
1616         sfc_mae_item_build_supp_mask(flocs, nb_flocs,
1617                                      &supp_mask, sizeof(supp_mask));
1618         /*
1619          * This only means that the field is supported by the driver and libefx.
1620          * Support on NIC level will be checked when all items have been parsed.
1621          */
1622         supp_mask.has_more_vlan = 1;
1623
1624         rc = sfc_flow_parse_init(item,
1625                                  (const void **)&spec, (const void **)&mask,
1626                                  (const void *)&supp_mask,
1627                                  &rte_flow_item_vlan_mask,
1628                                  sizeof(struct rte_flow_item_vlan), error);
1629         if (rc != 0)
1630                 return rc;
1631
1632         if (spec != NULL) {
1633                 struct sfc_mae_ethertype *et = pdata->ethertypes;
1634                 const struct rte_flow_item_vlan *item_spec;
1635                 const struct rte_flow_item_vlan *item_mask;
1636
1637                 item_spec = (const struct rte_flow_item_vlan *)spec;
1638                 item_mask = (const struct rte_flow_item_vlan *)mask;
1639
1640                 /*
1641                  * Remember various match criteria in the parsing context.
1642                  * sfc_mae_rule_process_pattern_data() will consider them
1643                  * altogether when the rest of the items have been parsed.
1644                  */
1645                 et[pdata->nb_vlan_tags + 1].value = item_spec->inner_type;
1646                 et[pdata->nb_vlan_tags + 1].mask = item_mask->inner_type;
1647                 pdata->tci_masks[pdata->nb_vlan_tags] = item_mask->tci;
1648                 if (item_mask->has_more_vlan) {
1649                         if (pdata->nb_vlan_tags ==
1650                             SFC_MAE_MATCH_VLAN_MAX_NTAGS) {
1651                                 return rte_flow_error_set(error, ENOTSUP,
1652                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
1653                                         "Can't use 'has_more_vlan' in "
1654                                         "the second item VLAN");
1655                         }
1656                         pdata->has_ivlan_mask = B_TRUE;
1657                         if (item_spec->has_more_vlan)
1658                                 pdata->has_ivlan_value = B_TRUE;
1659                 }
1660
1661                 /* Convert TCI to MAE representation right now. */
1662                 rc = sfc_mae_parse_item(flocs, nb_flocs, spec, mask,
1663                                         ctx_mae, error);
1664                 if (rc != 0)
1665                         return rc;
1666         }
1667
1668         ++(pdata->nb_vlan_tags);
1669
1670         return 0;
1671 }
1672
1673 static const struct sfc_mae_field_locator flocs_ipv4[] = {
1674         {
1675                 EFX_MAE_FIELD_SRC_IP4_BE,
1676                 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.src_addr),
1677                 offsetof(struct rte_flow_item_ipv4, hdr.src_addr),
1678         },
1679         {
1680                 EFX_MAE_FIELD_DST_IP4_BE,
1681                 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.dst_addr),
1682                 offsetof(struct rte_flow_item_ipv4, hdr.dst_addr),
1683         },
1684         {
1685                 /*
1686                  * This locator is used only for building supported fields mask.
1687                  * The field is handled by sfc_mae_rule_process_pattern_data().
1688                  */
1689                 SFC_MAE_FIELD_HANDLING_DEFERRED,
1690                 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.next_proto_id),
1691                 offsetof(struct rte_flow_item_ipv4, hdr.next_proto_id),
1692         },
1693         {
1694                 EFX_MAE_FIELD_IP_TOS,
1695                 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4,
1696                                  hdr.type_of_service),
1697                 offsetof(struct rte_flow_item_ipv4, hdr.type_of_service),
1698         },
1699         {
1700                 EFX_MAE_FIELD_IP_TTL,
1701                 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.time_to_live),
1702                 offsetof(struct rte_flow_item_ipv4, hdr.time_to_live),
1703         },
1704 };
1705
1706 static int
1707 sfc_mae_rule_parse_item_ipv4(const struct rte_flow_item *item,
1708                              struct sfc_flow_parse_ctx *ctx,
1709                              struct rte_flow_error *error)
1710 {
1711         rte_be16_t ethertype_ipv4_be = RTE_BE16(RTE_ETHER_TYPE_IPV4);
1712         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1713         struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1714         struct rte_flow_item_ipv4 supp_mask;
1715         const uint8_t *spec = NULL;
1716         const uint8_t *mask = NULL;
1717         int rc;
1718
1719         sfc_mae_item_build_supp_mask(flocs_ipv4, RTE_DIM(flocs_ipv4),
1720                                      &supp_mask, sizeof(supp_mask));
1721
1722         rc = sfc_flow_parse_init(item,
1723                                  (const void **)&spec, (const void **)&mask,
1724                                  (const void *)&supp_mask,
1725                                  &rte_flow_item_ipv4_mask,
1726                                  sizeof(struct rte_flow_item_ipv4), error);
1727         if (rc != 0)
1728                 return rc;
1729
1730         pdata->innermost_ethertype_restriction.value = ethertype_ipv4_be;
1731         pdata->innermost_ethertype_restriction.mask = RTE_BE16(0xffff);
1732
1733         if (spec != NULL) {
1734                 const struct rte_flow_item_ipv4 *item_spec;
1735                 const struct rte_flow_item_ipv4 *item_mask;
1736
1737                 item_spec = (const struct rte_flow_item_ipv4 *)spec;
1738                 item_mask = (const struct rte_flow_item_ipv4 *)mask;
1739
1740                 pdata->l3_next_proto_value = item_spec->hdr.next_proto_id;
1741                 pdata->l3_next_proto_mask = item_mask->hdr.next_proto_id;
1742         } else {
1743                 return 0;
1744         }
1745
1746         return sfc_mae_parse_item(flocs_ipv4, RTE_DIM(flocs_ipv4), spec, mask,
1747                                   ctx_mae, error);
1748 }
1749
1750 static const struct sfc_mae_field_locator flocs_ipv6[] = {
1751         {
1752                 EFX_MAE_FIELD_SRC_IP6_BE,
1753                 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv6, hdr.src_addr),
1754                 offsetof(struct rte_flow_item_ipv6, hdr.src_addr),
1755         },
1756         {
1757                 EFX_MAE_FIELD_DST_IP6_BE,
1758                 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv6, hdr.dst_addr),
1759                 offsetof(struct rte_flow_item_ipv6, hdr.dst_addr),
1760         },
1761         {
1762                 /*
1763                  * This locator is used only for building supported fields mask.
1764                  * The field is handled by sfc_mae_rule_process_pattern_data().
1765                  */
1766                 SFC_MAE_FIELD_HANDLING_DEFERRED,
1767                 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv6, hdr.proto),
1768                 offsetof(struct rte_flow_item_ipv6, hdr.proto),
1769         },
1770         {
1771                 EFX_MAE_FIELD_IP_TTL,
1772                 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv6, hdr.hop_limits),
1773                 offsetof(struct rte_flow_item_ipv6, hdr.hop_limits),
1774         },
1775 };
1776
1777 static int
1778 sfc_mae_rule_parse_item_ipv6(const struct rte_flow_item *item,
1779                              struct sfc_flow_parse_ctx *ctx,
1780                              struct rte_flow_error *error)
1781 {
1782         rte_be16_t ethertype_ipv6_be = RTE_BE16(RTE_ETHER_TYPE_IPV6);
1783         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1784         const efx_mae_field_id_t *fremap = ctx_mae->field_ids_remap;
1785         struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1786         struct rte_flow_item_ipv6 supp_mask;
1787         const uint8_t *spec = NULL;
1788         const uint8_t *mask = NULL;
1789         rte_be32_t vtc_flow_be;
1790         uint32_t vtc_flow;
1791         uint8_t tc_value;
1792         uint8_t tc_mask;
1793         int rc;
1794
1795         sfc_mae_item_build_supp_mask(flocs_ipv6, RTE_DIM(flocs_ipv6),
1796                                      &supp_mask, sizeof(supp_mask));
1797
1798         vtc_flow_be = RTE_BE32(RTE_IPV6_HDR_TC_MASK);
1799         memcpy(&supp_mask, &vtc_flow_be, sizeof(vtc_flow_be));
1800
1801         rc = sfc_flow_parse_init(item,
1802                                  (const void **)&spec, (const void **)&mask,
1803                                  (const void *)&supp_mask,
1804                                  &rte_flow_item_ipv6_mask,
1805                                  sizeof(struct rte_flow_item_ipv6), error);
1806         if (rc != 0)
1807                 return rc;
1808
1809         pdata->innermost_ethertype_restriction.value = ethertype_ipv6_be;
1810         pdata->innermost_ethertype_restriction.mask = RTE_BE16(0xffff);
1811
1812         if (spec != NULL) {
1813                 const struct rte_flow_item_ipv6 *item_spec;
1814                 const struct rte_flow_item_ipv6 *item_mask;
1815
1816                 item_spec = (const struct rte_flow_item_ipv6 *)spec;
1817                 item_mask = (const struct rte_flow_item_ipv6 *)mask;
1818
1819                 pdata->l3_next_proto_value = item_spec->hdr.proto;
1820                 pdata->l3_next_proto_mask = item_mask->hdr.proto;
1821         } else {
1822                 return 0;
1823         }
1824
1825         rc = sfc_mae_parse_item(flocs_ipv6, RTE_DIM(flocs_ipv6), spec, mask,
1826                                 ctx_mae, error);
1827         if (rc != 0)
1828                 return rc;
1829
1830         memcpy(&vtc_flow_be, spec, sizeof(vtc_flow_be));
1831         vtc_flow = rte_be_to_cpu_32(vtc_flow_be);
1832         tc_value = (vtc_flow & RTE_IPV6_HDR_TC_MASK) >> RTE_IPV6_HDR_TC_SHIFT;
1833
1834         memcpy(&vtc_flow_be, mask, sizeof(vtc_flow_be));
1835         vtc_flow = rte_be_to_cpu_32(vtc_flow_be);
1836         tc_mask = (vtc_flow & RTE_IPV6_HDR_TC_MASK) >> RTE_IPV6_HDR_TC_SHIFT;
1837
1838         rc = efx_mae_match_spec_field_set(ctx_mae->match_spec,
1839                                           fremap[EFX_MAE_FIELD_IP_TOS],
1840                                           sizeof(tc_value), &tc_value,
1841                                           sizeof(tc_mask), &tc_mask);
1842         if (rc != 0) {
1843                 return rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ITEM,
1844                                 NULL, "Failed to process item fields");
1845         }
1846
1847         return 0;
1848 }
1849
1850 static const struct sfc_mae_field_locator flocs_tcp[] = {
1851         {
1852                 EFX_MAE_FIELD_L4_SPORT_BE,
1853                 RTE_SIZEOF_FIELD(struct rte_flow_item_tcp, hdr.src_port),
1854                 offsetof(struct rte_flow_item_tcp, hdr.src_port),
1855         },
1856         {
1857                 EFX_MAE_FIELD_L4_DPORT_BE,
1858                 RTE_SIZEOF_FIELD(struct rte_flow_item_tcp, hdr.dst_port),
1859                 offsetof(struct rte_flow_item_tcp, hdr.dst_port),
1860         },
1861         {
1862                 EFX_MAE_FIELD_TCP_FLAGS_BE,
1863                 /*
1864                  * The values have been picked intentionally since the
1865                  * target MAE field is oversize (16 bit). This mapping
1866                  * relies on the fact that the MAE field is big-endian.
1867                  */
1868                 RTE_SIZEOF_FIELD(struct rte_flow_item_tcp, hdr.data_off) +
1869                 RTE_SIZEOF_FIELD(struct rte_flow_item_tcp, hdr.tcp_flags),
1870                 offsetof(struct rte_flow_item_tcp, hdr.data_off),
1871         },
1872 };
1873
1874 static int
1875 sfc_mae_rule_parse_item_tcp(const struct rte_flow_item *item,
1876                             struct sfc_flow_parse_ctx *ctx,
1877                             struct rte_flow_error *error)
1878 {
1879         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1880         struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1881         struct rte_flow_item_tcp supp_mask;
1882         const uint8_t *spec = NULL;
1883         const uint8_t *mask = NULL;
1884         int rc;
1885
1886         /*
1887          * When encountered among outermost items, item TCP is invalid.
1888          * Check which match specification is being constructed now.
1889          */
1890         if (ctx_mae->match_spec != ctx_mae->match_spec_action) {
1891                 return rte_flow_error_set(error, EINVAL,
1892                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1893                                           "TCP in outer frame is invalid");
1894         }
1895
1896         sfc_mae_item_build_supp_mask(flocs_tcp, RTE_DIM(flocs_tcp),
1897                                      &supp_mask, sizeof(supp_mask));
1898
1899         rc = sfc_flow_parse_init(item,
1900                                  (const void **)&spec, (const void **)&mask,
1901                                  (const void *)&supp_mask,
1902                                  &rte_flow_item_tcp_mask,
1903                                  sizeof(struct rte_flow_item_tcp), error);
1904         if (rc != 0)
1905                 return rc;
1906
1907         pdata->l3_next_proto_restriction_value = IPPROTO_TCP;
1908         pdata->l3_next_proto_restriction_mask = 0xff;
1909
1910         if (spec == NULL)
1911                 return 0;
1912
1913         return sfc_mae_parse_item(flocs_tcp, RTE_DIM(flocs_tcp), spec, mask,
1914                                   ctx_mae, error);
1915 }
1916
1917 static const struct sfc_mae_field_locator flocs_udp[] = {
1918         {
1919                 EFX_MAE_FIELD_L4_SPORT_BE,
1920                 RTE_SIZEOF_FIELD(struct rte_flow_item_udp, hdr.src_port),
1921                 offsetof(struct rte_flow_item_udp, hdr.src_port),
1922         },
1923         {
1924                 EFX_MAE_FIELD_L4_DPORT_BE,
1925                 RTE_SIZEOF_FIELD(struct rte_flow_item_udp, hdr.dst_port),
1926                 offsetof(struct rte_flow_item_udp, hdr.dst_port),
1927         },
1928 };
1929
1930 static int
1931 sfc_mae_rule_parse_item_udp(const struct rte_flow_item *item,
1932                             struct sfc_flow_parse_ctx *ctx,
1933                             struct rte_flow_error *error)
1934 {
1935         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1936         struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1937         struct rte_flow_item_udp supp_mask;
1938         const uint8_t *spec = NULL;
1939         const uint8_t *mask = NULL;
1940         int rc;
1941
1942         sfc_mae_item_build_supp_mask(flocs_udp, RTE_DIM(flocs_udp),
1943                                      &supp_mask, sizeof(supp_mask));
1944
1945         rc = sfc_flow_parse_init(item,
1946                                  (const void **)&spec, (const void **)&mask,
1947                                  (const void *)&supp_mask,
1948                                  &rte_flow_item_udp_mask,
1949                                  sizeof(struct rte_flow_item_udp), error);
1950         if (rc != 0)
1951                 return rc;
1952
1953         pdata->l3_next_proto_restriction_value = IPPROTO_UDP;
1954         pdata->l3_next_proto_restriction_mask = 0xff;
1955
1956         if (spec == NULL)
1957                 return 0;
1958
1959         return sfc_mae_parse_item(flocs_udp, RTE_DIM(flocs_udp), spec, mask,
1960                                   ctx_mae, error);
1961 }
1962
1963 static const struct sfc_mae_field_locator flocs_tunnel[] = {
1964         {
1965                 /*
1966                  * The size and offset values are relevant
1967                  * for Geneve and NVGRE, too.
1968                  */
1969                 .size = RTE_SIZEOF_FIELD(struct rte_flow_item_vxlan, vni),
1970                 .ofst = offsetof(struct rte_flow_item_vxlan, vni),
1971         },
1972 };
1973
1974 /*
1975  * An auxiliary registry which allows using non-encap. field IDs
1976  * directly when building a match specification of type ACTION.
1977  *
1978  * See sfc_mae_rule_parse_pattern() and sfc_mae_rule_parse_item_tunnel().
1979  */
1980 static const efx_mae_field_id_t field_ids_no_remap[] = {
1981 #define FIELD_ID_NO_REMAP(_field) \
1982         [EFX_MAE_FIELD_##_field] = EFX_MAE_FIELD_##_field
1983
1984         FIELD_ID_NO_REMAP(ETHER_TYPE_BE),
1985         FIELD_ID_NO_REMAP(ETH_SADDR_BE),
1986         FIELD_ID_NO_REMAP(ETH_DADDR_BE),
1987         FIELD_ID_NO_REMAP(VLAN0_TCI_BE),
1988         FIELD_ID_NO_REMAP(VLAN0_PROTO_BE),
1989         FIELD_ID_NO_REMAP(VLAN1_TCI_BE),
1990         FIELD_ID_NO_REMAP(VLAN1_PROTO_BE),
1991         FIELD_ID_NO_REMAP(SRC_IP4_BE),
1992         FIELD_ID_NO_REMAP(DST_IP4_BE),
1993         FIELD_ID_NO_REMAP(IP_PROTO),
1994         FIELD_ID_NO_REMAP(IP_TOS),
1995         FIELD_ID_NO_REMAP(IP_TTL),
1996         FIELD_ID_NO_REMAP(SRC_IP6_BE),
1997         FIELD_ID_NO_REMAP(DST_IP6_BE),
1998         FIELD_ID_NO_REMAP(L4_SPORT_BE),
1999         FIELD_ID_NO_REMAP(L4_DPORT_BE),
2000         FIELD_ID_NO_REMAP(TCP_FLAGS_BE),
2001         FIELD_ID_NO_REMAP(HAS_OVLAN),
2002         FIELD_ID_NO_REMAP(HAS_IVLAN),
2003
2004 #undef FIELD_ID_NO_REMAP
2005 };
2006
2007 /*
2008  * An auxiliary registry which allows using "ENC" field IDs
2009  * when building a match specification of type OUTER.
2010  *
2011  * See sfc_mae_rule_encap_parse_init().
2012  */
2013 static const efx_mae_field_id_t field_ids_remap_to_encap[] = {
2014 #define FIELD_ID_REMAP_TO_ENCAP(_field) \
2015         [EFX_MAE_FIELD_##_field] = EFX_MAE_FIELD_ENC_##_field
2016
2017         FIELD_ID_REMAP_TO_ENCAP(ETHER_TYPE_BE),
2018         FIELD_ID_REMAP_TO_ENCAP(ETH_SADDR_BE),
2019         FIELD_ID_REMAP_TO_ENCAP(ETH_DADDR_BE),
2020         FIELD_ID_REMAP_TO_ENCAP(VLAN0_TCI_BE),
2021         FIELD_ID_REMAP_TO_ENCAP(VLAN0_PROTO_BE),
2022         FIELD_ID_REMAP_TO_ENCAP(VLAN1_TCI_BE),
2023         FIELD_ID_REMAP_TO_ENCAP(VLAN1_PROTO_BE),
2024         FIELD_ID_REMAP_TO_ENCAP(SRC_IP4_BE),
2025         FIELD_ID_REMAP_TO_ENCAP(DST_IP4_BE),
2026         FIELD_ID_REMAP_TO_ENCAP(IP_PROTO),
2027         FIELD_ID_REMAP_TO_ENCAP(IP_TOS),
2028         FIELD_ID_REMAP_TO_ENCAP(IP_TTL),
2029         FIELD_ID_REMAP_TO_ENCAP(SRC_IP6_BE),
2030         FIELD_ID_REMAP_TO_ENCAP(DST_IP6_BE),
2031         FIELD_ID_REMAP_TO_ENCAP(L4_SPORT_BE),
2032         FIELD_ID_REMAP_TO_ENCAP(L4_DPORT_BE),
2033         FIELD_ID_REMAP_TO_ENCAP(HAS_OVLAN),
2034         FIELD_ID_REMAP_TO_ENCAP(HAS_IVLAN),
2035
2036 #undef FIELD_ID_REMAP_TO_ENCAP
2037 };
2038
2039 static int
2040 sfc_mae_rule_parse_item_tunnel(const struct rte_flow_item *item,
2041                                struct sfc_flow_parse_ctx *ctx,
2042                                struct rte_flow_error *error)
2043 {
2044         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
2045         uint8_t vnet_id_v[sizeof(uint32_t)] = {0};
2046         uint8_t vnet_id_m[sizeof(uint32_t)] = {0};
2047         const struct rte_flow_item_vxlan *vxp;
2048         uint8_t supp_mask[sizeof(uint64_t)];
2049         const uint8_t *spec = NULL;
2050         const uint8_t *mask = NULL;
2051         int rc;
2052
2053         /*
2054          * We're about to start processing inner frame items.
2055          * Process pattern data that has been deferred so far
2056          * and reset pattern data storage.
2057          */
2058         rc = sfc_mae_rule_process_pattern_data(ctx_mae, error);
2059         if (rc != 0)
2060                 return rc;
2061
2062         memset(&ctx_mae->pattern_data, 0, sizeof(ctx_mae->pattern_data));
2063
2064         sfc_mae_item_build_supp_mask(flocs_tunnel, RTE_DIM(flocs_tunnel),
2065                                      &supp_mask, sizeof(supp_mask));
2066
2067         /*
2068          * This tunnel item was preliminarily detected by
2069          * sfc_mae_rule_encap_parse_init(). Default mask
2070          * was also picked by that helper. Use it here.
2071          */
2072         rc = sfc_flow_parse_init(item,
2073                                  (const void **)&spec, (const void **)&mask,
2074                                  (const void *)&supp_mask,
2075                                  ctx_mae->tunnel_def_mask,
2076                                  ctx_mae->tunnel_def_mask_size,  error);
2077         if (rc != 0)
2078                 return rc;
2079
2080         /*
2081          * This item and later ones comprise a
2082          * match specification of type ACTION.
2083          */
2084         ctx_mae->match_spec = ctx_mae->match_spec_action;
2085
2086         /* This item and later ones use non-encap. EFX MAE field IDs. */
2087         ctx_mae->field_ids_remap = field_ids_no_remap;
2088
2089         if (spec == NULL)
2090                 return 0;
2091
2092         /*
2093          * Field EFX_MAE_FIELD_ENC_VNET_ID_BE is a 32-bit one.
2094          * Copy 24-bit VNI, which is BE, at offset 1 in it.
2095          * The extra byte is 0 both in the mask and in the value.
2096          */
2097         vxp = (const struct rte_flow_item_vxlan *)spec;
2098         memcpy(vnet_id_v + 1, &vxp->vni, sizeof(vxp->vni));
2099
2100         vxp = (const struct rte_flow_item_vxlan *)mask;
2101         memcpy(vnet_id_m + 1, &vxp->vni, sizeof(vxp->vni));
2102
2103         rc = efx_mae_match_spec_field_set(ctx_mae->match_spec,
2104                                           EFX_MAE_FIELD_ENC_VNET_ID_BE,
2105                                           sizeof(vnet_id_v), vnet_id_v,
2106                                           sizeof(vnet_id_m), vnet_id_m);
2107         if (rc != 0) {
2108                 rc = rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ITEM,
2109                                         item, "Failed to set VXLAN VNI");
2110         }
2111
2112         return rc;
2113 }
2114
2115 static const struct sfc_flow_item sfc_flow_items[] = {
2116         {
2117                 .type = RTE_FLOW_ITEM_TYPE_PORT_ID,
2118                 .name = "PORT_ID",
2119                 /*
2120                  * In terms of RTE flow, this item is a META one,
2121                  * and its position in the pattern is don't care.
2122                  */
2123                 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER,
2124                 .layer = SFC_FLOW_ITEM_ANY_LAYER,
2125                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2126                 .parse = sfc_mae_rule_parse_item_port_id,
2127         },
2128         {
2129                 .type = RTE_FLOW_ITEM_TYPE_PHY_PORT,
2130                 .name = "PHY_PORT",
2131                 /*
2132                  * In terms of RTE flow, this item is a META one,
2133                  * and its position in the pattern is don't care.
2134                  */
2135                 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER,
2136                 .layer = SFC_FLOW_ITEM_ANY_LAYER,
2137                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2138                 .parse = sfc_mae_rule_parse_item_phy_port,
2139         },
2140         {
2141                 .type = RTE_FLOW_ITEM_TYPE_PF,
2142                 .name = "PF",
2143                 /*
2144                  * In terms of RTE flow, this item is a META one,
2145                  * and its position in the pattern is don't care.
2146                  */
2147                 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER,
2148                 .layer = SFC_FLOW_ITEM_ANY_LAYER,
2149                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2150                 .parse = sfc_mae_rule_parse_item_pf,
2151         },
2152         {
2153                 .type = RTE_FLOW_ITEM_TYPE_VF,
2154                 .name = "VF",
2155                 /*
2156                  * In terms of RTE flow, this item is a META one,
2157                  * and its position in the pattern is don't care.
2158                  */
2159                 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER,
2160                 .layer = SFC_FLOW_ITEM_ANY_LAYER,
2161                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2162                 .parse = sfc_mae_rule_parse_item_vf,
2163         },
2164         {
2165                 .type = RTE_FLOW_ITEM_TYPE_ETH,
2166                 .name = "ETH",
2167                 .prev_layer = SFC_FLOW_ITEM_START_LAYER,
2168                 .layer = SFC_FLOW_ITEM_L2,
2169                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2170                 .parse = sfc_mae_rule_parse_item_eth,
2171         },
2172         {
2173                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
2174                 .name = "VLAN",
2175                 .prev_layer = SFC_FLOW_ITEM_L2,
2176                 .layer = SFC_FLOW_ITEM_L2,
2177                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2178                 .parse = sfc_mae_rule_parse_item_vlan,
2179         },
2180         {
2181                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
2182                 .name = "IPV4",
2183                 .prev_layer = SFC_FLOW_ITEM_L2,
2184                 .layer = SFC_FLOW_ITEM_L3,
2185                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2186                 .parse = sfc_mae_rule_parse_item_ipv4,
2187         },
2188         {
2189                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
2190                 .name = "IPV6",
2191                 .prev_layer = SFC_FLOW_ITEM_L2,
2192                 .layer = SFC_FLOW_ITEM_L3,
2193                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2194                 .parse = sfc_mae_rule_parse_item_ipv6,
2195         },
2196         {
2197                 .type = RTE_FLOW_ITEM_TYPE_TCP,
2198                 .name = "TCP",
2199                 .prev_layer = SFC_FLOW_ITEM_L3,
2200                 .layer = SFC_FLOW_ITEM_L4,
2201                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2202                 .parse = sfc_mae_rule_parse_item_tcp,
2203         },
2204         {
2205                 .type = RTE_FLOW_ITEM_TYPE_UDP,
2206                 .name = "UDP",
2207                 .prev_layer = SFC_FLOW_ITEM_L3,
2208                 .layer = SFC_FLOW_ITEM_L4,
2209                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2210                 .parse = sfc_mae_rule_parse_item_udp,
2211         },
2212         {
2213                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
2214                 .name = "VXLAN",
2215                 .prev_layer = SFC_FLOW_ITEM_L4,
2216                 .layer = SFC_FLOW_ITEM_START_LAYER,
2217                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2218                 .parse = sfc_mae_rule_parse_item_tunnel,
2219         },
2220         {
2221                 .type = RTE_FLOW_ITEM_TYPE_GENEVE,
2222                 .name = "GENEVE",
2223                 .prev_layer = SFC_FLOW_ITEM_L4,
2224                 .layer = SFC_FLOW_ITEM_START_LAYER,
2225                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2226                 .parse = sfc_mae_rule_parse_item_tunnel,
2227         },
2228         {
2229                 .type = RTE_FLOW_ITEM_TYPE_NVGRE,
2230                 .name = "NVGRE",
2231                 .prev_layer = SFC_FLOW_ITEM_L3,
2232                 .layer = SFC_FLOW_ITEM_START_LAYER,
2233                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2234                 .parse = sfc_mae_rule_parse_item_tunnel,
2235         },
2236 };
2237
2238 static int
2239 sfc_mae_rule_process_outer(struct sfc_adapter *sa,
2240                            struct sfc_mae_parse_ctx *ctx,
2241                            struct sfc_mae_outer_rule **rulep,
2242                            struct rte_flow_error *error)
2243 {
2244         efx_mae_rule_id_t invalid_rule_id = { .id = EFX_MAE_RSRC_ID_INVALID };
2245         int rc;
2246
2247         if (ctx->encap_type == EFX_TUNNEL_PROTOCOL_NONE) {
2248                 *rulep = NULL;
2249                 goto no_or_id;
2250         }
2251
2252         SFC_ASSERT(ctx->match_spec_outer != NULL);
2253
2254         if (!efx_mae_match_spec_is_valid(sa->nic, ctx->match_spec_outer)) {
2255                 return rte_flow_error_set(error, ENOTSUP,
2256                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2257                                           "Inconsistent pattern (outer)");
2258         }
2259
2260         *rulep = sfc_mae_outer_rule_attach(sa, ctx->match_spec_outer,
2261                                            ctx->encap_type);
2262         if (*rulep != NULL) {
2263                 efx_mae_match_spec_fini(sa->nic, ctx->match_spec_outer);
2264         } else {
2265                 rc = sfc_mae_outer_rule_add(sa, ctx->match_spec_outer,
2266                                             ctx->encap_type, rulep);
2267                 if (rc != 0) {
2268                         return rte_flow_error_set(error, rc,
2269                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2270                                         "Failed to process the pattern");
2271                 }
2272         }
2273
2274         /* The spec has now been tracked by the outer rule entry. */
2275         ctx->match_spec_outer = NULL;
2276
2277 no_or_id:
2278         /*
2279          * In MAE, lookup sequence comprises outer parse, outer rule lookup,
2280          * inner parse (when some outer rule is hit) and action rule lookup.
2281          * If the currently processed flow does not come with an outer rule,
2282          * its action rule must be available only for packets which miss in
2283          * outer rule table. Set OR_ID match field to 0xffffffff/0xffffffff
2284          * in the action rule specification; this ensures correct behaviour.
2285          *
2286          * If, on the other hand, this flow does have an outer rule, its ID
2287          * may be unknown at the moment (not yet allocated), but OR_ID mask
2288          * has to be set to 0xffffffff anyway for correct class comparisons.
2289          * When the outer rule has been allocated, this match field will be
2290          * overridden by sfc_mae_outer_rule_enable() to use the right value.
2291          */
2292         rc = efx_mae_match_spec_outer_rule_id_set(ctx->match_spec_action,
2293                                                   &invalid_rule_id);
2294         if (rc != 0) {
2295                 if (*rulep != NULL)
2296                         sfc_mae_outer_rule_del(sa, *rulep);
2297
2298                 *rulep = NULL;
2299
2300                 return rte_flow_error_set(error, rc,
2301                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2302                                           "Failed to process the pattern");
2303         }
2304
2305         return 0;
2306 }
2307
2308 static int
2309 sfc_mae_rule_encap_parse_init(struct sfc_adapter *sa,
2310                               const struct rte_flow_item pattern[],
2311                               struct sfc_mae_parse_ctx *ctx,
2312                               struct rte_flow_error *error)
2313 {
2314         struct sfc_mae *mae = &sa->mae;
2315         int rc;
2316
2317         if (pattern == NULL) {
2318                 rte_flow_error_set(error, EINVAL,
2319                                    RTE_FLOW_ERROR_TYPE_ITEM_NUM, NULL,
2320                                    "NULL pattern");
2321                 return -rte_errno;
2322         }
2323
2324         for (;;) {
2325                 switch (pattern->type) {
2326                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2327                         ctx->encap_type = EFX_TUNNEL_PROTOCOL_VXLAN;
2328                         ctx->tunnel_def_mask = &rte_flow_item_vxlan_mask;
2329                         ctx->tunnel_def_mask_size =
2330                                 sizeof(rte_flow_item_vxlan_mask);
2331                         break;
2332                 case RTE_FLOW_ITEM_TYPE_GENEVE:
2333                         ctx->encap_type = EFX_TUNNEL_PROTOCOL_GENEVE;
2334                         ctx->tunnel_def_mask = &rte_flow_item_geneve_mask;
2335                         ctx->tunnel_def_mask_size =
2336                                 sizeof(rte_flow_item_geneve_mask);
2337                         break;
2338                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2339                         ctx->encap_type = EFX_TUNNEL_PROTOCOL_NVGRE;
2340                         ctx->tunnel_def_mask = &rte_flow_item_nvgre_mask;
2341                         ctx->tunnel_def_mask_size =
2342                                 sizeof(rte_flow_item_nvgre_mask);
2343                         break;
2344                 case RTE_FLOW_ITEM_TYPE_END:
2345                         break;
2346                 default:
2347                         ++pattern;
2348                         continue;
2349                 };
2350
2351                 break;
2352         }
2353
2354         if (pattern->type == RTE_FLOW_ITEM_TYPE_END)
2355                 return 0;
2356
2357         if ((mae->encap_types_supported & (1U << ctx->encap_type)) == 0) {
2358                 return rte_flow_error_set(error, ENOTSUP,
2359                                           RTE_FLOW_ERROR_TYPE_ITEM,
2360                                           pattern, "Unsupported tunnel item");
2361         }
2362
2363         if (ctx->priority >= mae->nb_outer_rule_prios_max) {
2364                 return rte_flow_error_set(error, ENOTSUP,
2365                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
2366                                           NULL, "Unsupported priority level");
2367         }
2368
2369         rc = efx_mae_match_spec_init(sa->nic, EFX_MAE_RULE_OUTER, ctx->priority,
2370                                      &ctx->match_spec_outer);
2371         if (rc != 0) {
2372                 return rte_flow_error_set(error, rc,
2373                         RTE_FLOW_ERROR_TYPE_ITEM, pattern,
2374                         "Failed to initialise outer rule match specification");
2375         }
2376
2377         /* Outermost items comprise a match specification of type OUTER. */
2378         ctx->match_spec = ctx->match_spec_outer;
2379
2380         /* Outermost items use "ENC" EFX MAE field IDs. */
2381         ctx->field_ids_remap = field_ids_remap_to_encap;
2382
2383         return 0;
2384 }
2385
2386 static void
2387 sfc_mae_rule_encap_parse_fini(struct sfc_adapter *sa,
2388                               struct sfc_mae_parse_ctx *ctx)
2389 {
2390         if (ctx->encap_type == EFX_TUNNEL_PROTOCOL_NONE)
2391                 return;
2392
2393         if (ctx->match_spec_outer != NULL)
2394                 efx_mae_match_spec_fini(sa->nic, ctx->match_spec_outer);
2395 }
2396
2397 int
2398 sfc_mae_rule_parse_pattern(struct sfc_adapter *sa,
2399                            const struct rte_flow_item pattern[],
2400                            struct sfc_flow_spec_mae *spec,
2401                            struct rte_flow_error *error)
2402 {
2403         struct sfc_mae_parse_ctx ctx_mae;
2404         struct sfc_flow_parse_ctx ctx;
2405         int rc;
2406
2407         memset(&ctx_mae, 0, sizeof(ctx_mae));
2408         ctx_mae.priority = spec->priority;
2409         ctx_mae.sa = sa;
2410
2411         rc = efx_mae_match_spec_init(sa->nic, EFX_MAE_RULE_ACTION,
2412                                      spec->priority,
2413                                      &ctx_mae.match_spec_action);
2414         if (rc != 0) {
2415                 rc = rte_flow_error_set(error, rc,
2416                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2417                         "Failed to initialise action rule match specification");
2418                 goto fail_init_match_spec_action;
2419         }
2420
2421         /*
2422          * As a preliminary setting, assume that there is no encapsulation
2423          * in the pattern. That is, pattern items are about to comprise a
2424          * match specification of type ACTION and use non-encap. field IDs.
2425          *
2426          * sfc_mae_rule_encap_parse_init() below may override this.
2427          */
2428         ctx_mae.encap_type = EFX_TUNNEL_PROTOCOL_NONE;
2429         ctx_mae.match_spec = ctx_mae.match_spec_action;
2430         ctx_mae.field_ids_remap = field_ids_no_remap;
2431
2432         ctx.type = SFC_FLOW_PARSE_CTX_MAE;
2433         ctx.mae = &ctx_mae;
2434
2435         rc = sfc_mae_rule_encap_parse_init(sa, pattern, &ctx_mae, error);
2436         if (rc != 0)
2437                 goto fail_encap_parse_init;
2438
2439         rc = sfc_flow_parse_pattern(sa, sfc_flow_items, RTE_DIM(sfc_flow_items),
2440                                     pattern, &ctx, error);
2441         if (rc != 0)
2442                 goto fail_parse_pattern;
2443
2444         rc = sfc_mae_rule_process_pattern_data(&ctx_mae, error);
2445         if (rc != 0)
2446                 goto fail_process_pattern_data;
2447
2448         rc = sfc_mae_rule_process_outer(sa, &ctx_mae, &spec->outer_rule, error);
2449         if (rc != 0)
2450                 goto fail_process_outer;
2451
2452         if (!efx_mae_match_spec_is_valid(sa->nic, ctx_mae.match_spec_action)) {
2453                 rc = rte_flow_error_set(error, ENOTSUP,
2454                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2455                                         "Inconsistent pattern");
2456                 goto fail_validate_match_spec_action;
2457         }
2458
2459         spec->match_spec = ctx_mae.match_spec_action;
2460
2461         return 0;
2462
2463 fail_validate_match_spec_action:
2464 fail_process_outer:
2465 fail_process_pattern_data:
2466 fail_parse_pattern:
2467         sfc_mae_rule_encap_parse_fini(sa, &ctx_mae);
2468
2469 fail_encap_parse_init:
2470         efx_mae_match_spec_fini(sa->nic, ctx_mae.match_spec_action);
2471
2472 fail_init_match_spec_action:
2473         return rc;
2474 }
2475
2476 /*
2477  * An action supported by MAE may correspond to a bundle of RTE flow actions,
2478  * in example, VLAN_PUSH = OF_PUSH_VLAN + OF_VLAN_SET_VID + OF_VLAN_SET_PCP.
2479  * That is, related RTE flow actions need to be tracked as parts of a whole
2480  * so that they can be combined into a single action and submitted to MAE
2481  * representation of a given rule's action set.
2482  *
2483  * Each RTE flow action provided by an application gets classified as
2484  * one belonging to some bundle type. If an action is not supposed to
2485  * belong to any bundle, or if this action is END, it is described as
2486  * one belonging to a dummy bundle of type EMPTY.
2487  *
2488  * A currently tracked bundle will be submitted if a repeating
2489  * action or an action of different bundle type follows.
2490  */
2491
2492 enum sfc_mae_actions_bundle_type {
2493         SFC_MAE_ACTIONS_BUNDLE_EMPTY = 0,
2494         SFC_MAE_ACTIONS_BUNDLE_VLAN_PUSH,
2495 };
2496
2497 struct sfc_mae_actions_bundle {
2498         enum sfc_mae_actions_bundle_type        type;
2499
2500         /* Indicates actions already tracked by the current bundle */
2501         uint64_t                                actions_mask;
2502
2503         /* Parameters used by SFC_MAE_ACTIONS_BUNDLE_VLAN_PUSH */
2504         rte_be16_t                              vlan_push_tpid;
2505         rte_be16_t                              vlan_push_tci;
2506 };
2507
2508 /*
2509  * Combine configuration of RTE flow actions tracked by the bundle into a
2510  * single action and submit the result to MAE action set specification.
2511  * Do nothing in the case of dummy action bundle.
2512  */
2513 static int
2514 sfc_mae_actions_bundle_submit(const struct sfc_mae_actions_bundle *bundle,
2515                               efx_mae_actions_t *spec)
2516 {
2517         int rc = 0;
2518
2519         switch (bundle->type) {
2520         case SFC_MAE_ACTIONS_BUNDLE_EMPTY:
2521                 break;
2522         case SFC_MAE_ACTIONS_BUNDLE_VLAN_PUSH:
2523                 rc = efx_mae_action_set_populate_vlan_push(
2524                         spec, bundle->vlan_push_tpid, bundle->vlan_push_tci);
2525                 break;
2526         default:
2527                 SFC_ASSERT(B_FALSE);
2528                 break;
2529         }
2530
2531         return rc;
2532 }
2533
2534 /*
2535  * Given the type of the next RTE flow action in the line, decide
2536  * whether a new bundle is about to start, and, if this is the case,
2537  * submit and reset the current bundle.
2538  */
2539 static int
2540 sfc_mae_actions_bundle_sync(const struct rte_flow_action *action,
2541                             struct sfc_mae_actions_bundle *bundle,
2542                             efx_mae_actions_t *spec,
2543                             struct rte_flow_error *error)
2544 {
2545         enum sfc_mae_actions_bundle_type bundle_type_new;
2546         int rc;
2547
2548         switch (action->type) {
2549         case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
2550         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
2551         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
2552                 bundle_type_new = SFC_MAE_ACTIONS_BUNDLE_VLAN_PUSH;
2553                 break;
2554         default:
2555                 /*
2556                  * Self-sufficient actions, including END, are handled in this
2557                  * case. No checks for unsupported actions are needed here
2558                  * because parsing doesn't occur at this point.
2559                  */
2560                 bundle_type_new = SFC_MAE_ACTIONS_BUNDLE_EMPTY;
2561                 break;
2562         }
2563
2564         if (bundle_type_new != bundle->type ||
2565             (bundle->actions_mask & (1ULL << action->type)) != 0) {
2566                 rc = sfc_mae_actions_bundle_submit(bundle, spec);
2567                 if (rc != 0)
2568                         goto fail_submit;
2569
2570                 memset(bundle, 0, sizeof(*bundle));
2571         }
2572
2573         bundle->type = bundle_type_new;
2574
2575         return 0;
2576
2577 fail_submit:
2578         return rte_flow_error_set(error, rc,
2579                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2580                         "Failed to request the (group of) action(s)");
2581 }
2582
2583 static void
2584 sfc_mae_rule_parse_action_of_push_vlan(
2585                             const struct rte_flow_action_of_push_vlan *conf,
2586                             struct sfc_mae_actions_bundle *bundle)
2587 {
2588         bundle->vlan_push_tpid = conf->ethertype;
2589 }
2590
2591 static void
2592 sfc_mae_rule_parse_action_of_set_vlan_vid(
2593                             const struct rte_flow_action_of_set_vlan_vid *conf,
2594                             struct sfc_mae_actions_bundle *bundle)
2595 {
2596         bundle->vlan_push_tci |= (conf->vlan_vid &
2597                                   rte_cpu_to_be_16(RTE_LEN2MASK(12, uint16_t)));
2598 }
2599
2600 static void
2601 sfc_mae_rule_parse_action_of_set_vlan_pcp(
2602                             const struct rte_flow_action_of_set_vlan_pcp *conf,
2603                             struct sfc_mae_actions_bundle *bundle)
2604 {
2605         uint16_t vlan_tci_pcp = (uint16_t)(conf->vlan_pcp &
2606                                            RTE_LEN2MASK(3, uint8_t)) << 13;
2607
2608         bundle->vlan_push_tci |= rte_cpu_to_be_16(vlan_tci_pcp);
2609 }
2610
2611 struct sfc_mae_parsed_item {
2612         const struct rte_flow_item      *item;
2613         size_t                          proto_header_ofst;
2614         size_t                          proto_header_size;
2615 };
2616
2617 /*
2618  * For each 16-bit word of the given header, override
2619  * bits enforced by the corresponding 16-bit mask.
2620  */
2621 static void
2622 sfc_mae_header_force_item_masks(uint8_t *header_buf,
2623                                 const struct sfc_mae_parsed_item *parsed_items,
2624                                 unsigned int nb_parsed_items)
2625 {
2626         unsigned int item_idx;
2627
2628         for (item_idx = 0; item_idx < nb_parsed_items; ++item_idx) {
2629                 const struct sfc_mae_parsed_item *parsed_item;
2630                 const struct rte_flow_item *item;
2631                 size_t proto_header_size;
2632                 size_t ofst;
2633
2634                 parsed_item = &parsed_items[item_idx];
2635                 proto_header_size = parsed_item->proto_header_size;
2636                 item = parsed_item->item;
2637
2638                 for (ofst = 0; ofst < proto_header_size;
2639                      ofst += sizeof(rte_be16_t)) {
2640                         rte_be16_t *wp = RTE_PTR_ADD(header_buf, ofst);
2641                         const rte_be16_t *w_maskp;
2642                         const rte_be16_t *w_specp;
2643
2644                         w_maskp = RTE_PTR_ADD(item->mask, ofst);
2645                         w_specp = RTE_PTR_ADD(item->spec, ofst);
2646
2647                         *wp &= ~(*w_maskp);
2648                         *wp |= (*w_specp & *w_maskp);
2649                 }
2650
2651                 header_buf += proto_header_size;
2652         }
2653 }
2654
2655 #define SFC_IPV4_TTL_DEF        0x40
2656 #define SFC_IPV6_VTC_FLOW_DEF   0x60000000
2657 #define SFC_IPV6_HOP_LIMITS_DEF 0xff
2658 #define SFC_VXLAN_FLAGS_DEF     0x08000000
2659
2660 static int
2661 sfc_mae_rule_parse_action_vxlan_encap(
2662                             struct sfc_mae *mae,
2663                             const struct rte_flow_action_vxlan_encap *conf,
2664                             efx_mae_actions_t *spec,
2665                             struct rte_flow_error *error)
2666 {
2667         struct sfc_mae_bounce_eh *bounce_eh = &mae->bounce_eh;
2668         struct rte_flow_item *pattern = conf->definition;
2669         uint8_t *buf = bounce_eh->buf;
2670
2671         /* This array will keep track of non-VOID pattern items. */
2672         struct sfc_mae_parsed_item parsed_items[1 /* Ethernet */ +
2673                                                 2 /* VLAN tags */ +
2674                                                 1 /* IPv4 or IPv6 */ +
2675                                                 1 /* UDP */ +
2676                                                 1 /* VXLAN */];
2677         unsigned int nb_parsed_items = 0;
2678
2679         size_t eth_ethertype_ofst = offsetof(struct rte_ether_hdr, ether_type);
2680         uint8_t dummy_buf[RTE_MAX(sizeof(struct rte_ipv4_hdr),
2681                                   sizeof(struct rte_ipv6_hdr))];
2682         struct rte_ipv4_hdr *ipv4 = (void *)dummy_buf;
2683         struct rte_ipv6_hdr *ipv6 = (void *)dummy_buf;
2684         struct rte_vxlan_hdr *vxlan = NULL;
2685         struct rte_udp_hdr *udp = NULL;
2686         unsigned int nb_vlan_tags = 0;
2687         size_t next_proto_ofst = 0;
2688         size_t ethertype_ofst = 0;
2689         uint64_t exp_items;
2690         int rc;
2691
2692         if (pattern == NULL) {
2693                 return rte_flow_error_set(error, EINVAL,
2694                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2695                                 "The encap. header definition is NULL");
2696         }
2697
2698         bounce_eh->type = EFX_TUNNEL_PROTOCOL_VXLAN;
2699         bounce_eh->size = 0;
2700
2701         /*
2702          * Process pattern items and remember non-VOID ones.
2703          * Defer applying masks until after the complete header
2704          * has been built from the pattern items.
2705          */
2706         exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_ETH);
2707
2708         for (; pattern->type != RTE_FLOW_ITEM_TYPE_END; ++pattern) {
2709                 struct sfc_mae_parsed_item *parsed_item;
2710                 const uint64_t exp_items_extra_vlan[] = {
2711                         RTE_BIT64(RTE_FLOW_ITEM_TYPE_VLAN), 0
2712                 };
2713                 size_t proto_header_size;
2714                 rte_be16_t *ethertypep;
2715                 uint8_t *next_protop;
2716                 uint8_t *buf_cur;
2717
2718                 if (pattern->spec == NULL) {
2719                         return rte_flow_error_set(error, EINVAL,
2720                                         RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2721                                         "NULL item spec in the encap. header");
2722                 }
2723
2724                 if (pattern->mask == NULL) {
2725                         return rte_flow_error_set(error, EINVAL,
2726                                         RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2727                                         "NULL item mask in the encap. header");
2728                 }
2729
2730                 if (pattern->last != NULL) {
2731                         /* This is not a match pattern, so disallow range. */
2732                         return rte_flow_error_set(error, EINVAL,
2733                                         RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2734                                         "Range item in the encap. header");
2735                 }
2736
2737                 if (pattern->type == RTE_FLOW_ITEM_TYPE_VOID) {
2738                         /* Handle VOID separately, for clarity. */
2739                         continue;
2740                 }
2741
2742                 if ((exp_items & RTE_BIT64(pattern->type)) == 0) {
2743                         return rte_flow_error_set(error, ENOTSUP,
2744                                         RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2745                                         "Unexpected item in the encap. header");
2746                 }
2747
2748                 parsed_item = &parsed_items[nb_parsed_items];
2749                 buf_cur = buf + bounce_eh->size;
2750
2751                 switch (pattern->type) {
2752                 case RTE_FLOW_ITEM_TYPE_ETH:
2753                         SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_ETH,
2754                                                exp_items);
2755                         RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_eth,
2756                                                   hdr) != 0);
2757
2758                         proto_header_size = sizeof(struct rte_ether_hdr);
2759
2760                         ethertype_ofst = eth_ethertype_ofst;
2761
2762                         exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_VLAN) |
2763                                     RTE_BIT64(RTE_FLOW_ITEM_TYPE_IPV4) |
2764                                     RTE_BIT64(RTE_FLOW_ITEM_TYPE_IPV6);
2765                         break;
2766                 case RTE_FLOW_ITEM_TYPE_VLAN:
2767                         SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_VLAN,
2768                                                exp_items);
2769                         RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_vlan,
2770                                                   hdr) != 0);
2771
2772                         proto_header_size = sizeof(struct rte_vlan_hdr);
2773
2774                         ethertypep = RTE_PTR_ADD(buf, eth_ethertype_ofst);
2775                         *ethertypep = RTE_BE16(RTE_ETHER_TYPE_QINQ);
2776
2777                         ethertypep = RTE_PTR_ADD(buf, ethertype_ofst);
2778                         *ethertypep = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2779
2780                         ethertype_ofst =
2781                             bounce_eh->size +
2782                             offsetof(struct rte_vlan_hdr, eth_proto);
2783
2784                         exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_IPV4) |
2785                                     RTE_BIT64(RTE_FLOW_ITEM_TYPE_IPV6);
2786                         exp_items |= exp_items_extra_vlan[nb_vlan_tags];
2787
2788                         ++nb_vlan_tags;
2789                         break;
2790                 case RTE_FLOW_ITEM_TYPE_IPV4:
2791                         SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_IPV4,
2792                                                exp_items);
2793                         RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_ipv4,
2794                                                   hdr) != 0);
2795
2796                         proto_header_size = sizeof(struct rte_ipv4_hdr);
2797
2798                         ethertypep = RTE_PTR_ADD(buf, ethertype_ofst);
2799                         *ethertypep = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2800
2801                         next_proto_ofst =
2802                             bounce_eh->size +
2803                             offsetof(struct rte_ipv4_hdr, next_proto_id);
2804
2805                         ipv4 = (struct rte_ipv4_hdr *)buf_cur;
2806
2807                         exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_UDP);
2808                         break;
2809                 case RTE_FLOW_ITEM_TYPE_IPV6:
2810                         SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_IPV6,
2811                                                exp_items);
2812                         RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_ipv6,
2813                                                   hdr) != 0);
2814
2815                         proto_header_size = sizeof(struct rte_ipv6_hdr);
2816
2817                         ethertypep = RTE_PTR_ADD(buf, ethertype_ofst);
2818                         *ethertypep = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2819
2820                         next_proto_ofst = bounce_eh->size +
2821                                           offsetof(struct rte_ipv6_hdr, proto);
2822
2823                         ipv6 = (struct rte_ipv6_hdr *)buf_cur;
2824
2825                         exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_UDP);
2826                         break;
2827                 case RTE_FLOW_ITEM_TYPE_UDP:
2828                         SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_UDP,
2829                                                exp_items);
2830                         RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_udp,
2831                                                   hdr) != 0);
2832
2833                         proto_header_size = sizeof(struct rte_udp_hdr);
2834
2835                         next_protop = RTE_PTR_ADD(buf, next_proto_ofst);
2836                         *next_protop = IPPROTO_UDP;
2837
2838                         udp = (struct rte_udp_hdr *)buf_cur;
2839
2840                         exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_VXLAN);
2841                         break;
2842                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2843                         SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_VXLAN,
2844                                                exp_items);
2845                         RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_vxlan,
2846                                                   hdr) != 0);
2847
2848                         proto_header_size = sizeof(struct rte_vxlan_hdr);
2849
2850                         vxlan = (struct rte_vxlan_hdr *)buf_cur;
2851
2852                         udp->dst_port = RTE_BE16(RTE_VXLAN_DEFAULT_PORT);
2853                         udp->dgram_len = RTE_BE16(sizeof(*udp) +
2854                                                   sizeof(*vxlan));
2855                         udp->dgram_cksum = 0;
2856
2857                         exp_items = 0;
2858                         break;
2859                 default:
2860                         return rte_flow_error_set(error, ENOTSUP,
2861                                         RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2862                                         "Unknown item in the encap. header");
2863                 }
2864
2865                 if (bounce_eh->size + proto_header_size > bounce_eh->buf_size) {
2866                         return rte_flow_error_set(error, E2BIG,
2867                                         RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2868                                         "The encap. header is too big");
2869                 }
2870
2871                 if ((proto_header_size & 1) != 0) {
2872                         return rte_flow_error_set(error, EINVAL,
2873                                         RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2874                                         "Odd layer size in the encap. header");
2875                 }
2876
2877                 rte_memcpy(buf_cur, pattern->spec, proto_header_size);
2878                 bounce_eh->size += proto_header_size;
2879
2880                 parsed_item->item = pattern;
2881                 parsed_item->proto_header_size = proto_header_size;
2882                 ++nb_parsed_items;
2883         }
2884
2885         if (exp_items != 0) {
2886                 /* Parsing item VXLAN would have reset exp_items to 0. */
2887                 return rte_flow_error_set(error, ENOTSUP,
2888                                         RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2889                                         "No item VXLAN in the encap. header");
2890         }
2891
2892         /* One of the pointers (ipv4, ipv6) refers to a dummy area. */
2893         ipv4->version_ihl = RTE_IPV4_VHL_DEF;
2894         ipv4->time_to_live = SFC_IPV4_TTL_DEF;
2895         ipv4->total_length = RTE_BE16(sizeof(*ipv4) + sizeof(*udp) +
2896                                       sizeof(*vxlan));
2897         /* The HW cannot compute this checksum. */
2898         ipv4->hdr_checksum = 0;
2899         ipv4->hdr_checksum = rte_ipv4_cksum(ipv4);
2900
2901         ipv6->vtc_flow = RTE_BE32(SFC_IPV6_VTC_FLOW_DEF);
2902         ipv6->hop_limits = SFC_IPV6_HOP_LIMITS_DEF;
2903         ipv6->payload_len = udp->dgram_len;
2904
2905         vxlan->vx_flags = RTE_BE32(SFC_VXLAN_FLAGS_DEF);
2906
2907         /* Take care of the masks. */
2908         sfc_mae_header_force_item_masks(buf, parsed_items, nb_parsed_items);
2909
2910         rc = efx_mae_action_set_populate_encap(spec);
2911         if (rc != 0) {
2912                 rc = rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ACTION,
2913                                 NULL, "failed to request action ENCAP");
2914         }
2915
2916         return rc;
2917 }
2918
2919 static int
2920 sfc_mae_rule_parse_action_mark(struct sfc_adapter *sa,
2921                                const struct rte_flow_action_mark *conf,
2922                                efx_mae_actions_t *spec)
2923 {
2924         int rc;
2925
2926         rc = efx_mae_action_set_populate_mark(spec, conf->id);
2927         if (rc != 0)
2928                 sfc_err(sa, "failed to request action MARK: %s", strerror(rc));
2929
2930         return rc;
2931 }
2932
2933 static int
2934 sfc_mae_rule_parse_action_count(struct sfc_adapter *sa,
2935                                 const struct rte_flow_action_count *conf
2936                                         __rte_unused,
2937                                 efx_mae_actions_t *spec)
2938 {
2939         int rc;
2940
2941         if ((sa->counter_rxq.state & SFC_COUNTER_RXQ_INITIALIZED) == 0) {
2942                 sfc_err(sa,
2943                         "counter queue is not configured for COUNT action");
2944                 rc = EINVAL;
2945                 goto fail_counter_queue_uninit;
2946         }
2947
2948         if (sfc_get_service_lcore(SOCKET_ID_ANY) == RTE_MAX_LCORE) {
2949                 rc = EINVAL;
2950                 goto fail_no_service_core;
2951         }
2952
2953         rc = efx_mae_action_set_populate_count(spec);
2954         if (rc != 0) {
2955                 sfc_err(sa,
2956                         "failed to populate counters in MAE action set: %s",
2957                         rte_strerror(rc));
2958                 goto fail_populate_count;
2959         }
2960
2961         return 0;
2962
2963 fail_populate_count:
2964 fail_no_service_core:
2965 fail_counter_queue_uninit:
2966
2967         return rc;
2968 }
2969
2970 static int
2971 sfc_mae_rule_parse_action_phy_port(struct sfc_adapter *sa,
2972                                    const struct rte_flow_action_phy_port *conf,
2973                                    efx_mae_actions_t *spec)
2974 {
2975         efx_mport_sel_t mport;
2976         uint32_t phy_port;
2977         int rc;
2978
2979         if (conf->original != 0)
2980                 phy_port = efx_nic_cfg_get(sa->nic)->enc_assigned_port;
2981         else
2982                 phy_port = conf->index;
2983
2984         rc = efx_mae_mport_by_phy_port(phy_port, &mport);
2985         if (rc != 0) {
2986                 sfc_err(sa, "failed to convert phys. port ID %u to m-port selector: %s",
2987                         phy_port, strerror(rc));
2988                 return rc;
2989         }
2990
2991         rc = efx_mae_action_set_populate_deliver(spec, &mport);
2992         if (rc != 0) {
2993                 sfc_err(sa, "failed to request action DELIVER with m-port selector 0x%08x: %s",
2994                         mport.sel, strerror(rc));
2995         }
2996
2997         return rc;
2998 }
2999
3000 static int
3001 sfc_mae_rule_parse_action_pf_vf(struct sfc_adapter *sa,
3002                                 const struct rte_flow_action_vf *vf_conf,
3003                                 efx_mae_actions_t *spec)
3004 {
3005         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
3006         efx_mport_sel_t mport;
3007         uint32_t vf;
3008         int rc;
3009
3010         if (vf_conf == NULL)
3011                 vf = EFX_PCI_VF_INVALID;
3012         else if (vf_conf->original != 0)
3013                 vf = encp->enc_vf;
3014         else
3015                 vf = vf_conf->id;
3016
3017         rc = efx_mae_mport_by_pcie_function(encp->enc_pf, vf, &mport);
3018         if (rc != 0) {
3019                 sfc_err(sa, "failed to convert PF %u VF %d to m-port: %s",
3020                         encp->enc_pf, (vf != EFX_PCI_VF_INVALID) ? (int)vf : -1,
3021                         strerror(rc));
3022                 return rc;
3023         }
3024
3025         rc = efx_mae_action_set_populate_deliver(spec, &mport);
3026         if (rc != 0) {
3027                 sfc_err(sa, "failed to request action DELIVER with m-port selector 0x%08x: %s",
3028                         mport.sel, strerror(rc));
3029         }
3030
3031         return rc;
3032 }
3033
3034 static int
3035 sfc_mae_rule_parse_action_port_id(struct sfc_adapter *sa,
3036                                   const struct rte_flow_action_port_id *conf,
3037                                   efx_mae_actions_t *spec)
3038 {
3039         struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
3040         struct sfc_mae *mae = &sa->mae;
3041         efx_mport_sel_t mport;
3042         uint16_t port_id;
3043         int rc;
3044
3045         if (conf->id > UINT16_MAX)
3046                 return EOVERFLOW;
3047
3048         port_id = (conf->original != 0) ? sas->port_id : conf->id;
3049
3050         rc = sfc_mae_switch_port_by_ethdev(mae->switch_domain_id,
3051                                            port_id, &mport);
3052         if (rc != 0) {
3053                 sfc_err(sa, "failed to find MAE switch port SW entry for RTE ethdev port %u: %s",
3054                         port_id, strerror(rc));
3055                 return rc;
3056         }
3057
3058         rc = efx_mae_action_set_populate_deliver(spec, &mport);
3059         if (rc != 0) {
3060                 sfc_err(sa, "failed to request action DELIVER with m-port selector 0x%08x: %s",
3061                         mport.sel, strerror(rc));
3062         }
3063
3064         return rc;
3065 }
3066
3067 static const char * const action_names[] = {
3068         [RTE_FLOW_ACTION_TYPE_VXLAN_DECAP] = "VXLAN_DECAP",
3069         [RTE_FLOW_ACTION_TYPE_OF_POP_VLAN] = "OF_POP_VLAN",
3070         [RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN] = "OF_PUSH_VLAN",
3071         [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID] = "OF_SET_VLAN_VID",
3072         [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP] = "OF_SET_VLAN_PCP",
3073         [RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP] = "VXLAN_ENCAP",
3074         [RTE_FLOW_ACTION_TYPE_FLAG] = "FLAG",
3075         [RTE_FLOW_ACTION_TYPE_MARK] = "MARK",
3076         [RTE_FLOW_ACTION_TYPE_PHY_PORT] = "PHY_PORT",
3077         [RTE_FLOW_ACTION_TYPE_PF] = "PF",
3078         [RTE_FLOW_ACTION_TYPE_VF] = "VF",
3079         [RTE_FLOW_ACTION_TYPE_PORT_ID] = "PORT_ID",
3080         [RTE_FLOW_ACTION_TYPE_DROP] = "DROP",
3081 };
3082
3083 static int
3084 sfc_mae_rule_parse_action(struct sfc_adapter *sa,
3085                           const struct rte_flow_action *action,
3086                           const struct sfc_mae_outer_rule *outer_rule,
3087                           struct sfc_mae_actions_bundle *bundle,
3088                           efx_mae_actions_t *spec,
3089                           struct rte_flow_error *error)
3090 {
3091         bool custom_error = B_FALSE;
3092         int rc = 0;
3093
3094         switch (action->type) {
3095         case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3096                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_VXLAN_DECAP,
3097                                        bundle->actions_mask);
3098                 if (outer_rule == NULL ||
3099                     outer_rule->encap_type != EFX_TUNNEL_PROTOCOL_VXLAN)
3100                         rc = EINVAL;
3101                 else
3102                         rc = efx_mae_action_set_populate_decap(spec);
3103                 break;
3104         case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
3105                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_OF_POP_VLAN,
3106                                        bundle->actions_mask);
3107                 rc = efx_mae_action_set_populate_vlan_pop(spec);
3108                 break;
3109         case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3110                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN,
3111                                        bundle->actions_mask);
3112                 sfc_mae_rule_parse_action_of_push_vlan(action->conf, bundle);
3113                 break;
3114         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3115                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID,
3116                                        bundle->actions_mask);
3117                 sfc_mae_rule_parse_action_of_set_vlan_vid(action->conf, bundle);
3118                 break;
3119         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3120                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP,
3121                                        bundle->actions_mask);
3122                 sfc_mae_rule_parse_action_of_set_vlan_pcp(action->conf, bundle);
3123                 break;
3124         case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3125                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP,
3126                                        bundle->actions_mask);
3127                 rc = sfc_mae_rule_parse_action_vxlan_encap(&sa->mae,
3128                                                            action->conf,
3129                                                            spec, error);
3130                 custom_error = B_TRUE;
3131                 break;
3132         case RTE_FLOW_ACTION_TYPE_COUNT:
3133                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_COUNT,
3134                                        bundle->actions_mask);
3135                 rc = sfc_mae_rule_parse_action_count(sa, action->conf, spec);
3136                 break;
3137         case RTE_FLOW_ACTION_TYPE_FLAG:
3138                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_FLAG,
3139                                        bundle->actions_mask);
3140                 rc = efx_mae_action_set_populate_flag(spec);
3141                 break;
3142         case RTE_FLOW_ACTION_TYPE_MARK:
3143                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_MARK,
3144                                        bundle->actions_mask);
3145                 rc = sfc_mae_rule_parse_action_mark(sa, action->conf, spec);
3146                 break;
3147         case RTE_FLOW_ACTION_TYPE_PHY_PORT:
3148                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_PHY_PORT,
3149                                        bundle->actions_mask);
3150                 rc = sfc_mae_rule_parse_action_phy_port(sa, action->conf, spec);
3151                 break;
3152         case RTE_FLOW_ACTION_TYPE_PF:
3153                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_PF,
3154                                        bundle->actions_mask);
3155                 rc = sfc_mae_rule_parse_action_pf_vf(sa, NULL, spec);
3156                 break;
3157         case RTE_FLOW_ACTION_TYPE_VF:
3158                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_VF,
3159                                        bundle->actions_mask);
3160                 rc = sfc_mae_rule_parse_action_pf_vf(sa, action->conf, spec);
3161                 break;
3162         case RTE_FLOW_ACTION_TYPE_PORT_ID:
3163                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_PORT_ID,
3164                                        bundle->actions_mask);
3165                 rc = sfc_mae_rule_parse_action_port_id(sa, action->conf, spec);
3166                 break;
3167         case RTE_FLOW_ACTION_TYPE_DROP:
3168                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_DROP,
3169                                        bundle->actions_mask);
3170                 rc = efx_mae_action_set_populate_drop(spec);
3171                 break;
3172         default:
3173                 return rte_flow_error_set(error, ENOTSUP,
3174                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3175                                 "Unsupported action");
3176         }
3177
3178         if (rc == 0) {
3179                 bundle->actions_mask |= (1ULL << action->type);
3180         } else if (!custom_error) {
3181                 if (action->type < RTE_DIM(action_names)) {
3182                         const char *action_name = action_names[action->type];
3183
3184                         if (action_name != NULL) {
3185                                 sfc_err(sa, "action %s was rejected: %s",
3186                                         action_name, strerror(rc));
3187                         }
3188                 }
3189                 rc = rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ACTION,
3190                                 NULL, "Failed to request the action");
3191         }
3192
3193         return rc;
3194 }
3195
3196 static void
3197 sfc_mae_bounce_eh_invalidate(struct sfc_mae_bounce_eh *bounce_eh)
3198 {
3199         bounce_eh->type = EFX_TUNNEL_PROTOCOL_NONE;
3200 }
3201
3202 static int
3203 sfc_mae_process_encap_header(struct sfc_adapter *sa,
3204                              const struct sfc_mae_bounce_eh *bounce_eh,
3205                              struct sfc_mae_encap_header **encap_headerp)
3206 {
3207         if (bounce_eh->type == EFX_TUNNEL_PROTOCOL_NONE) {
3208                 encap_headerp = NULL;
3209                 return 0;
3210         }
3211
3212         *encap_headerp = sfc_mae_encap_header_attach(sa, bounce_eh);
3213         if (*encap_headerp != NULL)
3214                 return 0;
3215
3216         return sfc_mae_encap_header_add(sa, bounce_eh, encap_headerp);
3217 }
3218
3219 int
3220 sfc_mae_rule_parse_actions(struct sfc_adapter *sa,
3221                            const struct rte_flow_action actions[],
3222                            struct sfc_flow_spec_mae *spec_mae,
3223                            struct rte_flow_error *error)
3224 {
3225         struct sfc_mae_encap_header *encap_header = NULL;
3226         struct sfc_mae_actions_bundle bundle = {0};
3227         const struct rte_flow_action *action;
3228         struct sfc_mae *mae = &sa->mae;
3229         efx_mae_actions_t *spec;
3230         unsigned int n_count;
3231         int rc;
3232
3233         rte_errno = 0;
3234
3235         if (actions == NULL) {
3236                 return rte_flow_error_set(error, EINVAL,
3237                                 RTE_FLOW_ERROR_TYPE_ACTION_NUM, NULL,
3238                                 "NULL actions");
3239         }
3240
3241         rc = efx_mae_action_set_spec_init(sa->nic, &spec);
3242         if (rc != 0)
3243                 goto fail_action_set_spec_init;
3244
3245         /* Cleanup after previous encap. header bounce buffer usage. */
3246         sfc_mae_bounce_eh_invalidate(&mae->bounce_eh);
3247
3248         for (action = actions;
3249              action->type != RTE_FLOW_ACTION_TYPE_END; ++action) {
3250                 rc = sfc_mae_actions_bundle_sync(action, &bundle, spec, error);
3251                 if (rc != 0)
3252                         goto fail_rule_parse_action;
3253
3254                 rc = sfc_mae_rule_parse_action(sa, action, spec_mae->outer_rule,
3255                                                &bundle, spec, error);
3256                 if (rc != 0)
3257                         goto fail_rule_parse_action;
3258         }
3259
3260         rc = sfc_mae_actions_bundle_sync(action, &bundle, spec, error);
3261         if (rc != 0)
3262                 goto fail_rule_parse_action;
3263
3264         rc = sfc_mae_process_encap_header(sa, &mae->bounce_eh, &encap_header);
3265         if (rc != 0)
3266                 goto fail_process_encap_header;
3267
3268         n_count = efx_mae_action_set_get_nb_count(spec);
3269         if (n_count > 1) {
3270                 rc = ENOTSUP;
3271                 sfc_err(sa, "too many count actions requested: %u", n_count);
3272                 goto fail_nb_count;
3273         }
3274
3275         spec_mae->action_set = sfc_mae_action_set_attach(sa, encap_header,
3276                                                          n_count, spec);
3277         if (spec_mae->action_set != NULL) {
3278                 sfc_mae_encap_header_del(sa, encap_header);
3279                 efx_mae_action_set_spec_fini(sa->nic, spec);
3280                 return 0;
3281         }
3282
3283         rc = sfc_mae_action_set_add(sa, actions, spec, encap_header, n_count,
3284                                     &spec_mae->action_set);
3285         if (rc != 0)
3286                 goto fail_action_set_add;
3287
3288         return 0;
3289
3290 fail_action_set_add:
3291 fail_nb_count:
3292         sfc_mae_encap_header_del(sa, encap_header);
3293
3294 fail_process_encap_header:
3295 fail_rule_parse_action:
3296         efx_mae_action_set_spec_fini(sa->nic, spec);
3297
3298 fail_action_set_spec_init:
3299         if (rc > 0 && rte_errno == 0) {
3300                 rc = rte_flow_error_set(error, rc,
3301                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3302                         NULL, "Failed to process the action");
3303         }
3304         return rc;
3305 }
3306
3307 static bool
3308 sfc_mae_rules_class_cmp(struct sfc_adapter *sa,
3309                         const efx_mae_match_spec_t *left,
3310                         const efx_mae_match_spec_t *right)
3311 {
3312         bool have_same_class;
3313         int rc;
3314
3315         rc = efx_mae_match_specs_class_cmp(sa->nic, left, right,
3316                                            &have_same_class);
3317
3318         return (rc == 0) ? have_same_class : false;
3319 }
3320
3321 static int
3322 sfc_mae_outer_rule_class_verify(struct sfc_adapter *sa,
3323                                 struct sfc_mae_outer_rule *rule)
3324 {
3325         struct sfc_mae_fw_rsrc *fw_rsrc = &rule->fw_rsrc;
3326         struct sfc_mae_outer_rule *entry;
3327         struct sfc_mae *mae = &sa->mae;
3328
3329         if (fw_rsrc->rule_id.id != EFX_MAE_RSRC_ID_INVALID) {
3330                 /* An active rule is reused. It's class is wittingly valid. */
3331                 return 0;
3332         }
3333
3334         TAILQ_FOREACH_REVERSE(entry, &mae->outer_rules,
3335                               sfc_mae_outer_rules, entries) {
3336                 const efx_mae_match_spec_t *left = entry->match_spec;
3337                 const efx_mae_match_spec_t *right = rule->match_spec;
3338
3339                 if (entry == rule)
3340                         continue;
3341
3342                 if (sfc_mae_rules_class_cmp(sa, left, right))
3343                         return 0;
3344         }
3345
3346         sfc_info(sa, "for now, the HW doesn't support rule validation, and HW "
3347                  "support for outer frame pattern items is not guaranteed; "
3348                  "other than that, the items are valid from SW standpoint");
3349         return 0;
3350 }
3351
3352 static int
3353 sfc_mae_action_rule_class_verify(struct sfc_adapter *sa,
3354                                  struct sfc_flow_spec_mae *spec)
3355 {
3356         const struct rte_flow *entry;
3357
3358         TAILQ_FOREACH_REVERSE(entry, &sa->flow_list, sfc_flow_list, entries) {
3359                 const struct sfc_flow_spec *entry_spec = &entry->spec;
3360                 const struct sfc_flow_spec_mae *es_mae = &entry_spec->mae;
3361                 const efx_mae_match_spec_t *left = es_mae->match_spec;
3362                 const efx_mae_match_spec_t *right = spec->match_spec;
3363
3364                 switch (entry_spec->type) {
3365                 case SFC_FLOW_SPEC_FILTER:
3366                         /* Ignore VNIC-level flows */
3367                         break;
3368                 case SFC_FLOW_SPEC_MAE:
3369                         if (sfc_mae_rules_class_cmp(sa, left, right))
3370                                 return 0;
3371                         break;
3372                 default:
3373                         SFC_ASSERT(false);
3374                 }
3375         }
3376
3377         sfc_info(sa, "for now, the HW doesn't support rule validation, and HW "
3378                  "support for inner frame pattern items is not guaranteed; "
3379                  "other than that, the items are valid from SW standpoint");
3380         return 0;
3381 }
3382
3383 /**
3384  * Confirm that a given flow can be accepted by the FW.
3385  *
3386  * @param sa
3387  *   Software adapter context
3388  * @param flow
3389  *   Flow to be verified
3390  * @return
3391  *   Zero on success and non-zero in the case of error.
3392  *   A special value of EAGAIN indicates that the adapter is
3393  *   not in started state. This state is compulsory because
3394  *   it only makes sense to compare the rule class of the flow
3395  *   being validated with classes of the active rules.
3396  *   Such classes are wittingly supported by the FW.
3397  */
3398 int
3399 sfc_mae_flow_verify(struct sfc_adapter *sa,
3400                     struct rte_flow *flow)
3401 {
3402         struct sfc_flow_spec *spec = &flow->spec;
3403         struct sfc_flow_spec_mae *spec_mae = &spec->mae;
3404         struct sfc_mae_outer_rule *outer_rule = spec_mae->outer_rule;
3405         int rc;
3406
3407         SFC_ASSERT(sfc_adapter_is_locked(sa));
3408
3409         if (sa->state != SFC_ETHDEV_STARTED)
3410                 return EAGAIN;
3411
3412         if (outer_rule != NULL) {
3413                 rc = sfc_mae_outer_rule_class_verify(sa, outer_rule);
3414                 if (rc != 0)
3415                         return rc;
3416         }
3417
3418         return sfc_mae_action_rule_class_verify(sa, spec_mae);
3419 }
3420
3421 int
3422 sfc_mae_flow_insert(struct sfc_adapter *sa,
3423                     struct rte_flow *flow)
3424 {
3425         struct sfc_flow_spec *spec = &flow->spec;
3426         struct sfc_flow_spec_mae *spec_mae = &spec->mae;
3427         struct sfc_mae_outer_rule *outer_rule = spec_mae->outer_rule;
3428         struct sfc_mae_action_set *action_set = spec_mae->action_set;
3429         struct sfc_mae_fw_rsrc *fw_rsrc = &action_set->fw_rsrc;
3430         int rc;
3431
3432         SFC_ASSERT(spec_mae->rule_id.id == EFX_MAE_RSRC_ID_INVALID);
3433         SFC_ASSERT(action_set != NULL);
3434
3435         if (outer_rule != NULL) {
3436                 rc = sfc_mae_outer_rule_enable(sa, outer_rule,
3437                                                spec_mae->match_spec);
3438                 if (rc != 0)
3439                         goto fail_outer_rule_enable;
3440         }
3441
3442         rc = sfc_mae_action_set_enable(sa, action_set);
3443         if (rc != 0)
3444                 goto fail_action_set_enable;
3445
3446         if (action_set->n_counters > 0) {
3447                 rc = sfc_mae_counter_start(sa);
3448                 if (rc != 0) {
3449                         sfc_err(sa, "failed to start MAE counters support: %s",
3450                                 rte_strerror(rc));
3451                         goto fail_mae_counter_start;
3452                 }
3453         }
3454
3455         rc = efx_mae_action_rule_insert(sa->nic, spec_mae->match_spec,
3456                                         NULL, &fw_rsrc->aset_id,
3457                                         &spec_mae->rule_id);
3458         if (rc != 0)
3459                 goto fail_action_rule_insert;
3460
3461         sfc_dbg(sa, "enabled flow=%p: AR_ID=0x%08x",
3462                 flow, spec_mae->rule_id.id);
3463
3464         return 0;
3465
3466 fail_action_rule_insert:
3467 fail_mae_counter_start:
3468         sfc_mae_action_set_disable(sa, action_set);
3469
3470 fail_action_set_enable:
3471         if (outer_rule != NULL)
3472                 sfc_mae_outer_rule_disable(sa, outer_rule);
3473
3474 fail_outer_rule_enable:
3475         return rc;
3476 }
3477
3478 int
3479 sfc_mae_flow_remove(struct sfc_adapter *sa,
3480                     struct rte_flow *flow)
3481 {
3482         struct sfc_flow_spec *spec = &flow->spec;
3483         struct sfc_flow_spec_mae *spec_mae = &spec->mae;
3484         struct sfc_mae_action_set *action_set = spec_mae->action_set;
3485         struct sfc_mae_outer_rule *outer_rule = spec_mae->outer_rule;
3486         int rc;
3487
3488         SFC_ASSERT(spec_mae->rule_id.id != EFX_MAE_RSRC_ID_INVALID);
3489         SFC_ASSERT(action_set != NULL);
3490
3491         rc = efx_mae_action_rule_remove(sa->nic, &spec_mae->rule_id);
3492         if (rc != 0) {
3493                 sfc_err(sa, "failed to disable flow=%p with AR_ID=0x%08x: %s",
3494                         flow, spec_mae->rule_id.id, strerror(rc));
3495         }
3496         sfc_dbg(sa, "disabled flow=%p with AR_ID=0x%08x",
3497                 flow, spec_mae->rule_id.id);
3498         spec_mae->rule_id.id = EFX_MAE_RSRC_ID_INVALID;
3499
3500         sfc_mae_action_set_disable(sa, action_set);
3501
3502         if (outer_rule != NULL)
3503                 sfc_mae_outer_rule_disable(sa, outer_rule);
3504
3505         return 0;
3506 }
3507
3508 static int
3509 sfc_mae_query_counter(struct sfc_adapter *sa,
3510                       struct sfc_flow_spec_mae *spec,
3511                       const struct rte_flow_action *action,
3512                       struct rte_flow_query_count *data,
3513                       struct rte_flow_error *error)
3514 {
3515         struct sfc_mae_action_set *action_set = spec->action_set;
3516         const struct rte_flow_action_count *conf = action->conf;
3517         unsigned int i;
3518         int rc;
3519
3520         if (action_set->n_counters == 0) {
3521                 return rte_flow_error_set(error, EINVAL,
3522                         RTE_FLOW_ERROR_TYPE_ACTION, action,
3523                         "Queried flow rule does not have count actions");
3524         }
3525
3526         for (i = 0; i < action_set->n_counters; i++) {
3527                 /*
3528                  * Get the first available counter of the flow rule if
3529                  * counter ID is not specified.
3530                  */
3531                 if (conf != NULL && action_set->counters[i].rte_id != conf->id)
3532                         continue;
3533
3534                 rc = sfc_mae_counter_get(&sa->mae.counter_registry.counters,
3535                                          &action_set->counters[i], data);
3536                 if (rc != 0) {
3537                         return rte_flow_error_set(error, EINVAL,
3538                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
3539                                 "Queried flow rule counter action is invalid");
3540                 }
3541
3542                 return 0;
3543         }
3544
3545         return rte_flow_error_set(error, ENOENT,
3546                                   RTE_FLOW_ERROR_TYPE_ACTION, action,
3547                                   "No such flow rule action count ID");
3548 }
3549
3550 int
3551 sfc_mae_flow_query(struct rte_eth_dev *dev,
3552                    struct rte_flow *flow,
3553                    const struct rte_flow_action *action,
3554                    void *data,
3555                    struct rte_flow_error *error)
3556 {
3557         struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev);
3558         struct sfc_flow_spec *spec = &flow->spec;
3559         struct sfc_flow_spec_mae *spec_mae = &spec->mae;
3560
3561         switch (action->type) {
3562         case RTE_FLOW_ACTION_TYPE_COUNT:
3563                 return sfc_mae_query_counter(sa, spec_mae, action,
3564                                              data, error);
3565         default:
3566                 return rte_flow_error_set(error, ENOTSUP,
3567                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3568                         "Query for action of this type is not supported");
3569         }
3570 }
3571
3572 int
3573 sfc_mae_switchdev_init(struct sfc_adapter *sa)
3574 {
3575         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
3576         struct sfc_mae *mae = &sa->mae;
3577         efx_mport_sel_t pf;
3578         efx_mport_sel_t phy;
3579         int rc;
3580
3581         sfc_log_init(sa, "entry");
3582
3583         if (!sa->switchdev) {
3584                 sfc_log_init(sa, "switchdev is not enabled - skip");
3585                 return 0;
3586         }
3587
3588         if (mae->status != SFC_MAE_STATUS_SUPPORTED) {
3589                 rc = ENOTSUP;
3590                 sfc_err(sa, "failed to init switchdev - no MAE support");
3591                 goto fail_no_mae;
3592         }
3593
3594         rc = efx_mae_mport_by_pcie_function(encp->enc_pf, EFX_PCI_VF_INVALID,
3595                                             &pf);
3596         if (rc != 0) {
3597                 sfc_err(sa, "failed get PF mport");
3598                 goto fail_pf_get;
3599         }
3600
3601         rc = efx_mae_mport_by_phy_port(encp->enc_assigned_port, &phy);
3602         if (rc != 0) {
3603                 sfc_err(sa, "failed get PHY mport");
3604                 goto fail_phy_get;
3605         }
3606
3607         rc = sfc_mae_rule_add_mport_match_deliver(sa, &pf, &phy,
3608                         SFC_MAE_RULE_PRIO_LOWEST,
3609                         &mae->switchdev_rule_pf_to_ext);
3610         if (rc != 0) {
3611                 sfc_err(sa, "failed add MAE rule to forward from PF to PHY");
3612                 goto fail_pf_add;
3613         }
3614
3615         rc = sfc_mae_rule_add_mport_match_deliver(sa, &phy, &pf,
3616                         SFC_MAE_RULE_PRIO_LOWEST,
3617                         &mae->switchdev_rule_ext_to_pf);
3618         if (rc != 0) {
3619                 sfc_err(sa, "failed add MAE rule to forward from PHY to PF");
3620                 goto fail_phy_add;
3621         }
3622
3623         sfc_log_init(sa, "done");
3624
3625         return 0;
3626
3627 fail_phy_add:
3628         sfc_mae_rule_del(sa, mae->switchdev_rule_pf_to_ext);
3629
3630 fail_pf_add:
3631 fail_phy_get:
3632 fail_pf_get:
3633 fail_no_mae:
3634         sfc_log_init(sa, "failed: %s", rte_strerror(rc));
3635         return rc;
3636 }
3637
3638 void
3639 sfc_mae_switchdev_fini(struct sfc_adapter *sa)
3640 {
3641         struct sfc_mae *mae = &sa->mae;
3642
3643         if (!sa->switchdev)
3644                 return;
3645
3646         sfc_mae_rule_del(sa, mae->switchdev_rule_pf_to_ext);
3647         sfc_mae_rule_del(sa, mae->switchdev_rule_ext_to_pf);
3648 }