net/sfc: fence off 8 bits in Rx mark for tunnel offload
[dpdk.git] / drivers / net / sfc / sfc_mae.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  *
3  * Copyright(c) 2019-2021 Xilinx, Inc.
4  * Copyright(c) 2019 Solarflare Communications Inc.
5  *
6  * This software was jointly developed between OKTET Labs (under contract
7  * for Solarflare) and Solarflare Communications, Inc.
8  */
9
10 #include <stdbool.h>
11
12 #include <rte_bitops.h>
13 #include <rte_common.h>
14 #include <rte_vxlan.h>
15
16 #include "efx.h"
17
18 #include "sfc.h"
19 #include "sfc_flow_tunnel.h"
20 #include "sfc_mae_counter.h"
21 #include "sfc_log.h"
22 #include "sfc_switch.h"
23 #include "sfc_service.h"
24
25 static int
26 sfc_mae_assign_entity_mport(struct sfc_adapter *sa,
27                             efx_mport_sel_t *mportp)
28 {
29         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
30
31         return efx_mae_mport_by_pcie_function(encp->enc_pf, encp->enc_vf,
32                                               mportp);
33 }
34
35 static int
36 sfc_mae_counter_registry_init(struct sfc_mae_counter_registry *registry,
37                               uint32_t nb_counters_max)
38 {
39         return sfc_mae_counters_init(&registry->counters, nb_counters_max);
40 }
41
42 static void
43 sfc_mae_counter_registry_fini(struct sfc_mae_counter_registry *registry)
44 {
45         sfc_mae_counters_fini(&registry->counters);
46 }
47
48 static int
49 sfc_mae_internal_rule_find_empty_slot(struct sfc_adapter *sa,
50                                       struct sfc_mae_rule **rule)
51 {
52         struct sfc_mae *mae = &sa->mae;
53         struct sfc_mae_internal_rules *internal_rules = &mae->internal_rules;
54         unsigned int entry;
55         int rc;
56
57         for (entry = 0; entry < SFC_MAE_NB_RULES_MAX; entry++) {
58                 if (internal_rules->rules[entry].spec == NULL)
59                         break;
60         }
61
62         if (entry == SFC_MAE_NB_RULES_MAX) {
63                 rc = ENOSPC;
64                 sfc_err(sa, "failed too many rules (%u rules used)", entry);
65                 goto fail_too_many_rules;
66         }
67
68         *rule = &internal_rules->rules[entry];
69
70         return 0;
71
72 fail_too_many_rules:
73         return rc;
74 }
75
76 int
77 sfc_mae_rule_add_mport_match_deliver(struct sfc_adapter *sa,
78                                      const efx_mport_sel_t *mport_match,
79                                      const efx_mport_sel_t *mport_deliver,
80                                      int prio, struct sfc_mae_rule **rulep)
81 {
82         struct sfc_mae *mae = &sa->mae;
83         struct sfc_mae_rule *rule;
84         int rc;
85
86         sfc_log_init(sa, "entry");
87
88         if (prio > 0 && (unsigned int)prio >= mae->nb_action_rule_prios_max) {
89                 rc = EINVAL;
90                 sfc_err(sa, "failed: invalid priority %d (max %u)", prio,
91                         mae->nb_action_rule_prios_max);
92                 goto fail_invalid_prio;
93         }
94         if (prio < 0)
95                 prio = mae->nb_action_rule_prios_max - 1;
96
97         rc = sfc_mae_internal_rule_find_empty_slot(sa, &rule);
98         if (rc != 0)
99                 goto fail_find_empty_slot;
100
101         sfc_log_init(sa, "init MAE match spec");
102         rc = efx_mae_match_spec_init(sa->nic, EFX_MAE_RULE_ACTION,
103                                      (uint32_t)prio, &rule->spec);
104         if (rc != 0) {
105                 sfc_err(sa, "failed to init MAE match spec");
106                 goto fail_match_init;
107         }
108
109         rc = efx_mae_match_spec_mport_set(rule->spec, mport_match, NULL);
110         if (rc != 0) {
111                 sfc_err(sa, "failed to get MAE match mport selector");
112                 goto fail_mport_set;
113         }
114
115         rc = efx_mae_action_set_spec_init(sa->nic, &rule->actions);
116         if (rc != 0) {
117                 sfc_err(sa, "failed to init MAE action set");
118                 goto fail_action_init;
119         }
120
121         rc = efx_mae_action_set_populate_deliver(rule->actions,
122                                                  mport_deliver);
123         if (rc != 0) {
124                 sfc_err(sa, "failed to populate deliver action");
125                 goto fail_populate_deliver;
126         }
127
128         rc = efx_mae_action_set_alloc(sa->nic, rule->actions,
129                                       &rule->action_set);
130         if (rc != 0) {
131                 sfc_err(sa, "failed to allocate action set");
132                 goto fail_action_set_alloc;
133         }
134
135         rc = efx_mae_action_rule_insert(sa->nic, rule->spec, NULL,
136                                         &rule->action_set,
137                                         &rule->rule_id);
138         if (rc != 0) {
139                 sfc_err(sa, "failed to insert action rule");
140                 goto fail_rule_insert;
141         }
142
143         *rulep = rule;
144
145         sfc_log_init(sa, "done");
146
147         return 0;
148
149 fail_rule_insert:
150         efx_mae_action_set_free(sa->nic, &rule->action_set);
151
152 fail_action_set_alloc:
153 fail_populate_deliver:
154         efx_mae_action_set_spec_fini(sa->nic, rule->actions);
155
156 fail_action_init:
157 fail_mport_set:
158         efx_mae_match_spec_fini(sa->nic, rule->spec);
159
160 fail_match_init:
161 fail_find_empty_slot:
162 fail_invalid_prio:
163         sfc_log_init(sa, "failed: %s", rte_strerror(rc));
164         return rc;
165 }
166
167 void
168 sfc_mae_rule_del(struct sfc_adapter *sa, struct sfc_mae_rule *rule)
169 {
170         if (rule == NULL || rule->spec == NULL)
171                 return;
172
173         efx_mae_action_rule_remove(sa->nic, &rule->rule_id);
174         efx_mae_action_set_free(sa->nic, &rule->action_set);
175         efx_mae_action_set_spec_fini(sa->nic, rule->actions);
176         efx_mae_match_spec_fini(sa->nic, rule->spec);
177
178         rule->spec = NULL;
179 }
180
181 int
182 sfc_mae_attach(struct sfc_adapter *sa)
183 {
184         struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
185         struct sfc_mae_switch_port_request switch_port_request = {0};
186         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
187         efx_mport_sel_t entity_mport;
188         struct sfc_mae *mae = &sa->mae;
189         struct sfc_mae_bounce_eh *bounce_eh = &mae->bounce_eh;
190         efx_mae_limits_t limits;
191         int rc;
192
193         sfc_log_init(sa, "entry");
194
195         if (!encp->enc_mae_supported) {
196                 mae->status = SFC_MAE_STATUS_UNSUPPORTED;
197                 return 0;
198         }
199
200         sfc_log_init(sa, "init MAE");
201         rc = efx_mae_init(sa->nic);
202         if (rc != 0)
203                 goto fail_mae_init;
204
205         sfc_log_init(sa, "get MAE limits");
206         rc = efx_mae_get_limits(sa->nic, &limits);
207         if (rc != 0)
208                 goto fail_mae_get_limits;
209
210         sfc_log_init(sa, "init MAE counter registry");
211         rc = sfc_mae_counter_registry_init(&mae->counter_registry,
212                                            limits.eml_max_n_counters);
213         if (rc != 0) {
214                 sfc_err(sa, "failed to init MAE counters registry for %u entries: %s",
215                         limits.eml_max_n_counters, rte_strerror(rc));
216                 goto fail_counter_registry_init;
217         }
218
219         sfc_log_init(sa, "assign entity MPORT");
220         rc = sfc_mae_assign_entity_mport(sa, &entity_mport);
221         if (rc != 0)
222                 goto fail_mae_assign_entity_mport;
223
224         sfc_log_init(sa, "assign RTE switch domain");
225         rc = sfc_mae_assign_switch_domain(sa, &mae->switch_domain_id);
226         if (rc != 0)
227                 goto fail_mae_assign_switch_domain;
228
229         sfc_log_init(sa, "assign RTE switch port");
230         switch_port_request.type = SFC_MAE_SWITCH_PORT_INDEPENDENT;
231         switch_port_request.entity_mportp = &entity_mport;
232         /* RTE ethdev MPORT matches that of the entity for independent ports. */
233         switch_port_request.ethdev_mportp = &entity_mport;
234         switch_port_request.ethdev_port_id = sas->port_id;
235         rc = sfc_mae_assign_switch_port(mae->switch_domain_id,
236                                         &switch_port_request,
237                                         &mae->switch_port_id);
238         if (rc != 0)
239                 goto fail_mae_assign_switch_port;
240
241         sfc_log_init(sa, "allocate encap. header bounce buffer");
242         bounce_eh->buf_size = limits.eml_encap_header_size_limit;
243         bounce_eh->buf = rte_malloc("sfc_mae_bounce_eh",
244                                     bounce_eh->buf_size, 0);
245         if (bounce_eh->buf == NULL)
246                 goto fail_mae_alloc_bounce_eh;
247
248         mae->status = SFC_MAE_STATUS_SUPPORTED;
249         mae->nb_outer_rule_prios_max = limits.eml_max_n_outer_prios;
250         mae->nb_action_rule_prios_max = limits.eml_max_n_action_prios;
251         mae->encap_types_supported = limits.eml_encap_types_supported;
252         TAILQ_INIT(&mae->outer_rules);
253         TAILQ_INIT(&mae->encap_headers);
254         TAILQ_INIT(&mae->action_sets);
255
256         sfc_log_init(sa, "done");
257
258         return 0;
259
260 fail_mae_alloc_bounce_eh:
261 fail_mae_assign_switch_port:
262 fail_mae_assign_switch_domain:
263 fail_mae_assign_entity_mport:
264         sfc_mae_counter_registry_fini(&mae->counter_registry);
265
266 fail_counter_registry_init:
267 fail_mae_get_limits:
268         efx_mae_fini(sa->nic);
269
270 fail_mae_init:
271         sfc_log_init(sa, "failed %d", rc);
272
273         return rc;
274 }
275
276 void
277 sfc_mae_detach(struct sfc_adapter *sa)
278 {
279         struct sfc_mae *mae = &sa->mae;
280         enum sfc_mae_status status_prev = mae->status;
281
282         sfc_log_init(sa, "entry");
283
284         mae->nb_action_rule_prios_max = 0;
285         mae->status = SFC_MAE_STATUS_UNKNOWN;
286
287         if (status_prev != SFC_MAE_STATUS_SUPPORTED)
288                 return;
289
290         rte_free(mae->bounce_eh.buf);
291         sfc_mae_counter_registry_fini(&mae->counter_registry);
292
293         efx_mae_fini(sa->nic);
294
295         sfc_log_init(sa, "done");
296 }
297
298 static struct sfc_mae_outer_rule *
299 sfc_mae_outer_rule_attach(struct sfc_adapter *sa,
300                           const efx_mae_match_spec_t *match_spec,
301                           efx_tunnel_protocol_t encap_type)
302 {
303         struct sfc_mae_outer_rule *rule;
304         struct sfc_mae *mae = &sa->mae;
305
306         SFC_ASSERT(sfc_adapter_is_locked(sa));
307
308         TAILQ_FOREACH(rule, &mae->outer_rules, entries) {
309                 if (efx_mae_match_specs_equal(rule->match_spec, match_spec) &&
310                     rule->encap_type == encap_type) {
311                         sfc_dbg(sa, "attaching to outer_rule=%p", rule);
312                         ++(rule->refcnt);
313                         return rule;
314                 }
315         }
316
317         return NULL;
318 }
319
320 static int
321 sfc_mae_outer_rule_add(struct sfc_adapter *sa,
322                        efx_mae_match_spec_t *match_spec,
323                        efx_tunnel_protocol_t encap_type,
324                        struct sfc_mae_outer_rule **rulep)
325 {
326         struct sfc_mae_outer_rule *rule;
327         struct sfc_mae *mae = &sa->mae;
328
329         SFC_ASSERT(sfc_adapter_is_locked(sa));
330
331         rule = rte_zmalloc("sfc_mae_outer_rule", sizeof(*rule), 0);
332         if (rule == NULL)
333                 return ENOMEM;
334
335         rule->refcnt = 1;
336         rule->match_spec = match_spec;
337         rule->encap_type = encap_type;
338
339         rule->fw_rsrc.rule_id.id = EFX_MAE_RSRC_ID_INVALID;
340
341         TAILQ_INSERT_TAIL(&mae->outer_rules, rule, entries);
342
343         *rulep = rule;
344
345         sfc_dbg(sa, "added outer_rule=%p", rule);
346
347         return 0;
348 }
349
350 static void
351 sfc_mae_outer_rule_del(struct sfc_adapter *sa,
352                        struct sfc_mae_outer_rule *rule)
353 {
354         struct sfc_mae *mae = &sa->mae;
355
356         SFC_ASSERT(sfc_adapter_is_locked(sa));
357         SFC_ASSERT(rule->refcnt != 0);
358
359         --(rule->refcnt);
360
361         if (rule->refcnt != 0)
362                 return;
363
364         if (rule->fw_rsrc.rule_id.id != EFX_MAE_RSRC_ID_INVALID ||
365             rule->fw_rsrc.refcnt != 0) {
366                 sfc_err(sa, "deleting outer_rule=%p abandons its FW resource: OR_ID=0x%08x, refcnt=%u",
367                         rule, rule->fw_rsrc.rule_id.id, rule->fw_rsrc.refcnt);
368         }
369
370         efx_mae_match_spec_fini(sa->nic, rule->match_spec);
371
372         TAILQ_REMOVE(&mae->outer_rules, rule, entries);
373         rte_free(rule);
374
375         sfc_dbg(sa, "deleted outer_rule=%p", rule);
376 }
377
378 static int
379 sfc_mae_outer_rule_enable(struct sfc_adapter *sa,
380                           struct sfc_mae_outer_rule *rule,
381                           efx_mae_match_spec_t *match_spec_action)
382 {
383         struct sfc_mae_fw_rsrc *fw_rsrc = &rule->fw_rsrc;
384         int rc;
385
386         SFC_ASSERT(sfc_adapter_is_locked(sa));
387
388         if (fw_rsrc->refcnt == 0) {
389                 SFC_ASSERT(fw_rsrc->rule_id.id == EFX_MAE_RSRC_ID_INVALID);
390                 SFC_ASSERT(rule->match_spec != NULL);
391
392                 rc = efx_mae_outer_rule_insert(sa->nic, rule->match_spec,
393                                                rule->encap_type,
394                                                &fw_rsrc->rule_id);
395                 if (rc != 0) {
396                         sfc_err(sa, "failed to enable outer_rule=%p: %s",
397                                 rule, strerror(rc));
398                         return rc;
399                 }
400         }
401
402         rc = efx_mae_match_spec_outer_rule_id_set(match_spec_action,
403                                                   &fw_rsrc->rule_id);
404         if (rc != 0) {
405                 if (fw_rsrc->refcnt == 0) {
406                         (void)efx_mae_outer_rule_remove(sa->nic,
407                                                         &fw_rsrc->rule_id);
408                         fw_rsrc->rule_id.id = EFX_MAE_RSRC_ID_INVALID;
409                 }
410
411                 sfc_err(sa, "can't match on outer rule ID: %s", strerror(rc));
412
413                 return rc;
414         }
415
416         if (fw_rsrc->refcnt == 0) {
417                 sfc_dbg(sa, "enabled outer_rule=%p: OR_ID=0x%08x",
418                         rule, fw_rsrc->rule_id.id);
419         }
420
421         ++(fw_rsrc->refcnt);
422
423         return 0;
424 }
425
426 static void
427 sfc_mae_outer_rule_disable(struct sfc_adapter *sa,
428                            struct sfc_mae_outer_rule *rule)
429 {
430         struct sfc_mae_fw_rsrc *fw_rsrc = &rule->fw_rsrc;
431         int rc;
432
433         SFC_ASSERT(sfc_adapter_is_locked(sa));
434
435         if (fw_rsrc->rule_id.id == EFX_MAE_RSRC_ID_INVALID ||
436             fw_rsrc->refcnt == 0) {
437                 sfc_err(sa, "failed to disable outer_rule=%p: already disabled; OR_ID=0x%08x, refcnt=%u",
438                         rule, fw_rsrc->rule_id.id, fw_rsrc->refcnt);
439                 return;
440         }
441
442         if (fw_rsrc->refcnt == 1) {
443                 rc = efx_mae_outer_rule_remove(sa->nic, &fw_rsrc->rule_id);
444                 if (rc == 0) {
445                         sfc_dbg(sa, "disabled outer_rule=%p with OR_ID=0x%08x",
446                                 rule, fw_rsrc->rule_id.id);
447                 } else {
448                         sfc_err(sa, "failed to disable outer_rule=%p with OR_ID=0x%08x: %s",
449                                 rule, fw_rsrc->rule_id.id, strerror(rc));
450                 }
451                 fw_rsrc->rule_id.id = EFX_MAE_RSRC_ID_INVALID;
452         }
453
454         --(fw_rsrc->refcnt);
455 }
456
457 static struct sfc_mae_encap_header *
458 sfc_mae_encap_header_attach(struct sfc_adapter *sa,
459                             const struct sfc_mae_bounce_eh *bounce_eh)
460 {
461         struct sfc_mae_encap_header *encap_header;
462         struct sfc_mae *mae = &sa->mae;
463
464         SFC_ASSERT(sfc_adapter_is_locked(sa));
465
466         TAILQ_FOREACH(encap_header, &mae->encap_headers, entries) {
467                 if (encap_header->size == bounce_eh->size &&
468                     memcmp(encap_header->buf, bounce_eh->buf,
469                            bounce_eh->size) == 0) {
470                         sfc_dbg(sa, "attaching to encap_header=%p",
471                                 encap_header);
472                         ++(encap_header->refcnt);
473                         return encap_header;
474                 }
475         }
476
477         return NULL;
478 }
479
480 static int
481 sfc_mae_encap_header_add(struct sfc_adapter *sa,
482                          const struct sfc_mae_bounce_eh *bounce_eh,
483                          struct sfc_mae_encap_header **encap_headerp)
484 {
485         struct sfc_mae_encap_header *encap_header;
486         struct sfc_mae *mae = &sa->mae;
487
488         SFC_ASSERT(sfc_adapter_is_locked(sa));
489
490         encap_header = rte_zmalloc("sfc_mae_encap_header",
491                                    sizeof(*encap_header), 0);
492         if (encap_header == NULL)
493                 return ENOMEM;
494
495         encap_header->size = bounce_eh->size;
496
497         encap_header->buf = rte_malloc("sfc_mae_encap_header_buf",
498                                        encap_header->size, 0);
499         if (encap_header->buf == NULL) {
500                 rte_free(encap_header);
501                 return ENOMEM;
502         }
503
504         rte_memcpy(encap_header->buf, bounce_eh->buf, bounce_eh->size);
505
506         encap_header->refcnt = 1;
507         encap_header->type = bounce_eh->type;
508         encap_header->fw_rsrc.eh_id.id = EFX_MAE_RSRC_ID_INVALID;
509
510         TAILQ_INSERT_TAIL(&mae->encap_headers, encap_header, entries);
511
512         *encap_headerp = encap_header;
513
514         sfc_dbg(sa, "added encap_header=%p", encap_header);
515
516         return 0;
517 }
518
519 static void
520 sfc_mae_encap_header_del(struct sfc_adapter *sa,
521                        struct sfc_mae_encap_header *encap_header)
522 {
523         struct sfc_mae *mae = &sa->mae;
524
525         if (encap_header == NULL)
526                 return;
527
528         SFC_ASSERT(sfc_adapter_is_locked(sa));
529         SFC_ASSERT(encap_header->refcnt != 0);
530
531         --(encap_header->refcnt);
532
533         if (encap_header->refcnt != 0)
534                 return;
535
536         if (encap_header->fw_rsrc.eh_id.id != EFX_MAE_RSRC_ID_INVALID ||
537             encap_header->fw_rsrc.refcnt != 0) {
538                 sfc_err(sa, "deleting encap_header=%p abandons its FW resource: EH_ID=0x%08x, refcnt=%u",
539                         encap_header, encap_header->fw_rsrc.eh_id.id,
540                         encap_header->fw_rsrc.refcnt);
541         }
542
543         TAILQ_REMOVE(&mae->encap_headers, encap_header, entries);
544         rte_free(encap_header->buf);
545         rte_free(encap_header);
546
547         sfc_dbg(sa, "deleted encap_header=%p", encap_header);
548 }
549
550 static int
551 sfc_mae_encap_header_enable(struct sfc_adapter *sa,
552                             struct sfc_mae_encap_header *encap_header,
553                             efx_mae_actions_t *action_set_spec)
554 {
555         struct sfc_mae_fw_rsrc *fw_rsrc;
556         int rc;
557
558         if (encap_header == NULL)
559                 return 0;
560
561         SFC_ASSERT(sfc_adapter_is_locked(sa));
562
563         fw_rsrc = &encap_header->fw_rsrc;
564
565         if (fw_rsrc->refcnt == 0) {
566                 SFC_ASSERT(fw_rsrc->eh_id.id == EFX_MAE_RSRC_ID_INVALID);
567                 SFC_ASSERT(encap_header->buf != NULL);
568                 SFC_ASSERT(encap_header->size != 0);
569
570                 rc = efx_mae_encap_header_alloc(sa->nic, encap_header->type,
571                                                 encap_header->buf,
572                                                 encap_header->size,
573                                                 &fw_rsrc->eh_id);
574                 if (rc != 0) {
575                         sfc_err(sa, "failed to enable encap_header=%p: %s",
576                                 encap_header, strerror(rc));
577                         return rc;
578                 }
579         }
580
581         rc = efx_mae_action_set_fill_in_eh_id(action_set_spec,
582                                               &fw_rsrc->eh_id);
583         if (rc != 0) {
584                 if (fw_rsrc->refcnt == 0) {
585                         (void)efx_mae_encap_header_free(sa->nic,
586                                                         &fw_rsrc->eh_id);
587                         fw_rsrc->eh_id.id = EFX_MAE_RSRC_ID_INVALID;
588                 }
589
590                 sfc_err(sa, "can't fill in encap. header ID: %s", strerror(rc));
591
592                 return rc;
593         }
594
595         if (fw_rsrc->refcnt == 0) {
596                 sfc_dbg(sa, "enabled encap_header=%p: EH_ID=0x%08x",
597                         encap_header, fw_rsrc->eh_id.id);
598         }
599
600         ++(fw_rsrc->refcnt);
601
602         return 0;
603 }
604
605 static void
606 sfc_mae_encap_header_disable(struct sfc_adapter *sa,
607                              struct sfc_mae_encap_header *encap_header)
608 {
609         struct sfc_mae_fw_rsrc *fw_rsrc;
610         int rc;
611
612         if (encap_header == NULL)
613                 return;
614
615         SFC_ASSERT(sfc_adapter_is_locked(sa));
616
617         fw_rsrc = &encap_header->fw_rsrc;
618
619         if (fw_rsrc->eh_id.id == EFX_MAE_RSRC_ID_INVALID ||
620             fw_rsrc->refcnt == 0) {
621                 sfc_err(sa, "failed to disable encap_header=%p: already disabled; EH_ID=0x%08x, refcnt=%u",
622                         encap_header, fw_rsrc->eh_id.id, fw_rsrc->refcnt);
623                 return;
624         }
625
626         if (fw_rsrc->refcnt == 1) {
627                 rc = efx_mae_encap_header_free(sa->nic, &fw_rsrc->eh_id);
628                 if (rc == 0) {
629                         sfc_dbg(sa, "disabled encap_header=%p with EH_ID=0x%08x",
630                                 encap_header, fw_rsrc->eh_id.id);
631                 } else {
632                         sfc_err(sa, "failed to disable encap_header=%p with EH_ID=0x%08x: %s",
633                                 encap_header, fw_rsrc->eh_id.id, strerror(rc));
634                 }
635                 fw_rsrc->eh_id.id = EFX_MAE_RSRC_ID_INVALID;
636         }
637
638         --(fw_rsrc->refcnt);
639 }
640
641 static int
642 sfc_mae_counters_enable(struct sfc_adapter *sa,
643                         struct sfc_mae_counter_id *counters,
644                         unsigned int n_counters,
645                         efx_mae_actions_t *action_set_spec)
646 {
647         int rc;
648
649         sfc_log_init(sa, "entry");
650
651         if (n_counters == 0) {
652                 sfc_log_init(sa, "no counters - skip");
653                 return 0;
654         }
655
656         SFC_ASSERT(sfc_adapter_is_locked(sa));
657         SFC_ASSERT(n_counters == 1);
658
659         rc = sfc_mae_counter_enable(sa, &counters[0]);
660         if (rc != 0) {
661                 sfc_err(sa, "failed to enable MAE counter %u: %s",
662                         counters[0].mae_id.id, rte_strerror(rc));
663                 goto fail_counter_add;
664         }
665
666         rc = efx_mae_action_set_fill_in_counter_id(action_set_spec,
667                                                    &counters[0].mae_id);
668         if (rc != 0) {
669                 sfc_err(sa, "failed to fill in MAE counter %u in action set: %s",
670                         counters[0].mae_id.id, rte_strerror(rc));
671                 goto fail_fill_in_id;
672         }
673
674         return 0;
675
676 fail_fill_in_id:
677         (void)sfc_mae_counter_disable(sa, &counters[0]);
678
679 fail_counter_add:
680         sfc_log_init(sa, "failed: %s", rte_strerror(rc));
681         return rc;
682 }
683
684 static int
685 sfc_mae_counters_disable(struct sfc_adapter *sa,
686                          struct sfc_mae_counter_id *counters,
687                          unsigned int n_counters)
688 {
689         if (n_counters == 0)
690                 return 0;
691
692         SFC_ASSERT(sfc_adapter_is_locked(sa));
693         SFC_ASSERT(n_counters == 1);
694
695         if (counters[0].mae_id.id == EFX_MAE_RSRC_ID_INVALID) {
696                 sfc_err(sa, "failed to disable: already disabled");
697                 return EALREADY;
698         }
699
700         return sfc_mae_counter_disable(sa, &counters[0]);
701 }
702
703 static struct sfc_mae_action_set *
704 sfc_mae_action_set_attach(struct sfc_adapter *sa,
705                           const struct sfc_mae_encap_header *encap_header,
706                           unsigned int n_count,
707                           const efx_mae_actions_t *spec)
708 {
709         struct sfc_mae_action_set *action_set;
710         struct sfc_mae *mae = &sa->mae;
711
712         SFC_ASSERT(sfc_adapter_is_locked(sa));
713
714         TAILQ_FOREACH(action_set, &mae->action_sets, entries) {
715                 /*
716                  * Shared counters are not supported, hence action sets with
717                  * COUNT are not attachable.
718                  */
719                 if (action_set->encap_header == encap_header &&
720                     n_count == 0 &&
721                     efx_mae_action_set_specs_equal(action_set->spec, spec)) {
722                         sfc_dbg(sa, "attaching to action_set=%p", action_set);
723                         ++(action_set->refcnt);
724                         return action_set;
725                 }
726         }
727
728         return NULL;
729 }
730
731 static int
732 sfc_mae_action_set_add(struct sfc_adapter *sa,
733                        const struct rte_flow_action actions[],
734                        efx_mae_actions_t *spec,
735                        struct sfc_mae_encap_header *encap_header,
736                        unsigned int n_counters,
737                        struct sfc_mae_action_set **action_setp)
738 {
739         struct sfc_mae_action_set *action_set;
740         struct sfc_mae *mae = &sa->mae;
741         unsigned int i;
742
743         SFC_ASSERT(sfc_adapter_is_locked(sa));
744
745         action_set = rte_zmalloc("sfc_mae_action_set", sizeof(*action_set), 0);
746         if (action_set == NULL) {
747                 sfc_err(sa, "failed to alloc action set");
748                 return ENOMEM;
749         }
750
751         if (n_counters > 0) {
752                 const struct rte_flow_action *action;
753
754                 action_set->counters = rte_malloc("sfc_mae_counter_ids",
755                         sizeof(action_set->counters[0]) * n_counters, 0);
756                 if (action_set->counters == NULL) {
757                         rte_free(action_set);
758                         sfc_err(sa, "failed to alloc counters");
759                         return ENOMEM;
760                 }
761
762                 for (action = actions, i = 0;
763                      action->type != RTE_FLOW_ACTION_TYPE_END && i < n_counters;
764                      ++action) {
765                         const struct rte_flow_action_count *conf;
766
767                         if (action->type != RTE_FLOW_ACTION_TYPE_COUNT)
768                                 continue;
769
770                         conf = action->conf;
771
772                         action_set->counters[i].mae_id.id =
773                                 EFX_MAE_RSRC_ID_INVALID;
774                         action_set->counters[i].rte_id = conf->id;
775                         i++;
776                 }
777                 action_set->n_counters = n_counters;
778         }
779
780         action_set->refcnt = 1;
781         action_set->spec = spec;
782         action_set->encap_header = encap_header;
783
784         action_set->fw_rsrc.aset_id.id = EFX_MAE_RSRC_ID_INVALID;
785
786         TAILQ_INSERT_TAIL(&mae->action_sets, action_set, entries);
787
788         *action_setp = action_set;
789
790         sfc_dbg(sa, "added action_set=%p", action_set);
791
792         return 0;
793 }
794
795 static void
796 sfc_mae_action_set_del(struct sfc_adapter *sa,
797                        struct sfc_mae_action_set *action_set)
798 {
799         struct sfc_mae *mae = &sa->mae;
800
801         SFC_ASSERT(sfc_adapter_is_locked(sa));
802         SFC_ASSERT(action_set->refcnt != 0);
803
804         --(action_set->refcnt);
805
806         if (action_set->refcnt != 0)
807                 return;
808
809         if (action_set->fw_rsrc.aset_id.id != EFX_MAE_RSRC_ID_INVALID ||
810             action_set->fw_rsrc.refcnt != 0) {
811                 sfc_err(sa, "deleting action_set=%p abandons its FW resource: AS_ID=0x%08x, refcnt=%u",
812                         action_set, action_set->fw_rsrc.aset_id.id,
813                         action_set->fw_rsrc.refcnt);
814         }
815
816         efx_mae_action_set_spec_fini(sa->nic, action_set->spec);
817         sfc_mae_encap_header_del(sa, action_set->encap_header);
818         if (action_set->n_counters > 0) {
819                 SFC_ASSERT(action_set->n_counters == 1);
820                 SFC_ASSERT(action_set->counters[0].mae_id.id ==
821                            EFX_MAE_RSRC_ID_INVALID);
822                 rte_free(action_set->counters);
823         }
824         TAILQ_REMOVE(&mae->action_sets, action_set, entries);
825         rte_free(action_set);
826
827         sfc_dbg(sa, "deleted action_set=%p", action_set);
828 }
829
830 static int
831 sfc_mae_action_set_enable(struct sfc_adapter *sa,
832                           struct sfc_mae_action_set *action_set)
833 {
834         struct sfc_mae_encap_header *encap_header = action_set->encap_header;
835         struct sfc_mae_counter_id *counters = action_set->counters;
836         struct sfc_mae_fw_rsrc *fw_rsrc = &action_set->fw_rsrc;
837         int rc;
838
839         SFC_ASSERT(sfc_adapter_is_locked(sa));
840
841         if (fw_rsrc->refcnt == 0) {
842                 SFC_ASSERT(fw_rsrc->aset_id.id == EFX_MAE_RSRC_ID_INVALID);
843                 SFC_ASSERT(action_set->spec != NULL);
844
845                 rc = sfc_mae_encap_header_enable(sa, encap_header,
846                                                  action_set->spec);
847                 if (rc != 0)
848                         return rc;
849
850                 rc = sfc_mae_counters_enable(sa, counters,
851                                              action_set->n_counters,
852                                              action_set->spec);
853                 if (rc != 0) {
854                         sfc_err(sa, "failed to enable %u MAE counters: %s",
855                                 action_set->n_counters, rte_strerror(rc));
856
857                         sfc_mae_encap_header_disable(sa, encap_header);
858                         return rc;
859                 }
860
861                 rc = efx_mae_action_set_alloc(sa->nic, action_set->spec,
862                                               &fw_rsrc->aset_id);
863                 if (rc != 0) {
864                         sfc_err(sa, "failed to enable action_set=%p: %s",
865                                 action_set, strerror(rc));
866
867                         (void)sfc_mae_counters_disable(sa, counters,
868                                                        action_set->n_counters);
869                         sfc_mae_encap_header_disable(sa, encap_header);
870                         return rc;
871                 }
872
873                 sfc_dbg(sa, "enabled action_set=%p: AS_ID=0x%08x",
874                         action_set, fw_rsrc->aset_id.id);
875         }
876
877         ++(fw_rsrc->refcnt);
878
879         return 0;
880 }
881
882 static void
883 sfc_mae_action_set_disable(struct sfc_adapter *sa,
884                            struct sfc_mae_action_set *action_set)
885 {
886         struct sfc_mae_fw_rsrc *fw_rsrc = &action_set->fw_rsrc;
887         int rc;
888
889         SFC_ASSERT(sfc_adapter_is_locked(sa));
890
891         if (fw_rsrc->aset_id.id == EFX_MAE_RSRC_ID_INVALID ||
892             fw_rsrc->refcnt == 0) {
893                 sfc_err(sa, "failed to disable action_set=%p: already disabled; AS_ID=0x%08x, refcnt=%u",
894                         action_set, fw_rsrc->aset_id.id, fw_rsrc->refcnt);
895                 return;
896         }
897
898         if (fw_rsrc->refcnt == 1) {
899                 rc = efx_mae_action_set_free(sa->nic, &fw_rsrc->aset_id);
900                 if (rc == 0) {
901                         sfc_dbg(sa, "disabled action_set=%p with AS_ID=0x%08x",
902                                 action_set, fw_rsrc->aset_id.id);
903                 } else {
904                         sfc_err(sa, "failed to disable action_set=%p with AS_ID=0x%08x: %s",
905                                 action_set, fw_rsrc->aset_id.id, strerror(rc));
906                 }
907                 fw_rsrc->aset_id.id = EFX_MAE_RSRC_ID_INVALID;
908
909                 rc = sfc_mae_counters_disable(sa, action_set->counters,
910                                               action_set->n_counters);
911                 if (rc != 0) {
912                         sfc_err(sa, "failed to disable %u MAE counters: %s",
913                                 action_set->n_counters, rte_strerror(rc));
914                 }
915
916                 sfc_mae_encap_header_disable(sa, action_set->encap_header);
917         }
918
919         --(fw_rsrc->refcnt);
920 }
921
922 void
923 sfc_mae_flow_cleanup(struct sfc_adapter *sa,
924                      struct rte_flow *flow)
925 {
926         struct sfc_flow_spec *spec;
927         struct sfc_flow_spec_mae *spec_mae;
928
929         if (flow == NULL)
930                 return;
931
932         spec = &flow->spec;
933
934         if (spec == NULL)
935                 return;
936
937         spec_mae = &spec->mae;
938
939         SFC_ASSERT(spec_mae->rule_id.id == EFX_MAE_RSRC_ID_INVALID);
940
941         if (spec_mae->outer_rule != NULL)
942                 sfc_mae_outer_rule_del(sa, spec_mae->outer_rule);
943
944         if (spec_mae->action_set != NULL)
945                 sfc_mae_action_set_del(sa, spec_mae->action_set);
946
947         if (spec_mae->match_spec != NULL)
948                 efx_mae_match_spec_fini(sa->nic, spec_mae->match_spec);
949 }
950
951 static int
952 sfc_mae_set_ethertypes(struct sfc_mae_parse_ctx *ctx)
953 {
954         struct sfc_mae_pattern_data *pdata = &ctx->pattern_data;
955         const efx_mae_field_id_t *fremap = ctx->field_ids_remap;
956         const efx_mae_field_id_t field_ids[] = {
957                 EFX_MAE_FIELD_VLAN0_PROTO_BE,
958                 EFX_MAE_FIELD_VLAN1_PROTO_BE,
959         };
960         const struct sfc_mae_ethertype *et;
961         unsigned int i;
962         int rc;
963
964         /*
965          * In accordance with RTE flow API convention, the innermost L2
966          * item's "type" ("inner_type") is a L3 EtherType. If there is
967          * no L3 item, it's 0x0000/0x0000.
968          */
969         et = &pdata->ethertypes[pdata->nb_vlan_tags];
970         rc = efx_mae_match_spec_field_set(ctx->match_spec,
971                                           fremap[EFX_MAE_FIELD_ETHER_TYPE_BE],
972                                           sizeof(et->value),
973                                           (const uint8_t *)&et->value,
974                                           sizeof(et->mask),
975                                           (const uint8_t *)&et->mask);
976         if (rc != 0)
977                 return rc;
978
979         /*
980          * sfc_mae_rule_parse_item_vlan() has already made sure
981          * that pdata->nb_vlan_tags does not exceed this figure.
982          */
983         RTE_BUILD_BUG_ON(SFC_MAE_MATCH_VLAN_MAX_NTAGS != 2);
984
985         for (i = 0; i < pdata->nb_vlan_tags; ++i) {
986                 et = &pdata->ethertypes[i];
987
988                 rc = efx_mae_match_spec_field_set(ctx->match_spec,
989                                                   fremap[field_ids[i]],
990                                                   sizeof(et->value),
991                                                   (const uint8_t *)&et->value,
992                                                   sizeof(et->mask),
993                                                   (const uint8_t *)&et->mask);
994                 if (rc != 0)
995                         return rc;
996         }
997
998         return 0;
999 }
1000
1001 static int
1002 sfc_mae_rule_process_pattern_data(struct sfc_mae_parse_ctx *ctx,
1003                                   struct rte_flow_error *error)
1004 {
1005         const efx_mae_field_id_t *fremap = ctx->field_ids_remap;
1006         struct sfc_mae_pattern_data *pdata = &ctx->pattern_data;
1007         struct sfc_mae_ethertype *ethertypes = pdata->ethertypes;
1008         const rte_be16_t supported_tpids[] = {
1009                 /* VLAN standard TPID (always the first element) */
1010                 RTE_BE16(RTE_ETHER_TYPE_VLAN),
1011
1012                 /* Double-tagging TPIDs */
1013                 RTE_BE16(RTE_ETHER_TYPE_QINQ),
1014                 RTE_BE16(RTE_ETHER_TYPE_QINQ1),
1015                 RTE_BE16(RTE_ETHER_TYPE_QINQ2),
1016                 RTE_BE16(RTE_ETHER_TYPE_QINQ3),
1017         };
1018         bool enforce_tag_presence[SFC_MAE_MATCH_VLAN_MAX_NTAGS] = {0};
1019         unsigned int nb_supported_tpids = RTE_DIM(supported_tpids);
1020         unsigned int ethertype_idx;
1021         const uint8_t *valuep;
1022         const uint8_t *maskp;
1023         int rc;
1024
1025         if (pdata->innermost_ethertype_restriction.mask != 0 &&
1026             pdata->nb_vlan_tags < SFC_MAE_MATCH_VLAN_MAX_NTAGS) {
1027                 /*
1028                  * If a single item VLAN is followed by a L3 item, value
1029                  * of "type" in item ETH can't be a double-tagging TPID.
1030                  */
1031                 nb_supported_tpids = 1;
1032         }
1033
1034         /*
1035          * sfc_mae_rule_parse_item_vlan() has already made sure
1036          * that pdata->nb_vlan_tags does not exceed this figure.
1037          */
1038         RTE_BUILD_BUG_ON(SFC_MAE_MATCH_VLAN_MAX_NTAGS != 2);
1039
1040         for (ethertype_idx = 0;
1041              ethertype_idx < pdata->nb_vlan_tags; ++ethertype_idx) {
1042                 rte_be16_t tpid_v = ethertypes[ethertype_idx].value;
1043                 rte_be16_t tpid_m = ethertypes[ethertype_idx].mask;
1044                 unsigned int tpid_idx;
1045
1046                 /*
1047                  * This loop can have only two iterations. On the second one,
1048                  * drop outer tag presence enforcement bit because the inner
1049                  * tag presence automatically assumes that for the outer tag.
1050                  */
1051                 enforce_tag_presence[0] = B_FALSE;
1052
1053                 if (tpid_m == RTE_BE16(0)) {
1054                         if (pdata->tci_masks[ethertype_idx] == RTE_BE16(0))
1055                                 enforce_tag_presence[ethertype_idx] = B_TRUE;
1056
1057                         /* No match on this field, and no value check. */
1058                         nb_supported_tpids = 1;
1059                         continue;
1060                 }
1061
1062                 /* Exact match is supported only. */
1063                 if (tpid_m != RTE_BE16(0xffff)) {
1064                         sfc_err(ctx->sa, "TPID mask must be 0x0 or 0xffff; got 0x%04x",
1065                                 rte_be_to_cpu_16(tpid_m));
1066                         rc = EINVAL;
1067                         goto fail;
1068                 }
1069
1070                 for (tpid_idx = pdata->nb_vlan_tags - ethertype_idx - 1;
1071                      tpid_idx < nb_supported_tpids; ++tpid_idx) {
1072                         if (tpid_v == supported_tpids[tpid_idx])
1073                                 break;
1074                 }
1075
1076                 if (tpid_idx == nb_supported_tpids) {
1077                         sfc_err(ctx->sa, "TPID 0x%04x is unsupported",
1078                                 rte_be_to_cpu_16(tpid_v));
1079                         rc = EINVAL;
1080                         goto fail;
1081                 }
1082
1083                 nb_supported_tpids = 1;
1084         }
1085
1086         if (pdata->innermost_ethertype_restriction.mask == RTE_BE16(0xffff)) {
1087                 struct sfc_mae_ethertype *et = &ethertypes[ethertype_idx];
1088                 rte_be16_t enforced_et;
1089
1090                 enforced_et = pdata->innermost_ethertype_restriction.value;
1091
1092                 if (et->mask == 0) {
1093                         et->mask = RTE_BE16(0xffff);
1094                         et->value = enforced_et;
1095                 } else if (et->mask != RTE_BE16(0xffff) ||
1096                            et->value != enforced_et) {
1097                         sfc_err(ctx->sa, "L3 EtherType must be 0x0/0x0 or 0x%04x/0xffff; got 0x%04x/0x%04x",
1098                                 rte_be_to_cpu_16(enforced_et),
1099                                 rte_be_to_cpu_16(et->value),
1100                                 rte_be_to_cpu_16(et->mask));
1101                         rc = EINVAL;
1102                         goto fail;
1103                 }
1104         }
1105
1106         /*
1107          * Now, when the number of VLAN tags is known, set fields
1108          * ETHER_TYPE, VLAN0_PROTO and VLAN1_PROTO so that the first
1109          * one is either a valid L3 EtherType (or 0x0000/0x0000),
1110          * and the last two are valid TPIDs (or 0x0000/0x0000).
1111          */
1112         rc = sfc_mae_set_ethertypes(ctx);
1113         if (rc != 0)
1114                 goto fail;
1115
1116         if (pdata->l3_next_proto_restriction_mask == 0xff) {
1117                 if (pdata->l3_next_proto_mask == 0) {
1118                         pdata->l3_next_proto_mask = 0xff;
1119                         pdata->l3_next_proto_value =
1120                                 pdata->l3_next_proto_restriction_value;
1121                 } else if (pdata->l3_next_proto_mask != 0xff ||
1122                            pdata->l3_next_proto_value !=
1123                            pdata->l3_next_proto_restriction_value) {
1124                         sfc_err(ctx->sa, "L3 next protocol must be 0x0/0x0 or 0x%02x/0xff; got 0x%02x/0x%02x",
1125                                 pdata->l3_next_proto_restriction_value,
1126                                 pdata->l3_next_proto_value,
1127                                 pdata->l3_next_proto_mask);
1128                         rc = EINVAL;
1129                         goto fail;
1130                 }
1131         }
1132
1133         if (enforce_tag_presence[0] || pdata->has_ovlan_mask) {
1134                 rc = efx_mae_match_spec_bit_set(ctx->match_spec,
1135                                                 fremap[EFX_MAE_FIELD_HAS_OVLAN],
1136                                                 enforce_tag_presence[0] ||
1137                                                 pdata->has_ovlan_value);
1138                 if (rc != 0)
1139                         goto fail;
1140         }
1141
1142         if (enforce_tag_presence[1] || pdata->has_ivlan_mask) {
1143                 rc = efx_mae_match_spec_bit_set(ctx->match_spec,
1144                                                 fremap[EFX_MAE_FIELD_HAS_IVLAN],
1145                                                 enforce_tag_presence[1] ||
1146                                                 pdata->has_ivlan_value);
1147                 if (rc != 0)
1148                         goto fail;
1149         }
1150
1151         valuep = (const uint8_t *)&pdata->l3_next_proto_value;
1152         maskp = (const uint8_t *)&pdata->l3_next_proto_mask;
1153         rc = efx_mae_match_spec_field_set(ctx->match_spec,
1154                                           fremap[EFX_MAE_FIELD_IP_PROTO],
1155                                           sizeof(pdata->l3_next_proto_value),
1156                                           valuep,
1157                                           sizeof(pdata->l3_next_proto_mask),
1158                                           maskp);
1159         if (rc != 0)
1160                 goto fail;
1161
1162         return 0;
1163
1164 fail:
1165         return rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ITEM, NULL,
1166                                   "Failed to process pattern data");
1167 }
1168
1169 static int
1170 sfc_mae_rule_parse_item_port_id(const struct rte_flow_item *item,
1171                                 struct sfc_flow_parse_ctx *ctx,
1172                                 struct rte_flow_error *error)
1173 {
1174         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1175         const struct rte_flow_item_port_id supp_mask = {
1176                 .id = 0xffffffff,
1177         };
1178         const void *def_mask = &rte_flow_item_port_id_mask;
1179         const struct rte_flow_item_port_id *spec = NULL;
1180         const struct rte_flow_item_port_id *mask = NULL;
1181         efx_mport_sel_t mport_sel;
1182         int rc;
1183
1184         if (ctx_mae->match_mport_set) {
1185                 return rte_flow_error_set(error, ENOTSUP,
1186                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1187                                 "Can't handle multiple traffic source items");
1188         }
1189
1190         rc = sfc_flow_parse_init(item,
1191                                  (const void **)&spec, (const void **)&mask,
1192                                  (const void *)&supp_mask, def_mask,
1193                                  sizeof(struct rte_flow_item_port_id), error);
1194         if (rc != 0)
1195                 return rc;
1196
1197         if (mask->id != supp_mask.id) {
1198                 return rte_flow_error_set(error, EINVAL,
1199                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1200                                 "Bad mask in the PORT_ID pattern item");
1201         }
1202
1203         /* If "spec" is not set, could be any port ID */
1204         if (spec == NULL)
1205                 return 0;
1206
1207         if (spec->id > UINT16_MAX) {
1208                 return rte_flow_error_set(error, EOVERFLOW,
1209                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1210                                           "The port ID is too large");
1211         }
1212
1213         rc = sfc_mae_switch_port_by_ethdev(ctx_mae->sa->mae.switch_domain_id,
1214                                            spec->id, &mport_sel);
1215         if (rc != 0) {
1216                 return rte_flow_error_set(error, rc,
1217                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1218                                 "Can't find RTE ethdev by the port ID");
1219         }
1220
1221         rc = efx_mae_match_spec_mport_set(ctx_mae->match_spec,
1222                                           &mport_sel, NULL);
1223         if (rc != 0) {
1224                 return rte_flow_error_set(error, rc,
1225                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1226                                 "Failed to set MPORT for the port ID");
1227         }
1228
1229         ctx_mae->match_mport_set = B_TRUE;
1230
1231         return 0;
1232 }
1233
1234 static int
1235 sfc_mae_rule_parse_item_phy_port(const struct rte_flow_item *item,
1236                                  struct sfc_flow_parse_ctx *ctx,
1237                                  struct rte_flow_error *error)
1238 {
1239         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1240         const struct rte_flow_item_phy_port supp_mask = {
1241                 .index = 0xffffffff,
1242         };
1243         const void *def_mask = &rte_flow_item_phy_port_mask;
1244         const struct rte_flow_item_phy_port *spec = NULL;
1245         const struct rte_flow_item_phy_port *mask = NULL;
1246         efx_mport_sel_t mport_v;
1247         int rc;
1248
1249         if (ctx_mae->match_mport_set) {
1250                 return rte_flow_error_set(error, ENOTSUP,
1251                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1252                                 "Can't handle multiple traffic source items");
1253         }
1254
1255         rc = sfc_flow_parse_init(item,
1256                                  (const void **)&spec, (const void **)&mask,
1257                                  (const void *)&supp_mask, def_mask,
1258                                  sizeof(struct rte_flow_item_phy_port), error);
1259         if (rc != 0)
1260                 return rc;
1261
1262         if (mask->index != supp_mask.index) {
1263                 return rte_flow_error_set(error, EINVAL,
1264                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1265                                 "Bad mask in the PHY_PORT pattern item");
1266         }
1267
1268         /* If "spec" is not set, could be any physical port */
1269         if (spec == NULL)
1270                 return 0;
1271
1272         rc = efx_mae_mport_by_phy_port(spec->index, &mport_v);
1273         if (rc != 0) {
1274                 return rte_flow_error_set(error, rc,
1275                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1276                                 "Failed to convert the PHY_PORT index");
1277         }
1278
1279         rc = efx_mae_match_spec_mport_set(ctx_mae->match_spec, &mport_v, NULL);
1280         if (rc != 0) {
1281                 return rte_flow_error_set(error, rc,
1282                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1283                                 "Failed to set MPORT for the PHY_PORT");
1284         }
1285
1286         ctx_mae->match_mport_set = B_TRUE;
1287
1288         return 0;
1289 }
1290
1291 static int
1292 sfc_mae_rule_parse_item_pf(const struct rte_flow_item *item,
1293                            struct sfc_flow_parse_ctx *ctx,
1294                            struct rte_flow_error *error)
1295 {
1296         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1297         const efx_nic_cfg_t *encp = efx_nic_cfg_get(ctx_mae->sa->nic);
1298         efx_mport_sel_t mport_v;
1299         int rc;
1300
1301         if (ctx_mae->match_mport_set) {
1302                 return rte_flow_error_set(error, ENOTSUP,
1303                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1304                                 "Can't handle multiple traffic source items");
1305         }
1306
1307         rc = efx_mae_mport_by_pcie_function(encp->enc_pf, EFX_PCI_VF_INVALID,
1308                                             &mport_v);
1309         if (rc != 0) {
1310                 return rte_flow_error_set(error, rc,
1311                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1312                                 "Failed to convert the PF ID");
1313         }
1314
1315         rc = efx_mae_match_spec_mport_set(ctx_mae->match_spec, &mport_v, NULL);
1316         if (rc != 0) {
1317                 return rte_flow_error_set(error, rc,
1318                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1319                                 "Failed to set MPORT for the PF");
1320         }
1321
1322         ctx_mae->match_mport_set = B_TRUE;
1323
1324         return 0;
1325 }
1326
1327 static int
1328 sfc_mae_rule_parse_item_vf(const struct rte_flow_item *item,
1329                            struct sfc_flow_parse_ctx *ctx,
1330                            struct rte_flow_error *error)
1331 {
1332         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1333         const efx_nic_cfg_t *encp = efx_nic_cfg_get(ctx_mae->sa->nic);
1334         const struct rte_flow_item_vf supp_mask = {
1335                 .id = 0xffffffff,
1336         };
1337         const void *def_mask = &rte_flow_item_vf_mask;
1338         const struct rte_flow_item_vf *spec = NULL;
1339         const struct rte_flow_item_vf *mask = NULL;
1340         efx_mport_sel_t mport_v;
1341         int rc;
1342
1343         if (ctx_mae->match_mport_set) {
1344                 return rte_flow_error_set(error, ENOTSUP,
1345                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1346                                 "Can't handle multiple traffic source items");
1347         }
1348
1349         rc = sfc_flow_parse_init(item,
1350                                  (const void **)&spec, (const void **)&mask,
1351                                  (const void *)&supp_mask, def_mask,
1352                                  sizeof(struct rte_flow_item_vf), error);
1353         if (rc != 0)
1354                 return rc;
1355
1356         if (mask->id != supp_mask.id) {
1357                 return rte_flow_error_set(error, EINVAL,
1358                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1359                                 "Bad mask in the VF pattern item");
1360         }
1361
1362         /*
1363          * If "spec" is not set, the item requests any VF related to the
1364          * PF of the current DPDK port (but not the PF itself).
1365          * Reject this match criterion as unsupported.
1366          */
1367         if (spec == NULL) {
1368                 return rte_flow_error_set(error, EINVAL,
1369                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1370                                 "Bad spec in the VF pattern item");
1371         }
1372
1373         rc = efx_mae_mport_by_pcie_function(encp->enc_pf, spec->id, &mport_v);
1374         if (rc != 0) {
1375                 return rte_flow_error_set(error, rc,
1376                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1377                                 "Failed to convert the PF + VF IDs");
1378         }
1379
1380         rc = efx_mae_match_spec_mport_set(ctx_mae->match_spec, &mport_v, NULL);
1381         if (rc != 0) {
1382                 return rte_flow_error_set(error, rc,
1383                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1384                                 "Failed to set MPORT for the PF + VF");
1385         }
1386
1387         ctx_mae->match_mport_set = B_TRUE;
1388
1389         return 0;
1390 }
1391
1392 /*
1393  * Having this field ID in a field locator means that this
1394  * locator cannot be used to actually set the field at the
1395  * time when the corresponding item gets encountered. Such
1396  * fields get stashed in the parsing context instead. This
1397  * is required to resolve dependencies between the stashed
1398  * fields. See sfc_mae_rule_process_pattern_data().
1399  */
1400 #define SFC_MAE_FIELD_HANDLING_DEFERRED EFX_MAE_FIELD_NIDS
1401
1402 struct sfc_mae_field_locator {
1403         efx_mae_field_id_t              field_id;
1404         size_t                          size;
1405         /* Field offset in the corresponding rte_flow_item_ struct */
1406         size_t                          ofst;
1407 };
1408
1409 static void
1410 sfc_mae_item_build_supp_mask(const struct sfc_mae_field_locator *field_locators,
1411                              unsigned int nb_field_locators, void *mask_ptr,
1412                              size_t mask_size)
1413 {
1414         unsigned int i;
1415
1416         memset(mask_ptr, 0, mask_size);
1417
1418         for (i = 0; i < nb_field_locators; ++i) {
1419                 const struct sfc_mae_field_locator *fl = &field_locators[i];
1420
1421                 SFC_ASSERT(fl->ofst + fl->size <= mask_size);
1422                 memset(RTE_PTR_ADD(mask_ptr, fl->ofst), 0xff, fl->size);
1423         }
1424 }
1425
1426 static int
1427 sfc_mae_parse_item(const struct sfc_mae_field_locator *field_locators,
1428                    unsigned int nb_field_locators, const uint8_t *spec,
1429                    const uint8_t *mask, struct sfc_mae_parse_ctx *ctx,
1430                    struct rte_flow_error *error)
1431 {
1432         const efx_mae_field_id_t *fremap = ctx->field_ids_remap;
1433         unsigned int i;
1434         int rc = 0;
1435
1436         for (i = 0; i < nb_field_locators; ++i) {
1437                 const struct sfc_mae_field_locator *fl = &field_locators[i];
1438
1439                 if (fl->field_id == SFC_MAE_FIELD_HANDLING_DEFERRED)
1440                         continue;
1441
1442                 rc = efx_mae_match_spec_field_set(ctx->match_spec,
1443                                                   fremap[fl->field_id],
1444                                                   fl->size, spec + fl->ofst,
1445                                                   fl->size, mask + fl->ofst);
1446                 if (rc != 0)
1447                         break;
1448         }
1449
1450         if (rc != 0) {
1451                 rc = rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ITEM,
1452                                 NULL, "Failed to process item fields");
1453         }
1454
1455         return rc;
1456 }
1457
1458 static const struct sfc_mae_field_locator flocs_eth[] = {
1459         {
1460                 /*
1461                  * This locator is used only for building supported fields mask.
1462                  * The field is handled by sfc_mae_rule_process_pattern_data().
1463                  */
1464                 SFC_MAE_FIELD_HANDLING_DEFERRED,
1465                 RTE_SIZEOF_FIELD(struct rte_flow_item_eth, type),
1466                 offsetof(struct rte_flow_item_eth, type),
1467         },
1468         {
1469                 EFX_MAE_FIELD_ETH_DADDR_BE,
1470                 RTE_SIZEOF_FIELD(struct rte_flow_item_eth, dst),
1471                 offsetof(struct rte_flow_item_eth, dst),
1472         },
1473         {
1474                 EFX_MAE_FIELD_ETH_SADDR_BE,
1475                 RTE_SIZEOF_FIELD(struct rte_flow_item_eth, src),
1476                 offsetof(struct rte_flow_item_eth, src),
1477         },
1478 };
1479
1480 static int
1481 sfc_mae_rule_parse_item_eth(const struct rte_flow_item *item,
1482                             struct sfc_flow_parse_ctx *ctx,
1483                             struct rte_flow_error *error)
1484 {
1485         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1486         struct rte_flow_item_eth supp_mask;
1487         const uint8_t *spec = NULL;
1488         const uint8_t *mask = NULL;
1489         int rc;
1490
1491         sfc_mae_item_build_supp_mask(flocs_eth, RTE_DIM(flocs_eth),
1492                                      &supp_mask, sizeof(supp_mask));
1493         supp_mask.has_vlan = 1;
1494
1495         rc = sfc_flow_parse_init(item,
1496                                  (const void **)&spec, (const void **)&mask,
1497                                  (const void *)&supp_mask,
1498                                  &rte_flow_item_eth_mask,
1499                                  sizeof(struct rte_flow_item_eth), error);
1500         if (rc != 0)
1501                 return rc;
1502
1503         if (spec != NULL) {
1504                 struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1505                 struct sfc_mae_ethertype *ethertypes = pdata->ethertypes;
1506                 const struct rte_flow_item_eth *item_spec;
1507                 const struct rte_flow_item_eth *item_mask;
1508
1509                 item_spec = (const struct rte_flow_item_eth *)spec;
1510                 item_mask = (const struct rte_flow_item_eth *)mask;
1511
1512                 /*
1513                  * Remember various match criteria in the parsing context.
1514                  * sfc_mae_rule_process_pattern_data() will consider them
1515                  * altogether when the rest of the items have been parsed.
1516                  */
1517                 ethertypes[0].value = item_spec->type;
1518                 ethertypes[0].mask = item_mask->type;
1519                 if (item_mask->has_vlan) {
1520                         pdata->has_ovlan_mask = B_TRUE;
1521                         if (item_spec->has_vlan)
1522                                 pdata->has_ovlan_value = B_TRUE;
1523                 }
1524         } else {
1525                 /*
1526                  * The specification is empty. The overall pattern
1527                  * validity will be enforced at the end of parsing.
1528                  * See sfc_mae_rule_process_pattern_data().
1529                  */
1530                 return 0;
1531         }
1532
1533         return sfc_mae_parse_item(flocs_eth, RTE_DIM(flocs_eth), spec, mask,
1534                                   ctx_mae, error);
1535 }
1536
1537 static const struct sfc_mae_field_locator flocs_vlan[] = {
1538         /* Outermost tag */
1539         {
1540                 EFX_MAE_FIELD_VLAN0_TCI_BE,
1541                 RTE_SIZEOF_FIELD(struct rte_flow_item_vlan, tci),
1542                 offsetof(struct rte_flow_item_vlan, tci),
1543         },
1544         {
1545                 /*
1546                  * This locator is used only for building supported fields mask.
1547                  * The field is handled by sfc_mae_rule_process_pattern_data().
1548                  */
1549                 SFC_MAE_FIELD_HANDLING_DEFERRED,
1550                 RTE_SIZEOF_FIELD(struct rte_flow_item_vlan, inner_type),
1551                 offsetof(struct rte_flow_item_vlan, inner_type),
1552         },
1553
1554         /* Innermost tag */
1555         {
1556                 EFX_MAE_FIELD_VLAN1_TCI_BE,
1557                 RTE_SIZEOF_FIELD(struct rte_flow_item_vlan, tci),
1558                 offsetof(struct rte_flow_item_vlan, tci),
1559         },
1560         {
1561                 /*
1562                  * This locator is used only for building supported fields mask.
1563                  * The field is handled by sfc_mae_rule_process_pattern_data().
1564                  */
1565                 SFC_MAE_FIELD_HANDLING_DEFERRED,
1566                 RTE_SIZEOF_FIELD(struct rte_flow_item_vlan, inner_type),
1567                 offsetof(struct rte_flow_item_vlan, inner_type),
1568         },
1569 };
1570
1571 static int
1572 sfc_mae_rule_parse_item_vlan(const struct rte_flow_item *item,
1573                              struct sfc_flow_parse_ctx *ctx,
1574                              struct rte_flow_error *error)
1575 {
1576         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1577         struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1578         boolean_t *has_vlan_mp_by_nb_tags[SFC_MAE_MATCH_VLAN_MAX_NTAGS] = {
1579                 &pdata->has_ovlan_mask,
1580                 &pdata->has_ivlan_mask,
1581         };
1582         boolean_t *has_vlan_vp_by_nb_tags[SFC_MAE_MATCH_VLAN_MAX_NTAGS] = {
1583                 &pdata->has_ovlan_value,
1584                 &pdata->has_ivlan_value,
1585         };
1586         boolean_t *cur_tag_presence_bit_mp;
1587         boolean_t *cur_tag_presence_bit_vp;
1588         const struct sfc_mae_field_locator *flocs;
1589         struct rte_flow_item_vlan supp_mask;
1590         const uint8_t *spec = NULL;
1591         const uint8_t *mask = NULL;
1592         unsigned int nb_flocs;
1593         int rc;
1594
1595         RTE_BUILD_BUG_ON(SFC_MAE_MATCH_VLAN_MAX_NTAGS != 2);
1596
1597         if (pdata->nb_vlan_tags == SFC_MAE_MATCH_VLAN_MAX_NTAGS) {
1598                 return rte_flow_error_set(error, ENOTSUP,
1599                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1600                                 "Can't match that many VLAN tags");
1601         }
1602
1603         cur_tag_presence_bit_mp = has_vlan_mp_by_nb_tags[pdata->nb_vlan_tags];
1604         cur_tag_presence_bit_vp = has_vlan_vp_by_nb_tags[pdata->nb_vlan_tags];
1605
1606         if (*cur_tag_presence_bit_mp == B_TRUE &&
1607             *cur_tag_presence_bit_vp == B_FALSE) {
1608                 return rte_flow_error_set(error, EINVAL,
1609                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
1610                                 "The previous item enforces no (more) VLAN, "
1611                                 "so the current item (VLAN) must not exist");
1612         }
1613
1614         nb_flocs = RTE_DIM(flocs_vlan) / SFC_MAE_MATCH_VLAN_MAX_NTAGS;
1615         flocs = flocs_vlan + pdata->nb_vlan_tags * nb_flocs;
1616
1617         sfc_mae_item_build_supp_mask(flocs, nb_flocs,
1618                                      &supp_mask, sizeof(supp_mask));
1619         /*
1620          * This only means that the field is supported by the driver and libefx.
1621          * Support on NIC level will be checked when all items have been parsed.
1622          */
1623         supp_mask.has_more_vlan = 1;
1624
1625         rc = sfc_flow_parse_init(item,
1626                                  (const void **)&spec, (const void **)&mask,
1627                                  (const void *)&supp_mask,
1628                                  &rte_flow_item_vlan_mask,
1629                                  sizeof(struct rte_flow_item_vlan), error);
1630         if (rc != 0)
1631                 return rc;
1632
1633         if (spec != NULL) {
1634                 struct sfc_mae_ethertype *et = pdata->ethertypes;
1635                 const struct rte_flow_item_vlan *item_spec;
1636                 const struct rte_flow_item_vlan *item_mask;
1637
1638                 item_spec = (const struct rte_flow_item_vlan *)spec;
1639                 item_mask = (const struct rte_flow_item_vlan *)mask;
1640
1641                 /*
1642                  * Remember various match criteria in the parsing context.
1643                  * sfc_mae_rule_process_pattern_data() will consider them
1644                  * altogether when the rest of the items have been parsed.
1645                  */
1646                 et[pdata->nb_vlan_tags + 1].value = item_spec->inner_type;
1647                 et[pdata->nb_vlan_tags + 1].mask = item_mask->inner_type;
1648                 pdata->tci_masks[pdata->nb_vlan_tags] = item_mask->tci;
1649                 if (item_mask->has_more_vlan) {
1650                         if (pdata->nb_vlan_tags ==
1651                             SFC_MAE_MATCH_VLAN_MAX_NTAGS) {
1652                                 return rte_flow_error_set(error, ENOTSUP,
1653                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
1654                                         "Can't use 'has_more_vlan' in "
1655                                         "the second item VLAN");
1656                         }
1657                         pdata->has_ivlan_mask = B_TRUE;
1658                         if (item_spec->has_more_vlan)
1659                                 pdata->has_ivlan_value = B_TRUE;
1660                 }
1661
1662                 /* Convert TCI to MAE representation right now. */
1663                 rc = sfc_mae_parse_item(flocs, nb_flocs, spec, mask,
1664                                         ctx_mae, error);
1665                 if (rc != 0)
1666                         return rc;
1667         }
1668
1669         ++(pdata->nb_vlan_tags);
1670
1671         return 0;
1672 }
1673
1674 static const struct sfc_mae_field_locator flocs_ipv4[] = {
1675         {
1676                 EFX_MAE_FIELD_SRC_IP4_BE,
1677                 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.src_addr),
1678                 offsetof(struct rte_flow_item_ipv4, hdr.src_addr),
1679         },
1680         {
1681                 EFX_MAE_FIELD_DST_IP4_BE,
1682                 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.dst_addr),
1683                 offsetof(struct rte_flow_item_ipv4, hdr.dst_addr),
1684         },
1685         {
1686                 /*
1687                  * This locator is used only for building supported fields mask.
1688                  * The field is handled by sfc_mae_rule_process_pattern_data().
1689                  */
1690                 SFC_MAE_FIELD_HANDLING_DEFERRED,
1691                 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.next_proto_id),
1692                 offsetof(struct rte_flow_item_ipv4, hdr.next_proto_id),
1693         },
1694         {
1695                 EFX_MAE_FIELD_IP_TOS,
1696                 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4,
1697                                  hdr.type_of_service),
1698                 offsetof(struct rte_flow_item_ipv4, hdr.type_of_service),
1699         },
1700         {
1701                 EFX_MAE_FIELD_IP_TTL,
1702                 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.time_to_live),
1703                 offsetof(struct rte_flow_item_ipv4, hdr.time_to_live),
1704         },
1705 };
1706
1707 static int
1708 sfc_mae_rule_parse_item_ipv4(const struct rte_flow_item *item,
1709                              struct sfc_flow_parse_ctx *ctx,
1710                              struct rte_flow_error *error)
1711 {
1712         rte_be16_t ethertype_ipv4_be = RTE_BE16(RTE_ETHER_TYPE_IPV4);
1713         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1714         struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1715         struct rte_flow_item_ipv4 supp_mask;
1716         const uint8_t *spec = NULL;
1717         const uint8_t *mask = NULL;
1718         int rc;
1719
1720         sfc_mae_item_build_supp_mask(flocs_ipv4, RTE_DIM(flocs_ipv4),
1721                                      &supp_mask, sizeof(supp_mask));
1722
1723         rc = sfc_flow_parse_init(item,
1724                                  (const void **)&spec, (const void **)&mask,
1725                                  (const void *)&supp_mask,
1726                                  &rte_flow_item_ipv4_mask,
1727                                  sizeof(struct rte_flow_item_ipv4), error);
1728         if (rc != 0)
1729                 return rc;
1730
1731         pdata->innermost_ethertype_restriction.value = ethertype_ipv4_be;
1732         pdata->innermost_ethertype_restriction.mask = RTE_BE16(0xffff);
1733
1734         if (spec != NULL) {
1735                 const struct rte_flow_item_ipv4 *item_spec;
1736                 const struct rte_flow_item_ipv4 *item_mask;
1737
1738                 item_spec = (const struct rte_flow_item_ipv4 *)spec;
1739                 item_mask = (const struct rte_flow_item_ipv4 *)mask;
1740
1741                 pdata->l3_next_proto_value = item_spec->hdr.next_proto_id;
1742                 pdata->l3_next_proto_mask = item_mask->hdr.next_proto_id;
1743         } else {
1744                 return 0;
1745         }
1746
1747         return sfc_mae_parse_item(flocs_ipv4, RTE_DIM(flocs_ipv4), spec, mask,
1748                                   ctx_mae, error);
1749 }
1750
1751 static const struct sfc_mae_field_locator flocs_ipv6[] = {
1752         {
1753                 EFX_MAE_FIELD_SRC_IP6_BE,
1754                 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv6, hdr.src_addr),
1755                 offsetof(struct rte_flow_item_ipv6, hdr.src_addr),
1756         },
1757         {
1758                 EFX_MAE_FIELD_DST_IP6_BE,
1759                 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv6, hdr.dst_addr),
1760                 offsetof(struct rte_flow_item_ipv6, hdr.dst_addr),
1761         },
1762         {
1763                 /*
1764                  * This locator is used only for building supported fields mask.
1765                  * The field is handled by sfc_mae_rule_process_pattern_data().
1766                  */
1767                 SFC_MAE_FIELD_HANDLING_DEFERRED,
1768                 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv6, hdr.proto),
1769                 offsetof(struct rte_flow_item_ipv6, hdr.proto),
1770         },
1771         {
1772                 EFX_MAE_FIELD_IP_TTL,
1773                 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv6, hdr.hop_limits),
1774                 offsetof(struct rte_flow_item_ipv6, hdr.hop_limits),
1775         },
1776 };
1777
1778 static int
1779 sfc_mae_rule_parse_item_ipv6(const struct rte_flow_item *item,
1780                              struct sfc_flow_parse_ctx *ctx,
1781                              struct rte_flow_error *error)
1782 {
1783         rte_be16_t ethertype_ipv6_be = RTE_BE16(RTE_ETHER_TYPE_IPV6);
1784         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1785         const efx_mae_field_id_t *fremap = ctx_mae->field_ids_remap;
1786         struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1787         struct rte_flow_item_ipv6 supp_mask;
1788         const uint8_t *spec = NULL;
1789         const uint8_t *mask = NULL;
1790         rte_be32_t vtc_flow_be;
1791         uint32_t vtc_flow;
1792         uint8_t tc_value;
1793         uint8_t tc_mask;
1794         int rc;
1795
1796         sfc_mae_item_build_supp_mask(flocs_ipv6, RTE_DIM(flocs_ipv6),
1797                                      &supp_mask, sizeof(supp_mask));
1798
1799         vtc_flow_be = RTE_BE32(RTE_IPV6_HDR_TC_MASK);
1800         memcpy(&supp_mask, &vtc_flow_be, sizeof(vtc_flow_be));
1801
1802         rc = sfc_flow_parse_init(item,
1803                                  (const void **)&spec, (const void **)&mask,
1804                                  (const void *)&supp_mask,
1805                                  &rte_flow_item_ipv6_mask,
1806                                  sizeof(struct rte_flow_item_ipv6), error);
1807         if (rc != 0)
1808                 return rc;
1809
1810         pdata->innermost_ethertype_restriction.value = ethertype_ipv6_be;
1811         pdata->innermost_ethertype_restriction.mask = RTE_BE16(0xffff);
1812
1813         if (spec != NULL) {
1814                 const struct rte_flow_item_ipv6 *item_spec;
1815                 const struct rte_flow_item_ipv6 *item_mask;
1816
1817                 item_spec = (const struct rte_flow_item_ipv6 *)spec;
1818                 item_mask = (const struct rte_flow_item_ipv6 *)mask;
1819
1820                 pdata->l3_next_proto_value = item_spec->hdr.proto;
1821                 pdata->l3_next_proto_mask = item_mask->hdr.proto;
1822         } else {
1823                 return 0;
1824         }
1825
1826         rc = sfc_mae_parse_item(flocs_ipv6, RTE_DIM(flocs_ipv6), spec, mask,
1827                                 ctx_mae, error);
1828         if (rc != 0)
1829                 return rc;
1830
1831         memcpy(&vtc_flow_be, spec, sizeof(vtc_flow_be));
1832         vtc_flow = rte_be_to_cpu_32(vtc_flow_be);
1833         tc_value = (vtc_flow & RTE_IPV6_HDR_TC_MASK) >> RTE_IPV6_HDR_TC_SHIFT;
1834
1835         memcpy(&vtc_flow_be, mask, sizeof(vtc_flow_be));
1836         vtc_flow = rte_be_to_cpu_32(vtc_flow_be);
1837         tc_mask = (vtc_flow & RTE_IPV6_HDR_TC_MASK) >> RTE_IPV6_HDR_TC_SHIFT;
1838
1839         rc = efx_mae_match_spec_field_set(ctx_mae->match_spec,
1840                                           fremap[EFX_MAE_FIELD_IP_TOS],
1841                                           sizeof(tc_value), &tc_value,
1842                                           sizeof(tc_mask), &tc_mask);
1843         if (rc != 0) {
1844                 return rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ITEM,
1845                                 NULL, "Failed to process item fields");
1846         }
1847
1848         return 0;
1849 }
1850
1851 static const struct sfc_mae_field_locator flocs_tcp[] = {
1852         {
1853                 EFX_MAE_FIELD_L4_SPORT_BE,
1854                 RTE_SIZEOF_FIELD(struct rte_flow_item_tcp, hdr.src_port),
1855                 offsetof(struct rte_flow_item_tcp, hdr.src_port),
1856         },
1857         {
1858                 EFX_MAE_FIELD_L4_DPORT_BE,
1859                 RTE_SIZEOF_FIELD(struct rte_flow_item_tcp, hdr.dst_port),
1860                 offsetof(struct rte_flow_item_tcp, hdr.dst_port),
1861         },
1862         {
1863                 EFX_MAE_FIELD_TCP_FLAGS_BE,
1864                 /*
1865                  * The values have been picked intentionally since the
1866                  * target MAE field is oversize (16 bit). This mapping
1867                  * relies on the fact that the MAE field is big-endian.
1868                  */
1869                 RTE_SIZEOF_FIELD(struct rte_flow_item_tcp, hdr.data_off) +
1870                 RTE_SIZEOF_FIELD(struct rte_flow_item_tcp, hdr.tcp_flags),
1871                 offsetof(struct rte_flow_item_tcp, hdr.data_off),
1872         },
1873 };
1874
1875 static int
1876 sfc_mae_rule_parse_item_tcp(const struct rte_flow_item *item,
1877                             struct sfc_flow_parse_ctx *ctx,
1878                             struct rte_flow_error *error)
1879 {
1880         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1881         struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1882         struct rte_flow_item_tcp supp_mask;
1883         const uint8_t *spec = NULL;
1884         const uint8_t *mask = NULL;
1885         int rc;
1886
1887         /*
1888          * When encountered among outermost items, item TCP is invalid.
1889          * Check which match specification is being constructed now.
1890          */
1891         if (ctx_mae->match_spec != ctx_mae->match_spec_action) {
1892                 return rte_flow_error_set(error, EINVAL,
1893                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1894                                           "TCP in outer frame is invalid");
1895         }
1896
1897         sfc_mae_item_build_supp_mask(flocs_tcp, RTE_DIM(flocs_tcp),
1898                                      &supp_mask, sizeof(supp_mask));
1899
1900         rc = sfc_flow_parse_init(item,
1901                                  (const void **)&spec, (const void **)&mask,
1902                                  (const void *)&supp_mask,
1903                                  &rte_flow_item_tcp_mask,
1904                                  sizeof(struct rte_flow_item_tcp), error);
1905         if (rc != 0)
1906                 return rc;
1907
1908         pdata->l3_next_proto_restriction_value = IPPROTO_TCP;
1909         pdata->l3_next_proto_restriction_mask = 0xff;
1910
1911         if (spec == NULL)
1912                 return 0;
1913
1914         return sfc_mae_parse_item(flocs_tcp, RTE_DIM(flocs_tcp), spec, mask,
1915                                   ctx_mae, error);
1916 }
1917
1918 static const struct sfc_mae_field_locator flocs_udp[] = {
1919         {
1920                 EFX_MAE_FIELD_L4_SPORT_BE,
1921                 RTE_SIZEOF_FIELD(struct rte_flow_item_udp, hdr.src_port),
1922                 offsetof(struct rte_flow_item_udp, hdr.src_port),
1923         },
1924         {
1925                 EFX_MAE_FIELD_L4_DPORT_BE,
1926                 RTE_SIZEOF_FIELD(struct rte_flow_item_udp, hdr.dst_port),
1927                 offsetof(struct rte_flow_item_udp, hdr.dst_port),
1928         },
1929 };
1930
1931 static int
1932 sfc_mae_rule_parse_item_udp(const struct rte_flow_item *item,
1933                             struct sfc_flow_parse_ctx *ctx,
1934                             struct rte_flow_error *error)
1935 {
1936         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
1937         struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data;
1938         struct rte_flow_item_udp supp_mask;
1939         const uint8_t *spec = NULL;
1940         const uint8_t *mask = NULL;
1941         int rc;
1942
1943         sfc_mae_item_build_supp_mask(flocs_udp, RTE_DIM(flocs_udp),
1944                                      &supp_mask, sizeof(supp_mask));
1945
1946         rc = sfc_flow_parse_init(item,
1947                                  (const void **)&spec, (const void **)&mask,
1948                                  (const void *)&supp_mask,
1949                                  &rte_flow_item_udp_mask,
1950                                  sizeof(struct rte_flow_item_udp), error);
1951         if (rc != 0)
1952                 return rc;
1953
1954         pdata->l3_next_proto_restriction_value = IPPROTO_UDP;
1955         pdata->l3_next_proto_restriction_mask = 0xff;
1956
1957         if (spec == NULL)
1958                 return 0;
1959
1960         return sfc_mae_parse_item(flocs_udp, RTE_DIM(flocs_udp), spec, mask,
1961                                   ctx_mae, error);
1962 }
1963
1964 static const struct sfc_mae_field_locator flocs_tunnel[] = {
1965         {
1966                 /*
1967                  * The size and offset values are relevant
1968                  * for Geneve and NVGRE, too.
1969                  */
1970                 .size = RTE_SIZEOF_FIELD(struct rte_flow_item_vxlan, vni),
1971                 .ofst = offsetof(struct rte_flow_item_vxlan, vni),
1972         },
1973 };
1974
1975 /*
1976  * An auxiliary registry which allows using non-encap. field IDs
1977  * directly when building a match specification of type ACTION.
1978  *
1979  * See sfc_mae_rule_parse_pattern() and sfc_mae_rule_parse_item_tunnel().
1980  */
1981 static const efx_mae_field_id_t field_ids_no_remap[] = {
1982 #define FIELD_ID_NO_REMAP(_field) \
1983         [EFX_MAE_FIELD_##_field] = EFX_MAE_FIELD_##_field
1984
1985         FIELD_ID_NO_REMAP(ETHER_TYPE_BE),
1986         FIELD_ID_NO_REMAP(ETH_SADDR_BE),
1987         FIELD_ID_NO_REMAP(ETH_DADDR_BE),
1988         FIELD_ID_NO_REMAP(VLAN0_TCI_BE),
1989         FIELD_ID_NO_REMAP(VLAN0_PROTO_BE),
1990         FIELD_ID_NO_REMAP(VLAN1_TCI_BE),
1991         FIELD_ID_NO_REMAP(VLAN1_PROTO_BE),
1992         FIELD_ID_NO_REMAP(SRC_IP4_BE),
1993         FIELD_ID_NO_REMAP(DST_IP4_BE),
1994         FIELD_ID_NO_REMAP(IP_PROTO),
1995         FIELD_ID_NO_REMAP(IP_TOS),
1996         FIELD_ID_NO_REMAP(IP_TTL),
1997         FIELD_ID_NO_REMAP(SRC_IP6_BE),
1998         FIELD_ID_NO_REMAP(DST_IP6_BE),
1999         FIELD_ID_NO_REMAP(L4_SPORT_BE),
2000         FIELD_ID_NO_REMAP(L4_DPORT_BE),
2001         FIELD_ID_NO_REMAP(TCP_FLAGS_BE),
2002         FIELD_ID_NO_REMAP(HAS_OVLAN),
2003         FIELD_ID_NO_REMAP(HAS_IVLAN),
2004
2005 #undef FIELD_ID_NO_REMAP
2006 };
2007
2008 /*
2009  * An auxiliary registry which allows using "ENC" field IDs
2010  * when building a match specification of type OUTER.
2011  *
2012  * See sfc_mae_rule_encap_parse_init().
2013  */
2014 static const efx_mae_field_id_t field_ids_remap_to_encap[] = {
2015 #define FIELD_ID_REMAP_TO_ENCAP(_field) \
2016         [EFX_MAE_FIELD_##_field] = EFX_MAE_FIELD_ENC_##_field
2017
2018         FIELD_ID_REMAP_TO_ENCAP(ETHER_TYPE_BE),
2019         FIELD_ID_REMAP_TO_ENCAP(ETH_SADDR_BE),
2020         FIELD_ID_REMAP_TO_ENCAP(ETH_DADDR_BE),
2021         FIELD_ID_REMAP_TO_ENCAP(VLAN0_TCI_BE),
2022         FIELD_ID_REMAP_TO_ENCAP(VLAN0_PROTO_BE),
2023         FIELD_ID_REMAP_TO_ENCAP(VLAN1_TCI_BE),
2024         FIELD_ID_REMAP_TO_ENCAP(VLAN1_PROTO_BE),
2025         FIELD_ID_REMAP_TO_ENCAP(SRC_IP4_BE),
2026         FIELD_ID_REMAP_TO_ENCAP(DST_IP4_BE),
2027         FIELD_ID_REMAP_TO_ENCAP(IP_PROTO),
2028         FIELD_ID_REMAP_TO_ENCAP(IP_TOS),
2029         FIELD_ID_REMAP_TO_ENCAP(IP_TTL),
2030         FIELD_ID_REMAP_TO_ENCAP(SRC_IP6_BE),
2031         FIELD_ID_REMAP_TO_ENCAP(DST_IP6_BE),
2032         FIELD_ID_REMAP_TO_ENCAP(L4_SPORT_BE),
2033         FIELD_ID_REMAP_TO_ENCAP(L4_DPORT_BE),
2034         FIELD_ID_REMAP_TO_ENCAP(HAS_OVLAN),
2035         FIELD_ID_REMAP_TO_ENCAP(HAS_IVLAN),
2036
2037 #undef FIELD_ID_REMAP_TO_ENCAP
2038 };
2039
2040 static int
2041 sfc_mae_rule_parse_item_tunnel(const struct rte_flow_item *item,
2042                                struct sfc_flow_parse_ctx *ctx,
2043                                struct rte_flow_error *error)
2044 {
2045         struct sfc_mae_parse_ctx *ctx_mae = ctx->mae;
2046         uint8_t vnet_id_v[sizeof(uint32_t)] = {0};
2047         uint8_t vnet_id_m[sizeof(uint32_t)] = {0};
2048         const struct rte_flow_item_vxlan *vxp;
2049         uint8_t supp_mask[sizeof(uint64_t)];
2050         const uint8_t *spec = NULL;
2051         const uint8_t *mask = NULL;
2052         int rc;
2053
2054         /*
2055          * We're about to start processing inner frame items.
2056          * Process pattern data that has been deferred so far
2057          * and reset pattern data storage.
2058          */
2059         rc = sfc_mae_rule_process_pattern_data(ctx_mae, error);
2060         if (rc != 0)
2061                 return rc;
2062
2063         memset(&ctx_mae->pattern_data, 0, sizeof(ctx_mae->pattern_data));
2064
2065         sfc_mae_item_build_supp_mask(flocs_tunnel, RTE_DIM(flocs_tunnel),
2066                                      &supp_mask, sizeof(supp_mask));
2067
2068         /*
2069          * This tunnel item was preliminarily detected by
2070          * sfc_mae_rule_encap_parse_init(). Default mask
2071          * was also picked by that helper. Use it here.
2072          */
2073         rc = sfc_flow_parse_init(item,
2074                                  (const void **)&spec, (const void **)&mask,
2075                                  (const void *)&supp_mask,
2076                                  ctx_mae->tunnel_def_mask,
2077                                  ctx_mae->tunnel_def_mask_size,  error);
2078         if (rc != 0)
2079                 return rc;
2080
2081         /*
2082          * This item and later ones comprise a
2083          * match specification of type ACTION.
2084          */
2085         ctx_mae->match_spec = ctx_mae->match_spec_action;
2086
2087         /* This item and later ones use non-encap. EFX MAE field IDs. */
2088         ctx_mae->field_ids_remap = field_ids_no_remap;
2089
2090         if (spec == NULL)
2091                 return 0;
2092
2093         /*
2094          * Field EFX_MAE_FIELD_ENC_VNET_ID_BE is a 32-bit one.
2095          * Copy 24-bit VNI, which is BE, at offset 1 in it.
2096          * The extra byte is 0 both in the mask and in the value.
2097          */
2098         vxp = (const struct rte_flow_item_vxlan *)spec;
2099         memcpy(vnet_id_v + 1, &vxp->vni, sizeof(vxp->vni));
2100
2101         vxp = (const struct rte_flow_item_vxlan *)mask;
2102         memcpy(vnet_id_m + 1, &vxp->vni, sizeof(vxp->vni));
2103
2104         rc = efx_mae_match_spec_field_set(ctx_mae->match_spec,
2105                                           EFX_MAE_FIELD_ENC_VNET_ID_BE,
2106                                           sizeof(vnet_id_v), vnet_id_v,
2107                                           sizeof(vnet_id_m), vnet_id_m);
2108         if (rc != 0) {
2109                 rc = rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ITEM,
2110                                         item, "Failed to set VXLAN VNI");
2111         }
2112
2113         return rc;
2114 }
2115
2116 static const struct sfc_flow_item sfc_flow_items[] = {
2117         {
2118                 .type = RTE_FLOW_ITEM_TYPE_PORT_ID,
2119                 .name = "PORT_ID",
2120                 /*
2121                  * In terms of RTE flow, this item is a META one,
2122                  * and its position in the pattern is don't care.
2123                  */
2124                 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER,
2125                 .layer = SFC_FLOW_ITEM_ANY_LAYER,
2126                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2127                 .parse = sfc_mae_rule_parse_item_port_id,
2128         },
2129         {
2130                 .type = RTE_FLOW_ITEM_TYPE_PHY_PORT,
2131                 .name = "PHY_PORT",
2132                 /*
2133                  * In terms of RTE flow, this item is a META one,
2134                  * and its position in the pattern is don't care.
2135                  */
2136                 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER,
2137                 .layer = SFC_FLOW_ITEM_ANY_LAYER,
2138                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2139                 .parse = sfc_mae_rule_parse_item_phy_port,
2140         },
2141         {
2142                 .type = RTE_FLOW_ITEM_TYPE_PF,
2143                 .name = "PF",
2144                 /*
2145                  * In terms of RTE flow, this item is a META one,
2146                  * and its position in the pattern is don't care.
2147                  */
2148                 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER,
2149                 .layer = SFC_FLOW_ITEM_ANY_LAYER,
2150                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2151                 .parse = sfc_mae_rule_parse_item_pf,
2152         },
2153         {
2154                 .type = RTE_FLOW_ITEM_TYPE_VF,
2155                 .name = "VF",
2156                 /*
2157                  * In terms of RTE flow, this item is a META one,
2158                  * and its position in the pattern is don't care.
2159                  */
2160                 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER,
2161                 .layer = SFC_FLOW_ITEM_ANY_LAYER,
2162                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2163                 .parse = sfc_mae_rule_parse_item_vf,
2164         },
2165         {
2166                 .type = RTE_FLOW_ITEM_TYPE_ETH,
2167                 .name = "ETH",
2168                 .prev_layer = SFC_FLOW_ITEM_START_LAYER,
2169                 .layer = SFC_FLOW_ITEM_L2,
2170                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2171                 .parse = sfc_mae_rule_parse_item_eth,
2172         },
2173         {
2174                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
2175                 .name = "VLAN",
2176                 .prev_layer = SFC_FLOW_ITEM_L2,
2177                 .layer = SFC_FLOW_ITEM_L2,
2178                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2179                 .parse = sfc_mae_rule_parse_item_vlan,
2180         },
2181         {
2182                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
2183                 .name = "IPV4",
2184                 .prev_layer = SFC_FLOW_ITEM_L2,
2185                 .layer = SFC_FLOW_ITEM_L3,
2186                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2187                 .parse = sfc_mae_rule_parse_item_ipv4,
2188         },
2189         {
2190                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
2191                 .name = "IPV6",
2192                 .prev_layer = SFC_FLOW_ITEM_L2,
2193                 .layer = SFC_FLOW_ITEM_L3,
2194                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2195                 .parse = sfc_mae_rule_parse_item_ipv6,
2196         },
2197         {
2198                 .type = RTE_FLOW_ITEM_TYPE_TCP,
2199                 .name = "TCP",
2200                 .prev_layer = SFC_FLOW_ITEM_L3,
2201                 .layer = SFC_FLOW_ITEM_L4,
2202                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2203                 .parse = sfc_mae_rule_parse_item_tcp,
2204         },
2205         {
2206                 .type = RTE_FLOW_ITEM_TYPE_UDP,
2207                 .name = "UDP",
2208                 .prev_layer = SFC_FLOW_ITEM_L3,
2209                 .layer = SFC_FLOW_ITEM_L4,
2210                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2211                 .parse = sfc_mae_rule_parse_item_udp,
2212         },
2213         {
2214                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
2215                 .name = "VXLAN",
2216                 .prev_layer = SFC_FLOW_ITEM_L4,
2217                 .layer = SFC_FLOW_ITEM_START_LAYER,
2218                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2219                 .parse = sfc_mae_rule_parse_item_tunnel,
2220         },
2221         {
2222                 .type = RTE_FLOW_ITEM_TYPE_GENEVE,
2223                 .name = "GENEVE",
2224                 .prev_layer = SFC_FLOW_ITEM_L4,
2225                 .layer = SFC_FLOW_ITEM_START_LAYER,
2226                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2227                 .parse = sfc_mae_rule_parse_item_tunnel,
2228         },
2229         {
2230                 .type = RTE_FLOW_ITEM_TYPE_NVGRE,
2231                 .name = "NVGRE",
2232                 .prev_layer = SFC_FLOW_ITEM_L3,
2233                 .layer = SFC_FLOW_ITEM_START_LAYER,
2234                 .ctx_type = SFC_FLOW_PARSE_CTX_MAE,
2235                 .parse = sfc_mae_rule_parse_item_tunnel,
2236         },
2237 };
2238
2239 static int
2240 sfc_mae_rule_process_outer(struct sfc_adapter *sa,
2241                            struct sfc_mae_parse_ctx *ctx,
2242                            struct sfc_mae_outer_rule **rulep,
2243                            struct rte_flow_error *error)
2244 {
2245         efx_mae_rule_id_t invalid_rule_id = { .id = EFX_MAE_RSRC_ID_INVALID };
2246         int rc;
2247
2248         if (ctx->encap_type == EFX_TUNNEL_PROTOCOL_NONE) {
2249                 *rulep = NULL;
2250                 goto no_or_id;
2251         }
2252
2253         SFC_ASSERT(ctx->match_spec_outer != NULL);
2254
2255         if (!efx_mae_match_spec_is_valid(sa->nic, ctx->match_spec_outer)) {
2256                 return rte_flow_error_set(error, ENOTSUP,
2257                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2258                                           "Inconsistent pattern (outer)");
2259         }
2260
2261         *rulep = sfc_mae_outer_rule_attach(sa, ctx->match_spec_outer,
2262                                            ctx->encap_type);
2263         if (*rulep != NULL) {
2264                 efx_mae_match_spec_fini(sa->nic, ctx->match_spec_outer);
2265         } else {
2266                 rc = sfc_mae_outer_rule_add(sa, ctx->match_spec_outer,
2267                                             ctx->encap_type, rulep);
2268                 if (rc != 0) {
2269                         return rte_flow_error_set(error, rc,
2270                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2271                                         "Failed to process the pattern");
2272                 }
2273         }
2274
2275         /* The spec has now been tracked by the outer rule entry. */
2276         ctx->match_spec_outer = NULL;
2277
2278 no_or_id:
2279         /*
2280          * In MAE, lookup sequence comprises outer parse, outer rule lookup,
2281          * inner parse (when some outer rule is hit) and action rule lookup.
2282          * If the currently processed flow does not come with an outer rule,
2283          * its action rule must be available only for packets which miss in
2284          * outer rule table. Set OR_ID match field to 0xffffffff/0xffffffff
2285          * in the action rule specification; this ensures correct behaviour.
2286          *
2287          * If, on the other hand, this flow does have an outer rule, its ID
2288          * may be unknown at the moment (not yet allocated), but OR_ID mask
2289          * has to be set to 0xffffffff anyway for correct class comparisons.
2290          * When the outer rule has been allocated, this match field will be
2291          * overridden by sfc_mae_outer_rule_enable() to use the right value.
2292          */
2293         rc = efx_mae_match_spec_outer_rule_id_set(ctx->match_spec_action,
2294                                                   &invalid_rule_id);
2295         if (rc != 0) {
2296                 if (*rulep != NULL)
2297                         sfc_mae_outer_rule_del(sa, *rulep);
2298
2299                 *rulep = NULL;
2300
2301                 return rte_flow_error_set(error, rc,
2302                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2303                                           "Failed to process the pattern");
2304         }
2305
2306         return 0;
2307 }
2308
2309 static int
2310 sfc_mae_rule_encap_parse_init(struct sfc_adapter *sa,
2311                               const struct rte_flow_item pattern[],
2312                               struct sfc_mae_parse_ctx *ctx,
2313                               struct rte_flow_error *error)
2314 {
2315         struct sfc_mae *mae = &sa->mae;
2316         int rc;
2317
2318         if (pattern == NULL) {
2319                 rte_flow_error_set(error, EINVAL,
2320                                    RTE_FLOW_ERROR_TYPE_ITEM_NUM, NULL,
2321                                    "NULL pattern");
2322                 return -rte_errno;
2323         }
2324
2325         for (;;) {
2326                 switch (pattern->type) {
2327                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2328                         ctx->encap_type = EFX_TUNNEL_PROTOCOL_VXLAN;
2329                         ctx->tunnel_def_mask = &rte_flow_item_vxlan_mask;
2330                         ctx->tunnel_def_mask_size =
2331                                 sizeof(rte_flow_item_vxlan_mask);
2332                         break;
2333                 case RTE_FLOW_ITEM_TYPE_GENEVE:
2334                         ctx->encap_type = EFX_TUNNEL_PROTOCOL_GENEVE;
2335                         ctx->tunnel_def_mask = &rte_flow_item_geneve_mask;
2336                         ctx->tunnel_def_mask_size =
2337                                 sizeof(rte_flow_item_geneve_mask);
2338                         break;
2339                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2340                         ctx->encap_type = EFX_TUNNEL_PROTOCOL_NVGRE;
2341                         ctx->tunnel_def_mask = &rte_flow_item_nvgre_mask;
2342                         ctx->tunnel_def_mask_size =
2343                                 sizeof(rte_flow_item_nvgre_mask);
2344                         break;
2345                 case RTE_FLOW_ITEM_TYPE_END:
2346                         break;
2347                 default:
2348                         ++pattern;
2349                         continue;
2350                 };
2351
2352                 break;
2353         }
2354
2355         if (pattern->type == RTE_FLOW_ITEM_TYPE_END)
2356                 return 0;
2357
2358         if ((mae->encap_types_supported & (1U << ctx->encap_type)) == 0) {
2359                 return rte_flow_error_set(error, ENOTSUP,
2360                                           RTE_FLOW_ERROR_TYPE_ITEM,
2361                                           pattern, "Unsupported tunnel item");
2362         }
2363
2364         if (ctx->priority >= mae->nb_outer_rule_prios_max) {
2365                 return rte_flow_error_set(error, ENOTSUP,
2366                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
2367                                           NULL, "Unsupported priority level");
2368         }
2369
2370         rc = efx_mae_match_spec_init(sa->nic, EFX_MAE_RULE_OUTER, ctx->priority,
2371                                      &ctx->match_spec_outer);
2372         if (rc != 0) {
2373                 return rte_flow_error_set(error, rc,
2374                         RTE_FLOW_ERROR_TYPE_ITEM, pattern,
2375                         "Failed to initialise outer rule match specification");
2376         }
2377
2378         /* Outermost items comprise a match specification of type OUTER. */
2379         ctx->match_spec = ctx->match_spec_outer;
2380
2381         /* Outermost items use "ENC" EFX MAE field IDs. */
2382         ctx->field_ids_remap = field_ids_remap_to_encap;
2383
2384         return 0;
2385 }
2386
2387 static void
2388 sfc_mae_rule_encap_parse_fini(struct sfc_adapter *sa,
2389                               struct sfc_mae_parse_ctx *ctx)
2390 {
2391         if (ctx->encap_type == EFX_TUNNEL_PROTOCOL_NONE)
2392                 return;
2393
2394         if (ctx->match_spec_outer != NULL)
2395                 efx_mae_match_spec_fini(sa->nic, ctx->match_spec_outer);
2396 }
2397
2398 int
2399 sfc_mae_rule_parse_pattern(struct sfc_adapter *sa,
2400                            const struct rte_flow_item pattern[],
2401                            struct sfc_flow_spec_mae *spec,
2402                            struct rte_flow_error *error)
2403 {
2404         struct sfc_mae_parse_ctx ctx_mae;
2405         struct sfc_flow_parse_ctx ctx;
2406         int rc;
2407
2408         memset(&ctx_mae, 0, sizeof(ctx_mae));
2409         ctx_mae.priority = spec->priority;
2410         ctx_mae.sa = sa;
2411
2412         rc = efx_mae_match_spec_init(sa->nic, EFX_MAE_RULE_ACTION,
2413                                      spec->priority,
2414                                      &ctx_mae.match_spec_action);
2415         if (rc != 0) {
2416                 rc = rte_flow_error_set(error, rc,
2417                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2418                         "Failed to initialise action rule match specification");
2419                 goto fail_init_match_spec_action;
2420         }
2421
2422         /*
2423          * As a preliminary setting, assume that there is no encapsulation
2424          * in the pattern. That is, pattern items are about to comprise a
2425          * match specification of type ACTION and use non-encap. field IDs.
2426          *
2427          * sfc_mae_rule_encap_parse_init() below may override this.
2428          */
2429         ctx_mae.encap_type = EFX_TUNNEL_PROTOCOL_NONE;
2430         ctx_mae.match_spec = ctx_mae.match_spec_action;
2431         ctx_mae.field_ids_remap = field_ids_no_remap;
2432
2433         ctx.type = SFC_FLOW_PARSE_CTX_MAE;
2434         ctx.mae = &ctx_mae;
2435
2436         rc = sfc_mae_rule_encap_parse_init(sa, pattern, &ctx_mae, error);
2437         if (rc != 0)
2438                 goto fail_encap_parse_init;
2439
2440         rc = sfc_flow_parse_pattern(sa, sfc_flow_items, RTE_DIM(sfc_flow_items),
2441                                     pattern, &ctx, error);
2442         if (rc != 0)
2443                 goto fail_parse_pattern;
2444
2445         rc = sfc_mae_rule_process_pattern_data(&ctx_mae, error);
2446         if (rc != 0)
2447                 goto fail_process_pattern_data;
2448
2449         rc = sfc_mae_rule_process_outer(sa, &ctx_mae, &spec->outer_rule, error);
2450         if (rc != 0)
2451                 goto fail_process_outer;
2452
2453         if (!efx_mae_match_spec_is_valid(sa->nic, ctx_mae.match_spec_action)) {
2454                 rc = rte_flow_error_set(error, ENOTSUP,
2455                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2456                                         "Inconsistent pattern");
2457                 goto fail_validate_match_spec_action;
2458         }
2459
2460         spec->match_spec = ctx_mae.match_spec_action;
2461
2462         return 0;
2463
2464 fail_validate_match_spec_action:
2465 fail_process_outer:
2466 fail_process_pattern_data:
2467 fail_parse_pattern:
2468         sfc_mae_rule_encap_parse_fini(sa, &ctx_mae);
2469
2470 fail_encap_parse_init:
2471         efx_mae_match_spec_fini(sa->nic, ctx_mae.match_spec_action);
2472
2473 fail_init_match_spec_action:
2474         return rc;
2475 }
2476
2477 /*
2478  * An action supported by MAE may correspond to a bundle of RTE flow actions,
2479  * in example, VLAN_PUSH = OF_PUSH_VLAN + OF_VLAN_SET_VID + OF_VLAN_SET_PCP.
2480  * That is, related RTE flow actions need to be tracked as parts of a whole
2481  * so that they can be combined into a single action and submitted to MAE
2482  * representation of a given rule's action set.
2483  *
2484  * Each RTE flow action provided by an application gets classified as
2485  * one belonging to some bundle type. If an action is not supposed to
2486  * belong to any bundle, or if this action is END, it is described as
2487  * one belonging to a dummy bundle of type EMPTY.
2488  *
2489  * A currently tracked bundle will be submitted if a repeating
2490  * action or an action of different bundle type follows.
2491  */
2492
2493 enum sfc_mae_actions_bundle_type {
2494         SFC_MAE_ACTIONS_BUNDLE_EMPTY = 0,
2495         SFC_MAE_ACTIONS_BUNDLE_VLAN_PUSH,
2496 };
2497
2498 struct sfc_mae_actions_bundle {
2499         enum sfc_mae_actions_bundle_type        type;
2500
2501         /* Indicates actions already tracked by the current bundle */
2502         uint64_t                                actions_mask;
2503
2504         /* Parameters used by SFC_MAE_ACTIONS_BUNDLE_VLAN_PUSH */
2505         rte_be16_t                              vlan_push_tpid;
2506         rte_be16_t                              vlan_push_tci;
2507 };
2508
2509 /*
2510  * Combine configuration of RTE flow actions tracked by the bundle into a
2511  * single action and submit the result to MAE action set specification.
2512  * Do nothing in the case of dummy action bundle.
2513  */
2514 static int
2515 sfc_mae_actions_bundle_submit(const struct sfc_mae_actions_bundle *bundle,
2516                               efx_mae_actions_t *spec)
2517 {
2518         int rc = 0;
2519
2520         switch (bundle->type) {
2521         case SFC_MAE_ACTIONS_BUNDLE_EMPTY:
2522                 break;
2523         case SFC_MAE_ACTIONS_BUNDLE_VLAN_PUSH:
2524                 rc = efx_mae_action_set_populate_vlan_push(
2525                         spec, bundle->vlan_push_tpid, bundle->vlan_push_tci);
2526                 break;
2527         default:
2528                 SFC_ASSERT(B_FALSE);
2529                 break;
2530         }
2531
2532         return rc;
2533 }
2534
2535 /*
2536  * Given the type of the next RTE flow action in the line, decide
2537  * whether a new bundle is about to start, and, if this is the case,
2538  * submit and reset the current bundle.
2539  */
2540 static int
2541 sfc_mae_actions_bundle_sync(const struct rte_flow_action *action,
2542                             struct sfc_mae_actions_bundle *bundle,
2543                             efx_mae_actions_t *spec,
2544                             struct rte_flow_error *error)
2545 {
2546         enum sfc_mae_actions_bundle_type bundle_type_new;
2547         int rc;
2548
2549         switch (action->type) {
2550         case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
2551         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
2552         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
2553                 bundle_type_new = SFC_MAE_ACTIONS_BUNDLE_VLAN_PUSH;
2554                 break;
2555         default:
2556                 /*
2557                  * Self-sufficient actions, including END, are handled in this
2558                  * case. No checks for unsupported actions are needed here
2559                  * because parsing doesn't occur at this point.
2560                  */
2561                 bundle_type_new = SFC_MAE_ACTIONS_BUNDLE_EMPTY;
2562                 break;
2563         }
2564
2565         if (bundle_type_new != bundle->type ||
2566             (bundle->actions_mask & (1ULL << action->type)) != 0) {
2567                 rc = sfc_mae_actions_bundle_submit(bundle, spec);
2568                 if (rc != 0)
2569                         goto fail_submit;
2570
2571                 memset(bundle, 0, sizeof(*bundle));
2572         }
2573
2574         bundle->type = bundle_type_new;
2575
2576         return 0;
2577
2578 fail_submit:
2579         return rte_flow_error_set(error, rc,
2580                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2581                         "Failed to request the (group of) action(s)");
2582 }
2583
2584 static void
2585 sfc_mae_rule_parse_action_of_push_vlan(
2586                             const struct rte_flow_action_of_push_vlan *conf,
2587                             struct sfc_mae_actions_bundle *bundle)
2588 {
2589         bundle->vlan_push_tpid = conf->ethertype;
2590 }
2591
2592 static void
2593 sfc_mae_rule_parse_action_of_set_vlan_vid(
2594                             const struct rte_flow_action_of_set_vlan_vid *conf,
2595                             struct sfc_mae_actions_bundle *bundle)
2596 {
2597         bundle->vlan_push_tci |= (conf->vlan_vid &
2598                                   rte_cpu_to_be_16(RTE_LEN2MASK(12, uint16_t)));
2599 }
2600
2601 static void
2602 sfc_mae_rule_parse_action_of_set_vlan_pcp(
2603                             const struct rte_flow_action_of_set_vlan_pcp *conf,
2604                             struct sfc_mae_actions_bundle *bundle)
2605 {
2606         uint16_t vlan_tci_pcp = (uint16_t)(conf->vlan_pcp &
2607                                            RTE_LEN2MASK(3, uint8_t)) << 13;
2608
2609         bundle->vlan_push_tci |= rte_cpu_to_be_16(vlan_tci_pcp);
2610 }
2611
2612 struct sfc_mae_parsed_item {
2613         const struct rte_flow_item      *item;
2614         size_t                          proto_header_ofst;
2615         size_t                          proto_header_size;
2616 };
2617
2618 /*
2619  * For each 16-bit word of the given header, override
2620  * bits enforced by the corresponding 16-bit mask.
2621  */
2622 static void
2623 sfc_mae_header_force_item_masks(uint8_t *header_buf,
2624                                 const struct sfc_mae_parsed_item *parsed_items,
2625                                 unsigned int nb_parsed_items)
2626 {
2627         unsigned int item_idx;
2628
2629         for (item_idx = 0; item_idx < nb_parsed_items; ++item_idx) {
2630                 const struct sfc_mae_parsed_item *parsed_item;
2631                 const struct rte_flow_item *item;
2632                 size_t proto_header_size;
2633                 size_t ofst;
2634
2635                 parsed_item = &parsed_items[item_idx];
2636                 proto_header_size = parsed_item->proto_header_size;
2637                 item = parsed_item->item;
2638
2639                 for (ofst = 0; ofst < proto_header_size;
2640                      ofst += sizeof(rte_be16_t)) {
2641                         rte_be16_t *wp = RTE_PTR_ADD(header_buf, ofst);
2642                         const rte_be16_t *w_maskp;
2643                         const rte_be16_t *w_specp;
2644
2645                         w_maskp = RTE_PTR_ADD(item->mask, ofst);
2646                         w_specp = RTE_PTR_ADD(item->spec, ofst);
2647
2648                         *wp &= ~(*w_maskp);
2649                         *wp |= (*w_specp & *w_maskp);
2650                 }
2651
2652                 header_buf += proto_header_size;
2653         }
2654 }
2655
2656 #define SFC_IPV4_TTL_DEF        0x40
2657 #define SFC_IPV6_VTC_FLOW_DEF   0x60000000
2658 #define SFC_IPV6_HOP_LIMITS_DEF 0xff
2659 #define SFC_VXLAN_FLAGS_DEF     0x08000000
2660
2661 static int
2662 sfc_mae_rule_parse_action_vxlan_encap(
2663                             struct sfc_mae *mae,
2664                             const struct rte_flow_action_vxlan_encap *conf,
2665                             efx_mae_actions_t *spec,
2666                             struct rte_flow_error *error)
2667 {
2668         struct sfc_mae_bounce_eh *bounce_eh = &mae->bounce_eh;
2669         struct rte_flow_item *pattern = conf->definition;
2670         uint8_t *buf = bounce_eh->buf;
2671
2672         /* This array will keep track of non-VOID pattern items. */
2673         struct sfc_mae_parsed_item parsed_items[1 /* Ethernet */ +
2674                                                 2 /* VLAN tags */ +
2675                                                 1 /* IPv4 or IPv6 */ +
2676                                                 1 /* UDP */ +
2677                                                 1 /* VXLAN */];
2678         unsigned int nb_parsed_items = 0;
2679
2680         size_t eth_ethertype_ofst = offsetof(struct rte_ether_hdr, ether_type);
2681         uint8_t dummy_buf[RTE_MAX(sizeof(struct rte_ipv4_hdr),
2682                                   sizeof(struct rte_ipv6_hdr))];
2683         struct rte_ipv4_hdr *ipv4 = (void *)dummy_buf;
2684         struct rte_ipv6_hdr *ipv6 = (void *)dummy_buf;
2685         struct rte_vxlan_hdr *vxlan = NULL;
2686         struct rte_udp_hdr *udp = NULL;
2687         unsigned int nb_vlan_tags = 0;
2688         size_t next_proto_ofst = 0;
2689         size_t ethertype_ofst = 0;
2690         uint64_t exp_items;
2691         int rc;
2692
2693         if (pattern == NULL) {
2694                 return rte_flow_error_set(error, EINVAL,
2695                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2696                                 "The encap. header definition is NULL");
2697         }
2698
2699         bounce_eh->type = EFX_TUNNEL_PROTOCOL_VXLAN;
2700         bounce_eh->size = 0;
2701
2702         /*
2703          * Process pattern items and remember non-VOID ones.
2704          * Defer applying masks until after the complete header
2705          * has been built from the pattern items.
2706          */
2707         exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_ETH);
2708
2709         for (; pattern->type != RTE_FLOW_ITEM_TYPE_END; ++pattern) {
2710                 struct sfc_mae_parsed_item *parsed_item;
2711                 const uint64_t exp_items_extra_vlan[] = {
2712                         RTE_BIT64(RTE_FLOW_ITEM_TYPE_VLAN), 0
2713                 };
2714                 size_t proto_header_size;
2715                 rte_be16_t *ethertypep;
2716                 uint8_t *next_protop;
2717                 uint8_t *buf_cur;
2718
2719                 if (pattern->spec == NULL) {
2720                         return rte_flow_error_set(error, EINVAL,
2721                                         RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2722                                         "NULL item spec in the encap. header");
2723                 }
2724
2725                 if (pattern->mask == NULL) {
2726                         return rte_flow_error_set(error, EINVAL,
2727                                         RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2728                                         "NULL item mask in the encap. header");
2729                 }
2730
2731                 if (pattern->last != NULL) {
2732                         /* This is not a match pattern, so disallow range. */
2733                         return rte_flow_error_set(error, EINVAL,
2734                                         RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2735                                         "Range item in the encap. header");
2736                 }
2737
2738                 if (pattern->type == RTE_FLOW_ITEM_TYPE_VOID) {
2739                         /* Handle VOID separately, for clarity. */
2740                         continue;
2741                 }
2742
2743                 if ((exp_items & RTE_BIT64(pattern->type)) == 0) {
2744                         return rte_flow_error_set(error, ENOTSUP,
2745                                         RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2746                                         "Unexpected item in the encap. header");
2747                 }
2748
2749                 parsed_item = &parsed_items[nb_parsed_items];
2750                 buf_cur = buf + bounce_eh->size;
2751
2752                 switch (pattern->type) {
2753                 case RTE_FLOW_ITEM_TYPE_ETH:
2754                         SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_ETH,
2755                                                exp_items);
2756                         RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_eth,
2757                                                   hdr) != 0);
2758
2759                         proto_header_size = sizeof(struct rte_ether_hdr);
2760
2761                         ethertype_ofst = eth_ethertype_ofst;
2762
2763                         exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_VLAN) |
2764                                     RTE_BIT64(RTE_FLOW_ITEM_TYPE_IPV4) |
2765                                     RTE_BIT64(RTE_FLOW_ITEM_TYPE_IPV6);
2766                         break;
2767                 case RTE_FLOW_ITEM_TYPE_VLAN:
2768                         SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_VLAN,
2769                                                exp_items);
2770                         RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_vlan,
2771                                                   hdr) != 0);
2772
2773                         proto_header_size = sizeof(struct rte_vlan_hdr);
2774
2775                         ethertypep = RTE_PTR_ADD(buf, eth_ethertype_ofst);
2776                         *ethertypep = RTE_BE16(RTE_ETHER_TYPE_QINQ);
2777
2778                         ethertypep = RTE_PTR_ADD(buf, ethertype_ofst);
2779                         *ethertypep = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2780
2781                         ethertype_ofst =
2782                             bounce_eh->size +
2783                             offsetof(struct rte_vlan_hdr, eth_proto);
2784
2785                         exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_IPV4) |
2786                                     RTE_BIT64(RTE_FLOW_ITEM_TYPE_IPV6);
2787                         exp_items |= exp_items_extra_vlan[nb_vlan_tags];
2788
2789                         ++nb_vlan_tags;
2790                         break;
2791                 case RTE_FLOW_ITEM_TYPE_IPV4:
2792                         SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_IPV4,
2793                                                exp_items);
2794                         RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_ipv4,
2795                                                   hdr) != 0);
2796
2797                         proto_header_size = sizeof(struct rte_ipv4_hdr);
2798
2799                         ethertypep = RTE_PTR_ADD(buf, ethertype_ofst);
2800                         *ethertypep = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2801
2802                         next_proto_ofst =
2803                             bounce_eh->size +
2804                             offsetof(struct rte_ipv4_hdr, next_proto_id);
2805
2806                         ipv4 = (struct rte_ipv4_hdr *)buf_cur;
2807
2808                         exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_UDP);
2809                         break;
2810                 case RTE_FLOW_ITEM_TYPE_IPV6:
2811                         SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_IPV6,
2812                                                exp_items);
2813                         RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_ipv6,
2814                                                   hdr) != 0);
2815
2816                         proto_header_size = sizeof(struct rte_ipv6_hdr);
2817
2818                         ethertypep = RTE_PTR_ADD(buf, ethertype_ofst);
2819                         *ethertypep = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2820
2821                         next_proto_ofst = bounce_eh->size +
2822                                           offsetof(struct rte_ipv6_hdr, proto);
2823
2824                         ipv6 = (struct rte_ipv6_hdr *)buf_cur;
2825
2826                         exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_UDP);
2827                         break;
2828                 case RTE_FLOW_ITEM_TYPE_UDP:
2829                         SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_UDP,
2830                                                exp_items);
2831                         RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_udp,
2832                                                   hdr) != 0);
2833
2834                         proto_header_size = sizeof(struct rte_udp_hdr);
2835
2836                         next_protop = RTE_PTR_ADD(buf, next_proto_ofst);
2837                         *next_protop = IPPROTO_UDP;
2838
2839                         udp = (struct rte_udp_hdr *)buf_cur;
2840
2841                         exp_items = RTE_BIT64(RTE_FLOW_ITEM_TYPE_VXLAN);
2842                         break;
2843                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2844                         SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ITEM_TYPE_VXLAN,
2845                                                exp_items);
2846                         RTE_BUILD_BUG_ON(offsetof(struct rte_flow_item_vxlan,
2847                                                   hdr) != 0);
2848
2849                         proto_header_size = sizeof(struct rte_vxlan_hdr);
2850
2851                         vxlan = (struct rte_vxlan_hdr *)buf_cur;
2852
2853                         udp->dst_port = RTE_BE16(RTE_VXLAN_DEFAULT_PORT);
2854                         udp->dgram_len = RTE_BE16(sizeof(*udp) +
2855                                                   sizeof(*vxlan));
2856                         udp->dgram_cksum = 0;
2857
2858                         exp_items = 0;
2859                         break;
2860                 default:
2861                         return rte_flow_error_set(error, ENOTSUP,
2862                                         RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2863                                         "Unknown item in the encap. header");
2864                 }
2865
2866                 if (bounce_eh->size + proto_header_size > bounce_eh->buf_size) {
2867                         return rte_flow_error_set(error, E2BIG,
2868                                         RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2869                                         "The encap. header is too big");
2870                 }
2871
2872                 if ((proto_header_size & 1) != 0) {
2873                         return rte_flow_error_set(error, EINVAL,
2874                                         RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2875                                         "Odd layer size in the encap. header");
2876                 }
2877
2878                 rte_memcpy(buf_cur, pattern->spec, proto_header_size);
2879                 bounce_eh->size += proto_header_size;
2880
2881                 parsed_item->item = pattern;
2882                 parsed_item->proto_header_size = proto_header_size;
2883                 ++nb_parsed_items;
2884         }
2885
2886         if (exp_items != 0) {
2887                 /* Parsing item VXLAN would have reset exp_items to 0. */
2888                 return rte_flow_error_set(error, ENOTSUP,
2889                                         RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
2890                                         "No item VXLAN in the encap. header");
2891         }
2892
2893         /* One of the pointers (ipv4, ipv6) refers to a dummy area. */
2894         ipv4->version_ihl = RTE_IPV4_VHL_DEF;
2895         ipv4->time_to_live = SFC_IPV4_TTL_DEF;
2896         ipv4->total_length = RTE_BE16(sizeof(*ipv4) + sizeof(*udp) +
2897                                       sizeof(*vxlan));
2898         /* The HW cannot compute this checksum. */
2899         ipv4->hdr_checksum = 0;
2900         ipv4->hdr_checksum = rte_ipv4_cksum(ipv4);
2901
2902         ipv6->vtc_flow = RTE_BE32(SFC_IPV6_VTC_FLOW_DEF);
2903         ipv6->hop_limits = SFC_IPV6_HOP_LIMITS_DEF;
2904         ipv6->payload_len = udp->dgram_len;
2905
2906         vxlan->vx_flags = RTE_BE32(SFC_VXLAN_FLAGS_DEF);
2907
2908         /* Take care of the masks. */
2909         sfc_mae_header_force_item_masks(buf, parsed_items, nb_parsed_items);
2910
2911         rc = efx_mae_action_set_populate_encap(spec);
2912         if (rc != 0) {
2913                 rc = rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ACTION,
2914                                 NULL, "failed to request action ENCAP");
2915         }
2916
2917         return rc;
2918 }
2919
2920 static int
2921 sfc_mae_rule_parse_action_mark(struct sfc_adapter *sa,
2922                                const struct rte_flow_action_mark *conf,
2923                                efx_mae_actions_t *spec)
2924 {
2925         int rc;
2926
2927         if (conf->id > SFC_FT_USER_MARK_MASK) {
2928                 sfc_err(sa, "the mark value is too large");
2929                 return EINVAL;
2930         }
2931
2932         rc = efx_mae_action_set_populate_mark(spec, conf->id);
2933         if (rc != 0)
2934                 sfc_err(sa, "failed to request action MARK: %s", strerror(rc));
2935
2936         return rc;
2937 }
2938
2939 static int
2940 sfc_mae_rule_parse_action_count(struct sfc_adapter *sa,
2941                                 const struct rte_flow_action_count *conf
2942                                         __rte_unused,
2943                                 efx_mae_actions_t *spec)
2944 {
2945         int rc;
2946
2947         if ((sa->counter_rxq.state & SFC_COUNTER_RXQ_INITIALIZED) == 0) {
2948                 sfc_err(sa,
2949                         "counter queue is not configured for COUNT action");
2950                 rc = EINVAL;
2951                 goto fail_counter_queue_uninit;
2952         }
2953
2954         if (sfc_get_service_lcore(SOCKET_ID_ANY) == RTE_MAX_LCORE) {
2955                 rc = EINVAL;
2956                 goto fail_no_service_core;
2957         }
2958
2959         rc = efx_mae_action_set_populate_count(spec);
2960         if (rc != 0) {
2961                 sfc_err(sa,
2962                         "failed to populate counters in MAE action set: %s",
2963                         rte_strerror(rc));
2964                 goto fail_populate_count;
2965         }
2966
2967         return 0;
2968
2969 fail_populate_count:
2970 fail_no_service_core:
2971 fail_counter_queue_uninit:
2972
2973         return rc;
2974 }
2975
2976 static int
2977 sfc_mae_rule_parse_action_phy_port(struct sfc_adapter *sa,
2978                                    const struct rte_flow_action_phy_port *conf,
2979                                    efx_mae_actions_t *spec)
2980 {
2981         efx_mport_sel_t mport;
2982         uint32_t phy_port;
2983         int rc;
2984
2985         if (conf->original != 0)
2986                 phy_port = efx_nic_cfg_get(sa->nic)->enc_assigned_port;
2987         else
2988                 phy_port = conf->index;
2989
2990         rc = efx_mae_mport_by_phy_port(phy_port, &mport);
2991         if (rc != 0) {
2992                 sfc_err(sa, "failed to convert phys. port ID %u to m-port selector: %s",
2993                         phy_port, strerror(rc));
2994                 return rc;
2995         }
2996
2997         rc = efx_mae_action_set_populate_deliver(spec, &mport);
2998         if (rc != 0) {
2999                 sfc_err(sa, "failed to request action DELIVER with m-port selector 0x%08x: %s",
3000                         mport.sel, strerror(rc));
3001         }
3002
3003         return rc;
3004 }
3005
3006 static int
3007 sfc_mae_rule_parse_action_pf_vf(struct sfc_adapter *sa,
3008                                 const struct rte_flow_action_vf *vf_conf,
3009                                 efx_mae_actions_t *spec)
3010 {
3011         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
3012         efx_mport_sel_t mport;
3013         uint32_t vf;
3014         int rc;
3015
3016         if (vf_conf == NULL)
3017                 vf = EFX_PCI_VF_INVALID;
3018         else if (vf_conf->original != 0)
3019                 vf = encp->enc_vf;
3020         else
3021                 vf = vf_conf->id;
3022
3023         rc = efx_mae_mport_by_pcie_function(encp->enc_pf, vf, &mport);
3024         if (rc != 0) {
3025                 sfc_err(sa, "failed to convert PF %u VF %d to m-port: %s",
3026                         encp->enc_pf, (vf != EFX_PCI_VF_INVALID) ? (int)vf : -1,
3027                         strerror(rc));
3028                 return rc;
3029         }
3030
3031         rc = efx_mae_action_set_populate_deliver(spec, &mport);
3032         if (rc != 0) {
3033                 sfc_err(sa, "failed to request action DELIVER with m-port selector 0x%08x: %s",
3034                         mport.sel, strerror(rc));
3035         }
3036
3037         return rc;
3038 }
3039
3040 static int
3041 sfc_mae_rule_parse_action_port_id(struct sfc_adapter *sa,
3042                                   const struct rte_flow_action_port_id *conf,
3043                                   efx_mae_actions_t *spec)
3044 {
3045         struct sfc_adapter_shared * const sas = sfc_sa2shared(sa);
3046         struct sfc_mae *mae = &sa->mae;
3047         efx_mport_sel_t mport;
3048         uint16_t port_id;
3049         int rc;
3050
3051         if (conf->id > UINT16_MAX)
3052                 return EOVERFLOW;
3053
3054         port_id = (conf->original != 0) ? sas->port_id : conf->id;
3055
3056         rc = sfc_mae_switch_port_by_ethdev(mae->switch_domain_id,
3057                                            port_id, &mport);
3058         if (rc != 0) {
3059                 sfc_err(sa, "failed to find MAE switch port SW entry for RTE ethdev port %u: %s",
3060                         port_id, strerror(rc));
3061                 return rc;
3062         }
3063
3064         rc = efx_mae_action_set_populate_deliver(spec, &mport);
3065         if (rc != 0) {
3066                 sfc_err(sa, "failed to request action DELIVER with m-port selector 0x%08x: %s",
3067                         mport.sel, strerror(rc));
3068         }
3069
3070         return rc;
3071 }
3072
3073 static const char * const action_names[] = {
3074         [RTE_FLOW_ACTION_TYPE_VXLAN_DECAP] = "VXLAN_DECAP",
3075         [RTE_FLOW_ACTION_TYPE_OF_POP_VLAN] = "OF_POP_VLAN",
3076         [RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN] = "OF_PUSH_VLAN",
3077         [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID] = "OF_SET_VLAN_VID",
3078         [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP] = "OF_SET_VLAN_PCP",
3079         [RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP] = "VXLAN_ENCAP",
3080         [RTE_FLOW_ACTION_TYPE_FLAG] = "FLAG",
3081         [RTE_FLOW_ACTION_TYPE_MARK] = "MARK",
3082         [RTE_FLOW_ACTION_TYPE_PHY_PORT] = "PHY_PORT",
3083         [RTE_FLOW_ACTION_TYPE_PF] = "PF",
3084         [RTE_FLOW_ACTION_TYPE_VF] = "VF",
3085         [RTE_FLOW_ACTION_TYPE_PORT_ID] = "PORT_ID",
3086         [RTE_FLOW_ACTION_TYPE_DROP] = "DROP",
3087 };
3088
3089 static int
3090 sfc_mae_rule_parse_action(struct sfc_adapter *sa,
3091                           const struct rte_flow_action *action,
3092                           const struct sfc_mae_outer_rule *outer_rule,
3093                           struct sfc_mae_actions_bundle *bundle,
3094                           efx_mae_actions_t *spec,
3095                           struct rte_flow_error *error)
3096 {
3097         const uint64_t rx_metadata = sa->negotiated_rx_metadata;
3098         bool custom_error = B_FALSE;
3099         int rc = 0;
3100
3101         switch (action->type) {
3102         case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3103                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_VXLAN_DECAP,
3104                                        bundle->actions_mask);
3105                 if (outer_rule == NULL ||
3106                     outer_rule->encap_type != EFX_TUNNEL_PROTOCOL_VXLAN)
3107                         rc = EINVAL;
3108                 else
3109                         rc = efx_mae_action_set_populate_decap(spec);
3110                 break;
3111         case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
3112                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_OF_POP_VLAN,
3113                                        bundle->actions_mask);
3114                 rc = efx_mae_action_set_populate_vlan_pop(spec);
3115                 break;
3116         case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3117                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN,
3118                                        bundle->actions_mask);
3119                 sfc_mae_rule_parse_action_of_push_vlan(action->conf, bundle);
3120                 break;
3121         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3122                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID,
3123                                        bundle->actions_mask);
3124                 sfc_mae_rule_parse_action_of_set_vlan_vid(action->conf, bundle);
3125                 break;
3126         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3127                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP,
3128                                        bundle->actions_mask);
3129                 sfc_mae_rule_parse_action_of_set_vlan_pcp(action->conf, bundle);
3130                 break;
3131         case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3132                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP,
3133                                        bundle->actions_mask);
3134                 rc = sfc_mae_rule_parse_action_vxlan_encap(&sa->mae,
3135                                                            action->conf,
3136                                                            spec, error);
3137                 custom_error = B_TRUE;
3138                 break;
3139         case RTE_FLOW_ACTION_TYPE_COUNT:
3140                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_COUNT,
3141                                        bundle->actions_mask);
3142                 rc = sfc_mae_rule_parse_action_count(sa, action->conf, spec);
3143                 break;
3144         case RTE_FLOW_ACTION_TYPE_FLAG:
3145                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_FLAG,
3146                                        bundle->actions_mask);
3147                 if ((rx_metadata & RTE_ETH_RX_METADATA_USER_FLAG) != 0) {
3148                         rc = efx_mae_action_set_populate_flag(spec);
3149                 } else {
3150                         rc = rte_flow_error_set(error, ENOTSUP,
3151                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3152                                                 action,
3153                                                 "flag delivery has not been negotiated");
3154                         custom_error = B_TRUE;
3155                 }
3156                 break;
3157         case RTE_FLOW_ACTION_TYPE_MARK:
3158                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_MARK,
3159                                        bundle->actions_mask);
3160                 if ((rx_metadata & RTE_ETH_RX_METADATA_USER_MARK) != 0) {
3161                         rc = sfc_mae_rule_parse_action_mark(sa, action->conf,
3162                                                             spec);
3163                 } else {
3164                         rc = rte_flow_error_set(error, ENOTSUP,
3165                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3166                                                 action,
3167                                                 "mark delivery has not been negotiated");
3168                         custom_error = B_TRUE;
3169                 }
3170                 break;
3171         case RTE_FLOW_ACTION_TYPE_PHY_PORT:
3172                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_PHY_PORT,
3173                                        bundle->actions_mask);
3174                 rc = sfc_mae_rule_parse_action_phy_port(sa, action->conf, spec);
3175                 break;
3176         case RTE_FLOW_ACTION_TYPE_PF:
3177                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_PF,
3178                                        bundle->actions_mask);
3179                 rc = sfc_mae_rule_parse_action_pf_vf(sa, NULL, spec);
3180                 break;
3181         case RTE_FLOW_ACTION_TYPE_VF:
3182                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_VF,
3183                                        bundle->actions_mask);
3184                 rc = sfc_mae_rule_parse_action_pf_vf(sa, action->conf, spec);
3185                 break;
3186         case RTE_FLOW_ACTION_TYPE_PORT_ID:
3187                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_PORT_ID,
3188                                        bundle->actions_mask);
3189                 rc = sfc_mae_rule_parse_action_port_id(sa, action->conf, spec);
3190                 break;
3191         case RTE_FLOW_ACTION_TYPE_DROP:
3192                 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_DROP,
3193                                        bundle->actions_mask);
3194                 rc = efx_mae_action_set_populate_drop(spec);
3195                 break;
3196         default:
3197                 return rte_flow_error_set(error, ENOTSUP,
3198                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3199                                 "Unsupported action");
3200         }
3201
3202         if (rc == 0) {
3203                 bundle->actions_mask |= (1ULL << action->type);
3204         } else if (!custom_error) {
3205                 if (action->type < RTE_DIM(action_names)) {
3206                         const char *action_name = action_names[action->type];
3207
3208                         if (action_name != NULL) {
3209                                 sfc_err(sa, "action %s was rejected: %s",
3210                                         action_name, strerror(rc));
3211                         }
3212                 }
3213                 rc = rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ACTION,
3214                                 NULL, "Failed to request the action");
3215         }
3216
3217         return rc;
3218 }
3219
3220 static void
3221 sfc_mae_bounce_eh_invalidate(struct sfc_mae_bounce_eh *bounce_eh)
3222 {
3223         bounce_eh->type = EFX_TUNNEL_PROTOCOL_NONE;
3224 }
3225
3226 static int
3227 sfc_mae_process_encap_header(struct sfc_adapter *sa,
3228                              const struct sfc_mae_bounce_eh *bounce_eh,
3229                              struct sfc_mae_encap_header **encap_headerp)
3230 {
3231         if (bounce_eh->type == EFX_TUNNEL_PROTOCOL_NONE) {
3232                 encap_headerp = NULL;
3233                 return 0;
3234         }
3235
3236         *encap_headerp = sfc_mae_encap_header_attach(sa, bounce_eh);
3237         if (*encap_headerp != NULL)
3238                 return 0;
3239
3240         return sfc_mae_encap_header_add(sa, bounce_eh, encap_headerp);
3241 }
3242
3243 int
3244 sfc_mae_rule_parse_actions(struct sfc_adapter *sa,
3245                            const struct rte_flow_action actions[],
3246                            struct sfc_flow_spec_mae *spec_mae,
3247                            struct rte_flow_error *error)
3248 {
3249         struct sfc_mae_encap_header *encap_header = NULL;
3250         struct sfc_mae_actions_bundle bundle = {0};
3251         const struct rte_flow_action *action;
3252         struct sfc_mae *mae = &sa->mae;
3253         efx_mae_actions_t *spec;
3254         unsigned int n_count;
3255         int rc;
3256
3257         rte_errno = 0;
3258
3259         if (actions == NULL) {
3260                 return rte_flow_error_set(error, EINVAL,
3261                                 RTE_FLOW_ERROR_TYPE_ACTION_NUM, NULL,
3262                                 "NULL actions");
3263         }
3264
3265         rc = efx_mae_action_set_spec_init(sa->nic, &spec);
3266         if (rc != 0)
3267                 goto fail_action_set_spec_init;
3268
3269         /* Cleanup after previous encap. header bounce buffer usage. */
3270         sfc_mae_bounce_eh_invalidate(&mae->bounce_eh);
3271
3272         for (action = actions;
3273              action->type != RTE_FLOW_ACTION_TYPE_END; ++action) {
3274                 rc = sfc_mae_actions_bundle_sync(action, &bundle, spec, error);
3275                 if (rc != 0)
3276                         goto fail_rule_parse_action;
3277
3278                 rc = sfc_mae_rule_parse_action(sa, action, spec_mae->outer_rule,
3279                                                &bundle, spec, error);
3280                 if (rc != 0)
3281                         goto fail_rule_parse_action;
3282         }
3283
3284         rc = sfc_mae_actions_bundle_sync(action, &bundle, spec, error);
3285         if (rc != 0)
3286                 goto fail_rule_parse_action;
3287
3288         rc = sfc_mae_process_encap_header(sa, &mae->bounce_eh, &encap_header);
3289         if (rc != 0)
3290                 goto fail_process_encap_header;
3291
3292         n_count = efx_mae_action_set_get_nb_count(spec);
3293         if (n_count > 1) {
3294                 rc = ENOTSUP;
3295                 sfc_err(sa, "too many count actions requested: %u", n_count);
3296                 goto fail_nb_count;
3297         }
3298
3299         spec_mae->action_set = sfc_mae_action_set_attach(sa, encap_header,
3300                                                          n_count, spec);
3301         if (spec_mae->action_set != NULL) {
3302                 sfc_mae_encap_header_del(sa, encap_header);
3303                 efx_mae_action_set_spec_fini(sa->nic, spec);
3304                 return 0;
3305         }
3306
3307         rc = sfc_mae_action_set_add(sa, actions, spec, encap_header, n_count,
3308                                     &spec_mae->action_set);
3309         if (rc != 0)
3310                 goto fail_action_set_add;
3311
3312         return 0;
3313
3314 fail_action_set_add:
3315 fail_nb_count:
3316         sfc_mae_encap_header_del(sa, encap_header);
3317
3318 fail_process_encap_header:
3319 fail_rule_parse_action:
3320         efx_mae_action_set_spec_fini(sa->nic, spec);
3321
3322 fail_action_set_spec_init:
3323         if (rc > 0 && rte_errno == 0) {
3324                 rc = rte_flow_error_set(error, rc,
3325                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3326                         NULL, "Failed to process the action");
3327         }
3328         return rc;
3329 }
3330
3331 static bool
3332 sfc_mae_rules_class_cmp(struct sfc_adapter *sa,
3333                         const efx_mae_match_spec_t *left,
3334                         const efx_mae_match_spec_t *right)
3335 {
3336         bool have_same_class;
3337         int rc;
3338
3339         rc = efx_mae_match_specs_class_cmp(sa->nic, left, right,
3340                                            &have_same_class);
3341
3342         return (rc == 0) ? have_same_class : false;
3343 }
3344
3345 static int
3346 sfc_mae_outer_rule_class_verify(struct sfc_adapter *sa,
3347                                 struct sfc_mae_outer_rule *rule)
3348 {
3349         struct sfc_mae_fw_rsrc *fw_rsrc = &rule->fw_rsrc;
3350         struct sfc_mae_outer_rule *entry;
3351         struct sfc_mae *mae = &sa->mae;
3352
3353         if (fw_rsrc->rule_id.id != EFX_MAE_RSRC_ID_INVALID) {
3354                 /* An active rule is reused. It's class is wittingly valid. */
3355                 return 0;
3356         }
3357
3358         TAILQ_FOREACH_REVERSE(entry, &mae->outer_rules,
3359                               sfc_mae_outer_rules, entries) {
3360                 const efx_mae_match_spec_t *left = entry->match_spec;
3361                 const efx_mae_match_spec_t *right = rule->match_spec;
3362
3363                 if (entry == rule)
3364                         continue;
3365
3366                 if (sfc_mae_rules_class_cmp(sa, left, right))
3367                         return 0;
3368         }
3369
3370         sfc_info(sa, "for now, the HW doesn't support rule validation, and HW "
3371                  "support for outer frame pattern items is not guaranteed; "
3372                  "other than that, the items are valid from SW standpoint");
3373         return 0;
3374 }
3375
3376 static int
3377 sfc_mae_action_rule_class_verify(struct sfc_adapter *sa,
3378                                  struct sfc_flow_spec_mae *spec)
3379 {
3380         const struct rte_flow *entry;
3381
3382         TAILQ_FOREACH_REVERSE(entry, &sa->flow_list, sfc_flow_list, entries) {
3383                 const struct sfc_flow_spec *entry_spec = &entry->spec;
3384                 const struct sfc_flow_spec_mae *es_mae = &entry_spec->mae;
3385                 const efx_mae_match_spec_t *left = es_mae->match_spec;
3386                 const efx_mae_match_spec_t *right = spec->match_spec;
3387
3388                 switch (entry_spec->type) {
3389                 case SFC_FLOW_SPEC_FILTER:
3390                         /* Ignore VNIC-level flows */
3391                         break;
3392                 case SFC_FLOW_SPEC_MAE:
3393                         if (sfc_mae_rules_class_cmp(sa, left, right))
3394                                 return 0;
3395                         break;
3396                 default:
3397                         SFC_ASSERT(false);
3398                 }
3399         }
3400
3401         sfc_info(sa, "for now, the HW doesn't support rule validation, and HW "
3402                  "support for inner frame pattern items is not guaranteed; "
3403                  "other than that, the items are valid from SW standpoint");
3404         return 0;
3405 }
3406
3407 /**
3408  * Confirm that a given flow can be accepted by the FW.
3409  *
3410  * @param sa
3411  *   Software adapter context
3412  * @param flow
3413  *   Flow to be verified
3414  * @return
3415  *   Zero on success and non-zero in the case of error.
3416  *   A special value of EAGAIN indicates that the adapter is
3417  *   not in started state. This state is compulsory because
3418  *   it only makes sense to compare the rule class of the flow
3419  *   being validated with classes of the active rules.
3420  *   Such classes are wittingly supported by the FW.
3421  */
3422 int
3423 sfc_mae_flow_verify(struct sfc_adapter *sa,
3424                     struct rte_flow *flow)
3425 {
3426         struct sfc_flow_spec *spec = &flow->spec;
3427         struct sfc_flow_spec_mae *spec_mae = &spec->mae;
3428         struct sfc_mae_outer_rule *outer_rule = spec_mae->outer_rule;
3429         int rc;
3430
3431         SFC_ASSERT(sfc_adapter_is_locked(sa));
3432
3433         if (sa->state != SFC_ETHDEV_STARTED)
3434                 return EAGAIN;
3435
3436         if (outer_rule != NULL) {
3437                 rc = sfc_mae_outer_rule_class_verify(sa, outer_rule);
3438                 if (rc != 0)
3439                         return rc;
3440         }
3441
3442         return sfc_mae_action_rule_class_verify(sa, spec_mae);
3443 }
3444
3445 int
3446 sfc_mae_flow_insert(struct sfc_adapter *sa,
3447                     struct rte_flow *flow)
3448 {
3449         struct sfc_flow_spec *spec = &flow->spec;
3450         struct sfc_flow_spec_mae *spec_mae = &spec->mae;
3451         struct sfc_mae_outer_rule *outer_rule = spec_mae->outer_rule;
3452         struct sfc_mae_action_set *action_set = spec_mae->action_set;
3453         struct sfc_mae_fw_rsrc *fw_rsrc = &action_set->fw_rsrc;
3454         int rc;
3455
3456         SFC_ASSERT(spec_mae->rule_id.id == EFX_MAE_RSRC_ID_INVALID);
3457         SFC_ASSERT(action_set != NULL);
3458
3459         if (outer_rule != NULL) {
3460                 rc = sfc_mae_outer_rule_enable(sa, outer_rule,
3461                                                spec_mae->match_spec);
3462                 if (rc != 0)
3463                         goto fail_outer_rule_enable;
3464         }
3465
3466         rc = sfc_mae_action_set_enable(sa, action_set);
3467         if (rc != 0)
3468                 goto fail_action_set_enable;
3469
3470         if (action_set->n_counters > 0) {
3471                 rc = sfc_mae_counter_start(sa);
3472                 if (rc != 0) {
3473                         sfc_err(sa, "failed to start MAE counters support: %s",
3474                                 rte_strerror(rc));
3475                         goto fail_mae_counter_start;
3476                 }
3477         }
3478
3479         rc = efx_mae_action_rule_insert(sa->nic, spec_mae->match_spec,
3480                                         NULL, &fw_rsrc->aset_id,
3481                                         &spec_mae->rule_id);
3482         if (rc != 0)
3483                 goto fail_action_rule_insert;
3484
3485         sfc_dbg(sa, "enabled flow=%p: AR_ID=0x%08x",
3486                 flow, spec_mae->rule_id.id);
3487
3488         return 0;
3489
3490 fail_action_rule_insert:
3491 fail_mae_counter_start:
3492         sfc_mae_action_set_disable(sa, action_set);
3493
3494 fail_action_set_enable:
3495         if (outer_rule != NULL)
3496                 sfc_mae_outer_rule_disable(sa, outer_rule);
3497
3498 fail_outer_rule_enable:
3499         return rc;
3500 }
3501
3502 int
3503 sfc_mae_flow_remove(struct sfc_adapter *sa,
3504                     struct rte_flow *flow)
3505 {
3506         struct sfc_flow_spec *spec = &flow->spec;
3507         struct sfc_flow_spec_mae *spec_mae = &spec->mae;
3508         struct sfc_mae_action_set *action_set = spec_mae->action_set;
3509         struct sfc_mae_outer_rule *outer_rule = spec_mae->outer_rule;
3510         int rc;
3511
3512         SFC_ASSERT(spec_mae->rule_id.id != EFX_MAE_RSRC_ID_INVALID);
3513         SFC_ASSERT(action_set != NULL);
3514
3515         rc = efx_mae_action_rule_remove(sa->nic, &spec_mae->rule_id);
3516         if (rc != 0) {
3517                 sfc_err(sa, "failed to disable flow=%p with AR_ID=0x%08x: %s",
3518                         flow, spec_mae->rule_id.id, strerror(rc));
3519         }
3520         sfc_dbg(sa, "disabled flow=%p with AR_ID=0x%08x",
3521                 flow, spec_mae->rule_id.id);
3522         spec_mae->rule_id.id = EFX_MAE_RSRC_ID_INVALID;
3523
3524         sfc_mae_action_set_disable(sa, action_set);
3525
3526         if (outer_rule != NULL)
3527                 sfc_mae_outer_rule_disable(sa, outer_rule);
3528
3529         return 0;
3530 }
3531
3532 static int
3533 sfc_mae_query_counter(struct sfc_adapter *sa,
3534                       struct sfc_flow_spec_mae *spec,
3535                       const struct rte_flow_action *action,
3536                       struct rte_flow_query_count *data,
3537                       struct rte_flow_error *error)
3538 {
3539         struct sfc_mae_action_set *action_set = spec->action_set;
3540         const struct rte_flow_action_count *conf = action->conf;
3541         unsigned int i;
3542         int rc;
3543
3544         if (action_set->n_counters == 0) {
3545                 return rte_flow_error_set(error, EINVAL,
3546                         RTE_FLOW_ERROR_TYPE_ACTION, action,
3547                         "Queried flow rule does not have count actions");
3548         }
3549
3550         for (i = 0; i < action_set->n_counters; i++) {
3551                 /*
3552                  * Get the first available counter of the flow rule if
3553                  * counter ID is not specified.
3554                  */
3555                 if (conf != NULL && action_set->counters[i].rte_id != conf->id)
3556                         continue;
3557
3558                 rc = sfc_mae_counter_get(&sa->mae.counter_registry.counters,
3559                                          &action_set->counters[i], data);
3560                 if (rc != 0) {
3561                         return rte_flow_error_set(error, EINVAL,
3562                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
3563                                 "Queried flow rule counter action is invalid");
3564                 }
3565
3566                 return 0;
3567         }
3568
3569         return rte_flow_error_set(error, ENOENT,
3570                                   RTE_FLOW_ERROR_TYPE_ACTION, action,
3571                                   "No such flow rule action count ID");
3572 }
3573
3574 int
3575 sfc_mae_flow_query(struct rte_eth_dev *dev,
3576                    struct rte_flow *flow,
3577                    const struct rte_flow_action *action,
3578                    void *data,
3579                    struct rte_flow_error *error)
3580 {
3581         struct sfc_adapter *sa = sfc_adapter_by_eth_dev(dev);
3582         struct sfc_flow_spec *spec = &flow->spec;
3583         struct sfc_flow_spec_mae *spec_mae = &spec->mae;
3584
3585         switch (action->type) {
3586         case RTE_FLOW_ACTION_TYPE_COUNT:
3587                 return sfc_mae_query_counter(sa, spec_mae, action,
3588                                              data, error);
3589         default:
3590                 return rte_flow_error_set(error, ENOTSUP,
3591                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3592                         "Query for action of this type is not supported");
3593         }
3594 }
3595
3596 int
3597 sfc_mae_switchdev_init(struct sfc_adapter *sa)
3598 {
3599         const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
3600         struct sfc_mae *mae = &sa->mae;
3601         efx_mport_sel_t pf;
3602         efx_mport_sel_t phy;
3603         int rc;
3604
3605         sfc_log_init(sa, "entry");
3606
3607         if (!sa->switchdev) {
3608                 sfc_log_init(sa, "switchdev is not enabled - skip");
3609                 return 0;
3610         }
3611
3612         if (mae->status != SFC_MAE_STATUS_SUPPORTED) {
3613                 rc = ENOTSUP;
3614                 sfc_err(sa, "failed to init switchdev - no MAE support");
3615                 goto fail_no_mae;
3616         }
3617
3618         rc = efx_mae_mport_by_pcie_function(encp->enc_pf, EFX_PCI_VF_INVALID,
3619                                             &pf);
3620         if (rc != 0) {
3621                 sfc_err(sa, "failed get PF mport");
3622                 goto fail_pf_get;
3623         }
3624
3625         rc = efx_mae_mport_by_phy_port(encp->enc_assigned_port, &phy);
3626         if (rc != 0) {
3627                 sfc_err(sa, "failed get PHY mport");
3628                 goto fail_phy_get;
3629         }
3630
3631         rc = sfc_mae_rule_add_mport_match_deliver(sa, &pf, &phy,
3632                         SFC_MAE_RULE_PRIO_LOWEST,
3633                         &mae->switchdev_rule_pf_to_ext);
3634         if (rc != 0) {
3635                 sfc_err(sa, "failed add MAE rule to forward from PF to PHY");
3636                 goto fail_pf_add;
3637         }
3638
3639         rc = sfc_mae_rule_add_mport_match_deliver(sa, &phy, &pf,
3640                         SFC_MAE_RULE_PRIO_LOWEST,
3641                         &mae->switchdev_rule_ext_to_pf);
3642         if (rc != 0) {
3643                 sfc_err(sa, "failed add MAE rule to forward from PHY to PF");
3644                 goto fail_phy_add;
3645         }
3646
3647         sfc_log_init(sa, "done");
3648
3649         return 0;
3650
3651 fail_phy_add:
3652         sfc_mae_rule_del(sa, mae->switchdev_rule_pf_to_ext);
3653
3654 fail_pf_add:
3655 fail_phy_get:
3656 fail_pf_get:
3657 fail_no_mae:
3658         sfc_log_init(sa, "failed: %s", rte_strerror(rc));
3659         return rc;
3660 }
3661
3662 void
3663 sfc_mae_switchdev_fini(struct sfc_adapter *sa)
3664 {
3665         struct sfc_mae *mae = &sa->mae;
3666
3667         if (!sa->switchdev)
3668                 return;
3669
3670         sfc_mae_rule_del(sa, mae->switchdev_rule_pf_to_ext);
3671         sfc_mae_rule_del(sa, mae->switchdev_rule_ext_to_pf);
3672 }