1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright(c) 2019-2021 Xilinx, Inc.
4 * Copyright(c) 2019 Solarflare Communications Inc.
6 * This software was jointly developed between OKTET Labs (under contract
7 * for Solarflare) and Solarflare Communications, Inc.
15 #include <rte_spinlock.h>
19 #include "sfc_stats.h"
25 /** FW-allocatable resource context */
26 struct sfc_mae_fw_rsrc {
30 efx_mae_aset_id_t aset_id;
31 efx_mae_rule_id_t rule_id;
32 efx_mae_eh_id_t eh_id;
36 /** Outer rule registry entry */
37 struct sfc_mae_outer_rule {
38 TAILQ_ENTRY(sfc_mae_outer_rule) entries;
40 efx_mae_match_spec_t *match_spec;
41 efx_tunnel_protocol_t encap_type;
42 struct sfc_mae_fw_rsrc fw_rsrc;
45 TAILQ_HEAD(sfc_mae_outer_rules, sfc_mae_outer_rule);
47 /** Encap. header registry entry */
48 struct sfc_mae_encap_header {
49 TAILQ_ENTRY(sfc_mae_encap_header) entries;
53 efx_tunnel_protocol_t type;
54 struct sfc_mae_fw_rsrc fw_rsrc;
57 TAILQ_HEAD(sfc_mae_encap_headers, sfc_mae_encap_header);
60 struct sfc_mae_counter_id {
61 /* ID of a counter in MAE */
63 /* ID of a counter in RTE */
65 /* RTE counter ID validity status */
68 /* Flow Tunnel (FT) GROUP hit counter (or NULL) */
69 uint64_t *ft_group_hit_counter;
70 /* Flow Tunnel (FT) context (for JUMP rules; otherwise, NULL) */
71 struct sfc_flow_tunnel *ft;
74 /** Action set registry entry */
75 struct sfc_mae_action_set {
76 TAILQ_ENTRY(sfc_mae_action_set) entries;
78 struct sfc_mae_counter_id *counters;
80 efx_mae_actions_t *spec;
81 struct sfc_mae_encap_header *encap_header;
82 struct sfc_mae_fw_rsrc fw_rsrc;
85 TAILQ_HEAD(sfc_mae_action_sets, sfc_mae_action_set);
87 /** Options for MAE support status */
89 SFC_MAE_STATUS_UNKNOWN = 0,
90 SFC_MAE_STATUS_UNSUPPORTED,
91 SFC_MAE_STATUS_SUPPORTED,
96 * Encap. header bounce buffer. It is used to store header data
97 * when parsing the header definition in the action VXLAN_ENCAP.
99 struct sfc_mae_bounce_eh {
103 efx_tunnel_protocol_t type;
106 /** Counter collection entry */
107 struct sfc_mae_counter {
109 uint32_t generation_count;
110 union sfc_pkts_bytes value;
111 union sfc_pkts_bytes reset;
113 uint64_t *ft_group_hit_counter;
116 struct sfc_mae_counters_xstats {
117 uint64_t not_inuse_update;
118 uint64_t realloc_update;
121 struct sfc_mae_counters {
122 /** An array of all MAE counters */
123 struct sfc_mae_counter *mae_counters;
124 /** Extra statistics for counters */
125 struct sfc_mae_counters_xstats xstats;
126 /** Count of all MAE counters */
127 unsigned int n_mae_counters;
130 struct sfc_mae_counter_registry {
131 /* Common counter information */
132 /** Counters collection */
133 struct sfc_mae_counters counters;
135 /* Information used by counter update service */
136 /** Callback to get packets from RxQ */
137 eth_rx_burst_t rx_pkt_burst;
138 /** Data for the callback to get packets */
139 struct sfc_dp_rxq *rx_dp;
140 /** Number of buffers pushed to the RxQ */
141 unsigned int pushed_n_buffers;
142 /** Are credits used by counter stream */
145 /* Information used by configuration routines */
146 /** Counter service core ID */
147 uint32_t service_core_id;
148 /** Counter service ID */
153 * MAE rules used to capture traffic generated by VFs and direct it to
154 * representors (one for each VF).
156 #define SFC_MAE_NB_REPR_RULES_MAX (64)
158 /** Rules to forward traffic from PHY port to PF and from PF to PHY port */
159 #define SFC_MAE_NB_SWITCHDEV_RULES (2)
160 /** Maximum required internal MAE rules */
161 #define SFC_MAE_NB_RULES_MAX (SFC_MAE_NB_SWITCHDEV_RULES + \
162 SFC_MAE_NB_REPR_RULES_MAX)
164 struct sfc_mae_rule {
165 efx_mae_match_spec_t *spec;
166 efx_mae_actions_t *actions;
167 efx_mae_aset_id_t action_set;
168 efx_mae_rule_id_t rule_id;
171 struct sfc_mae_internal_rules {
173 * Rules required to sustain switchdev mode or to provide
174 * port representor functionality.
176 struct sfc_mae_rule rules[SFC_MAE_NB_RULES_MAX];
180 /** Assigned switch domain identifier */
181 uint16_t switch_domain_id;
182 /** Assigned switch port identifier */
183 uint16_t switch_port_id;
184 /** NIC support for MAE status */
185 enum sfc_mae_status status;
186 /** Priority level limit for MAE outer rules */
187 unsigned int nb_outer_rule_prios_max;
188 /** Priority level limit for MAE action rules */
189 unsigned int nb_action_rule_prios_max;
190 /** Encapsulation support status */
191 uint32_t encap_types_supported;
192 /** Outer rule registry */
193 struct sfc_mae_outer_rules outer_rules;
194 /** Encap. header registry */
195 struct sfc_mae_encap_headers encap_headers;
196 /** Action set registry */
197 struct sfc_mae_action_sets action_sets;
198 /** Encap. header bounce buffer */
199 struct sfc_mae_bounce_eh bounce_eh;
200 /** Flag indicating whether counter-only RxQ is running */
201 bool counter_rxq_running;
202 /** Counter registry */
203 struct sfc_mae_counter_registry counter_registry;
204 /** Driver-internal flow rules */
205 struct sfc_mae_internal_rules internal_rules;
207 * Switchdev default rules. They forward traffic from PHY port
208 * to PF and vice versa.
210 struct sfc_mae_rule *switchdev_rule_pf_to_ext;
211 struct sfc_mae_rule *switchdev_rule_ext_to_pf;
215 struct sfc_flow_spec;
217 /** This implementation supports double-tagging */
218 #define SFC_MAE_MATCH_VLAN_MAX_NTAGS (2)
220 /** It is possible to keep track of one item ETH and two items VLAN */
221 #define SFC_MAE_L2_MAX_NITEMS (SFC_MAE_MATCH_VLAN_MAX_NTAGS + 1)
223 /** Auxiliary entry format to keep track of L2 "type" ("inner_type") */
224 struct sfc_mae_ethertype {
229 struct sfc_mae_pattern_data {
231 * Keeps track of "type" ("inner_type") mask and value for each
232 * parsed L2 item in a pattern. These values/masks get filled
233 * in MAE match specification at the end of parsing. Also, this
234 * information is used to conduct consistency checks:
236 * - If an item ETH is followed by a single item VLAN,
237 * the former must have "type" set to one of supported
238 * TPID values (0x8100, 0x88a8, 0x9100, 0x9200, 0x9300),
241 * - If an item ETH is followed by two items VLAN, the
242 * item ETH must have "type" set to one of supported TPID
243 * values (0x88a8, 0x9100, 0x9200, 0x9300), or 0x0000/0x0000,
244 * and the outermost VLAN item must have "inner_type" set
245 * to TPID value 0x8100, or 0x0000/0x0000
247 * - If a L2 item is followed by a L3 one, the former must
248 * indicate "type" ("inner_type") which corresponds to
249 * the protocol used in the L3 item, or 0x0000/0x0000.
251 * In turn, mapping between RTE convention (above requirements) and
252 * MAE fields is non-trivial. The following scheme indicates
253 * which item EtherTypes go to which MAE fields in the case
256 * ETH (0x8100) --> VLAN0_PROTO_BE
257 * VLAN (L3 EtherType) --> ETHER_TYPE_BE
259 * Similarly, in the case of double tagging:
261 * ETH (0x88a8) --> VLAN0_PROTO_BE
262 * VLAN (0x8100) --> VLAN1_PROTO_BE
263 * VLAN (L3 EtherType) --> ETHER_TYPE_BE
265 struct sfc_mae_ethertype ethertypes[SFC_MAE_L2_MAX_NITEMS];
267 rte_be16_t tci_masks[SFC_MAE_MATCH_VLAN_MAX_NTAGS];
269 unsigned int nb_vlan_tags;
272 * L3 requirement for the innermost L2 item's "type" ("inner_type").
273 * This contains one of:
274 * - 0x0800/0xffff: IPV4
275 * - 0x86dd/0xffff: IPV6
276 * - 0x0000/0x0000: no L3 item
278 struct sfc_mae_ethertype innermost_ethertype_restriction;
281 * The following two fields keep track of L3 "proto" mask and value.
282 * The corresponding fields get filled in MAE match specification
283 * at the end of parsing. Also, the information is used by a
284 * post-check to enforce consistency requirements:
286 * - If a L3 item is followed by an item TCP, the former has
287 * its "proto" set to either 0x06/0xff or 0x00/0x00.
289 * - If a L3 item is followed by an item UDP, the former has
290 * its "proto" set to either 0x11/0xff or 0x00/0x00.
292 uint8_t l3_next_proto_value;
293 uint8_t l3_next_proto_mask;
296 * L4 requirement for L3 item's "proto".
297 * This contains one of:
300 * - 0x00/0x00: no L4 item
302 uint8_t l3_next_proto_restriction_value;
303 uint8_t l3_next_proto_restriction_mask;
305 /* Projected state of EFX_MAE_FIELD_HAS_OVLAN match bit */
306 bool has_ovlan_value;
309 /* Projected state of EFX_MAE_FIELD_HAS_IVLAN match bit */
310 bool has_ivlan_value;
314 struct sfc_mae_parse_ctx {
315 struct sfc_adapter *sa;
316 efx_mae_match_spec_t *match_spec_action;
317 efx_mae_match_spec_t *match_spec_outer;
319 * This points to either of the above two specifications depending
320 * on which part of the pattern is being parsed (outer / inner).
322 efx_mae_match_spec_t *match_spec;
324 * This points to either "field_ids_remap_to_encap"
325 * or "field_ids_no_remap" (see sfc_mae.c) depending on
326 * which part of the pattern is being parsed.
328 const efx_mae_field_id_t *field_ids_remap;
329 /* These two fields correspond to the tunnel-specific default mask. */
330 size_t tunnel_def_mask_size;
331 const void *tunnel_def_mask;
332 bool match_mport_set;
333 enum sfc_flow_tunnel_rule_type ft_rule_type;
334 struct sfc_mae_pattern_data pattern_data;
335 efx_tunnel_protocol_t encap_type;
336 const struct rte_flow_item *pattern;
337 unsigned int priority;
338 struct sfc_flow_tunnel *ft;
341 int sfc_mae_attach(struct sfc_adapter *sa);
342 void sfc_mae_detach(struct sfc_adapter *sa);
343 sfc_flow_cleanup_cb_t sfc_mae_flow_cleanup;
344 int sfc_mae_rule_parse_pattern(struct sfc_adapter *sa,
345 const struct rte_flow_item pattern[],
346 struct sfc_flow_spec_mae *spec,
347 struct rte_flow_error *error);
348 int sfc_mae_rule_parse_actions(struct sfc_adapter *sa,
349 const struct rte_flow_action actions[],
350 struct sfc_flow_spec_mae *spec_mae,
351 struct rte_flow_error *error);
352 sfc_flow_verify_cb_t sfc_mae_flow_verify;
353 sfc_flow_insert_cb_t sfc_mae_flow_insert;
354 sfc_flow_remove_cb_t sfc_mae_flow_remove;
355 sfc_flow_query_cb_t sfc_mae_flow_query;
358 * The value used to represent the lowest priority.
359 * Used in MAE rule API.
361 #define SFC_MAE_RULE_PRIO_LOWEST (-1)
364 * Insert a driver-internal flow rule that matches traffic originating from
365 * some m-port selector and redirects it to another one
366 * (eg. PF --> PHY, PHY --> PF).
368 * If requested priority is negative, use the lowest priority.
370 int sfc_mae_rule_add_mport_match_deliver(struct sfc_adapter *sa,
371 const efx_mport_sel_t *mport_match,
372 const efx_mport_sel_t *mport_deliver,
373 int prio, struct sfc_mae_rule **rulep);
374 void sfc_mae_rule_del(struct sfc_adapter *sa, struct sfc_mae_rule *rule);
375 int sfc_mae_switchdev_init(struct sfc_adapter *sa);
376 void sfc_mae_switchdev_fini(struct sfc_adapter *sa);
381 #endif /* _SFC_MAE_H */