1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2021 Xilinx, Inc.
5 #ifndef _SFC_NIC_DMA_DP_H
6 #define _SFC_NIC_DMA_DP_H
8 #include <rte_common.h>
14 #define SFC_NIC_DMA_REGIONS_MAX 2
16 struct sfc_nic_dma_region {
22 /** Driver cache for NIC DMA regions */
23 struct sfc_nic_dma_info {
24 struct sfc_nic_dma_region regions[SFC_NIC_DMA_REGIONS_MAX];
25 unsigned int nb_regions;
28 static inline rte_iova_t
29 sfc_nic_dma_map(const struct sfc_nic_dma_info *nic_dma_info,
30 rte_iova_t trgt_addr, size_t len)
34 for (i = 0; i < nic_dma_info->nb_regions; i++) {
35 const struct sfc_nic_dma_region *region;
37 region = &nic_dma_info->regions[i];
39 * Do not sum trgt_addr and len to avoid overflow
42 if (region->trgt_base <= trgt_addr &&
43 trgt_addr <= region->trgt_end &&
44 len <= region->trgt_end - trgt_addr) {
45 return region->nic_base +
46 (trgt_addr - region->trgt_base);
57 #endif /* _SFC_NIC_DMA_DP_H */