1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016-2018 Solarflare Communications Inc.
6 * This software was jointly developed between OKTET Labs (under contract
7 * for Solarflare) and Solarflare Communications, Inc.
14 #include "sfc_kvargs.h"
16 /** Default MAC statistics update period is 1 second */
17 #define SFC_MAC_STATS_UPDATE_PERIOD_MS_DEF MS_PER_S
19 /** The number of microseconds to sleep on attempt to get statistics update */
20 #define SFC_MAC_STATS_UPDATE_RETRY_INTERVAL_US 10
22 /** The number of attempts to await arrival of freshly generated statistics */
23 #define SFC_MAC_STATS_UPDATE_NB_ATTEMPTS 50
26 * Update MAC statistics in the buffer.
32 * @retval EAGAIN Try again
33 * @retval ENOMEM Memory allocation failure
36 sfc_port_update_mac_stats(struct sfc_adapter *sa)
38 struct sfc_port *port = &sa->port;
39 efsys_mem_t *esmp = &port->mac_stats_dma_mem;
40 uint32_t *genp = NULL;
42 unsigned int nb_attempts = 0;
45 SFC_ASSERT(rte_spinlock_is_locked(&port->mac_stats_lock));
47 if (sa->state != SFC_ADAPTER_STARTED)
51 * If periodic statistics DMA'ing is off or if not supported,
52 * make a manual request and keep an eye on timer if need be
54 if (!port->mac_stats_periodic_dma_supported ||
55 (port->mac_stats_update_period_ms == 0)) {
56 if (port->mac_stats_update_period_ms != 0) {
57 uint64_t timestamp = sfc_get_system_msecs();
60 port->mac_stats_last_request_timestamp) <
61 port->mac_stats_update_period_ms)
64 port->mac_stats_last_request_timestamp = timestamp;
67 rc = efx_mac_stats_upload(sa->nic, esmp);
71 genp = &port->mac_stats_update_generation;
77 rte_delay_us(SFC_MAC_STATS_UPDATE_RETRY_INTERVAL_US);
79 rc = efx_mac_stats_update(sa->nic, esmp,
80 port->mac_stats_buf, genp);
84 } while ((genp != NULL) && (*genp == gen_old) &&
85 (++nb_attempts < SFC_MAC_STATS_UPDATE_NB_ATTEMPTS));
91 sfc_port_reset_mac_stats(struct sfc_adapter *sa)
93 struct sfc_port *port = &sa->port;
96 rte_spinlock_lock(&port->mac_stats_lock);
97 rc = efx_mac_stats_clear(sa->nic);
98 rte_spinlock_unlock(&port->mac_stats_lock);
104 sfc_port_init_dev_link(struct sfc_adapter *sa)
106 struct rte_eth_link *dev_link = &sa->eth_dev->data->dev_link;
108 efx_link_mode_t link_mode;
109 struct rte_eth_link current_link;
111 rc = efx_port_poll(sa->nic, &link_mode);
115 sfc_port_link_mode_to_info(link_mode, ¤t_link);
117 EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t));
118 rte_atomic64_set((rte_atomic64_t *)dev_link,
119 *(uint64_t *)¤t_link);
124 #if EFSYS_OPT_LOOPBACK
126 static efx_link_mode_t
127 sfc_port_phy_caps_to_max_link_speed(uint32_t phy_caps)
129 if (phy_caps & (1u << EFX_PHY_CAP_100000FDX))
130 return EFX_LINK_100000FDX;
131 if (phy_caps & (1u << EFX_PHY_CAP_50000FDX))
132 return EFX_LINK_50000FDX;
133 if (phy_caps & (1u << EFX_PHY_CAP_40000FDX))
134 return EFX_LINK_40000FDX;
135 if (phy_caps & (1u << EFX_PHY_CAP_25000FDX))
136 return EFX_LINK_25000FDX;
137 if (phy_caps & (1u << EFX_PHY_CAP_10000FDX))
138 return EFX_LINK_10000FDX;
139 if (phy_caps & (1u << EFX_PHY_CAP_1000FDX))
140 return EFX_LINK_1000FDX;
141 return EFX_LINK_UNKNOWN;
147 sfc_port_start(struct sfc_adapter *sa)
149 struct sfc_port *port = &sa->port;
151 uint32_t phy_adv_cap;
152 const uint32_t phy_pause_caps =
153 ((1u << EFX_PHY_CAP_PAUSE) | (1u << EFX_PHY_CAP_ASYM));
156 sfc_log_init(sa, "entry");
158 sfc_log_init(sa, "init filters");
159 rc = efx_filter_init(sa->nic);
161 goto fail_filter_init;
163 sfc_log_init(sa, "init port");
164 rc = efx_port_init(sa->nic);
168 #if EFSYS_OPT_LOOPBACK
169 if (sa->eth_dev->data->dev_conf.lpbk_mode != 0) {
170 efx_link_mode_t link_mode;
173 sfc_port_phy_caps_to_max_link_speed(port->phy_adv_cap);
174 sfc_log_init(sa, "set loopback link_mode=%u type=%u", link_mode,
175 sa->eth_dev->data->dev_conf.lpbk_mode);
176 rc = efx_port_loopback_set(sa->nic, link_mode,
177 sa->eth_dev->data->dev_conf.lpbk_mode);
179 goto fail_loopback_set;
183 sfc_log_init(sa, "set flow control to %#x autoneg=%u",
184 port->flow_ctrl, port->flow_ctrl_autoneg);
185 rc = efx_mac_fcntl_set(sa->nic, port->flow_ctrl,
186 port->flow_ctrl_autoneg);
188 goto fail_mac_fcntl_set;
190 /* Preserve pause capabilities set by above efx_mac_fcntl_set() */
191 efx_phy_adv_cap_get(sa->nic, EFX_PHY_CAP_CURRENT, &phy_adv_cap);
192 SFC_ASSERT((port->phy_adv_cap & phy_pause_caps) == 0);
193 phy_adv_cap = port->phy_adv_cap | (phy_adv_cap & phy_pause_caps);
196 * No controls for FEC yet. Use default FEC mode.
197 * I.e. advertise everything supported (*_FEC=1), but do not request
198 * anything explicitly (*_FEC_REQUESTED=0).
200 phy_adv_cap |= port->phy_adv_cap_mask &
201 (1u << EFX_PHY_CAP_BASER_FEC |
202 1u << EFX_PHY_CAP_RS_FEC |
203 1u << EFX_PHY_CAP_25G_BASER_FEC);
205 sfc_log_init(sa, "set phy adv caps to %#x", phy_adv_cap);
206 rc = efx_phy_adv_cap_set(sa->nic, phy_adv_cap);
208 goto fail_phy_adv_cap_set;
210 sfc_log_init(sa, "set MAC PDU %u", (unsigned int)port->pdu);
211 rc = efx_mac_pdu_set(sa->nic, port->pdu);
213 goto fail_mac_pdu_set;
215 if (!port->isolated) {
216 struct ether_addr *addr = &port->default_mac_addr;
218 sfc_log_init(sa, "set MAC address");
219 rc = efx_mac_addr_set(sa->nic, addr->addr_bytes);
221 goto fail_mac_addr_set;
223 sfc_log_init(sa, "set MAC filters");
224 port->promisc = (sa->eth_dev->data->promiscuous != 0) ?
226 port->allmulti = (sa->eth_dev->data->all_multicast != 0) ?
228 rc = sfc_set_rx_mode(sa);
230 goto fail_mac_filter_set;
232 sfc_log_init(sa, "set multicast address list");
233 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs,
234 port->nb_mcast_addrs);
236 goto fail_mcast_address_list_set;
239 if (port->mac_stats_reset_pending) {
240 rc = sfc_port_reset_mac_stats(sa);
242 sfc_err(sa, "statistics reset failed (requested "
243 "before the port was started)");
245 port->mac_stats_reset_pending = B_FALSE;
248 efx_mac_stats_get_mask(sa->nic, port->mac_stats_mask,
249 sizeof(port->mac_stats_mask));
251 for (i = 0, port->mac_stats_nb_supported = 0; i < EFX_MAC_NSTATS; ++i)
252 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i))
253 port->mac_stats_nb_supported++;
255 port->mac_stats_update_generation = 0;
257 if (port->mac_stats_update_period_ms != 0) {
259 * Update MAC stats using periodic DMA;
260 * any positive update interval different from
261 * 1000 ms can be set only on SFN8xxx provided
262 * that FW version is 6.2.1.1033 or higher
264 sfc_log_init(sa, "request MAC stats DMA'ing");
265 rc = efx_mac_stats_periodic(sa->nic, &port->mac_stats_dma_mem,
266 port->mac_stats_update_period_ms,
269 port->mac_stats_periodic_dma_supported = B_TRUE;
270 } else if (rc == EOPNOTSUPP) {
271 port->mac_stats_periodic_dma_supported = B_FALSE;
272 port->mac_stats_last_request_timestamp = 0;
274 goto fail_mac_stats_periodic;
278 if ((port->mac_stats_update_period_ms != 0) &&
279 port->mac_stats_periodic_dma_supported) {
281 * Request an explicit MAC stats upload immediately to
282 * preclude bogus figures readback if the user decides
283 * to read stats before periodic DMA is really started
285 rc = efx_mac_stats_upload(sa->nic, &port->mac_stats_dma_mem);
287 goto fail_mac_stats_upload;
290 sfc_log_init(sa, "disable MAC drain");
291 rc = efx_mac_drain(sa->nic, B_FALSE);
295 /* Synchronize link status knowledge */
296 rc = sfc_port_init_dev_link(sa);
298 goto fail_port_init_dev_link;
300 sfc_log_init(sa, "done");
303 fail_port_init_dev_link:
304 (void)efx_mac_drain(sa->nic, B_TRUE);
307 fail_mac_stats_upload:
308 (void)efx_mac_stats_periodic(sa->nic, &port->mac_stats_dma_mem,
311 fail_mac_stats_periodic:
312 fail_mcast_address_list_set:
316 fail_phy_adv_cap_set:
318 #if EFSYS_OPT_LOOPBACK
321 efx_port_fini(sa->nic);
324 efx_filter_fini(sa->nic);
327 sfc_log_init(sa, "failed %d", rc);
332 sfc_port_stop(struct sfc_adapter *sa)
334 sfc_log_init(sa, "entry");
336 efx_mac_drain(sa->nic, B_TRUE);
338 (void)efx_mac_stats_periodic(sa->nic, &sa->port.mac_stats_dma_mem,
341 efx_port_fini(sa->nic);
342 efx_filter_fini(sa->nic);
344 sfc_log_init(sa, "done");
348 sfc_port_configure(struct sfc_adapter *sa)
350 const struct rte_eth_dev_data *dev_data = sa->eth_dev->data;
351 struct sfc_port *port = &sa->port;
352 const struct rte_eth_rxmode *rxmode = &dev_data->dev_conf.rxmode;
354 sfc_log_init(sa, "entry");
356 if (rxmode->offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
357 port->pdu = rxmode->max_rx_pkt_len;
359 port->pdu = EFX_MAC_PDU(dev_data->mtu);
365 sfc_port_close(struct sfc_adapter *sa)
367 sfc_log_init(sa, "entry");
371 sfc_port_attach(struct sfc_adapter *sa)
373 struct sfc_port *port = &sa->port;
374 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
375 const struct ether_addr *from;
377 size_t mac_stats_size;
378 long kvarg_stats_update_period_ms;
381 sfc_log_init(sa, "entry");
383 efx_phy_adv_cap_get(sa->nic, EFX_PHY_CAP_PERM, &port->phy_adv_cap_mask);
385 /* Enable flow control by default */
386 port->flow_ctrl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
387 port->flow_ctrl_autoneg = B_TRUE;
389 RTE_BUILD_BUG_ON(sizeof(encp->enc_mac_addr) != sizeof(*from));
390 from = (const struct ether_addr *)(encp->enc_mac_addr);
391 ether_addr_copy(from, &port->default_mac_addr);
393 port->max_mcast_addrs = EFX_MAC_MULTICAST_LIST_MAX;
394 port->nb_mcast_addrs = 0;
395 port->mcast_addrs = rte_calloc_socket("mcast_addr_list_buf",
396 port->max_mcast_addrs,
399 if (port->mcast_addrs == NULL) {
401 goto fail_mcast_addr_list_buf_alloc;
404 rte_spinlock_init(&port->mac_stats_lock);
407 port->mac_stats_buf = rte_calloc_socket("mac_stats_buf", EFX_MAC_NSTATS,
410 if (port->mac_stats_buf == NULL)
411 goto fail_mac_stats_buf_alloc;
413 mac_nstats = efx_nic_cfg_get(sa->nic)->enc_mac_stats_nstats;
414 mac_stats_size = RTE_ALIGN(mac_nstats * sizeof(uint64_t), EFX_BUF_SIZE);
415 rc = sfc_dma_alloc(sa, "mac_stats", 0, mac_stats_size,
416 sa->socket_id, &port->mac_stats_dma_mem);
418 goto fail_mac_stats_dma_alloc;
420 port->mac_stats_reset_pending = B_FALSE;
422 kvarg_stats_update_period_ms = SFC_MAC_STATS_UPDATE_PERIOD_MS_DEF;
424 rc = sfc_kvargs_process(sa, SFC_KVARG_STATS_UPDATE_PERIOD_MS,
425 sfc_kvarg_long_handler,
426 &kvarg_stats_update_period_ms);
428 ((kvarg_stats_update_period_ms < 0) ||
429 (kvarg_stats_update_period_ms > UINT16_MAX))) {
430 sfc_err(sa, "wrong '" SFC_KVARG_STATS_UPDATE_PERIOD_MS "' "
431 "was set (%ld);", kvarg_stats_update_period_ms);
432 sfc_err(sa, "it must not be less than 0 "
433 "or greater than %" PRIu16, UINT16_MAX);
435 goto fail_kvarg_stats_update_period_ms;
436 } else if (rc != 0) {
437 goto fail_kvarg_stats_update_period_ms;
440 port->mac_stats_update_period_ms = kvarg_stats_update_period_ms;
442 sfc_log_init(sa, "done");
445 fail_kvarg_stats_update_period_ms:
446 sfc_dma_free(sa, &port->mac_stats_dma_mem);
448 fail_mac_stats_dma_alloc:
449 rte_free(port->mac_stats_buf);
451 fail_mac_stats_buf_alloc:
452 rte_free(port->mcast_addrs);
454 fail_mcast_addr_list_buf_alloc:
455 sfc_log_init(sa, "failed %d", rc);
460 sfc_port_detach(struct sfc_adapter *sa)
462 struct sfc_port *port = &sa->port;
464 sfc_log_init(sa, "entry");
466 sfc_dma_free(sa, &port->mac_stats_dma_mem);
467 rte_free(port->mac_stats_buf);
469 rte_free(port->mcast_addrs);
471 sfc_log_init(sa, "done");
475 sfc_set_rx_mode(struct sfc_adapter *sa)
477 struct sfc_port *port = &sa->port;
480 rc = efx_mac_filter_set(sa->nic, port->promisc, B_TRUE,
481 port->promisc || port->allmulti, B_TRUE);
487 sfc_port_link_mode_to_info(efx_link_mode_t link_mode,
488 struct rte_eth_link *link_info)
490 SFC_ASSERT(link_mode < EFX_LINK_NMODES);
492 memset(link_info, 0, sizeof(*link_info));
493 if ((link_mode == EFX_LINK_DOWN) || (link_mode == EFX_LINK_UNKNOWN))
494 link_info->link_status = ETH_LINK_DOWN;
496 link_info->link_status = ETH_LINK_UP;
500 link_info->link_speed = ETH_SPEED_NUM_10M;
501 link_info->link_duplex = ETH_LINK_HALF_DUPLEX;
504 link_info->link_speed = ETH_SPEED_NUM_10M;
505 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
507 case EFX_LINK_100HDX:
508 link_info->link_speed = ETH_SPEED_NUM_100M;
509 link_info->link_duplex = ETH_LINK_HALF_DUPLEX;
511 case EFX_LINK_100FDX:
512 link_info->link_speed = ETH_SPEED_NUM_100M;
513 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
515 case EFX_LINK_1000HDX:
516 link_info->link_speed = ETH_SPEED_NUM_1G;
517 link_info->link_duplex = ETH_LINK_HALF_DUPLEX;
519 case EFX_LINK_1000FDX:
520 link_info->link_speed = ETH_SPEED_NUM_1G;
521 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
523 case EFX_LINK_10000FDX:
524 link_info->link_speed = ETH_SPEED_NUM_10G;
525 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
527 case EFX_LINK_25000FDX:
528 link_info->link_speed = ETH_SPEED_NUM_25G;
529 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
531 case EFX_LINK_40000FDX:
532 link_info->link_speed = ETH_SPEED_NUM_40G;
533 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
535 case EFX_LINK_50000FDX:
536 link_info->link_speed = ETH_SPEED_NUM_50G;
537 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
539 case EFX_LINK_100000FDX:
540 link_info->link_speed = ETH_SPEED_NUM_100G;
541 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
546 case EFX_LINK_UNKNOWN:
548 link_info->link_speed = ETH_SPEED_NUM_NONE;
549 link_info->link_duplex = 0;
553 link_info->link_autoneg = ETH_LINK_AUTONEG;