1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016-2018 Solarflare Communications Inc.
6 * This software was jointly developed between OKTET Labs (under contract
7 * for Solarflare) and Solarflare Communications, Inc.
14 #include "sfc_kvargs.h"
16 /** Default MAC statistics update period is 1 second */
17 #define SFC_MAC_STATS_UPDATE_PERIOD_MS_DEF MS_PER_S
19 /** The number of microseconds to sleep on attempt to get statistics update */
20 #define SFC_MAC_STATS_UPDATE_RETRY_INTERVAL_US 10
22 /** The number of attempts to await arrival of freshly generated statistics */
23 #define SFC_MAC_STATS_UPDATE_NB_ATTEMPTS 50
26 * Update MAC statistics in the buffer.
32 * @retval EAGAIN Try again
33 * @retval ENOMEM Memory allocation failure
36 sfc_port_update_mac_stats(struct sfc_adapter *sa)
38 struct sfc_port *port = &sa->port;
39 efsys_mem_t *esmp = &port->mac_stats_dma_mem;
40 uint32_t *genp = NULL;
42 unsigned int nb_attempts = 0;
45 SFC_ASSERT(rte_spinlock_is_locked(&port->mac_stats_lock));
47 if (sa->state != SFC_ADAPTER_STARTED)
51 * If periodic statistics DMA'ing is off or if not supported,
52 * make a manual request and keep an eye on timer if need be
54 if (!port->mac_stats_periodic_dma_supported ||
55 (port->mac_stats_update_period_ms == 0)) {
56 if (port->mac_stats_update_period_ms != 0) {
57 uint64_t timestamp = sfc_get_system_msecs();
60 port->mac_stats_last_request_timestamp) <
61 port->mac_stats_update_period_ms)
64 port->mac_stats_last_request_timestamp = timestamp;
67 rc = efx_mac_stats_upload(sa->nic, esmp);
71 genp = &port->mac_stats_update_generation;
77 rte_delay_us(SFC_MAC_STATS_UPDATE_RETRY_INTERVAL_US);
79 rc = efx_mac_stats_update(sa->nic, esmp,
80 port->mac_stats_buf, genp);
84 } while ((genp != NULL) && (*genp == gen_old) &&
85 (++nb_attempts < SFC_MAC_STATS_UPDATE_NB_ATTEMPTS));
91 sfc_port_reset_mac_stats(struct sfc_adapter *sa)
93 struct sfc_port *port = &sa->port;
96 rte_spinlock_lock(&port->mac_stats_lock);
97 rc = efx_mac_stats_clear(sa->nic);
98 rte_spinlock_unlock(&port->mac_stats_lock);
104 sfc_port_init_dev_link(struct sfc_adapter *sa)
106 struct rte_eth_link *dev_link = &sa->eth_dev->data->dev_link;
108 efx_link_mode_t link_mode;
109 struct rte_eth_link current_link;
111 rc = efx_port_poll(sa->nic, &link_mode);
115 sfc_port_link_mode_to_info(link_mode, ¤t_link);
117 EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t));
118 rte_atomic64_set((rte_atomic64_t *)dev_link,
119 *(uint64_t *)¤t_link);
124 #if EFSYS_OPT_LOOPBACK
126 static efx_link_mode_t
127 sfc_port_phy_caps_to_max_link_speed(uint32_t phy_caps)
129 if (phy_caps & (1u << EFX_PHY_CAP_100000FDX))
130 return EFX_LINK_100000FDX;
131 if (phy_caps & (1u << EFX_PHY_CAP_50000FDX))
132 return EFX_LINK_50000FDX;
133 if (phy_caps & (1u << EFX_PHY_CAP_40000FDX))
134 return EFX_LINK_40000FDX;
135 if (phy_caps & (1u << EFX_PHY_CAP_25000FDX))
136 return EFX_LINK_25000FDX;
137 if (phy_caps & (1u << EFX_PHY_CAP_10000FDX))
138 return EFX_LINK_10000FDX;
139 if (phy_caps & (1u << EFX_PHY_CAP_1000FDX))
140 return EFX_LINK_1000FDX;
141 return EFX_LINK_UNKNOWN;
147 sfc_port_start(struct sfc_adapter *sa)
149 struct sfc_port *port = &sa->port;
151 uint32_t phy_adv_cap;
152 const uint32_t phy_pause_caps =
153 ((1u << EFX_PHY_CAP_PAUSE) | (1u << EFX_PHY_CAP_ASYM));
156 sfc_log_init(sa, "entry");
158 sfc_log_init(sa, "init filters");
159 rc = efx_filter_init(sa->nic);
161 goto fail_filter_init;
163 sfc_log_init(sa, "init port");
164 rc = efx_port_init(sa->nic);
168 #if EFSYS_OPT_LOOPBACK
169 if (sa->eth_dev->data->dev_conf.lpbk_mode != 0) {
170 efx_link_mode_t link_mode;
173 sfc_port_phy_caps_to_max_link_speed(port->phy_adv_cap);
174 sfc_log_init(sa, "set loopback link_mode=%u type=%u", link_mode,
175 sa->eth_dev->data->dev_conf.lpbk_mode);
176 rc = efx_port_loopback_set(sa->nic, link_mode,
177 sa->eth_dev->data->dev_conf.lpbk_mode);
179 goto fail_loopback_set;
183 sfc_log_init(sa, "set flow control to %#x autoneg=%u",
184 port->flow_ctrl, port->flow_ctrl_autoneg);
185 rc = efx_mac_fcntl_set(sa->nic, port->flow_ctrl,
186 port->flow_ctrl_autoneg);
188 goto fail_mac_fcntl_set;
190 /* Preserve pause capabilities set by above efx_mac_fcntl_set() */
191 efx_phy_adv_cap_get(sa->nic, EFX_PHY_CAP_CURRENT, &phy_adv_cap);
192 SFC_ASSERT((port->phy_adv_cap & phy_pause_caps) == 0);
193 phy_adv_cap = port->phy_adv_cap | (phy_adv_cap & phy_pause_caps);
195 sfc_log_init(sa, "set phy adv caps to %#x", phy_adv_cap);
196 rc = efx_phy_adv_cap_set(sa->nic, phy_adv_cap);
198 goto fail_phy_adv_cap_set;
200 sfc_log_init(sa, "set MAC PDU %u", (unsigned int)port->pdu);
201 rc = efx_mac_pdu_set(sa->nic, port->pdu);
203 goto fail_mac_pdu_set;
205 if (!port->isolated) {
206 struct ether_addr *addr = &port->default_mac_addr;
208 sfc_log_init(sa, "set MAC address");
209 rc = efx_mac_addr_set(sa->nic, addr->addr_bytes);
211 goto fail_mac_addr_set;
213 sfc_log_init(sa, "set MAC filters");
214 port->promisc = (sa->eth_dev->data->promiscuous != 0) ?
216 port->allmulti = (sa->eth_dev->data->all_multicast != 0) ?
218 rc = sfc_set_rx_mode(sa);
220 goto fail_mac_filter_set;
222 sfc_log_init(sa, "set multicast address list");
223 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs,
224 port->nb_mcast_addrs);
226 goto fail_mcast_address_list_set;
229 if (port->mac_stats_reset_pending) {
230 rc = sfc_port_reset_mac_stats(sa);
232 sfc_err(sa, "statistics reset failed (requested "
233 "before the port was started)");
235 port->mac_stats_reset_pending = B_FALSE;
238 efx_mac_stats_get_mask(sa->nic, port->mac_stats_mask,
239 sizeof(port->mac_stats_mask));
241 for (i = 0, port->mac_stats_nb_supported = 0; i < EFX_MAC_NSTATS; ++i)
242 if (EFX_MAC_STAT_SUPPORTED(port->mac_stats_mask, i))
243 port->mac_stats_nb_supported++;
245 port->mac_stats_update_generation = 0;
247 if (port->mac_stats_update_period_ms != 0) {
249 * Update MAC stats using periodic DMA;
250 * any positive update interval different from
251 * 1000 ms can be set only on SFN8xxx provided
252 * that FW version is 6.2.1.1033 or higher
254 sfc_log_init(sa, "request MAC stats DMA'ing");
255 rc = efx_mac_stats_periodic(sa->nic, &port->mac_stats_dma_mem,
256 port->mac_stats_update_period_ms,
259 port->mac_stats_periodic_dma_supported = B_TRUE;
260 } else if (rc == EOPNOTSUPP) {
261 port->mac_stats_periodic_dma_supported = B_FALSE;
262 port->mac_stats_last_request_timestamp = 0;
264 goto fail_mac_stats_periodic;
268 if ((port->mac_stats_update_period_ms != 0) &&
269 port->mac_stats_periodic_dma_supported) {
271 * Request an explicit MAC stats upload immediately to
272 * preclude bogus figures readback if the user decides
273 * to read stats before periodic DMA is really started
275 rc = efx_mac_stats_upload(sa->nic, &port->mac_stats_dma_mem);
277 goto fail_mac_stats_upload;
280 sfc_log_init(sa, "disable MAC drain");
281 rc = efx_mac_drain(sa->nic, B_FALSE);
285 /* Synchronize link status knowledge */
286 rc = sfc_port_init_dev_link(sa);
288 goto fail_port_init_dev_link;
290 sfc_log_init(sa, "done");
293 fail_port_init_dev_link:
294 (void)efx_mac_drain(sa->nic, B_TRUE);
297 fail_mac_stats_upload:
298 (void)efx_mac_stats_periodic(sa->nic, &port->mac_stats_dma_mem,
301 fail_mac_stats_periodic:
302 fail_mcast_address_list_set:
306 fail_phy_adv_cap_set:
308 #if EFSYS_OPT_LOOPBACK
311 efx_port_fini(sa->nic);
314 efx_filter_fini(sa->nic);
317 sfc_log_init(sa, "failed %d", rc);
322 sfc_port_stop(struct sfc_adapter *sa)
324 sfc_log_init(sa, "entry");
326 efx_mac_drain(sa->nic, B_TRUE);
328 (void)efx_mac_stats_periodic(sa->nic, &sa->port.mac_stats_dma_mem,
331 efx_port_fini(sa->nic);
332 efx_filter_fini(sa->nic);
334 sfc_log_init(sa, "done");
338 sfc_port_configure(struct sfc_adapter *sa)
340 const struct rte_eth_dev_data *dev_data = sa->eth_dev->data;
341 struct sfc_port *port = &sa->port;
342 const struct rte_eth_rxmode *rxmode = &dev_data->dev_conf.rxmode;
344 sfc_log_init(sa, "entry");
346 if (rxmode->offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
347 port->pdu = rxmode->max_rx_pkt_len;
349 port->pdu = EFX_MAC_PDU(dev_data->mtu);
355 sfc_port_close(struct sfc_adapter *sa)
357 sfc_log_init(sa, "entry");
361 sfc_port_attach(struct sfc_adapter *sa)
363 struct sfc_port *port = &sa->port;
364 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic);
365 const struct ether_addr *from;
367 size_t mac_stats_size;
368 long kvarg_stats_update_period_ms;
371 sfc_log_init(sa, "entry");
373 efx_phy_adv_cap_get(sa->nic, EFX_PHY_CAP_PERM, &port->phy_adv_cap_mask);
375 /* Enable flow control by default */
376 port->flow_ctrl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
377 port->flow_ctrl_autoneg = B_TRUE;
379 RTE_BUILD_BUG_ON(sizeof(encp->enc_mac_addr) != sizeof(*from));
380 from = (const struct ether_addr *)(encp->enc_mac_addr);
381 ether_addr_copy(from, &port->default_mac_addr);
383 port->max_mcast_addrs = EFX_MAC_MULTICAST_LIST_MAX;
384 port->nb_mcast_addrs = 0;
385 port->mcast_addrs = rte_calloc_socket("mcast_addr_list_buf",
386 port->max_mcast_addrs,
389 if (port->mcast_addrs == NULL) {
391 goto fail_mcast_addr_list_buf_alloc;
394 rte_spinlock_init(&port->mac_stats_lock);
397 port->mac_stats_buf = rte_calloc_socket("mac_stats_buf", EFX_MAC_NSTATS,
400 if (port->mac_stats_buf == NULL)
401 goto fail_mac_stats_buf_alloc;
403 mac_nstats = efx_nic_cfg_get(sa->nic)->enc_mac_stats_nstats;
404 mac_stats_size = RTE_ALIGN(mac_nstats * sizeof(uint64_t), EFX_BUF_SIZE);
405 rc = sfc_dma_alloc(sa, "mac_stats", 0, mac_stats_size,
406 sa->socket_id, &port->mac_stats_dma_mem);
408 goto fail_mac_stats_dma_alloc;
410 port->mac_stats_reset_pending = B_FALSE;
412 kvarg_stats_update_period_ms = SFC_MAC_STATS_UPDATE_PERIOD_MS_DEF;
414 rc = sfc_kvargs_process(sa, SFC_KVARG_STATS_UPDATE_PERIOD_MS,
415 sfc_kvarg_long_handler,
416 &kvarg_stats_update_period_ms);
418 ((kvarg_stats_update_period_ms < 0) ||
419 (kvarg_stats_update_period_ms > UINT16_MAX))) {
420 sfc_err(sa, "wrong '" SFC_KVARG_STATS_UPDATE_PERIOD_MS "' "
421 "was set (%ld);", kvarg_stats_update_period_ms);
422 sfc_err(sa, "it must not be less than 0 "
423 "or greater than %" PRIu16, UINT16_MAX);
425 goto fail_kvarg_stats_update_period_ms;
426 } else if (rc != 0) {
427 goto fail_kvarg_stats_update_period_ms;
430 port->mac_stats_update_period_ms = kvarg_stats_update_period_ms;
432 sfc_log_init(sa, "done");
435 fail_kvarg_stats_update_period_ms:
436 sfc_dma_free(sa, &port->mac_stats_dma_mem);
438 fail_mac_stats_dma_alloc:
439 rte_free(port->mac_stats_buf);
441 fail_mac_stats_buf_alloc:
442 rte_free(port->mcast_addrs);
444 fail_mcast_addr_list_buf_alloc:
445 sfc_log_init(sa, "failed %d", rc);
450 sfc_port_detach(struct sfc_adapter *sa)
452 struct sfc_port *port = &sa->port;
454 sfc_log_init(sa, "entry");
456 sfc_dma_free(sa, &port->mac_stats_dma_mem);
457 rte_free(port->mac_stats_buf);
459 rte_free(port->mcast_addrs);
461 sfc_log_init(sa, "done");
465 sfc_set_rx_mode(struct sfc_adapter *sa)
467 struct sfc_port *port = &sa->port;
470 rc = efx_mac_filter_set(sa->nic, port->promisc, B_TRUE,
471 port->promisc || port->allmulti, B_TRUE);
477 sfc_port_link_mode_to_info(efx_link_mode_t link_mode,
478 struct rte_eth_link *link_info)
480 SFC_ASSERT(link_mode < EFX_LINK_NMODES);
482 memset(link_info, 0, sizeof(*link_info));
483 if ((link_mode == EFX_LINK_DOWN) || (link_mode == EFX_LINK_UNKNOWN))
484 link_info->link_status = ETH_LINK_DOWN;
486 link_info->link_status = ETH_LINK_UP;
490 link_info->link_speed = ETH_SPEED_NUM_10M;
491 link_info->link_duplex = ETH_LINK_HALF_DUPLEX;
494 link_info->link_speed = ETH_SPEED_NUM_10M;
495 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
497 case EFX_LINK_100HDX:
498 link_info->link_speed = ETH_SPEED_NUM_100M;
499 link_info->link_duplex = ETH_LINK_HALF_DUPLEX;
501 case EFX_LINK_100FDX:
502 link_info->link_speed = ETH_SPEED_NUM_100M;
503 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
505 case EFX_LINK_1000HDX:
506 link_info->link_speed = ETH_SPEED_NUM_1G;
507 link_info->link_duplex = ETH_LINK_HALF_DUPLEX;
509 case EFX_LINK_1000FDX:
510 link_info->link_speed = ETH_SPEED_NUM_1G;
511 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
513 case EFX_LINK_10000FDX:
514 link_info->link_speed = ETH_SPEED_NUM_10G;
515 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
517 case EFX_LINK_25000FDX:
518 link_info->link_speed = ETH_SPEED_NUM_25G;
519 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
521 case EFX_LINK_40000FDX:
522 link_info->link_speed = ETH_SPEED_NUM_40G;
523 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
525 case EFX_LINK_50000FDX:
526 link_info->link_speed = ETH_SPEED_NUM_50G;
527 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
529 case EFX_LINK_100000FDX:
530 link_info->link_speed = ETH_SPEED_NUM_100G;
531 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
536 case EFX_LINK_UNKNOWN:
538 link_info->link_speed = ETH_SPEED_NUM_NONE;
539 link_info->link_duplex = 0;
543 link_info->link_autoneg = ETH_LINK_AUTONEG;